WO2007023731A1 - 高周波スイッチ - Google Patents
高周波スイッチ Download PDFInfo
- Publication number
- WO2007023731A1 WO2007023731A1 PCT/JP2006/316185 JP2006316185W WO2007023731A1 WO 2007023731 A1 WO2007023731 A1 WO 2007023731A1 JP 2006316185 W JP2006316185 W JP 2006316185W WO 2007023731 A1 WO2007023731 A1 WO 2007023731A1
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- WIPO (PCT)
- Prior art keywords
- diode
- signal path
- terminal
- frequency switch
- antenna
- Prior art date
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/005—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
- H04B1/0053—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band
- H04B1/0057—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band using diplexing or multiplexing filters for selecting the desired band
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/44—Transmit/receive switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/44—Transmit/receive switching
- H04B1/48—Transmit/receive switching in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter
Definitions
- the present invention relates to a high frequency switch, and more particularly to a high frequency switch that can be used for a plurality of different mobile communication systems.
- Patent Document 1 discloses, as shown in FIG. 5, a first diode connected in series in a signal path between an antenna terminal ANT and a transmission-side input terminal Tx. D11 and a second diode D12 shunt-connected to the signal path between the antenna terminal ⁇ and the receiving side output terminal Rx, and the signal path between the antenna terminal ANT and the transmitting side input terminal Tx, A signal path that selectively switches the signal path between the antenna terminal ANT and the receiving side output terminal Rx is described.
- the charge accumulation amount varies by about ⁇ 10%.
- the high-frequency switch has a problem that the switching time from the transmission mode to the reception mode becomes as slow as 1 second or more.
- the first and second diodes Dll and D12 are in the on state, the charge Q1 is accumulated in the first diode D11, and the charge Q2 is accumulated in the second diode D12. .
- the control power supply terminal Vc is set to OV in order to switch from the transmission mode to the reception mode, the first and second diodes Dll and D12 discharge the accumulated charges with each other.
- the second diode D12 is quickly turned off.
- the first diode D11 takes time until the accumulated charge Q1 becomes 0, which is much slower than the second diode D12. Will be off. Therefore, the high-frequency switch has a problem that a high-power transmission signal with a slow switching time from the transmission mode to the reception mode wraps around the signal path on the reception side.
- Patent Document 1 Japanese Unexamined Patent Publication No. 2000-223901
- a first object of the present invention is to provide a high-frequency switch with a fast switching time from the transmission mode to the reception mode.
- a second object of the present invention is to provide a high-frequency switch that achieves the first object and can suppress loss of transmission signals and reception signals when power is turned on / off.
- a high-frequency switch according to the present invention includes:
- a first diode connected in series to the transmitting signal path between the antenna terminal and the transmitting input terminal, and a second diode shunt connected to the receiving signal path between the antenna terminal and the receiving output terminal.
- a high frequency switch comprising a switch for selectively switching between the transmission side signal path and the reception side signal path;
- One end of a resistor is connected between the first diode and the second diode, and the other end of the resistor is connected to the ground.
- the charge accumulated in the ON state of the first and second diodes connected in series is immediately discharged to the ground via the resistor. Therefore, regardless of the difference between the charge accumulation amounts of the first and second diodes, the switching time from the transmission mode to the reception mode for switching the control power supply terminal on and off is fast.
- the high frequency switch according to the present invention can be applied to any of a single band compatible type, a dual band compatible type, a triple band compatible type, and a quad band compatible type.
- the other end of the diode shunt-connected to the reception-side output terminal is connected to the control power supply and connected to the ground via a capacitor.
- the control power supply When the control power supply is turned on, a series resonance point with an impedance of 0 is formed by the capacitor and the inductance component when the shunt-side diode is turned on, and leakage of the transmission signal to the reception-side output terminal is reduced.
- the control power is turned off, the capacitor and the capacitance component when the shunt-side diode is off are connected in series. Is done. That is, loss of transmission signals and reception signals can be suppressed.
- the control power supply may be a single power supply (either a positive power supply or a negative power supply). Since a single power supply does not reverse plus Z minus, the switching speed is increased.
- the shunt-connected resistor is interposed between the first and second diodes connected in series, the charge discharge when the control power supply terminal is switched off is fast. Thus, the switching time from the transmission mode to the reception mode becomes faster.
- the other end of the diode shunt-connected to the reception-side output terminal is connected to the control power supply, and is connected to the ground via a capacitor, so that loss of the transmission signal and the reception signal can be suppressed. it can.
- FIG. 1 is an equivalent circuit diagram for explaining a first embodiment of a high-frequency switch according to the present invention.
- FIG. 2 is an equivalent circuit diagram for explaining a second embodiment of the high-frequency switch according to the present invention.
- FIG. 3 is an equivalent circuit diagram for explaining a third embodiment of the high-frequency switch according to the present invention.
- FIG. 4 is an equivalent circuit diagram for explaining a fourth embodiment of the high-frequency switch according to the present invention.
- FIG. 5 is an equivalent circuit diagram for showing a conventional high-frequency switch.
- the single-band compatible high-frequency switch according to the first embodiment is roughly composed of a high-frequency switch 11, an LC filter 12, and capacitors C, C2, and C3. .
- the high-frequency switch 11 is used to selectively switch the signal path between the antenna terminal ANT and the transmission-side input terminal Tx and the signal path between the antenna terminal ⁇ and the reception-side output terminal Rx.
- the LC filter 12 is a low-pass filter that is disposed between the high-frequency switch 11 and the transmission-side input terminal Tx and includes an inductor Ltl and a capacitor.
- the capacitor of this low-pass filter is the capacitor C connected in parallel with the inductor Lt 1. cl and two grounding capacitors (shunt capacitors) Cul and Cu2 connected to the ground.
- the high-frequency switch 11 is configured by connecting a first diode Dl, a second diode D2, which are switching elements, inductors SL1 and SL2, capacitors C5, C6, and C7, and resistors R and RA.
- the first diode D1 is connected in series in the signal path between the antenna terminal ANT and the transmission side input terminal Tx so that the anode is on the antenna terminal side.
- an inductor SL1 is connected between the force sword of the first diode D1 and the ground.
- the second diode D2 is shunt-connected to the signal path between the antenna terminal ⁇ and the reception-side output terminal Rx, and the anode is grounded via the capacitor C5.
- the control power supply terminal Vc is connected to the connection point between the second diode D2 and the capacitor C5 via the resistor R, and the capacitor C7 is connected between the control power supply terminal Vc and the ground.
- an inductor SL2 is connected in series between the power sword of the second diode D2 and the antenna terminal ANT, and a capacitor C6 is connected between the power sword of the second diode D2 and the ground.
- a resistor RA is connected between the power sword of the second diode D2 and the ground.
- the operation of the high-frequency switch having the above-described constituent force will be described.
- a transmission signal transmission mode
- the transmission side input Terminal Tx force Transmitted signal power LC filter 12 and high-frequency switch 11 pass through and are transmitted from antenna terminal ANT.
- the inductor SL2 is a strip line having a ⁇ / 4 line length with respect to the frequency of the transmission signal, the impedance becomes infinite, and no signal passes between the antenna terminal AN and the reception-side output terminal Rx.
- the LC filter 12 attenuates the harmonics of the transmitted signal!
- reception mode for example, 0 V is applied to the control power supply terminal Vc to turn off the first diode D1 and the second diode D2, thereby turning the first power supply terminal Vc off.
- a bypass filter is formed by the capacitance when the diode D1 is off and the inductor SL1, and the reception signal does not circulate to the transmission side input terminal Tx due to high impedance in the reception band.
- the reception signal input from the antenna terminal ANT is output to the receiving output terminal Rx.
- the switching operation from the transmission mode to the reception mode will be described.
- the first diode D1 and the second diode D2 are on.
- the charge stored in the first diode D1 is Q1
- the charge stored in the second diode D2 is Q2.
- the grounded resistor RA is connected between the first diode D1 and the second diode D2 connected in series. Therefore, the charges Ql and Q2 accumulated at the time of ON are immediately discharged through the resistor RA, and the switching time from the transmission mode to the reception mode is increased.
- the first and second diodes Dl and D2 are used in combination from the same production lot, but there are variations in the charge storage amounts Ql and Q2.
- the charge accumulation amount Q1 of the first diode D1 is large, the switching time is delayed, but such a problem is solved in the first embodiment.
- the anode of the diode D2 shunt-connected to the receiving-side output terminal Rx is connected to the control power supply terminal Vc and is connected to the diode via the capacitor C7. Yes. Therefore, when the control power supply terminal Vc is turned on, a series resonance point having an impedance of 0 is formed by the inductance component when the capacitor C7 and the diode D2 are turned on, and leakage of the transmission signal to the reception output terminal Rx is reduced.
- the capacitor C7 and the capacitance component when the diode D2 is turned off are connected in series, so that the capacitive component force to the ground side is reduced and the received signal leaks to the ground. Is reduced. Thereby, the loss of a transmission signal and a reception signal is suppressed.
- the high-frequency switch 11 and the LC filter 12 are integrally manufactured as a laminated block formed by laminating a plurality of dielectric layers.
- the point that each component circuit of the high-frequency switch is integrated and manufactured as a laminate block is the same in the second to fourth embodiments described below.
- the dual-band compatible high-frequency switch (front-end module) that is the second embodiment has two different communication systems, GSM system and DCS.
- a diplexer 20 that branches the signal path of the GSM system and the signal path of the DCS system and a capacitor C are provided after the antenna terminal ANT.
- the GSM system consists of a first high-frequency switch 11G, a first LC filter 12G, and capacitors Clg and C2g.
- the DC S system includes a second high-frequency switch 11D, a second LC filter 12D, and capacitors Cld and C2d.
- the first high frequency switch 11G selectively selects a signal path between the antenna terminal ANT and the first transmission side input terminal Txg and a signal path between the antenna terminal ANT and the first reception side output terminal Rxg. Switch to.
- the first LC filter 12G is arranged between the first high frequency switch 11G and the first transmission side input terminal Txg.
- the second high frequency switch 11D selectively selects a signal path between the antenna terminal ANT and the second transmission side input terminal Txd and a signal path between the antenna terminal ANT and the second reception side output terminal Rxd. Switch to.
- the second LC filter 12D is disposed between the second high frequency switch 11D and the second transmission side input terminal Txd.
- the diplexer 20 selects a transmission signal from the DCS system or the GSM system at the time of transmission, and selects a reception signal to the DCS system or the GSM system at the time of reception.
- the diplexer 20 is configured by connecting inductors Ltl, Lt2 and capacitors Ccl, Cc2, Ctl, Ct2, Cul.
- the parallel circuit consisting of the inductor Ltl and capacitor Ctl is connected in series to the GSM signal path, and the first transmission side input terminal Txg side of this parallel circuit is grounded via the capacitor Cul.
- the series circuit consisting of capacitors Ccl and Cc2 is connected in series to the signal path of the DCS system, and is grounded via the connection point inductor Lt2 and capacitor Ct2.
- the first high-frequency switch 11G is configured by connecting diodes GDI and GD2, which are switching elements, inductors GSL1 and GSL2, capacitors GC5, GC6 and C31, and a resistor RG.
- the first diode GDI is connected in series in the signal path between the GSM antenna terminal ANT and the first transmitter input terminal Txg so that the anode is on the antenna terminal ANT side. Further, an inductor GSL1 is connected between the force sword of the first diode GDI and the ground.
- the second diode GD2 includes a GSM antenna terminal ANT and a first receiving output terminal Rxg. Shunt connected to the signal path between and the anode is grounded via capacitor GC5.
- the control power supply terminal Vcl is connected to the connection point between the second diode GD2 and the capacitor GC5 via the resistor RG.
- the connection point between the control power supply terminal Vcl and the resistor RG is grounded via the capacitor C31.
- the inductor GSL2 is connected in series to the signal path on the antenna terminal ANT side of the power diode of the second diode GD2, and the capacitor GC6 is connected between the power sword of the second diode GD2 and the ground. ing.
- the second high-frequency switch 11D is configured by connecting diodes DDI and DD2, which are switching elements, inductors DSLl, DSL2 and DSLt, capacitors DC5, DCtl and C32, and resistors RD and RA.
- the third diode DDI is connected in series in the signal path between the DCS antenna terminal ANT and the second transmitter input terminal Txd so that the anode is on the antenna terminal ANT side.
- an inductor DSL1 is connected between the power sword of the third diode DDI and the ground.
- a series circuit of a capacitor DCtl and an inductor DSLt is connected in parallel to the third diode DDI.
- the fourth diode DD2 is shunt-connected to the signal path between the DCS system antenna terminal ANT and the second receiving-side output terminal Rxd, and the anode is grounded via the capacitor DC5.
- the control power supply terminal Vc2 is connected to the connection point between the fourth diode DD2 and the capacitor DC5 via the resistor RD.
- a resistor RA is connected between the force sword of the fourth diode DD2 and ground.
- the connection point between the control power supply terminal Vc2 and the resistor RD is grounded via the capacitor C32.
- an inductor DSL2 is connected in series to the signal path on the antenna terminal ANT side of the force diode of the fourth diode DD2.
- the first LC filter 12G is a low-pass filter that is disposed between the first high-frequency switch 11G and the first transmission-side input terminal Txg and includes an inductor GLtl and a capacitor.
- the capacitor of this one-pass filter is composed of a capacitor GC cl connected in parallel with the inductor GLtl and two grounding capacitors (shunt capacitors) GCul and GC u2 connected to the ground.
- the second LC filter 12D is arranged between the second high-frequency switch 11D and the second transmission side input terminal Txd, and includes a parallel circuit of the inductor DLtl and the capacitor DCcl, and a parallel circuit of the inductor DLt2 and the capacitor DCc 2. Is connected to. Both ends of inductor DLt 1 Are grounded via capacitors DCul and DCu2, respectively.
- the first high-frequency switch 11G of the GSM system for example, OV is applied to the control power supply terminal Vcl to turn off the first diode GDI so that the GSM transmission signal is not transmitted. Yes. Also, by connecting the diplexer 20, the DCS transmission signal is prevented from wrapping around the first transmission side input terminal Txg and the first reception side output terminal Rxg of the GSM system. Furthermore, the second LC filter 12D of the DCS system attenuates the second and third harmonics of the DCS system.
- the second high frequency switch 11D of the DCS system for example, OV is applied to the control power supply terminal Vc2 to turn off the third diode DDI so that the DCS transmission signal is not transmitted. Yes.
- the GSM transmission signal is prevented from wrapping around the second transmission side input terminal Txd and the second reception side output terminal Rxd of the DCS system.
- the second harmonic of the GSM system is attenuated by the low-pass filter consisting of the capacitor Ctl, the inductor Ltl, and the shunt capacitor Cu 1 of the diplexer 20, and the GSM third harmonic of the GSM system using the first LC filter 12G. Decrease it! /
- DCS received signal power 3 ⁇ 4 Prevents the GSM received signal from entering the second transmitting input terminal Txd of the CS system and the GSM receiving input signal Txg of the GSM system. Are output to the DCS receiver's output terminal Rxd and the GSM receiver's output terminal Rxg, respectively.
- the DCS system received signal does not wrap around the GSM system and the GSM system received signal does not wrap around the DCS system.
- control power supply terminals Vcl and Vc2 and the anodes of the diodes GD2 and DD2 are connected to the ground via capacitors C31 and C32.
- the control power supply terminals Vcl and Vc2 are turned on, a series resonance point with an impedance of 0 is formed by the capacitors C31 and C32 and the inductance components when the diodes GD2 and DD2 are turned on, and the transmission signal is received. Leakage to the side output terminals Rxg and Rxd is reduced.
- the triple-band compatible high-frequency switch according to the third embodiment includes three different communication systems, the GSM system, the DCS system, and the PCS system.
- the GSM system includes the first high-frequency switch 11G, the first LC filter 12G, and capacitors Clg, C2g,
- GSM3 It is composed of GCu3.
- the configuration and operation of this GSM system are basically the same as those of the second embodiment, and a duplicate description is omitted.
- a resistor RA1 is connected between the power sword of the second diode GD2 and the ground.
- the diplexer 20 has basically the same configuration and operation as the second embodiment, and a duplicate description is omitted.
- the DCSZPCS system includes a second high-frequency switch 11D1, a second LC filter 12D, and a duplexer 1
- the circuit configuration of the 2LC filter 12D is basically the same as that of the second embodiment, and a duplicate description of the second LC filter 12D is omitted.
- a duplexer 14D is connected to the subsequent stage of the second high-frequency switch 11D1, and this duplexer 14D is for branching into a PCS system reception signal path and a DCS system reception signal path.
- the second high-frequency switch 11D1 has a DCS system and PCS system common transmission signal path between the antenna terminal ANT and the second transmission side input terminal Txd, and the antenna terminal ANT and the second and third reception side output terminals.
- DCS received signal path between Rxdl and Rxd2 'PCS received signal path selectively switched.
- the second high-frequency switch 11D1 is configured by connecting diodes DDI and DD2, which are switching elements, inductors DPSL1, DSL2 and DPSLt, capacitors DC5, DC6, DPCt and C33, and resistors D Rl and RA2.
- the third diode DDI is connected in series in the DCS system and PCS system common transmission signal path between the antenna terminal ANT and the second transmission side input terminal Txd so that the anode is on the antenna terminal ANT side. Yes.
- the third An inductor DPSL1 is connected between the power sword of the DDI and the ground.
- a series circuit of a capacitor DPCt and an inductor DPSLt is connected in parallel to the third diode DDI.
- the fourth diode DD2 is shunt-connected to a common reception signal path between the DCS system and the PCS system between the antenna terminal ANT and the duplexer 14D, and the anode is grounded via the capacitor DC5.
- the control power supply terminal Vc3 is connected to the connection point between the fourth diode DD2 and the capacitor DC5 via the resistor DR1.
- the resistor RA2 is connected between the force sword of the fourth diode DD2 and the ground.
- the connection point between the control power supply terminal Vc3 and the resistor DR1 is grounded via the capacitor C33.
- the inductor DSL2 is connected in series to the signal path on the antenna terminal ANT side of the cathode of the fourth diode DD2.
- the duplexer 14D is configured by connecting diodes PD1 and PD2, which are switching elements, inductors PS LI and PSL2, capacitors PC5 and C32, and a resistor PR1.
- the diode PD1 is connected in series to the PCS transmission signal path between the second high-frequency switch 11D1 and the third reception-side output terminal Rxd2 so that the anode is on the second high-frequency switch 11D1 side.
- an inductor PSL1 is connected between the power sword of the diode PD1 and the ground.
- the diode PD2 is shunt-connected to the DCS system reception signal path between the second high-frequency switch 11D1 and the second reception-side output terminal Rxdl, and the anode is grounded via the capacitor PC5.
- the control power supply terminal Vc2 is connected to the connection point between the diode PD2 and the capacitor PC5 via the resistor PR1.
- the connection point between the control power supply terminal Vc2 and the resistor PR1 is grounded via the capacitor C32.
- an inductor PSL2 is connected in series with the signal path on the second high-frequency switch 11D1 side of the diode PD2.
- the GSM transmission signal including the first transmitter input terminal Txg force passes through the first LC filter 12G, the first high-frequency switch 11G, and the diplexer 20. Sent from the antenna terminal ANT.
- the DCSZPCS received signal is prevented from entering the GSM system and the GSM received signal is prevented from entering the DCSZPCS system.
- the switching operation from the transmission mode to the reception mode in the GSM system and the DCSZPCS system is performed by connecting the grounded resistors RA1 and RA2 between the diodes GDI and GD2 and the diodes DDI and DD2, respectively. Therefore, as described in the first and second embodiments, the switching time from the transmission mode to the reception mode becomes faster. Since the control power supply terminals Vcl, Vc2, Vc3 and the diodes GD2, PD2, DD2 are connected to the ground via the capacitors C31, C32, C33, the first and second embodiments have been described. Like In addition, the loss of the transmission signal and the reception signal can be suppressed.
- the quad-band compatible high-frequency switch of the fourth embodiment is divided into two GSM systems, which are four different communication systems: GSM850 system, GSM900 system, PCS system and It has a DCS system.
- the diplexer 20q selects a transmission signal from the DCSZPCS system and the GSM system at the time of transmission, and selects a reception signal to the DCSZPCS system or the GSM system at the time of reception.
- the duplexer 20q is configured by connecting inductors Ltl, Lt2, DLtl and capacitors Ccl, Cc2, Ctl, Ct2, Cul, DCcl, DCul.
- the parallel circuit composed of the inductor Ltl and the capacitor Ctl is connected in series to the GSM signal path, and the first transmission side input terminal Txg side of the parallel circuit is grounded via the capacitor Cul.
- the parallel circuit consisting of inductor DLt1 and capacitor DCc1 is serially connected to the DCSZPCS system signal path, and the antenna ANT side of this parallel circuit is grounded via capacitor DCul. Furthermore, a series circuit composed of capacitors Ccl and Cc2 is connected in series to the signal path of this DCSZPCS system, and grounded via the connection point S inductor Lt2 and capacitor Ct2.
- the low-pass filter added to the DCSZPCS system is intended to supplement the second LC filter 12D2 connected to the transmission side input terminal Txd.
- the first high-frequency switch 11G2 is configured by connecting diodes GDI, GD2, GD3, which are switching elements, inductors GSL1, GSL2, ASL1, capacitors GC4, GC5, AC4, and resistors RG, RB.
- the first diode GDI is connected in series in the signal path between the GSM antenna terminal ANT and the first transmitter input terminal Txg so that the force sword is on the antenna terminal ANT side. Further, between the anode of the first diode GDI and the ground, the inductor GSL1 and the capacitor GC4 are connected in series with the capacitor GC4 as the ground side.
- the control power supply terminal Vcl is connected to the connection point between the inductor GSL1 and the capacitor GC4.
- the second diode GD2 is connected in series in the signal path between the GSM antenna terminal ANT and the receiver output terminal Rxgl so that the force sword is on the antenna terminal ANT side!
- the inductor ASL1 and the capacitor AC4 are connected in series between the anode of the second diode GD2 and the ground with the capacitor AC4 on the ground side!
- Control power supply terminal Vc2 is connected to the connection point between inductor ASL1 and capacitor AC4.
- a capacitor AC5 is connected in parallel to the inductor ASL1.
- a capacitor AC6 is connected between the anode of the second diode GD2 and the ground.
- the third diode GD3 is shunt-connected to the signal path between the GSM antenna terminal ANT and the reception-side output terminal Rxg2, and the force sword is grounded via the capacitor GC5.
- One end of the resistor RG is connected to the connection point between the third diode GD3 and the capacitor GC5, and the other end of the resistor RG is connected to the ground.
- the inductor GSL2 is connected in series to the signal path on the antenna terminal ANT side of the third diode GD3 antenna, and a capacitor GC6 is connected between the anode of the third diode GD3 and the ground.
- one end of the resistor RB is connected to the anode of the third diode GD3, and the other end of the resistor RB is grounded.
- the first LC filter 12G is a low-pass filter that is disposed between the first high-frequency switch 11G2 and the first transmission-side input terminal Txg and includes an inductor GLtl and a capacitor.
- This low-pass filter capacitor consists of a capacitor GCcl connected in parallel with the inductor GLtl and two grounding capacitors (shunt capacitors) GCul and GCu2 connected to the ground.
- the second high-frequency switch 11D2 connects switching elements such as diodes DDI, DD2, DD3, inductors DPSLl, PSL1, DPSLt, PSLt, capacitors DC5, DPC4, PC4, PC5, PCtl, DPCtl and resistors RD, RA. Configured.
- the fourth diode DDI is connected in series in the signal path between the DCSZPCS system antenna terminal ANT and the second transmitter input terminal Txd so that the force sword is on the antenna terminal ANT side. Furthermore, between the anode of the fourth diode DDI and the ground, the inductor DPSL1 and the capacitor DPC4 are connected in series with the capacitor DPC4 on the ground side.
- a control power supply terminal Vc3 is connected to a connection point between the inductor DPSL1 and the capacitor DPC4.
- a series circuit of a capacitor DPCtl and an inductor DPSLt is connected in parallel to the fourth diode DDI.
- the fifth diode DD2 is connected in series in the signal path between the DCSZPCS system antenna terminal ANT and the receiving side output terminal Rx dl so that the force sword is on the antenna terminal ANT side.
- the inductor PSL1 and the capacitor PC4 are connected in series with the capacitor PC 4 being the ground side!
- the control power supply terminal Vc4 is connected to the connection point between the inductor PSL 1 and the capacitor PC4.
- a capacitor PC5 is connected between the anode of the fifth diode DD2 and the ground. Furthermore, a series circuit of a capacitor PCtl and an inductor PSLt is connected in parallel to the fifth diode DD2.
- the sixth diode DD3 is shunt-connected to the signal path between the DCSZPCS system antenna terminal ANT and the reception-side output terminal Rx d2, and the force sword is grounded via the capacitor DC5.
- One end of the resistor RD is connected to the connection point between the sixth diode DD3 and the capacitor DC5, and the other end of the resistor RD is connected to the ground.
- the inductor terminal DSL2 is connected in series to the signal path on the anode side of the anode of the sixth diode DD3, and the capacitor DC6 is connected between the anode of the sixth diode DD3 and the ground.
- a resistor RA is connected to the anode of the sixth diode DD3, and the other end of the resistor RA is grounded.
- the second LC filter 12D2 is disposed between the second high-frequency switch 11D2 and the second transmission-side input terminal Txd, and includes a parallel circuit of the inductor DLt2 and the capacitor DCc2, and both ends of the inductor D Lt2 are respectively connected to the capacitor DCu2, Grounded through DCu3!
- the operation of the high frequency switch having the above configuration will be described.
- a DCSZ PCS transmission signal for example, 2.5 V is applied to the control power supply terminal Vc3 in the second high-frequency switch 11D2 to turn on the fourth diode DDI and the sixth diode DD3.
- the DCS / PCS transmission signal input from the second transmission side input terminal Txd passes through the second LC filter 12D2, the second high frequency switch 11D2, and the diplexer 20q, and is transmitted from the antenna terminal ANT.
- the first high frequency switch 11G2 of the GSM system for example, OV is applied to the control power supply terminal Vcl to turn off the first diode GDI so that the GSM transmission signal is not transmitted. I have to.
- DCS The ZPCS transmission signal is prevented from wrapping around the GSM first transmission side input terminal Txg and the first reception side output terminals Rxgl, Rxg2.
- the DCS / PCS second LC filter 12D2 and the diplexer 20q filter circuit attenuate the second and third harmonics of the DCSZPCS system.
- the first diode GDI and the third diode GD3 are on. At this time, the charge stored in the first diode GDI is Ql, and the charge stored in the third diode GD3 is Q3.
- the control power supply terminal Vcl is set to OV in order to switch from the transmission mode to the reception mode for reception at the reception side output terminal Rxg2, the charge accumulated in the diodes GDI and GD3 is discharged, and the diodes GDI and GD3 are turned off. There is a need to .
- the transmission mode power is also faster in switching to the GSM900 system reception mode.
- the charge accumulation amount Q1 of the first diode GDI is large, the switching time is delayed.
- such a problem is solved as in the first to third embodiments.
- the inductance component when the sixth diode DD3 is on and the capacitor DC5 resonate in series, the impedance becomes almost zero, and the inductor DSL2 is shorted to the ground. become.
- the received signal does not leak to the receiving output terminal Rxd2 by rotating the phase with the inductor DSL2 and bringing the impedance viewed from the receiving output terminal Rxd2 close to the open state.
- the other control power supply terminals Vcl, Vc2, and Vc3 are set to 0V.
- the resistor RA is connected between the middle point of the fourth diode DDI and the sixth diode DD3 connected to the series and the ground, the charge accumulated in the diodes DD 1 and DD3 Can be immediately discharged. Therefore, the switching time from the transmission mode to the PCS reception mode becomes faster. In particular, when the charge accumulation amount Q1 of the fourth diode DDI is large, the switching time is delayed, but in the fourth embodiment, such a problem is solved as in the first to third embodiments.
- the LC series resonance circuit is connected in parallel to the diodes DDI and DD2, respectively. Therefore, when the diodes DDI and DD2 are in the on state, the transmission frequency band or the reception frequency band to be passed is set. When the diodes DDI and DD2 are turned off, an antiresonance point is generated due to the capacitance component. As a result, it is possible to obtain a better isolation than that when the diodes DDI and DD2 are turned off. [Other Examples]
- the high-frequency switch according to the present invention is not limited to the above-described embodiment, but can be variously modified within the scope of the gist thereof.
- the present invention is useful for a high-frequency switch that can be used in a plurality of different mobile communication systems, and is particularly excellent in that the switching time from the transmission mode to the reception mode is fast.
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
- Electronic Switches (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP06782798A EP1838006A4 (en) | 2005-08-26 | 2006-08-17 | HIGH FREQUENCY CIRCUIT |
KR1020077018978A KR100875369B1 (ko) | 2005-08-26 | 2006-08-17 | 고주파 스위치 |
JP2007532082A JP4245073B2 (ja) | 2005-08-26 | 2006-08-17 | 高周波スイッチ |
US11/837,078 US7787831B2 (en) | 2005-08-26 | 2007-08-10 | High-frequency switch |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005-245284 | 2005-08-26 | ||
JP2005245284 | 2005-08-26 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/837,078 Continuation US7787831B2 (en) | 2005-08-26 | 2007-08-10 | High-frequency switch |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2007023731A1 true WO2007023731A1 (ja) | 2007-03-01 |
Family
ID=37771479
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2006/316185 WO2007023731A1 (ja) | 2005-08-26 | 2006-08-17 | 高周波スイッチ |
Country Status (6)
Country | Link |
---|---|
US (1) | US7787831B2 (ja) |
EP (1) | EP1838006A4 (ja) |
JP (1) | JP4245073B2 (ja) |
KR (1) | KR100875369B1 (ja) |
CN (1) | CN101128985A (ja) |
WO (1) | WO2007023731A1 (ja) |
Cited By (1)
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WO2016170844A1 (ja) * | 2015-04-21 | 2016-10-27 | ソニー株式会社 | 通信装置、および、通信装置の制御方法 |
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KR100777445B1 (ko) * | 2006-07-28 | 2007-11-21 | 삼성전자주식회사 | 고주파 신호의 스위칭 장치 |
KR100954738B1 (ko) * | 2008-10-06 | 2010-04-23 | 인하대학교 산학협력단 | 스위치 구동 회로 |
JP4873046B2 (ja) | 2009-05-26 | 2012-02-08 | 株式会社村田製作所 | 高周波モジュール |
US8532584B2 (en) * | 2010-04-30 | 2013-09-10 | Acco Semiconductor, Inc. | RF switches |
US8638698B2 (en) * | 2011-07-26 | 2014-01-28 | Motorola Mobility Llc | Front end employing pin diode switch with high linearity and low loss for simultaneous transmission |
KR101319731B1 (ko) * | 2012-04-26 | 2013-10-17 | 삼성전기주식회사 | 무선통신 시스템에서의 송수신 신호 스위칭 타임 제어회로 |
US9306613B2 (en) | 2013-01-10 | 2016-04-05 | Google Technology Holdings LLC | Variable antenna match linearity |
JP5737304B2 (ja) * | 2013-01-18 | 2015-06-17 | 株式会社村田製作所 | フィルタ回路 |
US10305533B2 (en) * | 2014-08-25 | 2019-05-28 | Renesas Electronics Corporation | Semiconductor device |
CN107437949A (zh) * | 2016-05-25 | 2017-12-05 | 南京威翔科技有限公司 | 一种数传功放装置 |
US10361697B2 (en) * | 2016-12-23 | 2019-07-23 | Skyworks Solutions, Inc. | Switch linearization by compensation of a field-effect transistor |
US10250251B1 (en) * | 2018-02-07 | 2019-04-02 | Infineon Technologies Ag | RF sensor in stacked transistors |
WO2020130161A1 (ko) * | 2018-12-17 | 2020-06-25 | 전자부품연구원 | 밀리미터웨이브 고출력 스위치 |
CN116112033B (zh) * | 2022-12-29 | 2023-12-26 | 南京惠华电子技术有限公司 | 收发自动切换多功能电路及芯片 |
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2006
- 2006-08-17 CN CNA2006800055046A patent/CN101128985A/zh active Pending
- 2006-08-17 JP JP2007532082A patent/JP4245073B2/ja not_active Expired - Fee Related
- 2006-08-17 KR KR1020077018978A patent/KR100875369B1/ko not_active IP Right Cessation
- 2006-08-17 EP EP06782798A patent/EP1838006A4/en not_active Withdrawn
- 2006-08-17 WO PCT/JP2006/316185 patent/WO2007023731A1/ja active Application Filing
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2007
- 2007-08-10 US US11/837,078 patent/US7787831B2/en not_active Expired - Fee Related
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WO2016170844A1 (ja) * | 2015-04-21 | 2016-10-27 | ソニー株式会社 | 通信装置、および、通信装置の制御方法 |
US10333580B2 (en) | 2015-04-21 | 2019-06-25 | Sony Corporation | Communication apparatus and method for controlling communication apparatus |
Also Published As
Publication number | Publication date |
---|---|
CN101128985A (zh) | 2008-02-20 |
JPWO2007023731A1 (ja) | 2009-02-26 |
US7787831B2 (en) | 2010-08-31 |
EP1838006A4 (en) | 2011-05-04 |
KR100875369B1 (ko) | 2008-12-22 |
US20070270105A1 (en) | 2007-11-22 |
EP1838006A1 (en) | 2007-09-26 |
JP4245073B2 (ja) | 2009-03-25 |
KR20070102560A (ko) | 2007-10-18 |
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