WO2007021154A1 - Partage de memoire par une pluralite de processeurs - Google Patents

Partage de memoire par une pluralite de processeurs Download PDF

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Publication number
WO2007021154A1
WO2007021154A1 PCT/KR2006/003248 KR2006003248W WO2007021154A1 WO 2007021154 A1 WO2007021154 A1 WO 2007021154A1 KR 2006003248 W KR2006003248 W KR 2006003248W WO 2007021154 A1 WO2007021154 A1 WO 2007021154A1
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WO
WIPO (PCT)
Prior art keywords
memory
bus
main processor
data
processor
Prior art date
Application number
PCT/KR2006/003248
Other languages
English (en)
Inventor
Jong-Sik Jeong
Original Assignee
Mtekvision Co., Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mtekvision Co., Ltd filed Critical Mtekvision Co., Ltd
Publication of WO2007021154A1 publication Critical patent/WO2007021154A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]

Definitions

  • the present invention is directed to sharing of a memory (storage device), more
  • processors in an electrical/electronic device digital processing apparatus.
  • portable terminals refer to any portable terminals.
  • Portable terminals include
  • PDA personal digital assistants
  • PMP multimedia players
  • the mobile communication terminal is essentially
  • communication terminals have functions, such as camera and multimedia data playback, in addition to the basic functions, such as voice communication, short message service
  • FIG. 1 shows a block diagram of a conventional mobile communication terminal
  • the mobile communication terminal 100 having a camera
  • the high frequency processing unit 110 processes a high frequency signal
  • the analog-to-digital converter 115 converts an analog signal, outputted from
  • the high frequency processing unit 110 to a digital signal and sends to the processing unit
  • the digital-to-analog converter 120 converts a digital signal, outputted from the
  • processing unit 125 to an analog signal and sends to the high frequency processing unit
  • the processing unitl25 controls the general operation of the mobile
  • the processing unit 125 can comprise a central processing
  • the power supply 130 supplies electric power required for operating the mobile
  • the power supply 130 can be coupled to, for example, an
  • the key input 135 generates key data for, for example, setting various functions
  • the main memory 140 stores an operating system and a variety of data of the
  • the main memory 140 can be, for example, a flash
  • EEPROM Electrically Erasable Programmable Read Only Memory
  • the display 145 displays the operation status of the mobile communication
  • relevant information e.g. date and time
  • an external image e.g.
  • the camera 150 photographs an external image (a photographic subject), and the
  • image processing unit 155 processes the external image photographed by the camera 150.
  • the image processing unit 155 can perform functions such as color interpolation, gamma
  • the support memory 160 stores
  • the support memory 160 stores the external image processed by the image processing unit 155.
  • SRAM Static RAM
  • SDRAM Synchronous DRAM
  • the mobile communication terminal 100 having a camera
  • a function is equipped with a plurality of processing units (that is, a main processor and one or more application processors for performing additional functions).
  • processing units that is, a main processor and one or more application processors for performing additional functions.
  • Each processing unit is structured to be coupled with an
  • each application processor can be controlled by
  • the application processor can take different forms and quantity depending on
  • the application processor for controlling the camera function can process
  • controlling the movie file playback function can process functions such as video file (e.g.,
  • MPEG4, DIVX, H.264) encoding and decoding ; and the application processor for
  • controlling the music file playback function can process functions such as audio file
  • the portable terminal can also comprise an application processor
  • Each of these processing units has an individual memory for controlling games.
  • Each of these processing units has an individual memory for controlling games.
  • Each of these processing units has an individual memory for controlling games.
  • processor in order to expand the storage space or improve the process efficiency.
  • the conventional memory sharing structure uses a memory having a single port, delaying the time and lacking the efficiency in processing a high-resolution,
  • FIG. 2 is a coupling structure between a processor and a memory in accordance
  • a multimedia processor as an application processor, can
  • control function processing unit 230 Each of the processing units 210, 220 and 230 is
  • Each processor accesses the memory sequentially in accordance with a
  • FIG. 3 is a block diagram showing a main processor and an application
  • processor is a multimedia processor for controlling an image sensor 330 and for
  • the main processor 310 comprises a plurality of memory
  • controllers i.e. a first memory controller 333 and a second memory controller 336.
  • the main processor 310 writes data in the supplementary memory 325
  • main processor 310 writes data or reads the stored data by
  • the multimedia processor 320 comprises an interface 342, a controller 344, a
  • multimedia processing unit 346 an image sealer 348, a priority control unit 353 and a
  • the multimedia processor 320 is coupled to the supplementary memory 325
  • AP-AM application memory
  • multimedia processor 320 can be coupled to the display 145 in order to display the
  • the interface 342 communicates information between the multimedia processor
  • the multimedia processor 320 carries out an operation corresponding to a control signal received from the main processor 310 through the
  • the controller 344 controls the operation of the multimedia processor 320 in
  • the operation of the multimedia processor 320 is controlled; the data needed
  • the controller 344 can
  • controller 344 controls the operation of the multimedia processor
  • controller 344 can be, for example, an MCU (microcontroller unit).
  • the multimedia processing unit 346 reads image data stored in the
  • supplementary memory 325 and compresses it to a predetermined format (e.g. JPEG and
  • the multimedia processing unit 346 reads a
  • the image sealer 348 processes data inputted from the image sensor 330 in
  • the image sealer 348 performs, for example, adjustment of the image size, changing
  • the data processed by the image sealer 348 is stored in the supplementary memory 325 through the AP-AM bus by the memory
  • the priority control unit 353 determines the priority between a request to access
  • the processors to access the supplementary memory 325.
  • the priority control unit 353 is the priority control unit 353
  • the multimedia processor 320 can access the supplementary data
  • the memory control unit 356 controls one of the processors to access the
  • priority control unit 353 when the main processor 310 and the multimedia processor 320
  • memory control unit 356 controls one of the elements to access the supplementary
  • processors and/or elements access a single memory through a single bus.
  • main processor 310 has temporal limitation to use a memory of the supplementary
  • the main processor 310 In case of playing back an MPEG file, the main processor 310 must
  • the multimedia processor 320 Since the size of an MPEG file is large, the MPEG file is
  • multimedia processor 320 reads the data and decodes the data before delivering the data
  • each element included in the multimedia processor 320 must use the AP-AM bus
  • the present invention aims to provide a
  • the present invention also aims to provide a user terminal having an
  • the present invention also aims to provide a user terminal and a method of
  • the present invention also aims to provide a user terminal having an
  • the present invention also aims to provide a user terminal and a method of
  • the present invention also aims to provide a user terminal and a method of
  • the present invention also aims to provide a user terminal and a method of
  • application processor through an independent bus and can store data quickly in the
  • an aspect of the present invention features a digital processing apparatus having a shared memory and/or a digital processing apparatus
  • the present invention can comprise: a memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a main memory, having a plurality of ports; a
  • MP-AP bus and being coupled to the plurality of ports of the memory via each bus.
  • At least one bus can be preferentially assigned to store in real time in the
  • the storage area of the memory can have a plurality of sub-areas, and at least
  • one sub-area can be exclusively pre-assigned to store the multimedia data in real time.
  • the digital processing apparatus in accordance with another preferred embodiment
  • embodiment of the present invention can comprise: a first memory; a second memory; a
  • main processor main processor
  • application processor being coupled to the main processor via
  • the application processor can provide an access route for the main processor to
  • the first memory can be a non-volatile memory
  • the second memory can be volatile memory
  • the application processor can comprise: a key scan unit, for recognizing a user
  • the application processor can further comprise: an MP interface,
  • control unit providing a route for the main processor coupled via the MEM bus to access
  • a second memory control unit controlling at least
  • the application processor can further comprise an image sealer, processing an
  • the second memory control unit can preferentially assign one
  • the storage area of the second memory can be partitioned to sub-areas in the
  • the second memory control unit can reset the route for the data processed by the image sealer to be stored in another
  • the application processor, the first memory and the second memory can be any type of memory
  • a main processor can store a series of data for multimedia data playback in a first
  • the application processor can be coupled to the main processor via each of an
  • MP-AP bus and an MEM bus to the first memory via an NV bus and to the second
  • the first memory can be a non-volatile memory
  • the second memory can be a volatile memory
  • the method can further comprise: processing an image signal in a predetermined
  • the AP-AM buses preferentially to store the processed data in the second memory
  • the main processor having received the ready notice, can switch to a power
  • recorded medium tangibly embodies a program of instructions executable by a digital signal
  • the program is readable by the digital processing apparatus.
  • the program can be
  • application processor can be coupled to the main processor via each of an MP-AP bus and
  • FIG. 1 shows a block diagram of a conventional mobile communication terminal
  • FIG. 2 shows a coupling structure between a processor and a memory in
  • FIG. 3 shows a block diagram of a main processor and an application processor
  • FIG. 4 shows a block diagram of an application processor coupled to a dual-port
  • FIG. 5 shows a block diagram of an independently-operable application
  • FIG. 6 shows a flowchart of the operation of an application processor in
  • the first element can be
  • the present invention can be equivalently applied to all types of digital processing devices or systems (e.g. portable terminals and/or home digital appliances, such as the mobile
  • PDA portable multimedia player
  • MP3 player digital music player
  • the present invention is not limited to a specific type of terminal but is applicable
  • FIG. 4 is a block diagram showing an application processor coupled to a
  • the multimedia processor can control the image sensor 330 and
  • multimedia data e.g. data corresponding to at least one of image data and audio
  • the multimedia processor can
  • the main processor 310 can be independently coupled
  • application processor 320 can be shared by the main processor 310 and/or elements in the
  • the application processor 320 in accordance with a preferred embodiment
  • embodiment of the present invention is coupled to the main processor 310 through an MP
  • 320 is coupled to the supplementary memory 410, having 2 ports, through each of a first
  • processor 320 through a plurality of buses is not restricted to 2 and can be more than 2.
  • the application processor 320 processes multimedia data (or an image signal,
  • multimedia data in the supplementary memory 410 and processes multimedia data (e.g.
  • multimedia data through output means e.g. the display 145 and the audio playback unit
  • the application processor 320 comprises an MP interface 342, a
  • controller 344 controls the multimedia processing unit 346, an image sealer 348, a memory control unit 420 and an audio interface 425.
  • the MP interface 342 communicates information between the multimedia
  • processor 320 and the main processor 310, which is coupled through the MP-AP bus.
  • the multimedia processor 320 performs a corresponding process operation.
  • the controller 344 controls the operation of the multimedia processor 320 in
  • the controller 344 controls the operation of the multimedia processor 320, reads the data
  • the controller 344 can be, for example, an MCU (microcontroller
  • the controller 344 can control the operation of the multimedia processor 320 in
  • control the main processor 310 In accordance with a control signal received from the main processor 310 or control the
  • the multimedia processing unit 346 reads data stored in the supplementary image.
  • the multimedia processing unit 346 For example, in case the read data is image data, the multimedia processing unit 346
  • the multimedia processing unit 346 compresses the data to a predetermined format (e.g. JPEG and MPEG4) or add an image effect (e.g. black-and-white effect and sketch effect).
  • a predetermined format e.g. JPEG and MPEG4
  • an image effect e.g. black-and-white effect and sketch effect.
  • the data processed by the multimedia processing unit 346 can also decode audio data.
  • the data processed by the multimedia processing unit 346 can also decode audio data.
  • output means e.g.
  • the image sealer 348 processes data inputted from the image sensor 330 in
  • the image sealer 348 performs, for example, image size adjustment, color change
  • the data processed by the image sealer 348 is
  • the image sealer 348 of the present invention is merely one embodiment of an
  • multimedia data e.g. image data and/or voice data
  • multimedia processing unit 346 illustrated in FIG. 5, is merely
  • any multimedia data processing unit that processes multimedia data stored in the
  • supplementary memory 410 stores the data in supplementary memory 410 again, displays the data through the display 145 or sends the data to the main processor 310.
  • the memory control unit 420 allows data inputted from the image sensor 330
  • the supplementary memory 410 controls the assignment of the first and/or second
  • AP-AM bus to allow an element (e.g. the multimedia processing unit 346) in the
  • the memory control unit 420 can control one of the AP-AM buses to be occupied
  • the memory control unit 420 can pre-assign a
  • the memory control unit 420 can control the assignment of the bus through the
  • the audio interface 425 performs interface with the audio playback unit 415.
  • the audio playback unit 415 can comprise, for example, an audio codec and a speaker.
  • control unit 420 The control unit 420.
  • the memory control unit 420 assigns one of the buses (e.g. the first AP-AM bus) to the image sealer 348, that is, a route between the image sealer 348 and the buses (e.g. the first AP-AM bus)
  • the other bus (e.g. the second AP-AM bus) is assigned
  • the multimedia processing unit 346 which generates MPEG- format data by use of the
  • the multimedia processing unit 346 determines whether there is image
  • supplementary memory can be partitioned to a plurality of storage areas, and each of the
  • storage areas can be, for example, pre-assigned to a different element for, for example,
  • the multimedia processing unit 346 shall be able to determine whether there is
  • image data that has completed the storage by, for example, monitoring the operation of
  • multimedia processing unit 346 (or the controller 344) every time there is data that
  • application processor 320 run a 3-D game will be described. To run a 3-D game, the main
  • processor 310 has to deliver a large amount of data to the application processor 320.
  • the memory control unit 420 assigns one of the buses (e.g.
  • the data delivered from the main processor that is, a route between the main processor 310 and the supplementary memory 410 is set.
  • processor 310 is stored in a storage area of the supplementary memory 410 through the
  • the memory control unit 420 assigns
  • the other bus e.g. the second AP-AM bus
  • an element e.g. the multimedia processing
  • the main processor 310 can store data while the main processor 310 is continuously storing data, the main processor 310 can
  • memory 410 is partitioned to a plurality of storage areas. Through a control signal
  • the memory control unit 420 can
  • the memory control unit 420 assigns one of the buses (e.g. the first AP-AM
  • the main processor 310 can store the audio data in a first supplementary memory
  • the memory control unit 420 assigns the other bus (e.g.
  • the supplementary memory 410 can
  • each of the storage areas can be partitioned to a plurality of storage areas.
  • each of the storage areas can be partitioned to a plurality of storage areas.
  • each of the storage areas can be partitioned to a plurality of storage areas.
  • the multimedia processing unit 346 pre-assigned to each element for the storage of data.
  • FIG. 5 is a block diagram showing an independently-operable application
  • FIG. 6 is a flowchart showing the operation of an application processor in
  • the application processor 320 will be assumed to be a
  • multimedia processor which can perform one or more functions, including controlling
  • multimedia data e.g. image data and voice data
  • the application processor 320 of the present invention is
  • MEM Memory
  • supplementary memory 525 having 2 ports, via the first AP-AM bus and the second
  • the application processor 320 also processes multimedia data
  • multimedia data e.g. image data and audio data
  • output means e.g. the display 145 and
  • the audio playback unit 415 the audio playback unit 415.
  • the application processor 320 comprises the MP interface 342, the
  • controller 344 the multimedia processing unit 346, the image sealer 348, the audio
  • the first memory control unit 515 controls the main processor 310 or the
  • the main processor 310 can access
  • the first memory control unit 515 via the MEM bus to store data to be processed by the
  • the main processor 320 in the first supplementary memory 510.
  • processor 310 can also control the first memory control unit 515 to set a route to allow the
  • main processor 310 to access the first supplementary memory 510. After storing data in
  • processor 310 can deliver a process command (e.g. audio data playback) of the stored
  • the second memory control unit 520 allows data inputted from the image sensor
  • the second memory control unit 520 can also set a route for the main processor 310 to
  • the key scan unit 530 allows a control command using the input unit 135 to be
  • the first supplementary memory 510 which is coupled to the application
  • processor 320 via the NV bus can be used for storing data delivered from the main processor or processed in the application processor 320.
  • supplementary memory 510 can be at least one of a NAND flash memory and an external
  • memory e.g. SD, MMC and T-Flash.
  • the second supplementary memory 525 which is coupled to the application
  • processor 320 via the first and second AP-AM buses, can be used for storing at least one
  • supplementary memory 525 can be a volatile memory.
  • second supplementary memory 525 can be embodied in a single chip.
  • operation of the application processor 320 is audio data playback.
  • the application processor 320 provides, in step 610, a route
  • step 615 receives, in step 615, a playback command from the main processor 310 via the
  • the playback command can contain a list of files to play back.
  • the main processor 310 sends a select signal to the controller 344 or the first memory
  • control unit 515 to set a route between the main processor 310 and the first supplementary memory 510.
  • the main processor 310 then stores a series of data for audio data playback
  • the main processor 310 sends the playback command to the controller 344 in the
  • the main processor 310 may store a series of data in the second supplementary
  • the controller 344 checks for the storage space of the second supplementary memory 525,
  • the main processor 310 a request to store data in the second supplementary memory 525.
  • step 620 the application processor 320 (i.e. controller 344) activates the key
  • command can be at least one of the commands to, for example, display audio file names,
  • the main processor 310 enters a power down
  • main processor 310 does not need to perform any operation to play back audio data.
  • the main processor 310 does not need to perform any operation during the
  • the entire terminal can minimize the power consumption, extending
  • the user command can further comprise an audio playback
  • step 630 the application processor 320 determines whether the user command
  • the application processor 320 does not need to receive any control signal from the main
  • processor 310 for audio data playback.
  • step 635 otherwise the process stands by in step 630.
  • the user inputs
  • application processor 320 can read and decode audio data stored in the first
  • the application processor 320 can move the data stored in the first supplementary
  • the application processor 320 of the present invention can
  • the multimedia processor 320 coupling to the supplementary memory 430 via a
  • processors that allow the coupled memory to be shared by another processor.
  • the user terminal having an independently-operable
  • the present invention can also minimize the delay of time when processing
  • multimedia data e.g. processing high-performance, high-resolution image and playing
  • the present invention can minimize power consumption by enabling the
  • the present invention can optimize the memory efficiency by allowing image
  • the present invention also can reduce the loss of data by eliminating the delay of
  • the main processor can access the storage unit

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

L'invention concerne un terminal d'utilisateur présentant un processeur d'application pouvant fonctionner de manière indépendante, ainsi qu'un procédé de partage d'une mémoire. L'unité de traitement numérique, conformément à un mode de réalisation de la présente invention, présente une mémoire avec une pluralité de ports, un processeur principal et un processeur d'application, qui est couplé au processeur principal via un bus MP-AP et à la pluralité de ports de la mémoire via chacun des bus. A l'aide de la présente invention, l'efficacité de traitement peut être maximisée par traitement de données multimédia avec le processeur d'application uniquement, sans le processeur principal.
PCT/KR2006/003248 2005-08-19 2006-08-18 Partage de memoire par une pluralite de processeurs WO2007021154A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2005-0076161 2005-08-19
KR1020050076161A KR100759865B1 (ko) 2005-08-19 2005-08-19 독립 동작 가능한 부가 제어부를 구비한 사용자 단말기 및메모리 공유 방법

Publications (1)

Publication Number Publication Date
WO2007021154A1 true WO2007021154A1 (fr) 2007-02-22

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Country Status (2)

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KR (1) KR100759865B1 (fr)
WO (1) WO2007021154A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1131076A (ja) * 1997-07-10 1999-02-02 Nec Robotics Eng Ltd マルチｃｐｕシステム
KR19990031220A (ko) * 1997-10-09 1999-05-06 윤종용 브이.엠.이 버스 시스템에서 브이.엠.이 버스 제어장치
JP2000137690A (ja) * 1998-10-29 2000-05-16 Uerubiin:Kk マルチｃｐｕシステム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1131076A (ja) * 1997-07-10 1999-02-02 Nec Robotics Eng Ltd マルチｃｐｕシステム
KR19990031220A (ko) * 1997-10-09 1999-05-06 윤종용 브이.엠.이 버스 시스템에서 브이.엠.이 버스 제어장치
JP2000137690A (ja) * 1998-10-29 2000-05-16 Uerubiin:Kk マルチｃｐｕシステム

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KR100759865B1 (ko) 2007-09-18

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