WO2006100765A1 - Method of manufacturing semiconductor device and compression molding device - Google Patents

Method of manufacturing semiconductor device and compression molding device Download PDF

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Publication number
WO2006100765A1
WO2006100765A1 PCT/JP2005/005243 JP2005005243W WO2006100765A1 WO 2006100765 A1 WO2006100765 A1 WO 2006100765A1 JP 2005005243 W JP2005005243 W JP 2005005243W WO 2006100765 A1 WO2006100765 A1 WO 2006100765A1
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WO
WIPO (PCT)
Prior art keywords
cavity
resin
substrate
flow
mold
Prior art date
Application number
PCT/JP2005/005243
Other languages
French (fr)
Japanese (ja)
Inventor
Bunshi Kuratomi
Takafumi Nishita
Fukumi Shimizu
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to JP2007509118A priority Critical patent/JPWO2006100765A1/en
Priority to PCT/JP2005/005243 priority patent/WO2006100765A1/en
Priority to TW094139159A priority patent/TW200639982A/en
Publication of WO2006100765A1 publication Critical patent/WO2006100765A1/en

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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
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    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Definitions

  • the present invention relates to a semiconductor device manufacturing method and a compression molding apparatus, and particularly covers an electronic component such as a semiconductor chip mounted on one surface of a substrate with a sealing body made of an insulating resin in the manufacture of the semiconductor device.
  • the present invention relates to a technology effective when applied to a sealing technology.
  • a transfer molding apparatus is known as an apparatus for covering a semiconductor chip or the like with a sealing body made of an insulating resin.
  • the transfer molding device has a structure in which a resin material called a tablet is placed in a pot (cylinder) located on the cull, and then the plunger is lowered to heat and press the resin material on the cull to melt it. Get ready! The molten resin (resin) passes through the runner and gate and is pressed into the cavity, and a sealed body is formed by the resin cured in the cavity.
  • the resin is hardened in the flow path through which the runner-first resin flows, and the resin is discarded without being used in order to move the resin in the kull force. For this reason, the use efficiency of sallow is low.
  • the wire connected to the electrodes of the semiconductor chip may be deformed by the flow of the resin and cause a short circuit failure. As semiconductor devices become smaller and thinner, wires tend to be thinner and short-circuit defects are more likely to occur.
  • Non-Patent Document 1 compression molding apparatuses have been used (for example, Non-Patent Document 1).
  • the compression molding apparatus has a mold structure that does not have pots and runners, and what constitutes a cavity is a substrate, a cavity bottom, and a frame.
  • the frame portion is a clamp surface in contact with the substrate, and is also a side surface of the cavity.
  • the supply of grease in the compression molding machine is based on the recognition of the number of chips on the substrate by image recognition, the weight of the grease is calculated based on the data, the powdered grease is metered, and the tablet is compressed. ing. Then, use this compressed tablet to compress and mold! / Speak.
  • Non-Patent Document 1 “Electronic Materials” published by Industrial Research Council, August 2004, 66-69. Disclosure of the invention
  • a transfer molding method using an epoxy resin whose molding resin is inexpensive is the mainstream.
  • the transfer molding device has a resin flow path such as cal, runner, gate, etc., so the use efficiency of resin is 30-50%, which hinders manufacturing cost reduction. .
  • the compression molding apparatus dramatically improves the efficiency of resin use by eliminating cals, runners, and gates.
  • the number of chips (semiconductor chips) mounted on the substrate is ascertained. It is necessary to calculate and weigh the weight and put it into the cavity.
  • FIG. 28 is a flow chart showing each step of supplying a resin for compression molding studied prior to the present invention.
  • the resin supply check the number of chips on the board (recognized by image) S50, transfer the number of chips mounted to the resin weighing section S51, calculate the amount of resin to be loaded into the resin weighing data processing and capacity S52, load at the resin weighing section Measurement and measurement of the amount of resin to be measured (measurement error accuracy at weighing 50 mmg required) S53, transfer to the resin supply section after weighing S54, resin supply to compression mold S55, sealing body formation S56 .
  • the number of semiconductor chips mounted on the substrate is image-recognized with a monitor camera.
  • the number of chips mounted (information) by this image recognition is transferred to the resin measuring unit (S51). cash register The weighing unit performs resin weighing data processing based on the information (data) of the number of chips mounted, and calculates the amount of resin to be put into the lower mold cavity of the compression mold (S52). Next, measurement and measurement of the amount of resin charged in the resin measuring section are performed (S53). The measurement error accuracy during this measurement is in units of 50 mmg. After weighing the resin, the weighed resin is transferred to the resin supply section (S54). The resin supply unit supplies the measured resin to the compression mold (S55). Thereafter, the lower mold and the upper mold are overlaid (clamping), and then molding is performed to form a sealing body (S56).
  • a compression molding apparatus that performs such a process requires an image unit such as a high-precision motor camera and an image processing device for grasping the number of chips, and leads to resin weighing from grasping the number of chips.
  • Computational software is required, and incidental devices become expensive, which increases the manufacturing cost of semiconductor devices.
  • One object of the present invention is to provide a method of manufacturing a semiconductor device that can reduce the manufacturing cost of the semiconductor device.
  • One object of the present invention is to provide a compression molding apparatus that can reduce the manufacturing cost of a semiconductor device.
  • One object of the present invention is to provide a method for manufacturing a semiconductor device in which the thickness of a sealing body can be formed without excess or deficiency.
  • One object of the present invention is to provide a compression molding apparatus that can form the thickness of a sealing body without excess or deficiency.
  • a method for manufacturing a semiconductor device of the present invention includes:
  • step (f) a step of releasing the substrate after the step (e) from the molding die, wherein the lower die is a cavity corresponding to the sealing body formed on the substrate, and the cavity A holding mechanism for holding the substrate; the flow cavity located outside; a plurality of flow gates communicating the cavity with the flow cavity; and a plurality of air vents communicating with the cavity. And a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold,
  • the flow cavity plunger is inserted into the lower mold flow cavity to apply the resin flowing into the flow cavity to a predetermined pressure. It is characterized by pressing.
  • the pressure of the resin that has flowed into the flow cavity by causing the flow cavity plunger to enter the flow cavity of the lower mold is set to the same pressure as the pressure of the resin in the cavity. Pressurize.
  • the amount of the resin supplied into the cavity in the step (d) is such that the lower mold and the upper mold are in the clamped state, and no electronic component is mounted. And 120 to 150% of the space volume into which the resin formed by the cavity of the lower mold is injected, and in the case of the same type of substrate, the amount of the grease input is the same each time. .
  • An upper mold having a holding mechanism for holding the substrate on the lower surface
  • a lower mold that is located below the upper mold and has a cavity having a depression force on the upper surface, and after holding the substrate on the upper mold and supplying grease to the cavity, the lower mold A compression molding apparatus for forming a sealing body made of the resin on the lower surface side of the substrate by heating and pressurizing the resin with a mold and an upper mold clamp,
  • the lower mold includes a flow cavity having a depression force located outside the cavity, a plurality of flow gates having a groove force for communicating the cavity and the flow cavity, and an air vent having a groove force connected to the cavity.
  • a flow cavity having a depression force located outside the cavity
  • a plurality of flow gates having a groove force for communicating the cavity and the flow cavity
  • an air vent having a groove force connected to the cavity.
  • the upper mold is provided with a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold when the lower mold and the upper mold are clamped.
  • the pressure of the resin flowing into the flow cavity by causing the flow cavity plunger to enter the flow cavity of the lower mold is used as the pressure of the lower mold and the upper mold.
  • the pressure is the same as the pressure of the resin in the cavity when the mold is clamped.
  • the sealed body can be formed homogeneously and does not contain bubbles (voids) inside. Improve. In order to prevent the generation of voids, it is necessary to harden the grease in the cavity under a pressure of 50 kgZcm 2 or more.
  • the sealing body is formed by a compression molding apparatus. Therefore, when the sealing body is formed, a strong resin flow does not occur as in transfer molding, and deformation due to the flow of the wire connecting the electrode of the semiconductor chip and the wiring of the substrate does not occur. As a result, the manufacturing yield is improved.
  • the diameter of the wire used at present is about 25 m. It can be assumed that the wire diameter will become thinner in the future due to further narrowing of the electrode pad pitch on the semiconductor chip. For example, if the wire diameter is about 23 m, the electrode pad pitch can be reduced to about 65 m. In addition, the wire diameter is considered to advance further to 20 / ⁇ ⁇ , 17 ⁇ m, 15 m. Even with such thin wires, short-circuit defects caused by wire flow can be prevented by compression molding.
  • the amount of resin commensurate with the state in which the electronic component is not mounted on the substrate that does not need to count the number of electronic components such as semiconductor chips mounted on the substrate is determined as the input resin amount. Therefore, the auxiliary device can be simplified and the cost of the compression molding device can be reduced. As a result, the manufacturing cost of the semiconductor device can be reduced.
  • the compression molding apparatus of the present invention since the excess resin flows into the flow cavity during compression molding, the input resin amount is set so that the resin always flows into the flow cavity. Since it is set, it is possible to form a sealing body with an amount that is not excessive or insufficient, and a sealing body with an appropriate thickness can always be formed.
  • FIG. 1 is a flowchart showing a method for manufacturing a semiconductor device according to Example 1 of the present invention.
  • FIG. 2 is a plan view of a wiring motherboard used in the method for manufacturing a semiconductor device according to the first embodiment.
  • FIG. 3 is a front view of the wiring motherboard.
  • FIG. 4 is an enlarged cross-sectional view showing a single product forming portion of the wiring motherboard.
  • FIG. 5 is a plan view of the wiring motherboard on which a semiconductor chip is fixed and wire-bonded.
  • FIG. 6 is a front view of the wiring motherboard shown in FIG.
  • FIG. 7 is a plan view of the wiring motherboard on which the semiconductor chip is not partially fixed.
  • FIG. 8 is a front view of the wiring motherboard shown in FIG.
  • FIG. 9 is a plan view showing the layout of each part of the compression molding apparatus used in the method for manufacturing a semiconductor device of Example 1.
  • ⁇ 10] A schematic cross-sectional view showing the structure of the compression molding apparatus.
  • FIG. 11 is a schematic plan view showing a lower mold of the compression molding apparatus.
  • FIG. 13 is a schematic cross-sectional view showing a state before mold clamping in which a wiring mother board is attached to the upper mold of the compression molding apparatus.
  • FIG. 14 is a schematic cross-sectional view showing a state before the mold is clamped in which the resin is supplied to the lower mold of the compression molding apparatus.
  • FIG. 15 is a schematic cross-sectional view showing a state where the lower mold and the upper mold of the compression molding apparatus are clamped.
  • FIG. 16 is a schematic cross-sectional view showing a state in which the flow cavity provided in the lower mold of the compression molding apparatus is pressurized with a flow cavity plunger.
  • FIG. 18 is a perspective view showing the wiring mother board on which a sealing body is formed.
  • FIG. 19 is a plan view of the wiring motherboard on which a sealing body is formed.
  • FIG. 21 is a schematic view showing a state in which a protruding electrode is formed on the wiring mother board in the method of manufacturing a semiconductor device according to the first embodiment.
  • FIG. 22 is a schematic view showing the wiring motherboard on which protruding electrodes are formed.
  • FIG. 23 is a schematic view showing a state in which the wiring mother board is cut together with the resin layer with a dicing blade in the method of manufacturing a semiconductor device according to the first embodiment.
  • FIG. 24 A perspective view showing a semiconductor device manufactured by the method of manufacturing a semiconductor device of Example 1.
  • FIG. 25 is a schematic cross-sectional view of a part of the semiconductor device manufactured by the semiconductor device manufacturing method of Example 1.
  • FIG. 26 is a plan view showing a lower mold of the compression molding apparatus of Example 2.
  • FIG. 27 is a schematic view showing the mating surface of the upper mold of the compression molding apparatus of Example 2.
  • FIG. 28 is a flow chart showing each step when supplying the resin to the compression mold studied prior to the present invention.
  • Carrying transport 26 ⁇ Compression molding die, 27 ⁇ Unloading / conveying portion, ⁇ 28 Flow flow break portion, ⁇ 29 ⁇ Board unloader, ⁇ 35 ⁇ Lower die, ⁇ Guide hole, 39 ⁇ Separator, 40 ⁇ Lower cavity stopper, 41 ⁇ Bitty, 46 ⁇ Flange, 47 ⁇ Fixed block, 48 ⁇ Guide space, 49 ⁇ Stuno, 50 ⁇ Lower plate, 51 ⁇ Groove, 52 ⁇ 0—Ring 53... Flow cavity, 54 ⁇ Flow gate, 55 ⁇ Air vent, 56, 57 ⁇ Wedge, 60... Upper die, 62 ⁇ Substrate suction block, 65 ... Vacuum suction hole, 66 ...
  • Vacuum suction piping 67 ... Flow cavity plunger, 68 ... Pressure actuator, 69 ... Drive shaft, 70 ... Support blade, 71, 72 ⁇ TUNOLE, 87 ⁇ Tamp, 88 ⁇ Noop, 89 ⁇ Tape, 90 ⁇ Dicing Blade, 95, 96 ⁇ Wedge.
  • the present invention is applied to a manufacturing method of a MAP (Mold Array Package) type semiconductor device that collectively seals a plurality of semiconductor chips mounted on a wiring board. This case will be described with reference to FIG.
  • a wiring mother board (also referred to as a board) 1 shown in FIGS. 2 to 4 is prepared (S01).
  • 2 is an overall plan view of the component mounting surface of the wiring mother board 1
  • FIG. 3 is a front view of the wiring mother board 1 of FIG. 1
  • FIG. 4 is an enlarged cross-sectional view of a single product forming portion on the wiring mother board 1. .
  • the wiring mother board 1 is a mother body of a wiring board of a semiconductor device to be described later, and has an appearance that is, for example, a flat rectangular thin plate.
  • the wiring motherboard 1 has a main surface (first surface) la and a back surface (second surface) lb on the opposite side.
  • the main surface la of the wiring mother board 1 is a component mounting surface on which a semiconductor chip (hereinafter also referred to as a chip) is mounted as described later, and the back surface of the wiring mother board 1 is a bump electrode (projection electrode) as described later. ) Is a bump electrode formation surface.
  • a product forming portion 2 is disposed on the wiring mother board 1.
  • the product forming section 2 is a quadrangular portion surrounded by a dotted line in FIG.
  • Each product forming section 2 is a unit region having a wiring board configuration necessary for constituting one semiconductor device.
  • a plurality of guide holes 3 penetrating the main back surface of the wiring mother board 1 are formed on both sides of the wiring mother board 1. The guide hole 3 is used as a guide when the wiring mother board 1 is transported or positioned.
  • the wiring mother board 1 has a multilayer wiring structure.
  • Figure 4 shows an example of a four-layer wiring configuration.
  • the upper surface (main surface la) of the wiring motherboard 1 indicates the component mounting surface
  • the lower surface (rear surface lb) of the wiring motherboard 1 indicates the bump electrode formation surface.
  • the wiring mother board 1 is attached to the laminated body formed by alternately stacking the insulating base material (core material) 5 and the wiring layer 6, and the upper and lower surfaces (component mounting surface and bump electrode forming surface) of the laminated body.
  • Solder resist 7 is provided.
  • the insulating substrate 5 is made of, for example, a glass with high heat resistance and epoxy resin.
  • the material of the insulating substrate 5 is not limited to this, and can be variously changed.
  • BT resin or aramid nonwoven material may be used. When BT resin is selected as the material for the insulating substrate 5, the heat dissipation can be improved because of the high thermal conductivity.
  • Various conductive patterns 6a-6e are formed on each wiring layer 6 of the wiring mother board 1.
  • Guidance The body patterns 6a-6e are patterned by etching a copper (Cu) foil, for example.
  • Conductor pattern 6a of wiring layer 6 on the component mounting surface is a chip mounting pattern
  • conductor pattern 6b is an electrode pattern to which bonding wires are connected
  • conductor pattern 6e (see Fig. 2) is for sealing described later. This is a pattern for facilitating peeling of the resin.
  • a conductor pattern for signal wiring and power supply wiring is formed on the wiring layer 6 on the component mounting surface. Part of the conductor patterns 6a, 6b, 6e, etc.
  • the conductor pattern 6d (see FIG. 4) of the wiring layer 6 on the bump electrode forming surface is an electrode pattern for bonding bump electrodes.
  • conductor patterns for signal wiring and power supply wiring are also formed on the wiring layer 6 on the bump electrode forming surface. Part of the conductor pattern 6d and the like on the bump electrode formation surface is also exposed from the solder resist 7, and the exposed surface is subjected to, for example, nickel and gold plating.
  • the conductor pattern 6c (see FIG. 4) of the wiring layer 6 in the laminate is a wiring pattern for signals and power supplies.
  • the solder resist 7 is also called a solder mask or stop-off, and prevents solder from coming into contact with a conductor pattern that does not require soldering during soldering. In addition to functioning as a protective film that protects the pattern from molten solder, it prevents solder bridges between conductors, protects against contamination and moisture, prevents damage, protects against environment, prevents migration, and maintains insulation between circuits. It also has a function of preventing a short circuit between the road and other components (chip, printed wiring board, etc.).
  • the solder resist 7 is made of, for example, polyimide resin and is formed in specific regions on the main surface and the back surface of the wiring mother board 1.
  • the wiring mother board 1 having a four-layer wiring structure has been illustrated, but the present invention is not limited to this.
  • the wiring mother board 1 having a two-layer wiring structure having fewer than four layers is used.
  • a lot of wiring mother boards 1 with various wiring layer configurations (various varieties) such as a wiring mother board 1 having a 6-layer wiring structure more than four layers flow in lot units.
  • a chip (semiconductor chip) is used for each product forming portion 2 on the component mounting surface of the wiring mother board 1 by using an adhesive such as a silver-containing paste. Equipped with 9 (S02).
  • the thickness of the chip 9 is not particularly limited, but is, for example, about 100 / zm or less.
  • FIG. 5 is an overall plan view showing the component mounting surface of the wiring mother board 1 after the wire bonding process
  • FIG. 6 is a front view of the wiring mother board 1 of FIG.
  • the case where one chip 9 (electronic component) is mounted on each product forming section 2 is exemplified, but the present invention is not limited to this.
  • each product forming section 2 is mounted with a laminated chip in which a plurality of chips 9 are laminated.
  • passive elements such as chip resistors and chip capacitors may be mounted.
  • FIG. 5 shows a diagram in which chips 9 are mounted on all product forming portions 2 in one wiring mother board 1.
  • a method is adopted in which chip bonding is not performed on the product forming part 2 where the wiring is defective, and the yield is improved. It is illustrated.
  • FIGS. 7 and 8 there is also a wiring mother board 1 that cannot be chip-bonded.
  • an X mark 11 indicating a wiring failure is attached to the defective product formation part.
  • chip 9 is not installed in this part.
  • Figure 8 shows that the chip 9 is mounted and the point is the point of the arrow.
  • a sealing body is formed on the wiring mother board 1 (S04). This sealing body is formed by the compression molding apparatus shown in FIGS.
  • FIG. 9 is a layout diagram showing an example of the compression molding apparatus 20.
  • the compression molding apparatus 20 includes a powder resin weighing unit 21, a powder resin supply unit 22, a substrate loader 23, a substrate alignment unit 24, a carry-in and transfer unit 25, a compression molding die 26, a carry-out and transfer unit 27, a flow cane break unit 28, and a substrate. Unloader 29.
  • the wiring mother board 1 before molding after the wire bonding step is transported to the substrate aligning section 24 of the transporting and transporting section 25 through the substrate loader 23, and after being aligned by the substrate aligning section 24, the transporting and transporting section. It is attached to the lower surface of the upper mold of the compression mold 26 through 25. In addition, wax resin is supplied to the cavity on the upper surface of the lower mold. Thereafter, the upper die and the lower die are clamped (clamped) to form a sealing body on the lower surface side of the wiring mother board 1.
  • the wiring mother board 1 that has undergone the molding process in the compression molding die 26 is carried by the carry-carrying part 27 to the flow-cavity break part 28. In this flow cane break portion 28, unnecessary hardened resinous portions around the sealing body are cut and removed.
  • the wiring mother board 1 having the sealing body from which unnecessary flow-carbide portions are removed is accommodated in the board unloader 29.
  • FIG. 10 to FIG. 12 are diagrams showing the compression mold 26.
  • the compression mold 26 has a force with a lower mold 35 and an upper mold 60 located above the lower mold 35.
  • FIG. 11 is a plan view of a part of the lower mold 35
  • FIG. 12 is a bottom view of a part of the upper mold 60.
  • the lower die 35 is attached to the upper surface of the lower platen of the compression molding apparatus 20, and the upper die 60 is attached to the lower surface of the upper platen of the compression molding apparatus 20.
  • the upper platen descends relative to the lower platen and clamps (clamps)!
  • a separator 39 having a plurality of spring guide holes 38 is overlaid on a pedestal 37 that also has a rectangular flat plate force.
  • the lower mold stopper 40 with the upper and lower parts in a flange shape is inserted.
  • a coiled spring 41 is inserted into the spring guide hole 38.
  • the lower mold taste stocko 40 is inserted inside the spring 41 and the edge of the upper flange is supported by the upper end of the spring 41.
  • the lower end of the lower cavity stopper 40 supported by the spring 41 is in a floating state.
  • a height adjustment plate 42 is arranged on a base 37 below the floating lower cavity tent 40.
  • a substrate pressing block 43 made of a rectangular frame is arranged on the upper surface of the separator 39.
  • the substrate pressing block 43 is structured to be supported by the lower mold taste collar 40 at a plurality of locations.
  • the substrate pressing block 43 having a quadrangular frame force is stably supported by the lower mold stopper 40 at, for example, two locations on two sides facing each other.
  • a square cavity bottom plate 44 is disposed inside the substrate pressing block 43.
  • the cavity bottom plate 44 is fixed on the separator 39.
  • the cavity bottom plate 44 is formed thinner than the substrate holding block 43.
  • the bottom surface of the cavity 45 in which the cavity bottom plate 44 is depressed is formed, and the inner peripheral surface of the substrate pressing block 43 forms the peripheral surface of the cavity 45. Since the region where the product forming part 2 of the wiring mother board 1 is provided is rectangular, the cavity 45 is also rectangular.
  • a fixed block 47 is disposed outside the substrate pressing block 43.
  • This fixed block 47 is fixed to the separator 39.
  • the substrate holding block 43 is supported by the lower mold stopper 40 that is biased upward by the spring 41, it can be slid up and down with respect to the fixed block 47 to some extent.
  • the flange 46 is provided at the lower outer periphery of the substrate pressing block 43. This flange 46 portion can move up and down in the guide space 48 formed in the fixed block 47. Then, the upward movement of the guide space 48 is stopped by a stopper 49 provided extending from the fixed block 47! /.
  • a rectangular frame-shaped lower mold plate 50 is fixed to the upper surface of the fixed block 47.
  • a substrate pressing block 43 is fitted to the inner peripheral side of the lower mold plate 50.
  • the substrate holding block 43 has an inner peripheral surface that slides against the outer peripheral surface of the cavity bottom plate 44. The outer peripheral surface slides relative to the inner peripheral surface of the lower mold plate 50 and moves up and down.
  • the upper surface of the lower mold plate 50 is in contact with the lower surface of the upper mold.
  • a rectangular frame-shaped groove 51 is provided, and an O-ring 52 is inserted (see FIG. 11).
  • the O-ring 52 is crushed by the lower mold and the upper mold to close the space, so that the area inside the O-ring 52 is maintained airtight.
  • the substrate pressing block 43 has a rectangular frame (rectangular frame) structure, and a flow cavity 53 is provided on each of the pair of long sides.
  • the mating surface of the upper surface of the substrate pressing block 43 comes into contact with the upper die.
  • the spring 41 of the board pressing block 43 is squeezed by the pressure at the time of clamping (clamping), the lower mold tail collar 40 moves downward, and the lower end is lowered with the lower end in contact with the height adjustment plate 42. Stop. In this state, the O-ring 52 is crushed by a predetermined thickness by the upper mold and the lower mold.
  • the flow cavity 53 is provided on the mating surface of the upper surface of the substrate pressing block 43 along the long side.
  • the flow cavity 53 is formed of a depression (groove).
  • the cavity 45 and the flow cavity 53 are connected by a flow gate 54 arranged at a predetermined pitch.
  • the flow gate 54 is a shallower groove than the cavity 45 and the flow cavity 53, and as shown in FIG. 10, the flow gate 54 is shallow on the cavity 45 side and has a deep gate structure on the flow cavity 53 side. This has the effect of pressurizing the resin in the cavity.
  • an air vent 55 that is shallow with a predetermined pitch and also has a groove (dent) force is provided on the mating surface on the short side of the substrate pressing block 43.
  • the air vent 55 is formed in the inner peripheral portion of the substrate holding block 43 and is in communication with the cavity 45. This has an effect of discharging the air remaining in the cavity to the outside of the cavity.
  • a wedge 56 made of a circular protrusion and a wedge 57 also having a rectangular protrusion force are provided on the upper surface of the lower mold plate 50, that is, the mating surface.
  • an upper mold plate 63 made of a square frame is fixed to the lower surface of the base 62.
  • a substrate suction block 64 is fitted inside the upper mold plate 63.
  • the wiring mother board 1 is held by vacuum suction on the lower surface of the board suction block 64. .
  • the substrate suction block 64 is provided with a vacuum suction hole 65 in a row along the vicinity of both sides thereof.
  • These vacuum suction holes 65 are connected to a vacuum suction pipe 66 shown in FIG.
  • the vacuum suction pipe 66 is connected to a vacuum suction mechanism (not shown).
  • a holding mechanism is formed by the vacuum suction mechanism, the vacuum suction pipe 66 and the vacuum suction hole 65.
  • the wiring mother board 1 can be held on the lower surface of the upper mold 60 by this holding mechanism.
  • a flow cavity plunger 67 that is controlled to enter into the flow cavity 53 of the lower mold 35 is disposed on the upper mold plate 63 portion on both sides of the substrate suction block 64. These two flow cavity plungers 67 are structured to face the flow cavity 53 of the lower mold 35.
  • the flow cavity plunger 67 is fixed to the tip of the drive shaft 69 of the pressure actuator 68. Therefore, when the pressurizing actuator 68 is turned on, the flow cavity plunger 67 is advanced downward, and in the clamped state of the lower mold and the upper mold, the flow cavity plunger 67 enters the tip of the flow cavity 53 of the lower mold. Further, the pressure actuator 68 is lifted by the turning-off operation of the pressurizing actuator 68, and as shown in FIG. 10, the tip is stopped at substantially the same position as the lower surface of the upper mold plate 63. Further, a plurality of support villas 70 are fixed as strength members on the upper surface of the base 62.
  • wedges 71, 72 are provided on the lower surface of the upper die plate 63 corresponding to the wedges 56, 57 of the lower die plate 50.
  • the wedge 71 is a circular depression into which the wedge 56 is inserted
  • the wedge 72 is a rectangular depression into which the wedge 57 is inserted.
  • the upper mold plate 63 is provided with a plurality of decompression holes 73.
  • the decompression hole 73 is provided in the upper mold plate 63 along the short side of the substrate suction block 64. These decompression holes 73 are arranged so as to be located in the region inside the O-ring 52 when the lower die and the upper die are clamped.
  • the decompression hole 73 is connected to a pipe 74 shown in FIG. This pipe 74 is connected to a vacuum pump (not shown). Therefore, after the lower mold and the upper mold are clamped, exhaust is performed by turning on the vacuum pump. Therefore, the space portion of the mold that is surrounded by the O-ring 52 and connected to this area is decompressed to a predetermined pressure. Is done.
  • cartridge heaters for heating the lower mold and the upper mold to a predetermined temperature are arranged at predetermined positions on the lower mold 35 and the upper mold 60, respectively.
  • the compression molding apparatus 20 can perform sheet molding by disposing a resin sheet on the lower mold 35.
  • FIG. 13 to FIG. 16 are diagrams schematically showing a compression molding die portion of the compression molding apparatus 20.
  • the wiring mother board 1 is attached to the lower surface of the upper mold 60.
  • This attachment is vacuum suction holding by the holding mechanism described above.
  • the wiring mother board 1 is attached in a state where the main surface la of the wiring mother board 1 is the lower surface and the chip 9 is positioned on the lower surface.
  • the resin sheet 75 is attached to the entire upper surface of the lower mold 35.
  • the cartridge heaters of the lower mold 35 and the upper mold 60 are operated, and the temperatures of the lower mold 35 and the upper mold 60 are set to predetermined temperatures (for example, 170 to 180 ° C.).
  • powder resin (powder resin) 80 is put into the cavity 45 of the lower mold 35.
  • the powder resin 80 is supplied on the resin 45 of the cavity 45.
  • the input amount of the powder resin 80 is formed by the wiring mother board 1 (board) that the lower mold and the upper mold are clamped and no chip 9 is mounted, and the lower mold cavity 45. This is based on the space volume into which the fat is injected, for example, 120-150% of the space volume.
  • the resin is, for example, an epoxy resin.
  • the lower die 35 and the upper die 60 are clamped (clamped).
  • the noda resin 80 becomes a melted resin 80a by heating and pressurization, and is filled in the space formed by the wiring mother board 1 and the cavity 45.
  • a part of the melted resin 80a flows into the flow cavity 53 through the flow gate 54. Since the amount of powder resin 80 injected is an amount that the chip 9 is not mounted at all on the wiring mother board 1, the melted resin 80a surely flows into the flow cavity 53.
  • the pressurizing actuator 68 is turned on, and the flow cavity plunger 67 enters the flow cavity 53 of the lower mold 35 in the mold clamped state as shown in FIG.
  • the resin in the flow cavity 53 is pressurized to a predetermined stress.
  • the pressure of resin in cavity 45 and the pressure of resin in flow cavity 53 are set to the same level.
  • the applied pressure of the resin is, for example, 50 kgZcm 2 or more.
  • FIG. 17 is an operation chart showing the press operation (clamp operation of the lower mold and the upper mold) and the flow cavity plunger operation during compression molding.
  • the vertical axis shows the press operation and the vertical movement of the flow cavity ranger 67, and the horizontal axis shows the time (seconds).
  • the pressing operation is a sudden pressurization operation from 0 seconds to time T1, and then the clamping operation is decelerated from time T1 to time T2. Further, the curing time for curing the resin is from time T2 to time T5. Then, during the time T2 to T6 within the curing time, the pressure treatment to the melted resin 80a in the flow cavity 53 by the flow cavity plunger 67 continues.
  • FIG. 18 is a perspective view showing the wiring mother board 1 on which the encapsulated sealing body 85 from which unnecessary grease parts are removed is formed.
  • FIG. 19 is a plan view thereof. In FIG. 19, the relationship between the sealing body 85 and each product forming part 2 is shown to be divided.
  • FIG. 20 is a flowchart showing each process when supplying the resin to the compression mold described above.
  • the sealing resin formation is performed by the process from step S11 to step S14. That is, in step S11, the amount of the resin to be input by the resin measuring unit is measured and measured. This is done by the powder resin weighing unit 21 shown in FIG. At this time, the number of chips 9 mounted on the wiring mother board 1 is not measured. Therefore, the powder resin weighing unit 21 does not require an image recognition device, and a simple and inexpensive powder resin weighing unit 21 is sufficient. .
  • the measurement error accuracy when weighing the resin amount is in lOOmmg units, and the flowchart in FIG. The accuracy is less than in the case of. This is because the amount of resin input is rough as described above.
  • step S12 After weighing the resin, the weighed resin is transferred to the resin supply unit (powder resin supply unit 22).
  • the resin is supplied to the compression mold by the powder resin supply unit 22.
  • step S14 the sealing body forming force is performed as described above. This corresponds to S11-S14i in Fig. 20 and S53- S56 in Fig. 28. That is, according to the first embodiment, the steps S50 to S52 in FIG. 28 are not necessary, and if the incidental facilities such as the image processing apparatus are reduced, the number of steps can be reduced as well as the number of steps.
  • a bump electrode (projection electrode) is formed on the back surface lb of the wiring mother board 1. That is, as shown in FIG. 21, a plurality of spherical solder bumps 87 held by a bump holding tool 86 are immersed in a flux bath, and after applying a flat to the surface of the solder bump 87, the plurality of solder The bumps 87 are temporarily attached simultaneously to the conductor pattern 6d (refer to FIGS. 4 and 25) on the bump electrode forming surface of the wiring mother board 1 using the adhesive force of the flux.
  • the solder bump 87 also has, for example, a lead (Pb) Z tin (Sn) solder force.
  • solder bump 87 As a material of the solder bump 87, for example, lead-free solder such as tin Z silver (Ag) solder may be used.
  • the solder bumps 87 may be connected together for each product forming part 2, but from the viewpoint of improving the throughput of the solder bump connecting process, the solder bumps 87 of a plurality of product forming parts 2 are connected together. Connection is preferable.
  • the solder bumps 87 are fixed to the conductor pattern 6d by heating and reflowing at a temperature of, for example, about 220 ° C., and bump electrodes (projection electrodes) 88 are formed as shown in FIG. After that, the solder bump connection process is completed by removing the flat residue remaining on the surface of the wiring mother board 1 using a neutral detergent.
  • FIG. 23 is a schematic cross-sectional view of the semiconductor device 15 and corresponds to FIG.
  • the method for manufacturing a semiconductor device using the wiring mother board 1 having a plurality of product forming portions 2 has been described. However, the same applies to the case of a substrate having a single product forming portion.
  • the device can be manufactured.
  • the first embodiment has the following effects.
  • the flow mold 53 is provided in the compression mold to accommodate the melted resin 80a overflowing from the cavity 45.
  • the resin melted resin 80a flowing into the flow cavity 53 is also pressurized by the flow cavity plunger 67 at the same pressure as the melted resin 80a in the cavity 45.
  • the resin in the entire cavity 45 is cured under an appropriate pressure, the thickness of the formed sealing body 85 (sealing body 8) is eliminated, and the thickness dimension varies greatly. It is possible to suppress the occurrence of defects due to the reason. Therefore, it is possible to reduce the manufacturing cost of the semiconductor device with respect to the yield improving ability. Therefore, the manufacturing cost of the semiconductor device can be reduced by improving the yield.
  • the sealed body 85 (sealed body 8) can form a homogeneous material, and bubbles ( No voids are contained, and the moisture resistance of the sealing body 8 is improved.
  • the resin in the cavity 45 needs to be cured under a pressure of 50 kgZcm 2 or more, for example.
  • the sealing body 8 is formed by a compression molding apparatus, a strong resin flow like transfer molding occurs when the sealing body is formed.
  • deformation due to the flow of the filler 10 connecting the electrode of the semiconductor chip 9 and the wiring of the substrate (wiring motherboard 1) does not occur.
  • the current wire diameter is about 25 m. It can be assumed that the wire diameter will become thinner in the future due to further narrowing of the rod. For example, if the diameter of the wire is about 23 ⁇ m, the electrode pad pitch can be reduced to about 65 ⁇ m.
  • the wire diameter is thought to advance further to 20 ⁇ m, 17 ⁇ m, and 15 ⁇ m. Even in such a thin wire, the short circuit failure caused by the wire flow can be prevented by compression molding.
  • the compression molding apparatus of this example matches the state in which the electronic components are not mounted on the substrate that does not need to count the number of electronic components such as the semiconductor chip 9 mounted on the wiring motherboard 1 (substrate). Since the amount of resin is determined as the amount of input resin, the auxiliary device of the compression molding apparatus can be simplified, and the cost of the compression molding apparatus can be reduced. As a result, the manufacturing cost of the semiconductor device can be reduced.
  • FIG. 26 and FIG. 27 are diagrams related to a compression molding die of the compression molding apparatus of the second embodiment.
  • FIG. 26 is a plan view showing the lower mold of the compression mold
  • FIG. 27 is a schematic view showing the mating surface of the upper mold of the compression mold.
  • the compression molding apparatus of the second embodiment is an example in which a plurality of compression molding sections are arranged in the compression molding die of the first embodiment.
  • Example 1 there is one set of compression-molded parts, but in the case of Example 2, as shown in FIGS. 26 and 27, two sets of compression-molded parts are arranged in parallel.
  • one set of compression-molded portions includes a plurality of flow cavities 53, cavities 45 and flow cavities 53 arranged on both sides of the cavities 45 and 45 as shown in FIG.
  • the flow gate 54 is in communication with the air vent 55.
  • the air gate 55 is disposed on both ends of the cavity 45 and the air vent 55 is in communication with the cavity 45.
  • Set up It is The holding mechanism is as described in the first embodiment, and in FIG. 27, the vacuum suction holes 65 constituting the holding mechanism are shown.
  • wedges 95 that also have a protrusion force are arranged at the four corners of the lower plate 50 of the lower die 35, and a wedge 96 that also has a depression force to which the wedge 95 is fitted. As shown in FIG. 27, it is provided on the upper plate 63 of the upper mold 60! /.
  • the method for manufacturing a semiconductor device by compression molding according to the present invention it is possible to form a sealed body having a uniform and good sealing performance, so that a high-quality semiconductor device can be manufactured at low cost. Can be manufactured.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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  • Physics & Mathematics (AREA)
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  • General Physics & Mathematics (AREA)
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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)

Abstract

A method of manufacturing a semiconductor device, comprising the steps of preparing a substrate (wiring board), mounting a chip on the substrate, mounting the substrate on the lower surface of a cope for compression molding, throwing a powder resin into a cavity in the upper surface of a drag, and molding a sealed body on the lower surface of the substrate by mold clamping. The drag comprises the cavity corresponding to the sealed body molded on the substrate, a flow cavity positioned on the outside of the cavity, a plurality of flow gates allowing the cavity to communicate with the flow cavity, and a plurality of air vents arranged continuously with the cavity. The cope comprises a holding mechanism holding the substrate and a flow cavity plunger controllably plunged into the flow cavity of the drag. The method is characterized in that, when the sealed body is molded, the pressuring force of the resin flowing into the flow cavity is brought to the same pressure as the pressuring force of the resin in the cavity by plunging the flow cavity plunger into the flow cavity before the sealed body is molded.

Description

明 細 書  Specification
半導体装置の製造方法及び圧縮成形装置  Semiconductor device manufacturing method and compression molding apparatus
技術分野  Technical field
[0001] 本発明は半導体装置の製造方法及び圧縮成形装置に係わり、特に、半導体装置 の製造において基板の一面に搭載した半導体チップ等の電子部品を絶縁性榭脂か らなる封止体で覆う封止技術に適用して有効な技術に関する。  TECHNICAL FIELD [0001] The present invention relates to a semiconductor device manufacturing method and a compression molding apparatus, and particularly covers an electronic component such as a semiconductor chip mounted on one surface of a substrate with a sealing body made of an insulating resin in the manufacture of the semiconductor device. The present invention relates to a technology effective when applied to a sealing technology.
背景技術  Background art
[0002] 半導体チップ等を絶縁性榭脂からなる封止体で覆う装置としてトランスファモール デイング装置が知られている。トランスファモールディング装置は、カル上に位置する ポット (筒体）内にタブレットと呼称される榭脂材料を投入し、その後プランジャを降下 させてカル上の榭脂材料を加熱加圧して溶融させる構造になって!/、る。溶融した榭 脂（レジン）は、ランナー,ゲートを通過してキヤビティ内に圧入され、キヤビティ内で 硬化した榭脂によって封止体が形成される。  A transfer molding apparatus is known as an apparatus for covering a semiconductor chip or the like with a sealing body made of an insulating resin. The transfer molding device has a structure in which a resin material called a tablet is placed in a pot (cylinder) located on the cull, and then the plunger is lowered to heat and press the resin material on the cull to melt it. Get ready! The molten resin (resin) passes through the runner and gate and is pressed into the cavity, and a sealed body is formed by the resin cured in the cavity.
[0003] トランスファモールディング装置は、榭脂をカル力もキヤビティに移動させるため、ラ ンナ一等樹脂が流れる流路で硬化した榭脂は使用されずに廃棄される。このため、 榭脂の使用効率が低い。また、溶けた榭脂はキヤビティ内に勢いよく注入されるため 、榭脂の流れによって半導体チップの電極に接続されるワイヤが変形しショート不良 を発生させることもある。半導体装置の小型'薄型化に伴い、ワイヤは一層細いもの が使用される傾向にあり、ショート不良はさらに起き易くなる。  [0003] In the transfer molding apparatus, the resin is hardened in the flow path through which the runner-first resin flows, and the resin is discarded without being used in order to move the resin in the kull force. For this reason, the use efficiency of sallow is low. In addition, since the melted resin is vigorously injected into the cavity, the wire connected to the electrodes of the semiconductor chip may be deformed by the flow of the resin and cause a short circuit failure. As semiconductor devices become smaller and thinner, wires tend to be thinner and short-circuit defects are more likely to occur.
[0004] このようなことから、近年、圧縮成形装置が使用されている（例えば、非特許文献 1) 。非特許文献 1に記載されているように、圧縮成形装置は、ポット、ランナーを有しな い金型構造であり、キヤビティを構成するものは、基板とキヤビティ底部及び枠部であ る。枠部は基板と接するクランプ面であり、キヤビティの側面でもある。また、圧縮成形 装置における榭脂供給は、画像認識により基板上のチップ搭載数を把握し、そのデ ータを元に榭脂重量を算出して粉粒榭脂を計量供給し、打錠している。そして、この 打錠した榭脂を用いて圧縮成形を行って！/ヽる。  [0004] For these reasons, in recent years, compression molding apparatuses have been used (for example, Non-Patent Document 1). As described in Non-Patent Document 1, the compression molding apparatus has a mold structure that does not have pots and runners, and what constitutes a cavity is a substrate, a cavity bottom, and a frame. The frame portion is a clamp surface in contact with the substrate, and is also a side surface of the cavity. In addition, the supply of grease in the compression molding machine is based on the recognition of the number of chips on the substrate by image recognition, the weight of the grease is calculated based on the data, the powdered grease is metered, and the tablet is compressed. ing. Then, use this compressed tablet to compress and mold! / Speak.
[0005] 非特許文献 1 :工業調査会発行「電子材料」 2004年 8月号、 66頁一 69頁。 発明の開示 [0005] Non-Patent Document 1: “Electronic Materials” published by Industrial Research Council, August 2004, 66-69. Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0006] 半導体装置製造における封止体形成方法としては、成形樹脂が安価なエポキシ榭 脂を使用したトランスファモールディング方式が主流である。しかし、前述のようにトラ ンスファモールディング装置では、カル、ランナー、ゲート等の榭脂流路を有するため に榭脂（レジン)の使用効率が 30— 50%となり、製造コスト低減を妨げている。  [0006] As a sealing body forming method in the manufacture of semiconductor devices, a transfer molding method using an epoxy resin whose molding resin is inexpensive is the mainstream. However, as described above, the transfer molding device has a resin flow path such as cal, runner, gate, etc., so the use efficiency of resin is 30-50%, which hinders manufacturing cost reduction. .
[0007] そこで、基板の一面側に封止体を形成する片面モールド製品の製造においては、 カル、ランナー、ゲートを無くした圧縮成形装置が使用され始めている。本出願人に おいても圧縮成形法によって半導体装置を製造している。しかし、従来の圧縮成形 装置では、以下のような不都合が存在することが判明した。  [0007] Therefore, in the manufacture of a single-sided molded product in which a sealing body is formed on one side of a substrate, a compression molding apparatus that eliminates the cull, runner, and gate has begun to be used. The applicant also manufactures semiconductor devices by the compression molding method. However, it has been found that the conventional compression molding apparatus has the following disadvantages.
[0008] 圧縮成形装置は、カル、ランナー、ゲートを無くすことによってレジン使用効率が飛 躍的に向上するが、レジン供給においては、基板上に搭載したチップ (半導体チップ )数を把握し、レジン重量を算出し計量しキヤビティに投入する必要がある。  [0008] The compression molding apparatus dramatically improves the efficiency of resin use by eliminating cals, runners, and gates. However, in resin supply, the number of chips (semiconductor chips) mounted on the substrate is ascertained. It is necessary to calculate and weigh the weight and put it into the cavity.
[0009] 製品形成部をマトリックス状に配置した基板を使用して片面モールドを行って半導 体装置を製造する場合、配線等に不良が認められた製品形成部には半導体チップ を搭載しないため、基板毎にチップ搭載数が変わることもある。従って、基板ごとにレ ジン供給量が決定され、これに基づいて圧縮成形が行われる。そして、算出重量より レジン量を多くした場合、封止体 (パッケージ)の厚さが厚くなる。また、算出重量より レジン量が少ない場合は、ノ ッケージ厚さが薄くなり、ワイヤやチップが露出する露 出不良が発生する。  [0009] When a semiconductor device is manufactured by performing single-sided molding using a substrate in which product formation portions are arranged in a matrix, semiconductor chips are not mounted on product formation portions in which defects are found in wiring or the like. The number of chips mounted on each substrate may change. Therefore, the resin supply amount is determined for each substrate, and compression molding is performed based on this. When the amount of resin is increased from the calculated weight, the thickness of the sealing body (package) increases. In addition, if the amount of resin is less than the calculated weight, the thickness of the knocker will be reduced, resulting in an exposure failure that exposes the wire or chip.
[0010] 図 28は本発明に先立って検討した圧縮成形の榭脂（レジン)供給の各工程を示す フローチャートである。レジン供給においては、基板上チップ搭載数チェック（画像に て認識) S50、レジン計量部へチップ搭載数転送 S51、レジン計量データ処理とキヤ ビティ内へ投入するレジン量算出 S52、レジン計量部で投入するレジン量の計量と 測定 (計量時の測定誤差精度 50mmg単位要) S53、計量後レジン供給部へ移し替 え S54、圧縮成形金型へレジン供給 S55、封止体形成 S56の順で行われる。工程 S 50では、基板上に搭載された半導体チップの搭載数をモニタカメラで画像認識する 。この画像認識によるチップ搭載数 (情報）はレジン計量部へ転送される（S51)。レジ ン計量部では、チップ搭載数の情報 (データ）を基にレジン計量データ処理を行 ヽ、 圧縮成形金型の下型のキヤビティ内に投入するレジン量を算出する（S52)。つぎに 、レジン計量部で投入するレジン量の計量と測定が行われる（S53)。この計量時の 測定誤差精度は 50mmg単位となる。レジン計量後、計量されたレジンはレジン供給 部へ移し替えられる（S54)。レジン供給部では、計量されたレジンを圧縮成形金型 へ供給する（S55)。その後、圧縮成形金型の下型と上型が重ね合わされ (型締め）、 ついでモールドが行われ、封止体を形成する（S56)。 [0010] FIG. 28 is a flow chart showing each step of supplying a resin for compression molding studied prior to the present invention. In the resin supply, check the number of chips on the board (recognized by image) S50, transfer the number of chips mounted to the resin weighing section S51, calculate the amount of resin to be loaded into the resin weighing data processing and capacity S52, load at the resin weighing section Measurement and measurement of the amount of resin to be measured (measurement error accuracy at weighing 50 mmg required) S53, transfer to the resin supply section after weighing S54, resin supply to compression mold S55, sealing body formation S56 . In step S50, the number of semiconductor chips mounted on the substrate is image-recognized with a monitor camera. The number of chips mounted (information) by this image recognition is transferred to the resin measuring unit (S51). cash register The weighing unit performs resin weighing data processing based on the information (data) of the number of chips mounted, and calculates the amount of resin to be put into the lower mold cavity of the compression mold (S52). Next, measurement and measurement of the amount of resin charged in the resin measuring section are performed (S53). The measurement error accuracy during this measurement is in units of 50 mmg. After weighing the resin, the weighed resin is transferred to the resin supply section (S54). The resin supply unit supplies the measured resin to the compression mold (S55). Thereafter, the lower mold and the upper mold are overlaid (clamping), and then molding is performed to form a sealing body (S56).
[0011] しかし、このような工程を行う圧縮成形装置は、チップ数把握のための高精度なモ ユタカメラ及び画像処理装置等の画像ユニットが必要となるとともに、チップ数把握か らレジン計量に至る計算ソフトウェア等を必要とし、付帯装置が高価となり、半導体装 置の製造コストを引き上げることになる。 However, a compression molding apparatus that performs such a process requires an image unit such as a high-precision motor camera and an image processing device for grasping the number of chips, and leads to resin weighing from grasping the number of chips. Computational software is required, and incidental devices become expensive, which increases the manufacturing cost of semiconductor devices.
本発明の一つの目的は、半導体装置の製造コストの低減が図れる半導体装置の製 造方法を提供することにある。  One object of the present invention is to provide a method of manufacturing a semiconductor device that can reduce the manufacturing cost of the semiconductor device.
本発明の一つの目的は、半導体装置の製造コストの低減が図れる圧縮成形装置を 提供することにある。  One object of the present invention is to provide a compression molding apparatus that can reduce the manufacturing cost of a semiconductor device.
本発明の一つの目的は、封止体の厚さを過不足なく形成できる半導体装置の製造 方法を提供することにある。  One object of the present invention is to provide a method for manufacturing a semiconductor device in which the thickness of a sealing body can be formed without excess or deficiency.
本発明の一つの目的は、封止体の厚さを過不足なく形成できる圧縮成形装置を提 供することにある。  One object of the present invention is to provide a compression molding apparatus that can form the thickness of a sealing body without excess or deficiency.
[0012] 本発明の前記ならびにそのほかの目的と新規な特徴は、本明細書の記述および添 付図面力もあきらかになるであろう。  [0012] The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawing power.
課題を解決するための手段  Means for solving the problem
[0013] 本願において開示される発明のうち代表的なものの概要を簡単に説明すれば、下 記のとおりである。 [0013] The outline of a representative one of the inventions disclosed in the present application will be briefly described as follows.
[0014] (1)本発明の半導体装置の製造方法は、 (1) A method for manufacturing a semiconductor device of the present invention includes:
(a)複数の製品形成部が配置された基板を準備する工程、  (a) a step of preparing a substrate on which a plurality of product forming portions are arranged;
(b)前記各製品形成部に電子部品をそれぞれ搭載する工程、  (b) a step of mounting electronic components on each of the product forming parts,
(c)前記電子部品が搭載された基板を前記電子部品が下面側になる状態で圧縮 成形金型の上型の下面に取り付ける工程、 (c) Compressing the board on which the electronic component is mounted with the electronic component on the lower surface side Attaching to the lower surface of the upper mold of the molding die,
(d)前記圧縮成形金型の前記上型に対面する下型の上面に形成され、かつ前記 複数の製品形成部全体を含むように形成されたキヤビティに封止体形成用の榭脂を 供給する工程、  (d) Supplying a resin for forming a sealing body to a cavity formed on the upper surface of the lower mold facing the upper mold of the compression molding mold and formed to include the entire plurality of product forming portions. The process of
(e)前記下型と前記上型のクランプで前記基板を挟み込んで前記榭脂を加圧加熱 して前記基板の下面側に前記各製品形成部の前記電子部品を一括して覆う前記榭 脂からなる封止体を形成する工程、  (e) The resin sandwiching the substrate between the lower mold and the upper mold and pressurizing and heating the resin to collectively cover the electronic components of the product forming portions on the lower surface side of the substrate. Forming a sealing body comprising:
(f)前記工程 (e)後の前記基板を前記成型金型から離型する工程を有し、 前記下型は前記基板に形成される前記封止体に対応するキヤビティと、前記キヤビ ティの外側に位置するフローキヤビティと、前記キヤビティと前記フローキヤビティを連 通する複数のフローゲートと、前記キヤビティに連なる複数のエアーベントとを有し、 前記上型は前記基板を保持する保持機構と、前記下型の前記フローキヤビティ内 に突入制御されるフローキヤビティプランジャとを有し、  (f) a step of releasing the substrate after the step (e) from the molding die, wherein the lower die is a cavity corresponding to the sealing body formed on the substrate, and the cavity A holding mechanism for holding the substrate; the flow cavity located outside; a plurality of flow gates communicating the cavity with the flow cavity; and a plurality of air vents communicating with the cavity. And a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold,
前記工程 (e)の前記封止体を形成する際、前記フローキヤビティプランジャを前記 下型の前記フローキヤビティ内に突入させて前記フローキヤビティに流入した前記榭 脂を所定の圧力に加圧することを特徴とする。  When forming the sealing body in the step (e), the flow cavity plunger is inserted into the lower mold flow cavity to apply the resin flowing into the flow cavity to a predetermined pressure. It is characterized by pressing.
[0015] そして、前記フローキヤビティプランジャを前記下型の前記フローキヤビティ内に突 入させて前記フローキヤビティに流入した前記樹脂の圧力を、前記キヤビティ内の榭 脂の圧力と同じ圧力に加圧する。 [0015] Then, the pressure of the resin that has flowed into the flow cavity by causing the flow cavity plunger to enter the flow cavity of the lower mold is set to the same pressure as the pressure of the resin in the cavity. Pressurize.
[0016] また、前記工程 (d)における前記キヤビティ内に供給する前記樹脂の量は、前記下 型と上型が前記クランプ状態にあり、前記電子部品が一つも搭載されていないとする 前記基板と前記下型の前記キヤビティによって形成される前記樹脂が注入される空 間体積の 120— 150%とし、同一品種の基板の場合は前記榭脂投入量は毎回同量と することを特徴とする。 [0016] The amount of the resin supplied into the cavity in the step (d) is such that the lower mold and the upper mold are in the clamped state, and no electronic component is mounted. And 120 to 150% of the space volume into which the resin formed by the cavity of the lower mold is injected, and in the case of the same type of substrate, the amount of the grease input is the same each time. .
[0017] 上記半導体装置の製造方法で使用する圧縮成形装置は、 [0017] A compression molding apparatus used in the method for manufacturing a semiconductor device described above,
下面に基板を保持する保持機構を有する上型と、  An upper mold having a holding mechanism for holding the substrate on the lower surface;
前記上型の下方に位置し、上面に窪み力 なるキヤビティを有する下型とを有し、 前記上型に前記基板を保持させかつ前記キヤビティに榭脂を供給した後、前記下 型と前記上型のクランプによって前記榭脂を加熱加圧して前記基板の下面側に前記 榭脂からなる封止体を形成する圧縮成形装置であって、 A lower mold that is located below the upper mold and has a cavity having a depression force on the upper surface, and after holding the substrate on the upper mold and supplying grease to the cavity, the lower mold A compression molding apparatus for forming a sealing body made of the resin on the lower surface side of the substrate by heating and pressurizing the resin with a mold and an upper mold clamp,
前記下型には、前記キヤビティの外側に位置する窪み力 なるフローキヤビティと、 前記キヤビティと前記フローキヤビティを連通する溝力もなる複数のフローゲートと、 前記キヤビティに連なる溝力 なるエアーベントが上面に設けられ、  The lower mold includes a flow cavity having a depression force located outside the cavity, a plurality of flow gates having a groove force for communicating the cavity and the flow cavity, and an air vent having a groove force connected to the cavity. Provided on the top surface,
前記上型には、前記下型と前記上型をクランプした際前記下型の前記フローキヤビ ティ内に突入制御されるフローキヤビティプランジャが設けられていることを特徴とす る。  The upper mold is provided with a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold when the lower mold and the upper mold are clamped.
[0018] このような圧縮成形装置において、前記フローキヤビティプランジャを前記下型の前 記フローキヤビティ内に突入させて前記フローキヤビティに流入した前記樹脂の圧力 を、前記下型と前記上型のクランプ時のキヤビティ内の樹脂の圧力と同じ圧力にする ように構成されている。  [0018] In such a compression molding apparatus, the pressure of the resin flowing into the flow cavity by causing the flow cavity plunger to enter the flow cavity of the lower mold is used as the pressure of the lower mold and the upper mold. The pressure is the same as the pressure of the resin in the cavity when the mold is clamped.
発明の効果  The invention's effect
[0019] 本願において開示される発明のうち代表的なものによって得られる効果を簡単に説 明すれば以下のとおりである。すなわち、  [0019] The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is,
( 1)本発明の半導体装置の製造方法では、キヤビテイカ 溢れ出たレジンを収容す るフローキヤビティが設けられていることから、基板に搭載される半導体チップが零の 状態を目安とする多量のレジン量をキヤビティに投入することができる。また、フロー キヤビティに流入したレジンもフローキヤビティプランジャによってキヤビティ内のレジ ンと同じ圧力で加圧される。この結果、（a)キヤビティ内全体のレジンは適切な圧力下 で硬化し、形成される封止体の厚さの過不足がなくなり、厚さ寸法のばらつきの大き いことを理由とする不良発生を抑止することができる。従って、歩留り向上から半導体 装置の製造コスト低減が達成できる。  (1) In the method of manufacturing a semiconductor device according to the present invention, since a flow cavity is provided to accommodate the resin overflowing the cavity, a large amount of the semiconductor chip mounted on the substrate is used as a guide. The amount of resin can be put into the cavity. The resin that has flowed into the flow cavity is also pressurized by the flow cavity plunger at the same pressure as the resin in the cavity. As a result, (a) the entire resin inside the cavity is cured under an appropriate pressure, and there is no excess or deficiency in the thickness of the formed sealing body, resulting in defects due to large variations in thickness dimensions. Can be suppressed. Therefore, the manufacturing cost of the semiconductor device can be reduced by improving the yield.
[0020] (b)また、キヤビティ内の榭脂は適切な圧力下で硬化することから、封止体は均質 なものが形成でき、内部に気泡 (ボイド)を含まなくなり、封止体の耐湿性が向上する 。ボイド発生を防ぐためには、キヤビティ内の榭脂は、例えば、 50kgZcm2以上の圧 力下で硬化させる必要がある。 [0020] (b) In addition, since the resin in the cavity is cured under an appropriate pressure, the sealed body can be formed homogeneously and does not contain bubbles (voids) inside. Improve. In order to prevent the generation of voids, it is necessary to harden the grease in the cavity under a pressure of 50 kgZcm 2 or more.
[0021] (2)本発明の半導体装置の製造方法では、封止体は圧縮成形装置によって形成 されるため、封止体形成時に、トランスファモールディングのようにレジンの強い流れ が起きなくなり、半導体チップの電極と基板の配線を接続するワイヤの流れによる変 形が発生しなくなる。この結果、製造歩留りが向上する。現状で使用するワイヤの直 径は 25 m程度である力 半導体チップ上の電極パッドピッチの更なる狭小化により 将来はワイヤ直径はさらに細くなると想定できる。例えば、ワイヤ直径が 23 m程度 になれば、電極パッドピッチは 65 m程度に狭小化できる。また、ワイヤ直径は、さら に 20 /ζ πι、 17 ^ m, 15 mと進むものと考えられる。このような細さのワイヤにおいて も、圧縮成形によればワイヤ流れに起因するショート不良は防止することができる。 (2) In the method for manufacturing a semiconductor device of the present invention, the sealing body is formed by a compression molding apparatus. Therefore, when the sealing body is formed, a strong resin flow does not occur as in transfer molding, and deformation due to the flow of the wire connecting the electrode of the semiconductor chip and the wiring of the substrate does not occur. As a result, the manufacturing yield is improved. The diameter of the wire used at present is about 25 m. It can be assumed that the wire diameter will become thinner in the future due to further narrowing of the electrode pad pitch on the semiconductor chip. For example, if the wire diameter is about 23 m, the electrode pad pitch can be reduced to about 65 m. In addition, the wire diameter is considered to advance further to 20 / ζ πι, 17 ^ m, 15 m. Even with such thin wires, short-circuit defects caused by wire flow can be prevented by compression molding.
[0022] (3)本発明の圧縮成形装置は、基板に搭載した半導体チップ等の電子部品の数を 計数必要がなぐ基板に電子部品が搭載されない状態に見合うレジン量を投入レジ ン量として決めていることから、付帯装置の簡素化が図れ、圧縮成形装置のコスト低 減が可能になる。この結果、半導体装置の製造コスト低減が達成できる。  [0022] (3) In the compression molding apparatus of the present invention, the amount of resin commensurate with the state in which the electronic component is not mounted on the substrate that does not need to count the number of electronic components such as semiconductor chips mounted on the substrate is determined as the input resin amount. Therefore, the auxiliary device can be simplified and the cost of the compression molding device can be reduced. As a result, the manufacturing cost of the semiconductor device can be reduced.
[0023] (4)本発明の圧縮成形装置によれば、圧縮成形時、余分なレジンはフローキヤビテ ィに流入することから、また、常にフローキヤビティにレジンが流入するように投入レジ ン量を設定していることから、過不足のない量による封止体形成が可能になり、常に 適正の厚さの封止体を形成することができる。  [0023] (4) According to the compression molding apparatus of the present invention, since the excess resin flows into the flow cavity during compression molding, the input resin amount is set so that the resin always flows into the flow cavity. Since it is set, it is possible to form a sealing body with an amount that is not excessive or insufficient, and a sealing body with an appropriate thickness can always be formed.
図面の簡単な説明  Brief Description of Drawings
[0024] [図 1]本発明の実施例 1の半導体装置の製造方法を示すフローチャートである。  FIG. 1 is a flowchart showing a method for manufacturing a semiconductor device according to Example 1 of the present invention.
[図 2]本実施例 1の半導体装置の製造方法で使用する配線母基板の平面図である。  FIG. 2 is a plan view of a wiring motherboard used in the method for manufacturing a semiconductor device according to the first embodiment.
[図 3]前記配線母基板の正面図である。  FIG. 3 is a front view of the wiring motherboard.
[図 4]前記配線母基板の単一の製品形成部を示す拡大断面図である。  FIG. 4 is an enlarged cross-sectional view showing a single product forming portion of the wiring motherboard.
[図 5]半導体チップを固定し、かつワイヤボンディングした前記配線母基板の平面図 である。  FIG. 5 is a plan view of the wiring motherboard on which a semiconductor chip is fixed and wire-bonded.
[図 6]図 5で示す配線母基板の正面図である。  FIG. 6 is a front view of the wiring motherboard shown in FIG.
[図 7]半導体チップが部分的に固定されていない前記配線母基板の平面図である。  FIG. 7 is a plan view of the wiring motherboard on which the semiconductor chip is not partially fixed.
[図 8]図 7で示す配線母基板の正面図である。  FIG. 8 is a front view of the wiring motherboard shown in FIG.
[図 9]本実施例 1の半導体装置の製造方法で使用する圧縮成形装置の各部レイァゥ トを示す平面図である。 圆 10]前記圧縮成形装置の構造を示す模式的断面図である。 FIG. 9 is a plan view showing the layout of each part of the compression molding apparatus used in the method for manufacturing a semiconductor device of Example 1. 圆 10] A schematic cross-sectional view showing the structure of the compression molding apparatus.
[図 11]前記圧縮成形装置の下型を示す模式的平面図である。  FIG. 11 is a schematic plan view showing a lower mold of the compression molding apparatus.
圆 12]前記圧縮成形装置の上型の合わせ面を示す模式図である。 12] A schematic view showing a mating surface of the upper mold of the compression molding apparatus.
[図 13]前記圧縮成形装置の上型に配線母基板を取り付けた型締め前の状態を示す 模式的断面図である。  FIG. 13 is a schematic cross-sectional view showing a state before mold clamping in which a wiring mother board is attached to the upper mold of the compression molding apparatus.
圆 14]前記圧縮成形装置の下型に榭脂を供給した型締め前の状態を示す模式的断 面図である。 [14] FIG. 14 is a schematic cross-sectional view showing a state before the mold is clamped in which the resin is supplied to the lower mold of the compression molding apparatus.
[図 15]前記圧縮成形装置の下型と上型を型締めした状態を示す模式的断面図であ る。  FIG. 15 is a schematic cross-sectional view showing a state where the lower mold and the upper mold of the compression molding apparatus are clamped.
[図 16]前記圧縮成形装置の下型に設けたフローキヤビティをフローキヤビティプラン ジャで加圧した状態を示す模式的断面図である。  FIG. 16 is a schematic cross-sectional view showing a state in which the flow cavity provided in the lower mold of the compression molding apparatus is pressurized with a flow cavity plunger.
圆 17]前記圧縮成形装置のプレス動作及びフローキヤビティプランジャ動作を示す 動作チャートである。 17] An operation chart showing the press operation and flow cavity plunger operation of the compression molding apparatus.
[図 18]封止体が形成された前記配線母基板を示す斜視図である。  FIG. 18 is a perspective view showing the wiring mother board on which a sealing body is formed.
圆 19]封止体が形成された前記配線母基板の平面図である。 [19] FIG. 19 is a plan view of the wiring motherboard on which a sealing body is formed.
圆 20]本実施例 1の半導体装置の製造方法において、圧縮成形金型にレジンを供 給する際の各工程を示すフローチャートである。 20] A flowchart showing each step in supplying a resin to a compression molding die in the manufacturing method of the semiconductor device of the first embodiment.
圆 21]本実施例 1の半導体装置の製造方法において、前記配線母基板に突起電極 を形成する状態を示す模式図である。 FIG. 21 is a schematic view showing a state in which a protruding electrode is formed on the wiring mother board in the method of manufacturing a semiconductor device according to the first embodiment.
圆 22]突起電極が形成された前記配線母基板を示す模式図である。 FIG. 22 is a schematic view showing the wiring motherboard on which protruding electrodes are formed.
[図 23]本実施例 1の半導体装置の製造方法において、前記配線母基板を前記榭脂 層とともにダイシングブレードで切断する状態を示す模式図である。  FIG. 23 is a schematic view showing a state in which the wiring mother board is cut together with the resin layer with a dicing blade in the method of manufacturing a semiconductor device according to the first embodiment.
圆 24]本実施例 1の半導体装置の製造方法によって製造された半導体装置を示す 斜視図である。 24] A perspective view showing a semiconductor device manufactured by the method of manufacturing a semiconductor device of Example 1. FIG.
[図 25]本実施例 1の半導体装置の製造方法によって製造された半導体装置を一部 で断面した模式図である。  FIG. 25 is a schematic cross-sectional view of a part of the semiconductor device manufactured by the semiconductor device manufacturing method of Example 1.
[図 26]本実施例 2の圧縮成形装置の下型を示す平面図である。  FIG. 26 is a plan view showing a lower mold of the compression molding apparatus of Example 2.
圆 27]本実施例 2の圧縮成形装置の上型の合わせ面を示す模式図である。 [図 28]本発明に先立って検討した圧縮成形金型に榭脂を供給する際の各工程を示 すフローチャートである。 [27] FIG. 27 is a schematic view showing the mating surface of the upper mold of the compression molding apparatus of Example 2. FIG. 28 is a flow chart showing each step when supplying the resin to the compression mold studied prior to the present invention.
符号の説明  Explanation of symbols
[0025] 1…配線母基板 (基板)、 la…主面 (第 1の面）、 lb…裏面 (第 2の面）、 2…製品形 成部、 3…ガイド孔、 4…配線基板、 5…絶縁基材、 6…配線層、 6a— 6e…導体パタ ーン、 6f…導体、 7···ソルダレジスト、 8…封止体、 9…半導体チップ（チップ）、 10··· ワイヤ、 11··· X印、 15···半導体装置、 20…圧縮成形装置、 21…バウダレジン計量 ユニット、 22…バウダレジン供給部、 23…基板ローダ、 24···基板整列部、 25…搬入 搬送部、 26···圧縮成形金型、 27…搬出搬送部、 28···フローキヤビブレイク部、 29 …基板アンローダ、 35···下型、 37···台座、 38···スプリングガイド孔、 39···セパレー タ、 40…下型キヤビテイストッパ、 41···スプリング、 42…高さ調整板、 43…基板押さ えブロック、 44···キヤビティ底板、 45···キヤビティ、 46···フランジ、 47···固定ブロック 、 48···ガイド空間、 49···ストッノ 、 50···下型プレート、 51···溝、 52···0—リング、 53 …フローキヤビティ、 54···フローゲート、 55···エアーベント、 56, 57···ゥェッジ、 60 …上型、 62···基台、 63···上型プレート、 64…基板吸着ブロック、 65···真空吸着孔、 66…真空吸着用配管、 67···フローキヤビティプランジャ、 68···加圧ァクチユエータ、 69···駆動軸、 70···サポートビラ、 71, 72···ゥェッジ、 73···減圧孔、 74···配管、 75 …榭脂シート、 80…バウダ榭脂 (バウダレジン)、 85···封止体、 86···バンプ保持ツー ノレ、 87··· 田ノ ンプ、 88···ノ ンプ 、 89··· テープ、 90···ダイシングブレード、 、 95, 96···ゥェッジ。  [0025] 1 ... Wiring mother board (board), la ... Main surface (first surface), lb ... Back surface (second surface), 2 ... Product forming part, 3 ... Guide hole, 4 ... Wiring board, 5 ... Insulating substrate, 6 ... Wiring layer, 6a-6e ... Conductor pattern, 6f ... Conductor, 7 ... Solder resist, 8 ... Sealed body, 9 ... Semiconductor chip (chip), 10 ... Wire 11 ... X mark, 15 ... Semiconductor device, 20 ... Compression molding device, 21 ... Bow resin resin measuring unit, 22 ... Bow resin supply unit, 23 ... Substrate loader, 24 ... Substrate alignment unit, 25 ... Carrying transport , 26 ··· Compression molding die, 27 ··· Unloading / conveying portion, ··· 28 Flow flow break portion, · 29 ··· Board unloader, ··· 35 ··· Lower die, ······························ Guide hole, 39 ··· Separator, 40 ··· Lower cavity stopper, 41 ······························································································································ Bitty, 46 ··· Flange, 47 ··· Fixed block, 48 ··· Guide space, 49 ··· Stuno, 50 ··· Lower plate, 51 ··· Groove, 52 ··· 0—Ring 53… Flow cavity, 54 ··· Flow gate, 55 ··· Air vent, 56, 57 ··· Wedge, 60… Upper die, 62 ··························································· Substrate suction block, 65 ... Vacuum suction hole, 66 ... Vacuum suction piping, 67 ... Flow cavity plunger, 68 ... Pressure actuator, 69 ... Drive shaft, 70 ... Support blade, 71, 72 ··························································································································································· TUNOLE, 87 ··· Tamp, 88 ··· Noop, 89 ··· Tape, 90 ·· Dicing Blade, 95, 96 ··· Wedge.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0026] 本発明をより詳細に説明するために、添付の図面に従ってこれを説明する。なお、 発明の実施の形態を説明するための全図において、同一機能を有するものは同一 符号を付け、その繰り返しの説明は省略する。また、以下の実施の形態では、特に必 要なとき以外は同一または同様の部分の説明を原則として繰り返さない。 [0026] In order to describe the present invention in more detail, it will be described with reference to the accompanying drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment of the invention, and the repetitive description thereof is omitted. Also, in the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.
実施例 1  Example 1
[0027] 本実施例 1では、例えば配線基板に搭載された複数の半導体チップを一括して封 止する MAP (Mold Array Package)方式の半導体装置の製造方法に本発明を適用 した場合について図 1一図 25により説明する。 In the first embodiment, for example, the present invention is applied to a manufacturing method of a MAP (Mold Array Package) type semiconductor device that collectively seals a plurality of semiconductor chips mounted on a wiring board. This case will be described with reference to FIG.
[0028] 本実施例 1の半導体装置の製造方法では、図 1のフローチャートに示すように、配 線母基板準備 S01、チップボンディング S02、ワイヤボンディング S03、榭脂封止（封 止体形成： S04)、バンプ電極形成 S05、個片化 S06の各工程を経て製造される。  [0028] In the method of manufacturing the semiconductor device according to the first embodiment, as shown in the flowchart of FIG. 1, wiring mother board preparation S01, chip bonding S02, wire bonding S03, grease sealing (sealing body formation: S04) ), Bump electrode formation S05 and individualization S06 are manufactured through each step.
[0029] まず、図 2—図 4に示す配線母基板 (基板とも呼称する） 1を準備する（S01)。図 2 は配線母基板 1の部品搭載面の全体平面図、図 3は図 1の配線母基板 1の正面図、 図 4は配線母基板 1における単一の製品形成部の拡大断面図である。  First, a wiring mother board (also referred to as a board) 1 shown in FIGS. 2 to 4 is prepared (S01). 2 is an overall plan view of the component mounting surface of the wiring mother board 1, FIG. 3 is a front view of the wiring mother board 1 of FIG. 1, and FIG. 4 is an enlarged cross-sectional view of a single product forming portion on the wiring mother board 1. .
[0030] 配線母基板 1は、後述の半導体装置の配線基板の母体であり、その外観は、例え ば平面長方形の薄板状とされている。配線母基板 1は、主面 (第 1の面） laとその反 対側の裏面 (第 2の面） lbとを有している。配線母基板 1の主面 laは、後述のように 半導体チップ (以下、チップとも呼称)が搭載される部品搭載面であり、配線母基板 1 の裏面は、後述のようにバンプ電極 (突起電極）が形成されるバンプ電極形成面であ る。この配線母基板 1には、製品形成部 2が配置されている。製品形成部 2は、図 2に おいて、点線で囲まれる四角形部分であり、上下左右方向に整列配置 (マトリックス 配列）されている。各製品形成部 2は、 1つの半導体装置を構成するのに必要な配線 基板構成を有する単位領域になっている。このような配線母基板 1の両側には、配線 母基板 1の主裏面を貫通する複数のガイド孔 3が形成されている。このガイド孔 3は配 線母基板 1の搬送や位置決め時のガイドとして利用される。  [0030] The wiring mother board 1 is a mother body of a wiring board of a semiconductor device to be described later, and has an appearance that is, for example, a flat rectangular thin plate. The wiring motherboard 1 has a main surface (first surface) la and a back surface (second surface) lb on the opposite side. The main surface la of the wiring mother board 1 is a component mounting surface on which a semiconductor chip (hereinafter also referred to as a chip) is mounted as described later, and the back surface of the wiring mother board 1 is a bump electrode (projection electrode) as described later. ) Is a bump electrode formation surface. A product forming portion 2 is disposed on the wiring mother board 1. The product forming section 2 is a quadrangular portion surrounded by a dotted line in FIG. 2, and is arranged in an up / down / left / right direction (matrix arrangement). Each product forming section 2 is a unit region having a wiring board configuration necessary for constituting one semiconductor device. A plurality of guide holes 3 penetrating the main back surface of the wiring mother board 1 are formed on both sides of the wiring mother board 1. The guide hole 3 is used as a guide when the wiring mother board 1 is transported or positioned.
[0031] 配線母基板 1は、多層配線構造を有して ヽる。図 4では 4層配線構成を例示して ヽ る。図 4において配線母基板 1の上面（主面 la)は前記部品搭載面を示し、配線母基 板 1の下面 (裏面 lb)は前記バンプ電極形成面を示している。配線母基板 1は、絶縁 基材 (コア材） 5および配線層 6を交互に積み重ねることで形成された積層体と、その 積層体の上下面 (部品搭載面およびバンプ電極形成面）に被着されたソルダレジスト 7とを有している。絶縁基材 5は、例えば耐熱性の高いガラス'エポキシ榭脂からなる 。絶縁基材 5の材料は、これに限定されるものではなく種々変更可能であり、例えば BTレジンまたはァラミド不織布材等を用いても良 ヽ。絶縁基材 5の材料として BTレジ ンを選択した場合には、熱伝導性が高いので、放熱性を向上させることができる。  [0031] The wiring mother board 1 has a multilayer wiring structure. Figure 4 shows an example of a four-layer wiring configuration. In FIG. 4, the upper surface (main surface la) of the wiring motherboard 1 indicates the component mounting surface, and the lower surface (rear surface lb) of the wiring motherboard 1 indicates the bump electrode formation surface. The wiring mother board 1 is attached to the laminated body formed by alternately stacking the insulating base material (core material) 5 and the wiring layer 6, and the upper and lower surfaces (component mounting surface and bump electrode forming surface) of the laminated body. Solder resist 7 is provided. The insulating substrate 5 is made of, for example, a glass with high heat resistance and epoxy resin. The material of the insulating substrate 5 is not limited to this, and can be variously changed. For example, BT resin or aramid nonwoven material may be used. When BT resin is selected as the material for the insulating substrate 5, the heat dissipation can be improved because of the high thermal conductivity.
[0032] 配線母基板 1の各配線層 6には各種の導体パターン 6a— 6eが形成されている。導 体パターン 6a— 6eは、例えば銅 (Cu)箔をエッチングすることによりパターユングされ ている。部品搭載面の配線層 6の導体パターン 6aはチップ搭載用のパターンであり、 導体パターン 6bはボンディングワイヤが接続される電極パターンであり、導体パター ン 6e (図 2参照）は後述の封止用の樹脂の剥離を容易にするためのパターンである。 部品搭載面の配線層 6には、この他、信号配線や電源配線用の導体パターンが形 成されている。部品搭載面の導体パターン 6a, 6b, 6e等の一部は、ソルダレジスト 7 から露出されており、その露出表面には、例えばニッケル (Ni)および金 (Au)メツキ 処理が施されている。バンプ電極形成面の配線層 6の導体パターン 6d (図 4参照）は 、バンプ電極接合用の電極パターンである。バンプ電極形成面の配線層 6にも、この 他、信号配線や電源配線用の導体パターンが形成されている。バンプ電極形成面 の導体パターン 6d等の一部も、ソルダレジスト 7から露出されており、その露出表面 には、例えばニッケルおよび金メッキ処理が施されている。上記積層体中の配線層 6 の導体パターン 6c (図 4参照）は、信号および電源用の配線パターンである。各配線 層 6はスルーホールの表面に形成された導体 (銅箔等） 6f (図 4参照）を介して電気的 に接続されている。前記ソルダレジスト 7は、ソルダマスク（solder mask)またはストップ オフ（stop- off)とも呼ばれ、半田付けの時に、半田付け不要な導体パターンに溶融 半田が接触することを防ぎ、半田付け部以外の導体パターンを溶融半田から保護す る保護膜としての機能を有する他、導体間の半田ブリッジの防止、汚染や湿気からの 保護、損傷防止、耐環境性、マイグレーション防止、回路間の絶縁の維持および回 路と他の部品（チップやプリント配線基板等）との短絡防止の機能等も有している。こ のソルダレジスト 7は、例えばポリイミド系榭脂からなり、配線母基板 1の主面および裏 面の特定領域に形成されて 、る。 [0032] Various conductive patterns 6a-6e are formed on each wiring layer 6 of the wiring mother board 1. Guidance The body patterns 6a-6e are patterned by etching a copper (Cu) foil, for example. Conductor pattern 6a of wiring layer 6 on the component mounting surface is a chip mounting pattern, conductor pattern 6b is an electrode pattern to which bonding wires are connected, and conductor pattern 6e (see Fig. 2) is for sealing described later. This is a pattern for facilitating peeling of the resin. In addition to this, a conductor pattern for signal wiring and power supply wiring is formed on the wiring layer 6 on the component mounting surface. Part of the conductor patterns 6a, 6b, 6e, etc. on the component mounting surface is exposed from the solder resist 7, and the exposed surface is subjected to, for example, nickel (Ni) and gold (Au) plating treatment. The conductor pattern 6d (see FIG. 4) of the wiring layer 6 on the bump electrode forming surface is an electrode pattern for bonding bump electrodes. In addition, conductor patterns for signal wiring and power supply wiring are also formed on the wiring layer 6 on the bump electrode forming surface. Part of the conductor pattern 6d and the like on the bump electrode formation surface is also exposed from the solder resist 7, and the exposed surface is subjected to, for example, nickel and gold plating. The conductor pattern 6c (see FIG. 4) of the wiring layer 6 in the laminate is a wiring pattern for signals and power supplies. Each wiring layer 6 is electrically connected through a conductor (copper foil, etc.) 6f (see Fig. 4) formed on the surface of the through hole. The solder resist 7 is also called a solder mask or stop-off, and prevents solder from coming into contact with a conductor pattern that does not require soldering during soldering. In addition to functioning as a protective film that protects the pattern from molten solder, it prevents solder bridges between conductors, protects against contamination and moisture, prevents damage, protects against environment, prevents migration, and maintains insulation between circuits. It also has a function of preventing a short circuit between the road and other components (chip, printed wiring board, etc.). The solder resist 7 is made of, for example, polyimide resin and is formed in specific regions on the main surface and the back surface of the wiring mother board 1.
[0033] ここでは、 4層配線構造の配線母基板 1を例示したが、これに限定されるものではな ぐ半導体装置のモールド工程には、 4層より少ない 2層配線構造の配線母基板 1や 4層より多 ヽ 6層配線構造の配線母基板 1等、種々な配線層構成 (様々な品種)の配 線母基板 1がロット単位で流れてくる。  Here, the wiring mother board 1 having a four-layer wiring structure has been illustrated, but the present invention is not limited to this. For the molding process of a semiconductor device, the wiring mother board 1 having a two-layer wiring structure having fewer than four layers is used. A lot of wiring mother boards 1 with various wiring layer configurations (various varieties) such as a wiring mother board 1 having a 6-layer wiring structure more than four layers flow in lot units.
[0034] つぎに、図 5および図 6に示すように、配線母基板 1の部品搭載面の各製品形成部 2に、例えば銀入りペースト等のような接着剤を使ってチップ (半導体チップ) 9を搭載 する（S02)。チップ 9の厚さは、特に限定されるものではないが、例えば 100 /z m程 度またはそれ以下である。 Next, as shown in FIGS. 5 and 6, a chip (semiconductor chip) is used for each product forming portion 2 on the component mounting surface of the wiring mother board 1 by using an adhesive such as a silver-containing paste. Equipped with 9 (S02). The thickness of the chip 9 is not particularly limited, but is, for example, about 100 / zm or less.
[0035] つぎに、例えば超音波振動と熱圧着とを併用した周知のワイヤボンダを用いて、チ ップ 9のボンディングパッド (電極パッド）と、配線母基板 1の部品搭載面の配線である 導体パターン 3bとを、例えば金力もなるワイヤ (ボンディングワイヤ） 10により電気的 に接続する（S03)。図 5はワイヤボンディング工程後の配線母基板 1の部品搭載面 を示す全体平面図、図 6は図 5の配線母基板 1の正面図をそれぞれ示している。ここ では、各製品形成部 2に 1つのチップ 9 (電子部品）を搭載する場合を例示したが、こ れに限定されるものではなぐ例えば各製品形成部 2に複数のチップ 9を並べて搭載 したり、各製品形成部 2に複数のチップ 9を積層した積層チップを搭載したりする場合 もある。また、チップ抵抗，チップ容量等の受動素子 (電子部品)を搭載する場合もあ る。 Next, for example, using a well-known wire bonder that uses both ultrasonic vibration and thermocompression bonding, a bonding pad (electrode pad) of chip 9 and a conductor that is a wiring on a component mounting surface of wiring mother board 1 are used. The pattern 3b is electrically connected, for example, by a wire (bonding wire) 10 that also has gold power (S03). FIG. 5 is an overall plan view showing the component mounting surface of the wiring mother board 1 after the wire bonding process, and FIG. 6 is a front view of the wiring mother board 1 of FIG. Here, the case where one chip 9 (electronic component) is mounted on each product forming section 2 is exemplified, but the present invention is not limited to this. For example, a plurality of chips 9 are mounted side by side on each product forming section 2. In some cases, each product forming section 2 is mounted with a laminated chip in which a plurality of chips 9 are laminated. Also, passive elements (electronic components) such as chip resistors and chip capacitors may be mounted.
[0036] 図 5には、 1枚の配線母基板 1において、全ての製品形成部 2にそれぞれチップ 9を 搭載した図を示した。し力しながら、実際の作業現場では、図 7及び図 8に示すように 、配線に不良が存在する製品形成部 2に対してはチップボンディングを行わな 、手 法が採用され、歩留り向上が図られている。また、現状においては、配線基板製造メ 一力から製品形成部 2の配線に不良がない 100%良品の配線基板を受け入れてい るのではなぐ多少は配線に不良があるものを受け入れている。このため、図 7及び 図 8に示すように、チップボンディングができない配線母基板 1も存在する。図 7では 配線不良を示す X印 11が不良製品形成部に付けられている。そして、この部分には チップ 9は搭載されな 、。図 8ではチップ 9が搭載されて ヽな 、箇所が矢印の先の箇 所であることを示している。  FIG. 5 shows a diagram in which chips 9 are mounted on all product forming portions 2 in one wiring mother board 1. However, at the actual work site, as shown in Figs. 7 and 8, a method is adopted in which chip bonding is not performed on the product forming part 2 where the wiring is defective, and the yield is improved. It is illustrated. In addition, at present, we accept 100% non-defective wiring boards that have no defects in the wiring of the product forming unit 2 from the strength of wiring board manufacturing. For this reason, as shown in FIGS. 7 and 8, there is also a wiring mother board 1 that cannot be chip-bonded. In Fig. 7, an X mark 11 indicating a wiring failure is attached to the defective product formation part. And chip 9 is not installed in this part. Figure 8 shows that the chip 9 is mounted and the point is the point of the arrow.
[0037] 従来の圧縮成形にお!ヽては、各配線母基板 1に対して圧縮成形を行う前に、配線 母基板 1に搭載されて ヽるチップ 9の数を計数し、この計数データから圧縮成形金型 に供給する榭脂の量を決定している。しかし、この手法は搭載チップの数を計数する ための画像ユニットを備えたレジン計数ユニットが必要となり、圧縮成形装置が高価 になる。  [0037] In conventional compression molding, before compression molding is performed on each wiring motherboard 1, the number of chips 9 mounted on the wiring motherboard 1 is counted, and this count data Determines the amount of grease to be supplied to the compression mold. However, this method requires a resin counting unit including an image unit for counting the number of mounted chips, and the compression molding apparatus becomes expensive.
[0038] 本実施例では、配線母基板 1に搭載されるチップ 9の数に関係なぐ同一製品の場 合は圧縮成形金型に供給するレジンの量を一定にして圧縮成形を行うものである。こ のため、レジン計数ユニットには、画像認識ユニットは不要となり、コストの安いレジン 計数ユニットの装備だけですむことになる。なお、チップ搭載数の認識から、それ〖こ 見合った榭脂供給量の設定に至るソフトウェアも不要となる。 [0038] In this embodiment, the same product is used regardless of the number of chips 9 mounted on the wiring motherboard 1. In this case, compression molding is performed with a constant amount of resin supplied to the compression molding die. For this reason, an image recognition unit is not required for the resin counting unit, and only a low-cost resin counting unit is required. There is no need for software from recognition of the number of chips mounted to setting the appropriate amount of resin supply.
[0039] つぎに、図 13—図 16に示すように、配線母基板 1に対して封止体形成を行う (S04 )。この封止体形成は、図 9乃至図 12に示す圧縮成形装置によって行う。  Next, as shown in FIGS. 13 to 16, a sealing body is formed on the wiring mother board 1 (S04). This sealing body is formed by the compression molding apparatus shown in FIGS.
ここで、圧縮成形金型を有するモールド装置 (圧縮成形装置)の一例について説明 する。図 9は圧縮成形装置 20の一例を示すレイアウト図である。圧縮成形装置 20は 、ノ ウダレジン計量ユニット 21、パウダレジン供給部 22、基板ローダ 23、基板整列部 24、搬入搬送部 25、圧縮成形金型 26、搬出搬送部 27、フローキヤビブレイク部 28 、基板アンローダ 29とを有している。  Here, an example of a molding apparatus (compression molding apparatus) having a compression mold will be described. FIG. 9 is a layout diagram showing an example of the compression molding apparatus 20. The compression molding apparatus 20 includes a powder resin weighing unit 21, a powder resin supply unit 22, a substrate loader 23, a substrate alignment unit 24, a carry-in and transfer unit 25, a compression molding die 26, a carry-out and transfer unit 27, a flow cane break unit 28, and a substrate. Unloader 29.
[0040] 前記ワイヤボンディング工程後の成型前の配線母基板 1は、基板ローダ 23を通じ て搬入搬送部 25の基板整列部 24に搬送され、基板整列部 24で整列された後、搬 入搬送部 25を介して圧縮成形金型 26の上型の下面に取り付けられる。また、下型 の上面のキヤビティに榭脂 (バウダレジン）が供給される。その後、上型と下型をクラン プ (型締め）し配線母基板 1の下面側に封止体を形成する。圧縮成形金型 26でモー ルド工程を経た配線母基板 1は、搬出搬送部 27によってフローキヤビブレイク部 28 に運ばれる。このフローキヤビブレイク部 28で封止体の周辺の不要な硬化榭脂部分 が切断除去される。不要なフローキヤビ部分が除去された封止体を有する配線母基 板 1は基板アンローダ 29に収容される。  [0040] The wiring mother board 1 before molding after the wire bonding step is transported to the substrate aligning section 24 of the transporting and transporting section 25 through the substrate loader 23, and after being aligned by the substrate aligning section 24, the transporting and transporting section. It is attached to the lower surface of the upper mold of the compression mold 26 through 25. In addition, wax resin is supplied to the cavity on the upper surface of the lower mold. Thereafter, the upper die and the lower die are clamped (clamped) to form a sealing body on the lower surface side of the wiring mother board 1. The wiring mother board 1 that has undergone the molding process in the compression molding die 26 is carried by the carry-carrying part 27 to the flow-cavity break part 28. In this flow cane break portion 28, unnecessary hardened resinous portions around the sealing body are cut and removed. The wiring mother board 1 having the sealing body from which unnecessary flow-carbide portions are removed is accommodated in the board unloader 29.
[0041] 図 10—図 12は圧縮成形金型 26を示す図である。圧縮成形金型 26は、図 10に示 すように、下型 35と、この下型 35の上方に位置する上型 60と力もなつている。図 11 は下型 35の一部の平面図であり、図 12は上型 60の一部の底面図である。下型 35 は圧縮成形装置 20の下プラテンの上面に取り付けられ、上型 60は圧縮成形装置 20 の上プラテンの下面に取り付けられる。上プラテンは下プラテンに対して相対的に降 下してクランプ (型締め）を行うようになって!/、る。  FIG. 10 to FIG. 12 are diagrams showing the compression mold 26. As shown in FIG. 10, the compression mold 26 has a force with a lower mold 35 and an upper mold 60 located above the lower mold 35. FIG. 11 is a plan view of a part of the lower mold 35, and FIG. 12 is a bottom view of a part of the upper mold 60. The lower die 35 is attached to the upper surface of the lower platen of the compression molding apparatus 20, and the upper die 60 is attached to the lower surface of the upper platen of the compression molding apparatus 20. The upper platen descends relative to the lower platen and clamps (clamps)!
[0042] 下型 35は、図 10に示すように、四角形平板力もなる台座 37上に、複数のスプリン グガイド孔 38を有するセパレータ 39が重ねられている。スプリングガイド孔 38内には 上部及び下部がフランジ状となる下型キヤビテイストッパ 40が挿入されて 、る。また、 スプリングガイド孔 38内にはコイル状のスプリング 41が挿入されている。下型キヤビ テイストッノ 40はスプリング 41の内側に挿入され、かつ上部のフランジの縁部分がス プリング 41の上端で支持されるようになって 、る。スプリング 41に支持された下型キ ャビテイストッパ 40の下端は浮いた状態になっている。また、浮いた下型キヤビテイス トツノ 40の下方の台座 37上には高さ調整板 42が配置されている。 In the lower mold 35, as shown in FIG. 10, a separator 39 having a plurality of spring guide holes 38 is overlaid on a pedestal 37 that also has a rectangular flat plate force. In the spring guide hole 38 The lower mold stopper 40 with the upper and lower parts in a flange shape is inserted. A coiled spring 41 is inserted into the spring guide hole 38. The lower mold taste stocko 40 is inserted inside the spring 41 and the edge of the upper flange is supported by the upper end of the spring 41. The lower end of the lower cavity stopper 40 supported by the spring 41 is in a floating state. In addition, a height adjustment plate 42 is arranged on a base 37 below the floating lower cavity tent 40.
[0043] セパレータ 39の上面には四角形枠からなる基板押さえブロック 43が配置されてい る。この基板押さえブロック 43は複数箇所で前記下型キヤビテイストツバ 40に支持さ れる構造になっている。四角形枠力もなる基板押さえブロック 43は、例えば、対面す る 2辺のそれぞれ 2箇所において下型キヤビテイストッパ 40によって安定して支えられ ている。 [0043] On the upper surface of the separator 39, a substrate pressing block 43 made of a rectangular frame is arranged. The substrate pressing block 43 is structured to be supported by the lower mold taste collar 40 at a plurality of locations. The substrate pressing block 43 having a quadrangular frame force is stably supported by the lower mold stopper 40 at, for example, two locations on two sides facing each other.
[0044] また、基板押さえブロック 43の内側には四角形のキヤビティ底板 44が配置されてい る。このキヤビティ底板 44はセパレータ 39上に固定されている。キヤビティ底板 44は 基板押さえブロック 43よりも薄く形成される。この結果、キヤビティ底板 44が窪んだキ ャビティ 45の底面を形成し、基板押さえブロック 43の内周面がキヤビティ 45の周面を 形成することになる。配線母基板 1の製品形成部 2が設けられた領域は長方形となる ことから、キヤビティ 45も長方形となる。  Further, a square cavity bottom plate 44 is disposed inside the substrate pressing block 43. The cavity bottom plate 44 is fixed on the separator 39. The cavity bottom plate 44 is formed thinner than the substrate holding block 43. As a result, the bottom surface of the cavity 45 in which the cavity bottom plate 44 is depressed is formed, and the inner peripheral surface of the substrate pressing block 43 forms the peripheral surface of the cavity 45. Since the region where the product forming part 2 of the wiring mother board 1 is provided is rectangular, the cavity 45 is also rectangular.
[0045] 基板押さえブロック 43のその外側には固定ブロック 47が配置されている。この固定 ブロック 47はセパレータ 39に固定されている。また、基板押さえブロック 43はスプリン グ 41によって上方に向力つて付勢される下型キヤビテイストッパ 40に支持される構造 になることから、ある程度固定ブロック 47に対して上下に摺動自在になっている。即 ち、基板押さえブロック 43の外周下部にはフランジ 46が設けられている力 このフラ ンジ 46部分は、固定ブロック 47に形成したガイド空間 48を上下に移動可能になって いる。そして、ガイド空間 48の上方に固定ブロック 47から延在して設けられたストッパ 49によってその上方移動を停止されるようになって!/、る。  A fixed block 47 is disposed outside the substrate pressing block 43. This fixed block 47 is fixed to the separator 39. In addition, since the substrate holding block 43 is supported by the lower mold stopper 40 that is biased upward by the spring 41, it can be slid up and down with respect to the fixed block 47 to some extent. ing. That is, the flange 46 is provided at the lower outer periphery of the substrate pressing block 43. This flange 46 portion can move up and down in the guide space 48 formed in the fixed block 47. Then, the upward movement of the guide space 48 is stopped by a stopper 49 provided extending from the fixed block 47! /.
[0046] また、固定ブロック 47の上面には、四角形枠状の下型プレート 50が固定されている 。この下型プレート 50の内周側には基板押さえブロック 43が嵌合される構造になつ ている。基板押さえブロック 43は、内周面がキヤビティ底板 44の外周面に対して摺動 し、外周面が下型プレート 50の内周面に対して摺動し、上下動するようになっている In addition, a rectangular frame-shaped lower mold plate 50 is fixed to the upper surface of the fixed block 47. A substrate pressing block 43 is fitted to the inner peripheral side of the lower mold plate 50. The substrate holding block 43 has an inner peripheral surface that slides against the outer peripheral surface of the cavity bottom plate 44. The outer peripheral surface slides relative to the inner peripheral surface of the lower mold plate 50 and moves up and down.
[0047] 下型プレート 50の上面は上型の下面に接触する力 この際、下型と上型のクランプ による合わせ面の気密を維持するため、四角形枠となる基板押さえブロック 43を囲む ように四角形枠状の溝 51が設けられ、かつ O—リング 52が挿入されている（図 11照） 。下型と上型のクランプ (型締め）の際、 O—リング 52は下型と上型によって押し潰さ れて空間を塞ぐため、 O—リング 52の内側の領域の気密が維持されることになる。 [0047] The upper surface of the lower mold plate 50 is in contact with the lower surface of the upper mold. At this time, in order to maintain the airtightness of the mating surfaces by the clamps of the lower mold and the upper mold, A rectangular frame-shaped groove 51 is provided, and an O-ring 52 is inserted (see FIG. 11). When the lower mold and upper mold are clamped, the O-ring 52 is crushed by the lower mold and the upper mold to close the space, so that the area inside the O-ring 52 is maintained airtight. Become.
[0048] 一方、基板押さえブロック 43は四角形枠 (長方形枠)構造となるが、その一対の長 辺にそれぞれフローキヤビティ 53が設けられている。基板押さえブロック 43は下型と 上型との型締め時、その上面の合わせ面が上型に接触する。即ち、基板押さえプロ ック 43は型締め（クランプ）時の圧力によってスプリング 41が橈み、下型キヤビテイスト ツバ 40は下方に移動し、下端が高さ調整板 42に当接した状態で下降を停止する。 また、この状態において、 O—リング 52は上型と下型とによって所定厚さ押し潰される 状態になる。フローキヤビティ 53は基板押さえブロック 43の上面の合わせ面に長辺 に沿って設けられている。フローキヤビティ 53は窪み (溝)で形成されている。キヤビ ティ 45とフローキヤビティ 53は所定ピッチで配置されるフローゲート 54によって連通 されている。フローゲート 54はキヤビティ 45及びフローキヤビティ 53よりも浅い溝であ り、かつ図 10に示すように、キヤビティ 45側では浅ぐフローキヤビティ 53側では深い ゲート構造になっている。これは、キヤビティ内のレジンを加圧する効果がある。  On the other hand, the substrate pressing block 43 has a rectangular frame (rectangular frame) structure, and a flow cavity 53 is provided on each of the pair of long sides. When the lower die and upper die are clamped, the mating surface of the upper surface of the substrate pressing block 43 comes into contact with the upper die. In other words, the spring 41 of the board pressing block 43 is squeezed by the pressure at the time of clamping (clamping), the lower mold tail collar 40 moves downward, and the lower end is lowered with the lower end in contact with the height adjustment plate 42. Stop. In this state, the O-ring 52 is crushed by a predetermined thickness by the upper mold and the lower mold. The flow cavity 53 is provided on the mating surface of the upper surface of the substrate pressing block 43 along the long side. The flow cavity 53 is formed of a depression (groove). The cavity 45 and the flow cavity 53 are connected by a flow gate 54 arranged at a predetermined pitch. The flow gate 54 is a shallower groove than the cavity 45 and the flow cavity 53, and as shown in FIG. 10, the flow gate 54 is shallow on the cavity 45 side and has a deep gate structure on the flow cavity 53 side. This has the effect of pressurizing the resin in the cavity.
[0049] また、図 11に示すように、基板押さえブロック 43の短辺側の合わせ面には所定ピッ チで浅 、溝 (窪み）力もなるエアーベント 55が設けられて!/、る。このエアーベント 55は 基板押さえブロック 43の内周部分に形成され、キヤビティ 45と連通状態になっている 。これは、キヤビティ内に残存するエアーをキヤビティ外へ排出する効果がある。  Further, as shown in FIG. 11, an air vent 55 that is shallow with a predetermined pitch and also has a groove (dent) force is provided on the mating surface on the short side of the substrate pressing block 43. The air vent 55 is formed in the inner peripheral portion of the substrate holding block 43 and is in communication with the cavity 45. This has an effect of discharging the air remaining in the cavity to the outside of the cavity.
[0050] また、下型プレート 50の上面、即ち、合わせ面には円形突子からなるゥエッジ 56と 、長方形突子力もなるゥエッジ 57が設けられている。  Further, a wedge 56 made of a circular protrusion and a wedge 57 also having a rectangular protrusion force are provided on the upper surface of the lower mold plate 50, that is, the mating surface.
[0051] 上型 60は、図 10に示すように、基台 62の下面に四角形枠からなる上型プレート 63 が固定されている。この上型プレート 63の内側には基板吸着ブロック 64が嵌め込ま れている。この基板吸着ブロック 64の下面には配線母基板 1が真空吸着保持される 。このため、基板吸着ブロック 64には、図 12に示すように、その両側近傍に沿って真 空吸着孔 65がそれぞれ一列に亘つて設けられている。これら真空吸着孔 65は、図 1 2に示す真空吸着用配管 66に接続されている。真空吸着用配管 66は図示しない真 空吸引機構に接続されている。真空吸引機構、真空吸着用配管 66及び真空吸着孔 65によって保持機構が形成されている。この保持機構によって配線母基板 1を上型 60の下面に保持することができる。 As shown in FIG. 10, in the upper mold 60, an upper mold plate 63 made of a square frame is fixed to the lower surface of the base 62. A substrate suction block 64 is fitted inside the upper mold plate 63. The wiring mother board 1 is held by vacuum suction on the lower surface of the board suction block 64. . For this reason, as shown in FIG. 12, the substrate suction block 64 is provided with a vacuum suction hole 65 in a row along the vicinity of both sides thereof. These vacuum suction holes 65 are connected to a vacuum suction pipe 66 shown in FIG. The vacuum suction pipe 66 is connected to a vacuum suction mechanism (not shown). A holding mechanism is formed by the vacuum suction mechanism, the vacuum suction pipe 66 and the vacuum suction hole 65. The wiring mother board 1 can be held on the lower surface of the upper mold 60 by this holding mechanism.
[0052] また、基板吸着ブロック 64の両側の上型プレート 63部分には、前記下型 35のフロ 一キヤビティ 53内に突入制御されるフローキヤビティプランジャ 67が配置されている 。これら 2本のフローキヤビティプランジャ 67は、下型 35のフローキヤビティ 53に対面 する構造になっている。そして、フローキヤビティプランジャ 67は加圧ァクチユエータ 68の駆動軸 69の先端に固定されている。従って、加圧ァクチユエータ 68のオン動作 によってフローキヤビティプランジャ 67を下方に前進させ、下型と上型のクランプ状態 では下型のフローキヤビティ 53内に先端に突入させる。また、加圧ァクチユエータ 68 のオフ動作によって上昇し、図 10に示すように、先端を上型プレート 63の下面と略 同じ位置に停止させるようになつている。また、基台 62の上面には強度部材としてサ ポートビラ 70が複数固定されて 、る。  Further, a flow cavity plunger 67 that is controlled to enter into the flow cavity 53 of the lower mold 35 is disposed on the upper mold plate 63 portion on both sides of the substrate suction block 64. These two flow cavity plungers 67 are structured to face the flow cavity 53 of the lower mold 35. The flow cavity plunger 67 is fixed to the tip of the drive shaft 69 of the pressure actuator 68. Therefore, when the pressurizing actuator 68 is turned on, the flow cavity plunger 67 is advanced downward, and in the clamped state of the lower mold and the upper mold, the flow cavity plunger 67 enters the tip of the flow cavity 53 of the lower mold. Further, the pressure actuator 68 is lifted by the turning-off operation of the pressurizing actuator 68, and as shown in FIG. 10, the tip is stopped at substantially the same position as the lower surface of the upper mold plate 63. Further, a plurality of support villas 70 are fixed as strength members on the upper surface of the base 62.
[0053] また、上型プレート 63の下面には下型プレート 50のゥエッジ 56, 57に対応してゥ エッジ 71, 72が設けられている。ゥエッジ 71はゥエッジ 56が挿入する円形窪みとなり 、ゥエッジ 72はゥエッジ 57が挿入する長方形窪みとなっている。上型と下型のクラン プ時、ゥエッジ 56はゥエッジ 71に嵌合し、ゥエッジ 57はゥエッジ 72に嵌合して、上型 と下型の位置合わせが行われる。  Further, wedges 71, 72 are provided on the lower surface of the upper die plate 63 corresponding to the wedges 56, 57 of the lower die plate 50. The wedge 71 is a circular depression into which the wedge 56 is inserted, and the wedge 72 is a rectangular depression into which the wedge 57 is inserted. When clamping the upper and lower molds, wedge 56 is fitted to wedge 71, wedge 57 is fitted to wedge 72, and the upper mold and lower mold are aligned.
[0054] また、上型プレート 63には減圧孔 73が複数設けられている。減圧孔 73は基板吸着 ブロック 64の短辺に沿うように上型プレート 63に設けられている。これら減圧孔 73は 、下型と上型がクランプされたとき、 O—リング 52の内側の領域に位置するように配置 されている。減圧孔 73は、図 12で示す配管 74に接続されている。この配管 74は図 示しない真空ポンプに接続されている。従って、下型と上型がクランプされた後、真 空ポンプのオン動作によって排気が行われるため、 O—リング 52によって囲まれ、力 つこの領域に繋がる型の空間部分は所定の圧力に減圧される。 [0055] なお、図示はしないが、下型 35及び上型 60の所定箇所には下型及び上型を所定 温度に加熱するためのカートリッジヒータが各所に配置されている。また、この圧縮成 形装置 20は下型 35上に榭脂シートを配置してシートモールドを行うことができる。 Further, the upper mold plate 63 is provided with a plurality of decompression holes 73. The decompression hole 73 is provided in the upper mold plate 63 along the short side of the substrate suction block 64. These decompression holes 73 are arranged so as to be located in the region inside the O-ring 52 when the lower die and the upper die are clamped. The decompression hole 73 is connected to a pipe 74 shown in FIG. This pipe 74 is connected to a vacuum pump (not shown). Therefore, after the lower mold and the upper mold are clamped, exhaust is performed by turning on the vacuum pump. Therefore, the space portion of the mold that is surrounded by the O-ring 52 and connected to this area is decompressed to a predetermined pressure. Is done. Although not shown, cartridge heaters for heating the lower mold and the upper mold to a predetermined temperature are arranged at predetermined positions on the lower mold 35 and the upper mold 60, respectively. The compression molding apparatus 20 can perform sheet molding by disposing a resin sheet on the lower mold 35.
[0056] つぎに、このような構造の圧縮成形装置 20による封止体形成について、図 13—図 16を参照しながら説明する。図 13—図 16は圧縮成形装置 20の圧縮成形金型部分 を模式的に示した図である。  Next, formation of a sealing body by the compression molding apparatus 20 having such a structure will be described with reference to FIGS. 13 to 16. FIG. 13 to FIG. 16 are diagrams schematically showing a compression molding die portion of the compression molding apparatus 20.
[0057] 先ず、最初に、図 13に示すように、上型 60の下面に配線母基板 1を取り付ける。こ の取り付けは、前述の保持機構による真空吸着保持である。配線母基板 1の取り付 け状態は、配線母基板 1の主面 laが下面となる状態であり、チップ 9が下面に位置す る状態である。この最初の状態で、下型 35の上面全体に榭脂シート 75を取り付ける 。また、最初の段階で下型 35及び上型 60のカートリッジヒータを動作させ、下型 35 及び上型 60の温度を所定温度 (例えば、 170— 180°C)に設定する。  First, as shown in FIG. 13, the wiring mother board 1 is attached to the lower surface of the upper mold 60. This attachment is vacuum suction holding by the holding mechanism described above. The wiring mother board 1 is attached in a state where the main surface la of the wiring mother board 1 is the lower surface and the chip 9 is positioned on the lower surface. In this initial state, the resin sheet 75 is attached to the entire upper surface of the lower mold 35. In the first stage, the cartridge heaters of the lower mold 35 and the upper mold 60 are operated, and the temperatures of the lower mold 35 and the upper mold 60 are set to predetermined temperatures (for example, 170 to 180 ° C.).
[0058] つぎに、図 14に示すように、下型 35のキヤビティ 45内にパウダ樹脂（パウダレジン） 80を投入する。パウダレジン 80はキヤビティ 45の榭脂シート 75上に供給される。パ ウダレジン 80の投入量は、下型と上型がクランプ状態にあり、かつチップ 9がーつも 搭載されていないとする配線母基板 1 (基板)と、下型のキヤビティ 45によって形成さ れる榭脂が注入される空間体積を目安とするものであり、例えば、空間体積の 120— 150%とする。榭脂は、例えば、エポキシ榭脂である。  Next, as shown in FIG. 14, powder resin (powder resin) 80 is put into the cavity 45 of the lower mold 35. The powder resin 80 is supplied on the resin 45 of the cavity 45. The input amount of the powder resin 80 is formed by the wiring mother board 1 (board) that the lower mold and the upper mold are clamped and no chip 9 is mounted, and the lower mold cavity 45. This is based on the space volume into which the fat is injected, for example, 120-150% of the space volume. The resin is, for example, an epoxy resin.
[0059] つぎに、図 15に示すように、下型 35と上型 60をクランプ (型締め）する。このクラン プにより、ノ ウダレジン 80は加熱加圧によって溶けた榭脂 80aになり、配線母基板 1 とキヤビティ 45とによって形成される空間内に充填される。そして、一部の溶けた榭脂 80aはフローゲート 54を通ってフローキヤビティ 53に流れ込む。パウダレジン 80の投 入量が、配線母基板 1にチップ 9が全く搭載されないこととした量であることから、溶け た榭脂 80aは確実にフローキヤビティ 53内に流入する。このクランプ時、加圧ァクチ ユエータ 68がオン動作し、図 16に示すように、フローキヤビティプランジャ 67は型締 め状態の下型 35のフローキヤビティ 53内に突入する。この結果、フローキヤビティ 53 内の溶けた榭脂 80aはフローキヤビティプランジャ 67によって加圧されるため、フロー キヤビティ 53内の榭脂は所定の応力に加圧される。本実施例 1では、クランプによる キヤビティ 45内の樹脂の加圧力と、フローキヤビティ 53の榭脂の加圧力が同じ程度 になるように設定されている。また、榭脂中の気泡 (ボイド)の発生を抑止するため、榭 脂の加圧力は、例えば、 50kgZcm2以上の加圧力とする。 [0059] Next, as shown in FIG. 15, the lower die 35 and the upper die 60 are clamped (clamped). By this clamping, the noda resin 80 becomes a melted resin 80a by heating and pressurization, and is filled in the space formed by the wiring mother board 1 and the cavity 45. Then, a part of the melted resin 80a flows into the flow cavity 53 through the flow gate 54. Since the amount of powder resin 80 injected is an amount that the chip 9 is not mounted at all on the wiring mother board 1, the melted resin 80a surely flows into the flow cavity 53. At the time of this clamping, the pressurizing actuator 68 is turned on, and the flow cavity plunger 67 enters the flow cavity 53 of the lower mold 35 in the mold clamped state as shown in FIG. As a result, since the melted resin 80a in the flow cavity 53 is pressurized by the flow cavity plunger 67, the resin in the flow cavity 53 is pressurized to a predetermined stress. In this example 1, by clamp The pressure of resin in cavity 45 and the pressure of resin in flow cavity 53 are set to the same level. In order to suppress the generation of air bubbles (voids) in the resin, the applied pressure of the resin is, for example, 50 kgZcm 2 or more.
[0060] 図 17は圧縮成形時のプレス動作（下型と上型のクランプ動作）と、フローキヤビティ プランジャ動作を示す動作チャートである。縦軸がプレス動作及びフローキヤビティブ ランジャ 67の上下動を示し、横軸が時間（秒）を示すものである。プレス動作は 0秒か ら時間 T1まで急激な加圧動作となり、その後時間 T1から時間 T2ではクランプ動作 は減速される。また、時間 T2から時間 T5の間が榭脂を硬化させるキュア時間となる。 そして、このキュア時間内における時間 T2から T6までの間にフローキヤビティプラン ジャ 67によるフローキヤビティ 53内の溶けた榭脂 80aに対する加圧処理が続く。時 間 T5から時間 T7に掛けて下型 35と上型 60はゆっくりと離型動作に移り、その後は 急速に離型が行われる。離型は時間 T8で終了する。離型後の時間 T9から時間 T10 に至ってフローキヤビティプランジャ 67は bなる距離一時的に突出して硬化した榭脂 を上型 60から離脱 (離型)するようになる。なお、図 17からも分かるように、時間 T1か ら時間 T4の間圧縮成形金型内の減圧が行われる。  FIG. 17 is an operation chart showing the press operation (clamp operation of the lower mold and the upper mold) and the flow cavity plunger operation during compression molding. The vertical axis shows the press operation and the vertical movement of the flow cavity ranger 67, and the horizontal axis shows the time (seconds). The pressing operation is a sudden pressurization operation from 0 seconds to time T1, and then the clamping operation is decelerated from time T1 to time T2. Further, the curing time for curing the resin is from time T2 to time T5. Then, during the time T2 to T6 within the curing time, the pressure treatment to the melted resin 80a in the flow cavity 53 by the flow cavity plunger 67 continues. From time T5 to time T7, the lower mold 35 and the upper mold 60 slowly move to the mold release operation, and then release rapidly. Mold release ends at time T8. From time T9 after mold release to time T10, the flow cavity plunger 67 temporarily protrudes a distance of b to release the cured resin from the upper mold 60 (release). As can be seen from FIG. 17, the pressure in the compression mold is reduced from time T1 to time T4.
[0061] つぎに、圧縮成形金型から取り外された配線母基板 1から、フローキヤビティ 53、フ ローゲート 54並びにエアーベント 55で硬化した不要な榭脂部分が削除される。図 18 は不要な榭脂部分が削除された一括成形された封止体 85が形成された配線母基板 1を示す斜視図である。また、図 19はその平面図である。図 19では、封止体 85と各 製品形成部 2の関係が分力るように示してある。  [0061] Next, unnecessary grease parts cured by the flow cavity 53, the flow gate 54, and the air vent 55 are deleted from the wiring mother board 1 removed from the compression mold. FIG. 18 is a perspective view showing the wiring mother board 1 on which the encapsulated sealing body 85 from which unnecessary grease parts are removed is formed. FIG. 19 is a plan view thereof. In FIG. 19, the relationship between the sealing body 85 and each product forming part 2 is shown to be divided.
[0062] 図 20は既に説明した圧縮成形金型にレジンを供給する際の各工程を示すフロー チャートである。本実施例 1の圧縮成形装置では、工程 S 11—工程 S 14に至る工程 によって投入レジン量決定力 封止体形成が行われる。即ち、工程 S11では、レジン 計量部で投入するレジン量の計量と測定が行われる。これは、図 9で示すパウダレジ ン計量ユニット 21によって行われる。この際、配線母基板 1に搭載するチップ 9の数 の測定は行わな 、ことから、パウダレジン計量ユニット 21は画像認識装置は不要とな り、単純で安価なパウダレジン計量ユニット 21でよいことになる。また、工程 S11では 、レジン量の計量時の測定誤差精度は lOOmmg単位となり、図 28のフローチャート の場合よりも精度は緩やかになる。これは、前述のようにレジン投入量が大まかでよ 、ことによる。 [0062] FIG. 20 is a flowchart showing each process when supplying the resin to the compression mold described above. In the compression molding apparatus of the first embodiment, the sealing resin formation is performed by the process from step S11 to step S14. That is, in step S11, the amount of the resin to be input by the resin measuring unit is measured and measured. This is done by the powder resin weighing unit 21 shown in FIG. At this time, the number of chips 9 mounted on the wiring mother board 1 is not measured. Therefore, the powder resin weighing unit 21 does not require an image recognition device, and a simple and inexpensive powder resin weighing unit 21 is sufficient. . In step S11, the measurement error accuracy when weighing the resin amount is in lOOmmg units, and the flowchart in FIG. The accuracy is less than in the case of. This is because the amount of resin input is rough as described above.
[0063] つぎに、工程 S12に示すように、レジンの計量後、計量したレジンをレジン供給部（ パウダレジン供給部 22)へ移し替える。つぎに、工程 S13に示すように、パウダレジン 供給部 22によって圧縮成形金型にレジンが供給される。つぎに、工程 S14に示すよ うに、前述のように封止体形成力行われる。図 20の S11— S14iま、図 28の S53— S 56に対応するものである。即ち、本実施例 1によれば、図 28の S50— S52の工程は 不要となり、画像処理装置等の付帯設備の軽減ばカゝりでなく工程数の低減も可能に なる。  [0063] Next, as shown in step S12, after weighing the resin, the weighed resin is transferred to the resin supply unit (powder resin supply unit 22). Next, as shown in step S13, the resin is supplied to the compression mold by the powder resin supply unit 22. Next, as shown in step S14, the sealing body forming force is performed as described above. This corresponds to S11-S14i in Fig. 20 and S53- S56 in Fig. 28. That is, according to the first embodiment, the steps S50 to S52 in FIG. 28 are not necessary, and if the incidental facilities such as the image processing apparatus are reduced, the number of steps can be reduced as well as the number of steps.
[0064] つぎに、図 21及び図 22に示すように、配線母基板 1の裏面 lbにバンプ電極 (突起 電極)を形成する。即ち、図 21に示すように、バンプ保持ツール 86に保持された複 数の球状の半田バンプ 87をフラックス槽に浸漬して、半田バンプ 87の表面にフラッ タスを塗布した後、その複数の半田バンプ 87をフラックスの粘着力を利用して配線母 基板 1のバンプ電極形成面の導体パターン 6d (図 4,図 25参照）に同時に仮付けす る。前記半田バンプ 87は、例えば鉛 (Pb)Z錫（Sn)半田力もなる。半田バンプ 87の 材料として、例えば錫 Z銀 (Ag)系半田等のような鉛フリー半田を用いても良い。半 田バンプ 87は、 1個分の製品形成部 2毎に一括接続しても良いが、半田バンプ接続 工程のスループットを向上させる観点からは、複数の製品形成部 2の半田バンプ 87 を一括して接続する方が好ましい。続いて、半田バンプ 87を、例えば 220°C程度の 温度で加熱リフローすることで導体パターン 6dに固着させて、図 21に示すように、バ ンプ電極 (突起電極) 88を形成する。その後、配線母基板 1の表面に残されたフラッ タス残渣等を中性洗剤等を使って除去することで、半田バンプ接続工程が完了する  Next, as shown in FIGS. 21 and 22, a bump electrode (projection electrode) is formed on the back surface lb of the wiring mother board 1. That is, as shown in FIG. 21, a plurality of spherical solder bumps 87 held by a bump holding tool 86 are immersed in a flux bath, and after applying a flat to the surface of the solder bump 87, the plurality of solder The bumps 87 are temporarily attached simultaneously to the conductor pattern 6d (refer to FIGS. 4 and 25) on the bump electrode forming surface of the wiring mother board 1 using the adhesive force of the flux. The solder bump 87 also has, for example, a lead (Pb) Z tin (Sn) solder force. As a material of the solder bump 87, for example, lead-free solder such as tin Z silver (Ag) solder may be used. The solder bumps 87 may be connected together for each product forming part 2, but from the viewpoint of improving the throughput of the solder bump connecting process, the solder bumps 87 of a plurality of product forming parts 2 are connected together. Connection is preferable. Subsequently, the solder bumps 87 are fixed to the conductor pattern 6d by heating and reflowing at a temperature of, for example, about 220 ° C., and bump electrodes (projection electrodes) 88 are formed as shown in FIG. After that, the solder bump connection process is completed by removing the flat residue remaining on the surface of the wiring mother board 1 using a neutral detergent.
[0065] つぎに、図 23に示すように、封止体 85を粘着テープ等の支持テープ 89に接着固 定し、かつ支持テープ 89で封止体 85を支持させる。その後、図 23に示すように、ダ イシングブレード 90の回転切断によって、配線母基板 1とこの配線母基板 1に形成さ れた封止体 85を支持テープ 89の途中深さまで切断する。この切断は、配線母基板 1 を四角形に切断するように縦横に切断される。この切断によって、配線母基板 1は各 製品形成部 2ごとに切断されて個片化される。この切断によって、配線母基板 1は配 線基板 4になり、封止体 85は封止体 8になる。切断後、ダイシングブレード 90から各 封止体 8を剥がすことによって、図 24に示すように、例えば CSP (Chip Size Package) 型の複数個の半導体装置 15を同時に製造することができる。図 25は半導体装置 15 の模式的断面図であり、図 4に対応するものである。 Next, as shown in FIG. 23, the sealing body 85 is bonded and fixed to a support tape 89 such as an adhesive tape, and the sealing body 85 is supported by the support tape 89. Thereafter, as shown in FIG. 23, the wiring mother board 1 and the sealing body 85 formed on the wiring mother board 1 are cut to a halfway depth of the support tape 89 by rotating and cutting the dicing blade 90. This cutting is performed vertically and horizontally so that the wiring mother board 1 is cut into a square. By this cutting, the wiring motherboard 1 Each product forming part 2 is cut into individual pieces. By this cutting, the wiring mother board 1 becomes the wiring board 4 and the sealing body 85 becomes the sealing body 8. After cutting, by removing each sealing body 8 from the dicing blade 90, as shown in FIG. 24, for example, a plurality of semiconductor devices 15 of CSP (Chip Size Package) type can be manufactured at the same time. FIG. 25 is a schematic cross-sectional view of the semiconductor device 15 and corresponds to FIG.
[0066] 本実施例では、基板は複数の製品形成部 2を有する配線母基板 1で半導体装置を 製造する方法について説明したが、単一の製品形成部を有する基板の場合でも同 様に半導体装置を製造することができる。 In this embodiment, the method for manufacturing a semiconductor device using the wiring mother board 1 having a plurality of product forming portions 2 has been described. However, the same applies to the case of a substrate having a single product forming portion. The device can be manufactured.
本実施例 1によれば以下の効果を有する。  The first embodiment has the following effects.
[0067] (1)本実施例の半導体装置の製造方法では、圧縮成形金型にお!ヽて、キヤビティ 4 5から溢れ出た溶けた榭脂 80aを収容するフローキヤビティ 53が設けられていること から、基板 (配線母基板 1)に搭載される半導体チップ 9が零の状態を目安とする多 量のレジン量をキヤビティ 45に投入することができる。また、フローキヤビティ 53に流 入したレジン溶けた榭脂 80aもフローキヤビティプランジャ 67によってキヤビティ 45内 の溶けた榭脂 80aと同じ圧力で加圧される。この結果、キヤビティ 45内全体のレジン は適切な圧力下で硬化し、形成される封止体 85 (封止体 8)の厚さの過不足がなくな り、厚さ寸法のばらつきの大きいことを理由とする不良発生を抑止することができる。 従って、歩留り向上力も半導体装置の製造コスト低減が達成できる。従って、歩留り 向上から半導体装置の製造コスト低減が達成できる。  (1) In the method of manufacturing a semiconductor device of this embodiment, the flow mold 53 is provided in the compression mold to accommodate the melted resin 80a overflowing from the cavity 45. As a result, a large amount of resin can be thrown into the cavity 45 with the semiconductor chip 9 mounted on the substrate (wiring motherboard 1) as a guide. The resin melted resin 80a flowing into the flow cavity 53 is also pressurized by the flow cavity plunger 67 at the same pressure as the melted resin 80a in the cavity 45. As a result, the resin in the entire cavity 45 is cured under an appropriate pressure, the thickness of the formed sealing body 85 (sealing body 8) is eliminated, and the thickness dimension varies greatly. It is possible to suppress the occurrence of defects due to the reason. Therefore, it is possible to reduce the manufacturing cost of the semiconductor device with respect to the yield improving ability. Therefore, the manufacturing cost of the semiconductor device can be reduced by improving the yield.
[0068] (2)また、キヤビティ 45内の溶けた榭脂 80aは適切な圧力下で硬化することから、 封止体 85 (封止体 8)は均質なものが形成でき、内部に気泡 (ボイド)を含まなくなり、 封止体 8の耐湿性が向上する。ボイド発生を防ぐためには、キヤビティ 45内の榭脂は 、例えば、 50kgZcm2以上の圧力下で硬化させる必要がある。 [0068] (2) In addition, since the melted resin 80a in the cavity 45 is cured under an appropriate pressure, the sealed body 85 (sealed body 8) can form a homogeneous material, and bubbles ( No voids are contained, and the moisture resistance of the sealing body 8 is improved. In order to prevent generation of voids, the resin in the cavity 45 needs to be cured under a pressure of 50 kgZcm 2 or more, for example.
[0069] (3)本実施例の半導体装置の製造方法では、封止体 8は圧縮成形装置によって形 成されるため、封止体形成時に、トランスファモールディングのようにレジンの強い流 れが起きなくなり、半導体チップ 9の電極と基板 (配線母基板 1)の配線を接続するヮ ィャ 10の流れによる変形が発生しなくなる。この結果、製造歩留りが向上する。現状 で使用するワイヤの直径は 25 m程度である力 半導体チップ上の電極パッドピッ チの更なる狭小化により将来はワイヤ直径はさらに細くなると想定できる。例えば、ヮ ィャ直径が 23 μ m程度になれば、電極パッドピッチは 65 μ m程度に狭小化できる。 また、ワイヤ直径は、さらに 20 ^ m, 17 ^ m, 15 μ mと進むものと考えられる。このよ うな細さのワイヤにおいても、圧縮成形によればワイヤ流れに起因するショート不良は 防止することができる。 [0069] (3) In the manufacturing method of the semiconductor device of the present embodiment, since the sealing body 8 is formed by a compression molding apparatus, a strong resin flow like transfer molding occurs when the sealing body is formed. Thus, deformation due to the flow of the filler 10 connecting the electrode of the semiconductor chip 9 and the wiring of the substrate (wiring motherboard 1) does not occur. As a result, the manufacturing yield is improved. The current wire diameter is about 25 m. It can be assumed that the wire diameter will become thinner in the future due to further narrowing of the rod. For example, if the diameter of the wire is about 23 μm, the electrode pad pitch can be reduced to about 65 μm. In addition, the wire diameter is thought to advance further to 20 ^ m, 17 ^ m, and 15 μm. Even in such a thin wire, the short circuit failure caused by the wire flow can be prevented by compression molding.
[0070] (4)本実施例の圧縮成形装置は、配線母基板 1 (基板）に搭載した半導体チップ 9 等の電子部品の数を計数必要がなぐ基板に電子部品が搭載されない状態に見合 うレジン量を投入レジン量として決めていることから、圧縮成形装置の付帯装置の簡 素化が図れ、圧縮成形装置のコスト低減が可能になる。この結果、半導体装置の製 造コスト低減が達成できる。  [0070] (4) The compression molding apparatus of this example matches the state in which the electronic components are not mounted on the substrate that does not need to count the number of electronic components such as the semiconductor chip 9 mounted on the wiring motherboard 1 (substrate). Since the amount of resin is determined as the amount of input resin, the auxiliary device of the compression molding apparatus can be simplified, and the cost of the compression molding apparatus can be reduced. As a result, the manufacturing cost of the semiconductor device can be reduced.
[0071] (5)本実施例の圧縮成形装置によれば、圧縮成形時、キヤビティ 45に供給された レジンのうち、余分なレジンはフローキヤビティ 53に流入することから、また、常にフロ 一キヤビティ 53にレジンが流入するように投入レジン量を設定していることから、過不 足のない量による封止体形成が可能になり、常に適正の厚さの封止体 85を形成する ことができる。  [0071] (5) According to the compression molding apparatus of the present embodiment, during the compression molding, out of the resin supplied to the cavity 45, excess resin flows into the flow cavity 53. Since the amount of resin charged is set so that the resin flows into Cavity 53, it is possible to form a sealed body with a sufficient amount, and always to form a sealed body 85 with an appropriate thickness. Can do.
実施例 2  Example 2
[0072] 図 26及び図 27は本実施例 2の圧縮成形装置の圧縮成形金型に係わる図である。  FIG. 26 and FIG. 27 are diagrams related to a compression molding die of the compression molding apparatus of the second embodiment.
図 26は圧縮成形金型の下型を示す平面図、図 27は圧縮成形金型の上型の合わせ 面を示す模式図である。  FIG. 26 is a plan view showing the lower mold of the compression mold, and FIG. 27 is a schematic view showing the mating surface of the upper mold of the compression mold.
[0073] 本実施例 2の圧縮成形装置は、実施例 1の圧縮成形金型に複数の圧縮成形部を 配置した例である。実施例 1では圧縮成形部は 1組であるが、実施例 2の場合は、図 26及び図 27に示すように、圧縮成形部は 2組並列に配置されている。  [0073] The compression molding apparatus of the second embodiment is an example in which a plurality of compression molding sections are arranged in the compression molding die of the first embodiment. In Example 1, there is one set of compression-molded parts, but in the case of Example 2, as shown in FIGS. 26 and 27, two sets of compression-molded parts are arranged in parallel.
[0074] 1組の圧縮成形部は、下型 35では、図 26に示すように、キヤビティ 45、キヤビティ 4 5の両側に配置されるフローキヤビティ 53、キヤビティ 45とフローキヤビティ 53を複数 箇所で連通状態にするフローゲート 54、キヤビティ 45の両端側に配置されキヤビティ 45と連通状態にあるエアーベント 55とによって形成されている。また、上型 60では、 図 27に示すように、配線基板を保持する保持機構と、下型と上型がクランプされた状 態で前記フローキヤビティ 53に先端を突入させるフローキヤビティプランジャ 67が設 けられている。保持機構は、実施例 1で説明したとおりであり、図 27では保持機構を 構成する真空吸着孔 65が示されて ヽる。 [0074] In the lower mold 35, one set of compression-molded portions includes a plurality of flow cavities 53, cavities 45 and flow cavities 53 arranged on both sides of the cavities 45 and 45 as shown in FIG. The flow gate 54 is in communication with the air vent 55. The air gate 55 is disposed on both ends of the cavity 45 and the air vent 55 is in communication with the cavity 45. In the upper mold 60, as shown in FIG. 27, a holding mechanism for holding the wiring board, and a flow cavity plunger 67 for causing the tip to enter the flow cavity 53 in a state where the lower mold and the upper mold are clamped. Set up It is The holding mechanism is as described in the first embodiment, and in FIG. 27, the vacuum suction holes 65 constituting the holding mechanism are shown.
[0075] なお、図 26に示すように、下型 35の下型プレート 50の 4隅には突子力もなるゥエツ ジ 95が配置され、このゥエッジ 95が嵌合する窪み力もなるゥエッジ 96が、図 27に示 すように、上型 60の上型プレート 63に設けられて!/、る。 [0075] As shown in FIG. 26, wedges 95 that also have a protrusion force are arranged at the four corners of the lower plate 50 of the lower die 35, and a wedge 96 that also has a depression force to which the wedge 95 is fitted. As shown in FIG. 27, it is provided on the upper plate 63 of the upper mold 60! /.
[0076] 本実施例 2の圧縮成形装置によれば、実施例 1と同様の効果を得ることができるとと もに、生産能力を 2倍にすることができる。また、さらに圧縮成形部を多くすることも可 能であり、さらに生産性を高めることができる。 [0076] According to the compression molding apparatus of the second embodiment, the same effects as those of the first embodiment can be obtained, and the production capacity can be doubled. In addition, it is possible to increase the number of compression-molded parts, further improving productivity.
[0077] 以上の説明では主として本発明者によってなされた発明をその背景となった利用 分野である圧縮成形による半導体装置の製造について説明したが、それに限定され るものではない。 In the above description, the manufacture of the semiconductor device by compression molding, which is a field of use that has been based on the invention made by the present inventor, has been described, but the present invention is not limited thereto.
産業上の利用可能性  Industrial applicability
[0078] 以上のように、本発明の圧縮成形による半導体装置の製造方法によれば、均質で 封止性能が良好な封止体を形成することができるため、高品質の半導体装置を安価 に製造することができる。 As described above, according to the method for manufacturing a semiconductor device by compression molding according to the present invention, it is possible to form a sealed body having a uniform and good sealing performance, so that a high-quality semiconductor device can be manufactured at low cost. Can be manufactured.

Claims

請求の範囲 The scope of the claims
[1] (a)基板を準備する工程、  [1] (a) preparing a substrate;
(b)前記基板に電子部品を搭載する工程、  (b) a step of mounting electronic components on the substrate;
(c)前記電子部品が搭載された基板を前記電子部品が下面側になる状態で圧縮成 形金型の上型の下面に取り付ける工程、  (c) attaching the substrate on which the electronic component is mounted to the lower surface of the upper mold of the compression mold in a state where the electronic component is on the lower surface side;
(d)前記圧縮成形金型の前記上型に対面する下型の上面に形成されたキヤビティに 封止体形成用の榭脂を供給する工程、  (d) supplying a resin for forming a sealing body to the cavity formed on the upper surface of the lower mold facing the upper mold of the compression molding mold,
(e)前記下型と前記上型のクランプで前記基板を挟み込んで前記榭脂を加圧加熱し て前記基板の下面側に前記電子部品を覆う前記樹脂からなる封止体を形成するェ 程、  (e) A process of forming the sealing body made of the resin covering the electronic component on the lower surface side of the substrate by sandwiching the substrate between the lower mold and the upper mold and pressurizing and heating the resin. ,
(f)前記工程 (e)後の前記基板を前記圧縮成形金型から離型する工程を有し、 前記下型は前記基板に形成される前記封止体に対応するキヤビティと、前記キヤビ ティの外側に位置するフローキヤビティと、前記キヤビティと前記フローキヤビティを連 通する複数のフローゲートと、前記キヤビティに連なる複数のエアーベントとを有し、 前記上型は前記基板を保持する保持機構と、前記下型の前記フローキヤビティ内 に突入制御されるフローキヤビティプランジャとを有し、  (f) a step of releasing the substrate after the step (e) from the compression mold, wherein the lower die is a cavity corresponding to the sealing body formed on the substrate, and the cavity. A flow cavity located outside, a plurality of flow gates communicating the cavity and the flow cavity, and a plurality of air vents communicating with the cavity, the upper mold holding the substrate A mechanism, and a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold,
前記工程 (e)の前記封止体を形成する際、前記フローキヤビティプランジャを前記 下型の前記フローキヤビティ内に突入させて前記フローキヤビティに流入した前記榭 脂を所定の圧力に加圧することを特徴とする半導体装置の製造方法。  When forming the sealing body in the step (e), the flow cavity plunger is inserted into the lower mold flow cavity to apply the resin flowing into the flow cavity to a predetermined pressure. A method of manufacturing a semiconductor device.
[2] 請求項 1に記載の半導体装置の製造方法にぉ 、て、前記工程 (e)では、前記フロ 一キヤビティプランジャを前記下型の前記フローキヤビティ内に突入させて前記フロ 一キヤビティに流入した前記樹脂の圧力を、前記キヤビティ内の樹脂の圧力と同じ圧 力に加圧することを特徴とする半導体装置の製造方法。  [2] In the method of manufacturing a semiconductor device according to claim 1, in the step (e), the flow cavity plunger is inserted into the flow cavity of the lower mold, and the flow cavity is formed. A method of manufacturing a semiconductor device, wherein the pressure of the resin that has flowed into the chamber is increased to the same pressure as the pressure of the resin in the cavity.
[3] 請求項 1に記載の半導体装置の製造方法にお!、て、前記工程 (d)における前記キ ャビティ内に供給する前記樹脂の量は、前記下型と上型が前記クランプ状態にあり、 前記電子部品が搭載されていないとする前記基板と前記下型の空間体積の 120— 150%とし、投入量は毎回同量とすることを特徴とする半導体装置の製造方法。  [3] In the method of manufacturing a semiconductor device according to claim 1, the amount of the resin supplied into the cavity in the step (d) is such that the lower mold and the upper mold are in the clamped state. A method of manufacturing a semiconductor device, comprising: 120 to 150% of the space volume of the substrate and the lower mold on which the electronic component is not mounted, and the input amount being the same each time.
[4] 請求項 1に記載の半導体装置の製造方法にお!、て、前記工程 (b)では、前記電子 部品として半導体チップを搭載することを特徴とする半導体装置の製造方法。 [4] In the method of manufacturing a semiconductor device according to claim 1, in the step (b), the electron A semiconductor device manufacturing method comprising mounting a semiconductor chip as a component.
[5] 請求項 1に記載の半導体装置の製造方法において、前記工程 (d)では、前記下型 の上面全体に榭脂シートを取り付け、前記榭脂シート上に前記榭脂を供給することを 特徴とする半導体装置の製造方法。 [5] In the method of manufacturing a semiconductor device according to claim 1, in the step (d), a resin sheet is attached to the entire upper surface of the lower mold, and the resin is supplied onto the resin sheet. A method of manufacturing a semiconductor device.
[6] 請求項 1に記載の半導体装置の製造方法にぉ 、て、前記工程 (f)では、 [6] In the method for manufacturing a semiconductor device according to claim 1, in the step (f),
前記下型に、組となる前記キヤビティ、前記フローキヤビティ、前記フローゲート及び 前記エアーベントを複数組形成し、  In the lower mold, a plurality of sets of the cavity, the flow cavity, the flow gate and the air vent forming a set are formed,
前記上型には前記各組の前記キヤビティに対面して取り付けられる前記基板を保持 する前記保持機構と、前記各組の前記フローキヤビティ内に突入制御される前記フロ 一キヤビティプランジャをそれぞれ設けることを特徴とする半導体装置の製造方法。  The upper mold is provided with the holding mechanism for holding the substrate attached to face each of the sets of the cavities, and the flow cavities plungers that are controlled to enter into the flow cavities of the sets. A method for manufacturing a semiconductor device.
[7] (a)複数の製品形成部が配置された基板を準備する工程、 [7] (a) a step of preparing a substrate on which a plurality of product forming portions are arranged;
(b)前記各製品形成部に電子部品をそれぞれ搭載する工程、  (b) a step of mounting electronic components on each of the product forming parts,
(c)前記電子部品が搭載された基板を前記電子部品が下面側になる状態で圧縮成 形金型の上型の下面に取り付ける工程、  (c) attaching the substrate on which the electronic component is mounted to the lower surface of the upper mold of the compression mold in a state where the electronic component is on the lower surface side;
(d)前記圧縮成形金型の前記上型に対面する下型の上面に形成され、かつ前記複 数の製品形成部全体を含むように形成されたキヤビティに封止体形成用の榭脂を供 給する工程、  (d) A resin for forming a sealing body is formed on the cavity formed on the upper surface of the lower mold facing the upper mold of the compression mold and so as to include the entire plurality of product forming portions. Supplying process,
(e)前記下型と前記上型のクランプで前記基板を挟み込んで前記榭脂を加圧加熱し て前記基板の下面側に前記各製品形成部の前記電子部品を一括して覆う前記榭脂 からなる封止体を形成する工程、  (e) The resin having the substrate sandwiched between the lower mold and the upper mold and pressurizing and heating the resin to collectively cover the electronic components of the product forming portions on the lower surface side of the substrate. Forming a sealing body comprising:
(f )前記工程 (e)後の前記基板を前記成型金型から離型する工程を有し、 前記下型は前記基板に形成される前記封止体に対応するキヤビティと、前記キヤビ ティの外側に位置するフローキヤビティと、前記キヤビティと前記フローキヤビティを連 通する複数のフローゲートと、前記キヤビティに連なる複数のエアーベントとを有し、 前記上型は前記基板を保持する保持機構と、前記下型の前記フローキヤビティ内 に突入制御されるフローキヤビティプランジャとを有し、  (f) a step of releasing the substrate after the step (e) from the molding die, wherein the lower die is a cavity corresponding to the sealing body formed on the substrate, and the cavity A holding mechanism for holding the substrate; the flow cavity located outside; a plurality of flow gates communicating the cavity with the flow cavity; and a plurality of air vents communicating with the cavity. And a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold,
前記工程 (e)の前記封止体を形成する際、前記フローキヤビティプランジャを前記 下型の前記フローキヤビティ内に突入させて前記フローキヤビティに流入した前記榭 脂を所定の圧力に加圧することを特徴とする半導体装置の製造方法。 When forming the sealing body in the step (e), the flow cavity plunger rushes into the lower mold flow cavity and flows into the flow cavity. A method of manufacturing a semiconductor device, wherein the fat is pressurized to a predetermined pressure.
[8] 請求項 7に記載の半導体装置の製造方法にお 、て、前記工程 (e)では、前記フロ 一キヤビティプランジャを前記下型の前記フローキヤビティ内に突入させて前記フロ 一キヤビティに流入した前記樹脂の圧力を、前記キヤビティ内の樹脂の圧力と同じ圧 力に加圧することを特徴とする半導体装置の製造方法。 [8] In the method of manufacturing a semiconductor device according to claim 7, in the step (e), the flow cavity plunger is inserted into the flow cavity of the lower mold, and the flow cavity is formed. A method of manufacturing a semiconductor device, wherein the pressure of the resin that has flowed into the chamber is increased to the same pressure as the pressure of the resin in the cavity.
[9] 請求項 7に記載の半導体装置の製造方法にお 、て、前記工程 (d)における前記キ ャビティ内に供給する前記樹脂の量は、前記下型と上型が前記クランプ状態にあり、 前記電子部品が一つも搭載されていないとする前記基板と前記下型の前記キヤビテ ィによって形成される前記樹脂が注入される空間体積の 120— 150%とし、同一品種 の基板の場合は前記榭脂投入量は毎回同量とすることを特徴とする半導体装置の 製造方法。 [9] In the method of manufacturing a semiconductor device according to claim 7, the amount of the resin supplied into the cavity in the step (d) is such that the lower mold and the upper mold are in the clamped state. 120 to 150% of the space volume into which the resin formed by the substrate and the lower mold cavity is not loaded with any electronic component, and in the case of the same type of substrate, A method for manufacturing a semiconductor device, characterized in that the same amount of resin is charged each time.
[10] 請求項 7に記載の半導体装置の製造方法にお 、て、前記工程 (b)では、前記電子 部品として半導体チップを搭載することを特徴とする半導体装置の製造方法。  10. The method for manufacturing a semiconductor device according to claim 7, wherein a semiconductor chip is mounted as the electronic component in the step (b).
[11] 請求項 7に記載の半導体装置の製造方法において、前記工程 (d)では、前記下型 の上面全体に榭脂シートを取り付け、前記榭脂シート上に前記榭脂を供給することを 特徴とする半導体装置の製造方法。  [11] In the method of manufacturing a semiconductor device according to claim 7, in the step (d), a resin sheet is attached to the entire upper surface of the lower mold, and the resin is supplied onto the resin sheet. A method of manufacturing a semiconductor device.
[12] 請求項 7に記載の半導体装置の製造方法において、前記工程 (f)では、  [12] In the method of manufacturing a semiconductor device according to claim 7, in the step (f),
前記下型に、組となる前記キヤビティ、前記フローキヤビティ、前記フローゲート及び 前記エアーベントを複数組形成し、  In the lower mold, a plurality of sets of the cavity, the flow cavity, the flow gate and the air vent forming a set are formed,
前記上型には前記各組の前記キヤビティに対面して取り付けられる前記基板を保持 する前記保持機構と、前記各組の前記フローキヤビティ内に突入制御される前記フロ 一キヤビティプランジャがそれぞれ設けられていることを特徴とする半導体装置の製 造方法。  The upper mold is provided with the holding mechanism for holding the substrate mounted to face each of the groups of the cavities, and the flow cavity plunger that is controlled to enter into the flow cavities of the groups. A method for manufacturing a semiconductor device, wherein:
[13] 請求項 7に記載の半導体装置の製造方法において、  [13] In the method of manufacturing a semiconductor device according to claim 7,
前記工程 (f)後、前記基板及び前記封止体を前記製品形成部毎に切断する工程を 有することを特徴とする半導体装置の製造方法。  After the step (f), the method includes a step of cutting the substrate and the sealing body for each of the product forming portions.
[14] 請求項 7に記載の半導体装置の製造方法において、 [14] In the method of manufacturing a semiconductor device according to claim 7,
前記工程 (f)後、前記基板の裏面にバンプ電極を形成し、その後、前記基板及び 前記封止体を前記製品形成部毎に切断する工程を有することを特徴とする半導体 装置の製造方法。 After the step (f), a bump electrode is formed on the back surface of the substrate, and then the substrate and A method for manufacturing a semiconductor device, comprising a step of cutting the sealing body for each of the product forming portions.
[15] 下面に基板を保持する保持機構を有する上型と、 [15] an upper mold having a holding mechanism for holding the substrate on the lower surface;
前記上型の下方に位置し、上面に窪み力 なるキヤビティを有する下型とを有し、 前記上型に前記基板を保持させかつ前記キヤビティに榭脂を供給した後、前記下型 と前記上型のクランプによって前記榭脂を加熱加圧して前記基板の下面側に前記榭 脂からなる封止体を形成する圧縮成形装置であって、  A lower mold that is located below the upper mold and has a cavity with a depression force on the upper surface, and after holding the substrate on the upper mold and supplying grease to the cavity, the lower mold and the upper mold A compression molding apparatus for forming a sealing body made of the resin on the lower surface side of the substrate by heating and pressurizing the resin with a mold clamp,
前記下型には、前記キヤビティの外側に位置する窪み力 なるフローキヤビティと、前 記キヤビティと前記フローキヤビティを連通する溝力 なる複数のフローゲートと、前 記キヤビティに連なる溝力 なるエアーベントが上面に設けられ、  The lower mold includes a flow cavity that is a depression force located outside the cavity, a plurality of flow gates that have a groove force that communicates the cavity and the flow cavity, and an air that has a groove force that communicates with the cavity. A vent is provided on the top surface,
前記上型には、前記下型と前記上型をクランプした際前記下型の前記フローキヤビ ティ内に突入制御されるフローキヤビティプランジャが設けられていることを特徴とす る圧縮成形装置。  The compression molding apparatus, wherein the upper mold is provided with a flow cavity plunger that is controlled to enter into the flow cavity of the lower mold when the lower mold and the upper mold are clamped.
[16] 請求項 15に記載の圧縮成形装置において、前記フローキヤビティプランジャを前 記下型の前記フローキヤビティ内に突入させて前記フローキヤビティに流入した前記 榭脂の圧力は、前記下型と前記上型をクランプした際の前記キヤビティ内の榭脂を 加圧する圧力と同じ圧力で加圧するように構成されていることを特徴とする圧縮成形 装置。  [16] The compression molding apparatus according to claim 15, wherein the pressure of the resin that has flowed into the flow cavity by causing the flow cavity plunger to enter the flow cavity of the lower mold is A compression molding apparatus configured to pressurize at a pressure equal to a pressure to pressurize the grease in the cavity when the mold and the upper mold are clamped.
[17] 請求項 15に記載の圧縮成形装置において、前記キヤビティ、前記フローキヤビティ 、前記フローゲート及び前記エアーベントの気密を維持する気密維持機構が設けら れて!ヽることを特徴とする圧縮成形装置。  [17] The compression molding apparatus according to claim 15, wherein an airtight maintaining mechanism for maintaining airtightness of the cavity, the flow cavity, the flow gate, and the air vent is provided. Compression molding device.
[18] 請求項 15に記載の圧縮成形装置では、前記下型の上面全体に榭脂シートを取り 付け、前記榭脂シート上に前記榭脂を供給することを特徴とする圧縮成形装置。  [18] The compression molding apparatus according to claim 15, wherein a resin sheet is attached to the entire upper surface of the lower mold, and the resin is supplied onto the resin sheet.
[19] 請求項 15に記載の圧縮成形装置において、  [19] The compression molding apparatus according to claim 15,
前記下型に、組となる前記キヤビティ、前記フローキヤビティ、前記フローゲート及び 前記エアーベントを複数組形成し、  In the lower mold, a plurality of sets of the cavity, the flow cavity, the flow gate and the air vent forming a set are formed,
前記上型には前記各組の前記キヤビティに対面して取り付けられる前記基板を保持 する前記保持機構と、前記各組の前記フローキヤビティ内に突入制御される前記フロ 一キヤビティプランジャをそれぞれ形成する構成になっていることを特徴とする圧縮 成形装置。 The upper mold has the holding mechanism for holding the substrate attached to face each of the groups of the cavities, and the flow controlled to enter into the flow cavities of the groups. A compression molding apparatus characterized in that each cavity plunger is formed.
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