WO2006097328A2 - Anordnung mit spannungskonverter zur spannungsversorgung einer elektrischen last und verfahren - Google Patents
Anordnung mit spannungskonverter zur spannungsversorgung einer elektrischen last und verfahren Download PDFInfo
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- WO2006097328A2 WO2006097328A2 PCT/EP2006/002492 EP2006002492W WO2006097328A2 WO 2006097328 A2 WO2006097328 A2 WO 2006097328A2 EP 2006002492 W EP2006002492 W EP 2006002492W WO 2006097328 A2 WO2006097328 A2 WO 2006097328A2
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- voltage
- capacitor
- current sink
- multiplication factor
- input
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- 238000000034 method Methods 0.000 title claims description 20
- 239000003990 capacitor Substances 0.000 claims description 92
- 230000005669 field effect Effects 0.000 claims description 17
- 230000000694 effects Effects 0.000 claims description 9
- 230000000295 complement effect Effects 0.000 claims description 8
- 238000005070 sampling Methods 0.000 claims description 7
- 230000003247 decreasing effect Effects 0.000 claims description 4
- 238000007599 discharging Methods 0.000 claims 2
- 150000001875 compounds Chemical class 0.000 claims 1
- 238000011161 development Methods 0.000 description 8
- 230000018109 developmental process Effects 0.000 description 8
- 230000008878 coupling Effects 0.000 description 6
- 238000010168 coupling process Methods 0.000 description 6
- 238000005859 coupling reaction Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 230000001419 dependent effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012913 prioritisation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/40—Details of LED load circuits
- H05B45/44—Details of LED load circuits with an active control inside an LED matrix
- H05B45/46—Details of LED load circuits with an active control inside an LED matrix having LEDs disposed in parallel lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
Definitions
- the present invention relates to an arrangement with voltage converter for supplying power to an electrical load and a method for supplying power to an electrical load.
- the arrangement can be used in the supply of light emitting diodes, abbreviated LEDs, as used for example in portable telephones and digital cameras.
- Voltage converters commonly referred to as direct current / direct current converters, or DC / DC converters for short, are commonly used to convert a low to a higher voltage. The ratio of the output voltage to the input voltage can often be adjusted by selecting a multiplication factor. Voltage converters are used, for example, in generating flashes with an LED and the backlight of a display.
- Portable devices are usually powered by a battery and thus have no constant voltage for the electrical load to be supplied, such as an LED.
- the function of the load should not be influenced by a decreasing input voltage. For this reason, voltage converters with an additional circuit for adjusting the
- Multiplication factor operated. If several LEDs of different types or with specimen scattering are operated in parallel, it may happen that the multiplication factor has to be increased in order to operate a LED with a high threshold voltage. This results in a deteriorated efficiency of the overall arrangement.
- the object of the present invention is to provide an arrangement for the power supply of one or more loads which require a higher voltage with improved efficiency.
- an arrangement comprising: - a voltage converter, which is connected at one output to a terminal of a series circuit, comprising means for connecting an electrical load and a current sink, and whose output voltage is a function of an input voltage and of a current Multiplication factor,
- a first comparator which is coupled at a sampling input with the current sink for supplying a current sink voltage and which is set up to compare the current sink voltage with a lower threshold value
- a second comparator which is coupled at a sampling input with the current sink for supplying the current sink voltage, to which a signal derived from the input voltage can be supplied at a further sampling input, which is used to determine an upper threshold value as a function of the current multiplication factor, a new, smaller multiplication factor, the predetermined lower threshold value and the signal derived from the input voltage is set up and which is set up to compare the current sink voltage with the upper threshold value
- a selection logic which is connected to outputs of the first and second comparators and to a control input of the voltage converter for specifying the current multiplication factor and is designed to specify a new, larger multiplication factor compared to the current multiplication factor of a set of selectable values of the multiplication factor, when the current sink voltage falls below the lower threshold, and for setting the new, smaller multiplication factor, when the current sink voltage exceeds
- the voltage converter generates an output voltage which drops above the electrical load and the current sink. Idealized applies
- U OUT is the output voltage of the voltage converter
- m is the multiplication factor
- U IN is the input voltage of the voltage converter
- U SINK is the voltage across the current sink, referred to herein as the current sink voltage
- U L is the voltage across the electrical load.
- the electrical load can consist of several series-connected electrical components.
- the current sink By means of the current sink, the current is kept constant by the electrical load. If the output voltage of the voltage converter rises, the current sink serves to absorb the surplus voltage. This avoids that the voltage across the electrical load and the current through the electrical load are increased. The voltage over the electrical Load and the current through the electrical load are thus practically constant.
- the current sink voltage is fed to a comparator, which gives a signal when the current sink voltage drops below a lower threshold value.
- the lower threshold depends on the implementation of the selected power source. In this case, the electrical load is no longer sufficiently supplied and the multiplication factor is increased.
- the current sink voltage is also applied to a second comparator which compares the current sink voltage to an upper threshold. If the current sink voltage exceeds the upper threshold, the second comparator will enter
- the voltage converter is set up so that it can generate integer multiplication factors without additional switching effort.
- the electrical load is connected to the reference potential terminal.
- the current sink voltage results from the difference between the potential of the output voltage terminal of the voltage converter and the potential of a circuit node of the series circuit formed between the electric load and the current sink.
- the electrical load may be connected to the output of the voltage converter.
- the current sink voltage in this case is the potential difference between the potential of the circuit node of the series circuit formed between the electric load and the current sink, and the reference potential.
- the lower threshold is a function of the required current and the realization of the current sink.
- the upper threshold is determined as follows:
- U OSW is the upper threshold
- U USW is the lower threshold
- U IN is the input voltage
- m ACT is the current multiplication factor
- m NEW is the new, smaller multiplier factor.
- the difference of the current multiplication factor and the new, smaller multiplication factor is 1. This results in the simple equation that the upper threshold is equal to the sum of the lower threshold and the input voltage.
- the arrangement in a preferred development for operating a further series connection the means for connecting the further electrical load and the further current sink is advantageous has designed.
- the arrangement is supplemented with a further first comparator and a further second comparator.
- the further first comparator compares the further current sink voltage with a further lower threshold value, which can advantageously assume a value other than the lower threshold value.
- the further second comparator compares the further current sink voltage with a further upper threshold value.
- the selection logic now links the results of the various comparators and determines a new multiplication factor.
- a plurality of further electrical loads and the associated several further series circuits can be interconnected and operated in a corresponding manner.
- the new multiplication factor can be determined by setting a higher multiplication factor if the current sink voltage is less than the lower threshold value and the further current sink voltage is less than the further lower threshold value.
- the new multiplication factor can be determined by setting a lower multiplication factor if the current sink voltage is greater than the upper threshold value and the further current sink voltage is greater than the further upper threshold value.
- the voltage converter comprises: a first stage coupled at its input to an input of the voltage converter and comprising a first capacitor and first switching means; a second stage connected at its input to a first stage output and at its output Output is coupled to the output of the voltage converter and comprises a second capacitor and a second switching means, and a control unit connected to the control input of the voltage converter and to the first and second switching means.
- the preferred voltage converter thus has stages that are constructed in an identical manner.
- the coupling of the first stage with the input voltage and the coupling of the second stage with the output of the voltage converter can be carried out by further stages. If the multiplication factor achievable with these steps is sufficiently high, the coupling can be realized by a simple connection.
- the coupling may include a switching means.
- the coupling may be formed instead of a simple connection through a smoothing circuit with a capacitor acting as a low pass.
- the coupling can be formed by a circuit which acts as a higher-order low-pass filter.
- a switching means for one stage of the voltage converter has three switches. The first
- the electrode of the first capacitor is connected to the input of the first stage via a first transfer switch and to the output of the first stage in a connection without a switch.
- the second electrode of the first capacitor is connected to a first reference potential switch with a reference potential terminal and with a first lift switch to the input voltage terminal of the voltage converter.
- the control unit switches in a first clock phase, the first lift switch in an open switching state and the first transfer switch and the first reference potential switch in a closed switching state. In a second clock phase, the control unit switches the first transfer switch and the first reference potential switch into an open switching state and the first lift switch into a closed switching state.
- the second switching means is constructed in an analogous manner as the first switching means.
- the second switching means thus comprises a second transfer switch, a second reference potential switch and a second lift switch.
- the control unit switches in the first clock phase, the second transfer switch and the second reference potential switch in an open switching state and the second lift switch in a closed switching state.
- the control unit switches the second transfer switch and the second reference potential switch in a closed switching state and the second lift switch in an open
- the first capacitor is charged, with the first electrode being at the potential of the input voltage and the second electrode being at the reference potential.
- the second electrode of the first capacitor is raised to the potential of the input voltage. Since the voltage across a capacitor also has a steady course during switching operations, the first electrode of the first capacitor is thus at twice the potential of the input voltage.
- opening the second transfer switch charge can be pushed from the first capacitor to the second capacitor. This The process repeats periodically so that after a series of clock phases the output of the first stage is at twice the value of the input voltage and the output of the second stage is three times the value of the input voltage.
- N-1 stages are necessary.
- the second switching means is advantageously equipped with only one switch.
- the first electrode of the second capacitor is provided in analogy to the first switching means with a transfer switch connecting the first electrode of the second capacitor to the input of the second stage and a connection connecting the first electrode to the output of the second stage ,
- the second electrode of the second capacitor can be coupled to the input voltage. Since the input voltage can be subject to fluctuations, the second electrode is advantageously coupled to the reference potential terminal.
- the control unit switches the second transfer switch to the open switching state in the first clock phase and to the closed switching state in the second clock phase. In this connection, the second switching means has a lower fluctuation of the output voltage than a switching means which comprises a plurality of switches.
- control unit By means of the control unit, a new, smaller multiplication factor can be set by the second
- Transfer switch is closed in the first and in the second clock phase.
- the voltage at the input of the first stage will now cause both the first condensing charged as well as the second capacitor.
- the second electrode of the first and the second capacitor is raised by the parallel opening of the first and second reference potential switch and by the parallel closing of the first and second lift switch, so that the first and the second capacitor charge at the output of the second Stage is delivered.
- the first capacitor is advantageously shut down. This happens, for example, in that the first lift switch and the first reference potential switch are open to silence the first capacitor. This ensures that when switching not the second electrode of the first capacitor is charged to the input voltage and then this charge is supplied to the reference potential. By decommissioning the first capacitor thus the efficiency of energy utilization is increased.
- the potential of the second electrode may be defined and left unsteady by closing the lift switch and the reference potential switch open.
- the load on the input voltage can be further reduced by opening the lift switch instead of the reference potential switch and closing the reference potential switch instead of the lift switch.
- the second capacitor instead of the first capacitor can be shut down in order to increase the efficiency.
- the closing of the second transfer switch to take effect of the new, smaller multiplication factor can, in the case of a ner greater number of stages at different points in this series connection of stages are performed. Preferably, those stages that are closest to the output of the voltage converter are shut down.
- the transfer switches In order to be able to set the actual multiplication factor to a value which is not smaller than the value N by 1, but by a value L, the value N being achievable with a voltage converter comprising NI stages, the transfer switches must be of L stages in the be closed first and in the second clock phase.
- the transfer switch which is not immediately adjacent, can advantageously be closed first.
- the second transfer switch is in this case open in one clock phase and closed in the other clock phase.
- the various switches in the time sequence are controlled so that a high energy efficiency is achieved.
- Non-overlap texts must be adhered to, so that the opening of the transfer switch, which can be opened in one clock phase, is completed before the closing of the transfer cycle same transfer phase begins to close transfer switch. This avoids that the energy of the capacitor of a stage is passed on to the input of the stage instead of to the output of the stage.
- the transfer, reference potential and lift switches each comprise a field effect transistor.
- the threshold voltage of the field effect transistors and the charge type can be selected with advantage in such a way that the current flow from the input voltage through the lift transistor and via the reference potential transistor to the reference potential is kept extremely small.
- the lifting and the reference potential switch as an inverter, which is in the complementary metal-oxide-semiconductor technology, English Complementary Metal-Oxide-Semiconductor Technology, abbreviated CMOS technology, manufactured, this is the case.
- the proposed principle has advantages: a significantly improved efficiency in energy use, an improved area utilization on the chip due to the elimination of current sinks.
- Figure 1 shows a block diagram of an embodiment of the arrangement with voltage converter and power supply of an electrical load.
- Figure 2 shows a block diagram of a second embodiment of the arrangement with voltage converter, namely for supplying a plurality of electrical loads.
- FIG. 3 shows an exemplary profile of the current sink voltage at an increasing and a decreasing input voltage.
- FIG. 4a shows a first switching state of a first and a second stage of an exemplary voltage converter.
- FIG. 4b shows the second switching state of the steps of FIG. 4a.
- Figure 5 shows a stage as it is preferably used as the last stage before the output of the voltage converter.
- FIG. 6 shows a block diagram of an exemplary embodiment of the voltage converter in seven stages.
- FIGS. 7a to 7c show a circuit diagram of an embodiment of the seven-stage voltage converter in one example, wherein the switches are formed by field effect transistors, and two circuit diagrams of embodiments of a builing terminal of a field effect transistor.
- FIG. 1 shows a voltage converter 1 which can be connected to an input voltage U IN at a first input and which is connected to a series circuit at an output.
- the voltage U OUT at the output of the voltage converter 1 has a function of the voltage at the first input U IN and of a multiplication factor m.
- the series circuit comprises means for connecting an electrical load 2 and a current sink 3.
- the electrical load 2 is further connected to the output of the voltage converter 1 and the current sink 3 to the reference potential terminal 8.
- the current sink voltage U SINK is compared by a first comparator 4 with a lower threshold U USW and by a second comparator 5 with an upper threshold U OSW .
- the results of the two comparators 4, 5 are supplied to a selection logic 6, which forwards the current multiplication factor m to the voltage converter 1.
- the upper threshold U OSW is a function of the lower threshold Uusw of the adjustable multiplication factors and a quantity derivable from the input voltage U IN .
- the input voltage U IN is the second comparator
- the second comparator 5 is coupled to the selection logic 6 and the selection logic 6 to the first input of the voltage converter 1.
- the second comparator 5 may be coupled directly to the input voltage U IN . Since the output voltage U OUT is a function of the input voltage U IN , the output voltage U OUT can also be supplied to the second comparator 5 in a further alternative embodiment.
- FIG. 2 The arrangement in Figure 2 is a development of the arrangement of Figure 1.
- the arrangement of Figure 2 is largely consistent with the arrangement of Figure 1 and will not be described at this point again.
- Two series circuits are connected to the voltage converter 1 in the exemplary embodiment according to FIG. 2, each comprising a means for connecting an electrical load 2, 2 ', 2 "and an associated current sink 3, 3', 3".
- the three current sink voltages are each fed to a first comparator 4, 4 ', 4 "and a second comparator 5, 5', 5".
- the first and second comparators 4, 4 ', 4 ", 5, 5', 5" are linked to the selection logic 6, which supplies the current multiplication factor m to the voltage converter 1.
- the multiplication factor m is set on the basis of the signals of the comparators 4, 4 ', 4 ", 5, 5', 5" in order to ensure the voltage supply of the electrical loads 2, 2 ', 2 "and to increase the efficiency optimize.
- different rules can be implemented in the selection logic 6 for this purpose.
- FIG. 3 shows an exemplary profile of the input voltage U IN with a rising and then decreasing edge.
- whole numbers can be selected in this example.
- the value of the current sink voltage increases with increasing input voltage and reaches the upper threshold U OSW . This causes the arrangement to switch back the multiplication factor m, from 6 to 5 in this example and from 5 to 4 in the further course.
- U SINK is the voltage across the current sink 3
- m is the multiplication factor
- U IN is the input voltage
- U L is the voltage across the electrical load 2.
- the voltage U L across the electrical load 2 is practically constant during operation.
- the current sink voltage U SINK reaches the lower threshold value U USW , so that the multiplication factor m is first increased from 4 to 5 and then from 5 to 6.
- the upper threshold value U OSW is not a constant, but a quantity dependent on the input voltage U IN in the following manner:
- U OSW is the upper threshold
- U USW is the lower threshold
- U IN is the input voltage
- the upper threshold value U OSW can advantageously be chosen slightly higher than in the above formula, so that when the multiplication factor m is switched over, the current sink voltage U SINK does not drop exactly to the lower threshold value U USW. This avoids oscillating the multiplication factor m between two adjacent values.
- FIG. 4a shows by way of example a first stage 11 and a second stage 21 of the voltage converter 1 of FIGS. 1 and 2.
- the first stage 11 comprises a first capacitor
- a first electrode of the first capacitor 12 is connected via the first transfer switch 14 to an input of the first stage 11 and via a line to the output of the first stage 11 connected.
- a second electrode of the first capacitor 12 is connected to the reference potential terminal 8 via the first potential connection switch 15. The second electrode is fed via the first lift switch 16, the input voltage U IN .
- the input of the first stage 11 is coupled to the input of the voltage converter 1.
- the second stage 21 comprises a second capacitor 22, a second transfer switch 24, a second reference potential switch 25 and a second lift switch 26.
- a first electrode of the second capacitor 22 is connected via the second transfer switch 24 to a second stage 21 input connected to the output the first stage 11 is connected, and connected via a line to the output of the second stage 21.
- a second electrode of the second capacitor 22 is connected to the reference potential terminal 8 via the second potential connection switch 25. The second electrode is the input voltage via the second lift switch 26
- FIG. 4 a shows a first switching state in a first clock phase. This one is in the first stage
- the first capacitor 12 is charged via the first transfer switch 14 from the input voltage U IN .
- the second electrode of the first capacitor 12 is in this case at the reference potential, since the first reference potential switch 15 is closed.
- the first lift switch 16 is open.
- the second transfer switch 24 is open in the first clock phase, so that the first electrode of the first capacitor 12 and the first electrode of the second capacitor 22 are non-conductively connected in the first clock phase. However, the charge on the second capacitor 22 is available at the output of the second stage 21. The lower electrode of the second capacitor 22 is at the input voltage potential. tial U IN , since the second lift switch 26 is closed and the second reference potential switch 25 is opened.
- the control unit 7 is linked to all switches 14, 15, 16, 24, 25, 26 for setting the first switching state.
- FIG. 4b shows a second switching state in a second clock phase of the arrangement according to FIG. 4a.
- the first capacitor 12 is disconnected from the input of the first stage 11 in that the first transfer switch 14 is open.
- the first lift switch 16 is closed, so that immediately after closing the lift switch, the charge of the first electrode of the first capacitor 12 is at the potential of twice the input voltage U IN .
- the first reference potential switch 15 is open.
- the second transfer switch 24 Since the second transfer switch 24 is closed, charge can flow from the first stage 11 to the second stage 21.
- the second electrode of the second capacitor 22 is at the reference potential, since the second reference potential switch 25 is closed.
- the second lift switch 26 is open.
- the sum of the charges on the first electrode of the first capacitor 12 and the first electrode of the second capacitor 22 does not change when opening the second transfer switch 24 to a first approximation.
- the potential of the first electrode of the first capacitor 12 and the first electrode of the second capacitor 22 is identical to a first approximation.
- the voltage across the second capacitor 22 is the sum of the voltage across the first capacitor 12 and the input voltage U IN . From the charge retention equation, the equation over the voltages, and the device equations For the first and the second capacitor 12 and 22, the voltage U22 across the second capacitor 22 at the end of the second clock phase results in a first approximation.
- the first and second clock phases alternate periodically so that the voltage U 12 across the first capacitor 12 is asymptotic and assuming ideal ratios to the value of the input voltage U IN and the voltage U22 across the second capacitor 22 to twice the value of the input value.
- output voltage U IN increases.
- the multiplication factor m is fed to the voltage converter 1, wherein the first and in FIG. 4b the second switching state is shown in FIGS. 4a, with which the maximum multiplication factor achievable with two stages, namely 3, is achieved.
- Figure 5 shows the second stage 71, as it is realized with advantage as a stage immediately before the output of the voltage converter 1.
- the second stage 71 includes the transfer switch 74, which in the closed state serves to allow charge to flow from the previous stage to the second capacitor 72.
- the voltage across the second capacitor 72 is available as output voltage U OUT .
- FIG. 6 shows a block diagram of the voltage converter 1 with seven stages.
- the stages 11, 21, 31, 41, 51, 61, 71 each comprise a capacitor 12, 22, 32, 42, 52, 62, 72 and each a switching means 13, 23, 33, 43, 53, 63, 73.
- the switching means 13, 23, 33, 43, 53, 63, 73 are from the control unit 7 according to the current multiplication factor m, which is set at the control input of the voltage converter 1 , controlled.
- the first, third, fifth and seventh capacitors 12, 32, 52, 72 are charged and the second, fourth and sixth capacitors 22, 42, 62 respectively supply energy to the following stage.
- the first, third, fifth and seventh capacitors 12, 32, 52, 72 emit energy and the second, fourth and sixth capacitors 22, 42, 62 are charged.
- the transfer of energy or the charge takes place via the lifting effect.
- the lifting effect is based on the fact that in the first clock phase the first, third, fifth and seventh capacitors 12, 32, 52, 72 are charged to a voltage, the second electrode being connected to reference potential, and then in the second clock phase is raised by raising the potential of the second electrode to the level of the input voltage U IN ofistskonver- ters 1, the potential of the first electrode.
- the reason for the Mitanlander is that the energy content of a capacitor does not change dramatically during switching operations.
- any value from 1 to 8 can be obtained, the value 8 resulting from the number of stages plus 1.
- FIG. 7 shows a possible development of the circuit of FIG. 6.
- the transfer switches are realized as p-channel type field-effect transistors 17, 27, 37, 47, 57, 67, 77 and with a threshold voltage, so that they are enhancement-type transistors , This also applies to the field Fekttransistoren 19, 29, 39, 49, 59, 69, which form the lifting switches.
- the reference potential switches are realized as field effect transistors 18, 28, 38, 48, 58, 68 of the n-channel type and also as enhancement type transistors.
- the output side stage 71 that is, the seventh stage, is a stage that causes a particularly low output voltage fluctuation.
- the lifting and the reference potential switch of a stage can be realized in one embodiment as a CMOS inverter.
- Field effect transistors comprise two current-carrying terminals, called source and drain terminals, and a control terminal, called a bulk terminal. Since source and drain are generally identically formed in the semiconductor body, the source and drain terminals generally differ in operation based on the applied potentials. For p-channel field-effect transistors, the drain and source are assigned to the two terminals so that the source terminal is at a higher potential than the drain terminal.
- the field effect transistors of the transfer switches 17, 27, 37, 47, 57, 67, 77 can have an unconnected bulk terminal.
- the voltage of the field-effect transistor is raised by parasitic diodes to the potential of that current-carrying connection which is at a higher potential.
- One or more of the field effect transistors 17, 27, 37, 47, 57, 67, 77 may also be connected such that the bulk terminal is connected to the live terminal coupled to the input of the respective stage.
- One or more of the field-effect transistors 17, 27, 37, 47, 57, 67, 77 may also be connected such that the bus terminal is connected to the current-carrying terminal which is coupled to the output of the respective stage.
- Figure 7b shows a further embodiment for the BuIk connection of one of the field effect transistors 17, 27, 37, 47, 57, 67, 77.
- the other of the two bulk switches 80, 81 is open in this case.
- FIG. 7c shows a further embodiment for the connection of one of the field effect transistors 17, 27, 37, 47,
- the two bulk switches 80, 81 may be connected to the control unit 7.
- each of the field effect transistors 17, 27, 37, 47, 57, 67, 77 can be connected in the same way according to one of the methods shown. However, the bulk connections can also be connected in various ways according to one of the methods shown. LIST OF REFERENCE NUMBERS
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Abstract
Description
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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GB0717501A GB2438147B (en) | 2005-03-18 | 2006-03-17 | Arrangement comprising a voltage converter for the voltage supply of an electrical load, and method |
JP2008501238A JP4777412B2 (ja) | 2005-03-18 | 2006-03-17 | 電気的負荷に電圧を供給する電圧コンバータ装置、及び、方法 |
US11/908,732 US7778055B2 (en) | 2005-03-18 | 2006-03-17 | Voltage converter |
Applications Claiming Priority (2)
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DE102005012662.6A DE102005012662B4 (de) | 2005-03-18 | 2005-03-18 | Anordnung mit Spannungskonverter zur Spannungsversorgung einer elektrischen Last und Verfahren zur Spannungsversorgung einer elektrischen Last |
DE102005012662.6 | 2005-03-18 |
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WO2006097328A2 true WO2006097328A2 (de) | 2006-09-21 |
WO2006097328A3 WO2006097328A3 (de) | 2006-11-30 |
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PCT/EP2006/002492 WO2006097328A2 (de) | 2005-03-18 | 2006-03-17 | Anordnung mit spannungskonverter zur spannungsversorgung einer elektrischen last und verfahren |
Country Status (6)
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US (1) | US7778055B2 (de) |
JP (1) | JP4777412B2 (de) |
CN (1) | CN101142735A (de) |
DE (1) | DE102005012662B4 (de) |
GB (1) | GB2438147B (de) |
WO (1) | WO2006097328A2 (de) |
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DE102006060011A1 (de) | 2006-12-19 | 2008-07-03 | Austriamicrosystems Ag | Spannungskonverter und Verfahren zur Spannungskonversion |
KR100855584B1 (ko) * | 2006-12-26 | 2008-09-01 | 삼성전자주식회사 | 불휘발성 반도체 메모리에 채용하기 적합한 전압레귤레이팅 회로 |
DE102007014384A1 (de) | 2007-03-26 | 2008-10-02 | Austriamicrocsystems Ag | Spannungskonverter und Verfahren zur Spannungskonversion |
US8174209B2 (en) | 2008-01-30 | 2012-05-08 | Texas Instruments Deutschland Gmbh | DC-DC converter and method for minimizing battery peak pulse loading |
US8502587B2 (en) * | 2009-12-22 | 2013-08-06 | Fairchild Semiconductor Corporation | Fast recovery voltage regulator |
US9077365B2 (en) | 2010-10-15 | 2015-07-07 | S.C. Johnson & Son, Inc. | Application specific integrated circuit including a motion detection system |
KR101773196B1 (ko) * | 2010-12-29 | 2017-09-12 | 엘지디스플레이 주식회사 | 액정표시장치의 직류-직류 변환기 |
DE102011003519A1 (de) | 2011-02-02 | 2012-08-02 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Regelung elektrischer Leuchtelemente |
CN201966793U (zh) * | 2011-02-22 | 2011-09-07 | 马丽娟 | 可设定电流值的驱动电路 |
DE102011112455A1 (de) * | 2011-09-03 | 2013-03-07 | Vision Components Gesellschaft für Bildverarbeitungsysteme mbH | Verfahren und elektronische Schaltung zur Stromversorgung für eine gepulste Beleuchtungsquelle |
CN103208252B (zh) * | 2012-01-11 | 2017-05-24 | 深圳富泰宏精密工业有限公司 | 显示屏发光二极管控制电路 |
EP2651185B1 (de) * | 2012-04-13 | 2017-11-01 | ams AG | Blitzlichttreiber zur Begrenzung des Laststroms eines Blitzlichts und Verfahren zur Begrenzung des Laststroms eines Blitzlichttreibers |
DE102012215727A1 (de) * | 2012-09-05 | 2014-03-20 | Zumtobel Lighting Gmbh | Kontrollgerät zur Steuerung und Spannungsversorgung von LEDs |
JP6075003B2 (ja) * | 2012-10-22 | 2017-02-08 | 富士通株式会社 | トランジスタの制御回路及び電源装置 |
CN103580000B (zh) * | 2013-10-21 | 2016-05-25 | 矽力杰半导体技术(杭州)有限公司 | 开关电源输出过压保护方法及电路及带该电路的开关电源 |
KR20170114579A (ko) | 2016-04-05 | 2017-10-16 | 주식회사 만도 | 전압 제어 방법 및 그 제어 시스템 |
CN108306492B (zh) * | 2017-01-13 | 2020-09-08 | 华润矽威科技(上海)有限公司 | 一种自适应输出电流去纹波电路及其去纹波方法 |
EP3355459B1 (de) | 2017-01-30 | 2020-01-29 | ams AG | Spannungswandler und verfahren zur spannungswandlung |
EP3661192B1 (de) | 2018-11-30 | 2022-10-05 | ams Sensors Belgium BVBA | Pixelsteuerungsspannungsgeneration unter verwendung einer ladungspumpe |
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- 2006-03-17 US US11/908,732 patent/US7778055B2/en not_active Expired - Fee Related
- 2006-03-17 CN CNA200680008272XA patent/CN101142735A/zh active Pending
- 2006-03-17 GB GB0717501A patent/GB2438147B/en not_active Expired - Fee Related
- 2006-03-17 WO PCT/EP2006/002492 patent/WO2006097328A2/de active Application Filing
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KR101084920B1 (ko) * | 2008-07-15 | 2011-11-17 | 인터실 아메리카스 인코포레이티드 | 복수의 led 스트링 상부로의 출력 전압 제어 방법 및 led 드라이버 컨트롤러 |
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Also Published As
Publication number | Publication date |
---|---|
GB0717501D0 (en) | 2007-10-17 |
CN101142735A (zh) | 2008-03-12 |
JP2008533966A (ja) | 2008-08-21 |
US20090016084A1 (en) | 2009-01-15 |
DE102005012662A1 (de) | 2006-09-21 |
GB2438147A (en) | 2007-11-14 |
GB2438147B (en) | 2008-06-25 |
DE102005012662B4 (de) | 2015-02-12 |
WO2006097328A3 (de) | 2006-11-30 |
US7778055B2 (en) | 2010-08-17 |
JP4777412B2 (ja) | 2011-09-21 |
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