WO2006083396A3 - Boucle a phase asservie a dephasage n-fractionnaire - Google Patents

Boucle a phase asservie a dephasage n-fractionnaire Download PDF

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Publication number
WO2006083396A3
WO2006083396A3 PCT/US2005/044839 US2005044839W WO2006083396A3 WO 2006083396 A3 WO2006083396 A3 WO 2006083396A3 US 2005044839 W US2005044839 W US 2005044839W WO 2006083396 A3 WO2006083396 A3 WO 2006083396A3
Authority
WO
WIPO (PCT)
Prior art keywords
fractional
signal
phase
phase detector
vco
Prior art date
Application number
PCT/US2005/044839
Other languages
English (en)
Other versions
WO2006083396A2 (fr
Inventor
Scott Robert Humphreys
Ryan Bunch
Barry Travis Hunt Jr
Original Assignee
Rf Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rf Micro Devices Inc filed Critical Rf Micro Devices Inc
Priority to EP05849398.2A priority Critical patent/EP1847012B1/fr
Publication of WO2006083396A2 publication Critical patent/WO2006083396A2/fr
Publication of WO2006083396A3 publication Critical patent/WO2006083396A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0966—Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/12—Indirect frequency synthesis using a mixer in the phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transmitters (AREA)

Abstract

La présente invention a trait à une boucle à phase asservie à déphasage N-fractionnaire. La boucle à phase asservie à déphasage N-fractionnaire comporte un diviseur fractionnaire, un détecteur de phase, un filtre à boucle, un oscillateur commandé en tension, et un circuit de rétroaction. Un circuit combinateur assure la combinaison d'une valeur de division fractionnaire initiale et d'un signal de modulation pour fournir une valeur de division fractionnaire combinée. Sur la base de la valeur de division fractionnaire, le diviseur N-fractionnaire divise une fréquence de référence et fournit une fréquence de référence divisée au détecteur de phase. Le détecteur de phase compare une phase de la fréquence de référence divisée à une phase d'un signal de rétroaction pour fournir un signal de comparaison. Le signal de comparaison est filtré par le filtre à boucle pour fournir un signal de commande à l'oscillateur commandé en tension, où le signal de commande contrôle une fréquence d'un signal de sortie de l'oscillateur commandé en tension. Le signal de sortie est traité par le circuit de rétroaction pour fournir le signal de rétroaction au détecteur de phase.
PCT/US2005/044839 2005-01-31 2005-12-12 Boucle a phase asservie a dephasage n-fractionnaire WO2006083396A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP05849398.2A EP1847012B1 (fr) 2005-01-31 2005-12-12 Boucle a phase asservie a dephasage n-fractionnaire

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/047,258 2005-01-31
US11/047,258 US7098754B2 (en) 2005-01-31 2005-01-31 Fractional-N offset phase locked loop

Publications (2)

Publication Number Publication Date
WO2006083396A2 WO2006083396A2 (fr) 2006-08-10
WO2006083396A3 true WO2006083396A3 (fr) 2006-11-02

Family

ID=36755910

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/044839 WO2006083396A2 (fr) 2005-01-31 2005-12-12 Boucle a phase asservie a dephasage n-fractionnaire

Country Status (3)

Country Link
US (3) US7098754B2 (fr)
EP (1) EP1847012B1 (fr)
WO (1) WO2006083396A2 (fr)

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TWI446722B (zh) * 2011-05-18 2014-07-21 Novatek Microelectronics Corp 鎖相迴路電路
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Also Published As

Publication number Publication date
EP1847012A2 (fr) 2007-10-24
US7288999B1 (en) 2007-10-30
US20060197613A1 (en) 2006-09-07
US7449960B2 (en) 2008-11-11
WO2006083396A2 (fr) 2006-08-10
US7098754B2 (en) 2006-08-29
EP1847012A4 (fr) 2012-03-14
US20060170505A1 (en) 2006-08-03
EP1847012B1 (fr) 2014-07-02

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