WO2006069843A1 - Demi-produit et composants supports fondes sur le demi-produit - Google Patents

Demi-produit et composants supports fondes sur le demi-produit Download PDF

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Publication number
WO2006069843A1
WO2006069843A1 PCT/EP2005/055725 EP2005055725W WO2006069843A1 WO 2006069843 A1 WO2006069843 A1 WO 2006069843A1 EP 2005055725 W EP2005055725 W EP 2005055725W WO 2006069843 A1 WO2006069843 A1 WO 2006069843A1
Authority
WO
WIPO (PCT)
Prior art keywords
semifinished product
vias
holes
plated
terminal
Prior art date
Application number
PCT/EP2005/055725
Other languages
German (de)
English (en)
Inventor
Georg Busch
Original Assignee
Siemens Home And Office Communication Devices Gmbh & Co. Kg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Home And Office Communication Devices Gmbh & Co. Kg filed Critical Siemens Home And Office Communication Devices Gmbh & Co. Kg
Priority to EP05813683A priority Critical patent/EP1832146A1/fr
Publication of WO2006069843A1 publication Critical patent/WO2006069843A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Definitions

  • the invention relates to a semi-finished product according to the preamble of claim 1.
  • the invention further relates to a carrier component according to the preamble of claim 6 or 7.
  • Circuits on a carrier component are necessary for the arrangement of the realized with nano-vias via hole and possibly for the tracks of the electrical circuits correspondingly formed templates that must be adapted to a respective changed electrical circuit image and thus each newly made ready.
  • the object of the present invention is, starting from a semifinished product of the type mentioned at the outset or starting from a carrier component of the type mentioned above, to improve the semifinished product or the carrier component in such a way that the expense for prototype production and small series with multiply modified electrical components Circuit diagrams is reduced.
  • This object is achieved with respect to the semifinished product according to the invention by such a semi-finished product having the features of the characterizing part of claim 1.
  • the object is achieved in that such a semifinished product formed with a flat base carrier material is the basis for further processing into a carrier strip or strip conductors and carrier component carrying electrical and / or electronic components.
  • the semifinished product has, independently of a later use or non-use of the nano-vias introduced into the semi-finished electrically usable through-contacts, which are arranged distributed over the entire surface of the semifinished product.
  • the respective plated-through holes have at the respective ends on each of the two-dimensional sides of the base support material electrically usable terminal yards and they are arranged at a mutual distance from one another, in a range of less than 1 micron to at least just below the upper limit of the microns Area can lie.
  • the mentioned stencil is needed when exposed to light emitting heavy ions which covers unexposed parts and keeps exposing parts open.
  • a flexible material is used as the base carrier material of the semifinished product. This makes it possible to provide particularly inexpensive foil strips as semifinished products, from which cost-appropriate conductor foil pieces can then be produced.
  • the arrangement of the plated-through holes follows a grid. With a grid can be statistically ensured that at one point of the semifinished product is a via, in the area of such a
  • this statistical probability is optimum when the grid is designed to be completely uniform, ie, constantly distributed. This makes the semifinished product actually useful for a universal application.
  • the electrical connection surfaces can be considered as a total of the copper total contacting the nano-vias of the plated-through holes. be formed layer, according to a one-sided or double-sided copper-coated Rohleiterplatte.
  • the printed conductors and electrical connection surfaces of the plated-through holes can then be left standing where they are needed when the electrical circuit diagram is produced. Where they are not needed, the remaining copper layer is at least eliminated so far that it is irrelevant to the subsequent function of the electrical circuit image produced.
  • a semifinished product having full-area copper layers is particularly advantageous as a raw material for, for example, printed circuit board manufacturers.
  • the latter still only has to carry out the general procedural steps for the formation of printed conductors, which would be, for example: etching the pattern on both sides of the raw material; Applying stopper paint; Applying a surface protection and processing contours to produce an individual circuit diagram.
  • the object is achieved, on the one hand, by using the semifinished product according to the invention and at least one single conductor being provided on at least one of the flat sides of the semifinished product, which is electrically connected to a terminal location of at least one single plated-through hole.
  • the course of the tracks is placed between the terminal stations of the through-contacts.
  • the object is also achieved in this case by using the semifinished product according to the invention and thereby eliminating the connection zones of unnecessary through-contacts, in which case the nano-vias formerly connected to these electrical connection stations are electrically isolated , As a result, space is created for the arrangement of the tracks, which now at least partially over the unnecessary for vias for electrical connections isolated nano-vias can be placed.
  • at least one single interconnect is present, which is electrically connected to a terminal of at least one single via.
  • FIGURE shows a detail of a carrier component 1 according to the invention, which is based on a semifinished product 2 according to the invention.
  • the semifinished product 2 is, as the figure indicates, further processed to the carrier component 1 and carries as such, just indicated, printed conductors 3 to 6, which may optionally include electrical and / or electronic components. The latter are not shown in detail in the figure.
  • the carrier component 1 comprises a base carrier material which is extended over a wide area. Over the entire areal extent of the base carrier material are distributed, preferably arranged in a uniform, so constant grid, a plurality of vias 7, each formed of a plurality of nano-vias. At the respective ends of the plated-through holes 7 on a respective surface side of the base carrier material, electrically conductive terminal studs 8 are provided, to which the printed conductors, for example, 3 and 6, are connected.
  • the mentioned base carrier material with the plated-through holes 7 and the connection zones 8, without the strip conductors 3 to 6, is an example of the above-mentioned semifinished product 2.
  • the distances between the plated-through holes 7 are selected in a range of less than 1 micron to at least just below the upper limit of the micron range. In the present embodiment, this distance is 3.2 microns.
  • a larger area 9 is shown on the lower side of the base carrier material, which extends over a plurality of plated-through holes 7. This area is an electrically conductive, to
  • On the upper side of the base support material could be connected to the individual relevant vias 7 traces, which distribute themselves individually. In the figure, such traces are not shown in detail.
  • the conductor track 6 runs on the underside of the base carrier material, while the conductor tracks 3 to 5 run on top of the base carrier material.
  • the strip conductors 3 to 6 show, in the present exemplary embodiment the strip conductors run between the connection zones 8.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

L'invention concerne un demi-produit (2) ainsi qu'un composant support (1) ainsi obtenu, destiné à des images de couplage électriques placées dessus, l'objectif de l'invention étant fabriquer de manière peu coûteuse et rapide un prototype ou des petites séries. A cet effet, le demi-produit (2) comprend un matériau support de base, présentant une forme plate, par exemple flexible, des contacts (7) traversants formés par des nanotrous de raccordement, disposés dans la totalité de sa partie plate à une vitesse constante. Ledit composant peut être réalisé avec un seul moule pour l'éclairage, ce qui permet la formation des nanotrous de raccordement. Grâce à ce composant, des images de circuit présentant un aspect souhaité sur leurs surfaces peuvent être réalisées.
PCT/EP2005/055725 2004-12-28 2005-11-03 Demi-produit et composants supports fondes sur le demi-produit WO2006069843A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP05813683A EP1832146A1 (fr) 2004-12-28 2005-11-03 Demi-produit et composants supports fondes sur le demi-produit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004063112 2004-12-28
DE102004063112.3 2004-12-28

Publications (1)

Publication Number Publication Date
WO2006069843A1 true WO2006069843A1 (fr) 2006-07-06

Family

ID=36168525

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2005/055725 WO2006069843A1 (fr) 2004-12-28 2005-11-03 Demi-produit et composants supports fondes sur le demi-produit

Country Status (2)

Country Link
EP (1) EP1832146A1 (fr)
WO (1) WO2006069843A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4720915A (en) * 1986-03-25 1988-01-26 True Grid, Ltd. Printed circuit board and process for its manufacture
US4770900A (en) * 1984-03-09 1988-09-13 Hoechst Aktiengesellschaft Process and laminate for the manufacture of through-hole plated electric printed-circuit boards
FR2612356A1 (fr) * 1987-03-13 1988-09-16 Thomson Csf Carte de circuit imprime pour la realisation de prototypes
US4829404A (en) * 1987-04-27 1989-05-09 Flexmark, Inc. Method of producing a flexible circuit and master grid therefor
DE9401092U1 (de) * 1993-04-21 1995-01-05 Will Werner Schaltungsträger mit Zusatzkontaktierelementen
US20030068877A1 (en) * 2001-10-10 2003-04-10 Kinsman Larry D. Circuit boards containing vias and methods for producing same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE526006C2 (sv) * 2003-04-29 2005-06-14 Senseair Ab Behandlat tunnfilmssubstrat

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4770900A (en) * 1984-03-09 1988-09-13 Hoechst Aktiengesellschaft Process and laminate for the manufacture of through-hole plated electric printed-circuit boards
US4720915A (en) * 1986-03-25 1988-01-26 True Grid, Ltd. Printed circuit board and process for its manufacture
FR2612356A1 (fr) * 1987-03-13 1988-09-16 Thomson Csf Carte de circuit imprime pour la realisation de prototypes
US4829404A (en) * 1987-04-27 1989-05-09 Flexmark, Inc. Method of producing a flexible circuit and master grid therefor
DE9401092U1 (de) * 1993-04-21 1995-01-05 Will Werner Schaltungsträger mit Zusatzkontaktierelementen
US20030068877A1 (en) * 2001-10-10 2003-04-10 Kinsman Larry D. Circuit boards containing vias and methods for producing same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1832146A1 *

Also Published As

Publication number Publication date
EP1832146A1 (fr) 2007-09-12

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