WO2006034767A1 - Dispositif electrique et procede de production d'un dispositif electrique - Google Patents
Dispositif electrique et procede de production d'un dispositif electrique Download PDFInfo
- Publication number
- WO2006034767A1 WO2006034767A1 PCT/EP2005/009406 EP2005009406W WO2006034767A1 WO 2006034767 A1 WO2006034767 A1 WO 2006034767A1 EP 2005009406 W EP2005009406 W EP 2005009406W WO 2006034767 A1 WO2006034767 A1 WO 2006034767A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- metallization
- arrangement according
- substrate
- electrical
- component
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000000034 method Methods 0.000 title description 13
- 238000001465 metallisation Methods 0.000 claims abstract description 86
- 239000000758 substrate Substances 0.000 claims abstract description 82
- 239000004020 conductor Substances 0.000 claims abstract description 54
- 239000000463 material Substances 0.000 claims description 27
- 238000005507 spraying Methods 0.000 claims description 16
- 238000009413 insulation Methods 0.000 claims description 14
- 239000000919 ceramic Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052799 carbon Inorganic materials 0.000 claims description 2
- 229910052748 manganese Inorganic materials 0.000 claims description 2
- 239000011572 manganese Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 229910001006 Constantan Inorganic materials 0.000 claims 1
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 238000007745 plasma electrolytic oxidation reaction Methods 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 16
- 239000002245 particle Substances 0.000 description 14
- 229910052802 copper Inorganic materials 0.000 description 13
- 239000010949 copper Substances 0.000 description 13
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- 239000007858 starting material Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 239000000945 filler Substances 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 239000012212 insulator Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000035882 stress Effects 0.000 description 4
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- 238000001816 cooling Methods 0.000 description 3
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- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000003064 anti-oxidating effect Effects 0.000 description 2
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- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000006056 electrooxidation reaction Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000000615 nonconductor Substances 0.000 description 2
- 238000012856 packing Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 229910016570 AlCu Inorganic materials 0.000 description 1
- 229910000789 Aluminium-silicon alloy Inorganic materials 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910000896 Manganin Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
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- 230000006378 damage Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 230000009760 functional impairment Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05B—SPRAYING APPARATUS; ATOMISING APPARATUS; NOZZLES
- B05B7/00—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas
- B05B7/0012—Apparatus for achieving spraying before discharge from the apparatus
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05B—SPRAYING APPARATUS; ATOMISING APPARATUS; NOZZLES
- B05B7/00—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas
- B05B7/0075—Nozzle arrangements in gas streams
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
- B05B—SPRAYING APPARATUS; ATOMISING APPARATUS; NOZZLES
- B05B7/00—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas
- B05B7/14—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas designed for spraying particulate materials
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B05B—SPRAYING APPARATUS; ATOMISING APPARATUS; NOZZLES
- B05B7/00—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas
- B05B7/16—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas incorporating means for heating or cooling the material to be sprayed
- B05B7/1606—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas incorporating means for heating or cooling the material to be sprayed the spraying of the material involving the use of an atomising fluid, e.g. air
- B05B7/1613—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas incorporating means for heating or cooling the material to be sprayed the spraying of the material involving the use of an atomising fluid, e.g. air comprising means for heating the atomising fluid before mixing with the material to be sprayed
- B05B7/162—Spraying apparatus for discharge of liquids or other fluent materials from two or more sources, e.g. of liquid and air, of powder and gas incorporating means for heating or cooling the material to be sprayed the spraying of the material involving the use of an atomising fluid, e.g. air comprising means for heating the atomising fluid before mixing with the material to be sprayed and heat being transferred from the atomising fluid to the material to be sprayed
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C24/00—Coating starting from inorganic powder
- C23C24/02—Coating starting from inorganic powder by application of pressure only
- C23C24/04—Impact or kinetic deposition of particles
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
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- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2499—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids
- H01L2224/24996—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/24998—Reinforcing structures, e.g. ramp-like support
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- H01L2224/732—Location after the connecting process
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- H01L2224/82007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1333—Deposition techniques, e.g. coating
- H05K2203/1344—Spraying small metal particles or droplets of molten metal
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- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/17—Post-manufacturing processes
- H05K2203/173—Adding connections between adjacent pads or conductors, e.g. for modifying or repairing
Definitions
- the invention relates to an electrical arrangement having a substrate with at least one electrical component and / or a printed conductor on which at least one metallization is applied.
- the invention is in the field of electrical and electronic construction and circuit technology, in particular power semiconductor circuit technology, and is an electrical arrangement, in particular for electrical contacting and / or heat dissipating or heat-conducting assembly of electrical components , and directed to a method for producing such an arrangement.
- component is to be understood widely in the context of the present invention and generally includes circuit elements such as semiconductors (eg power transistors and diodes), integrated components (ICs), passive components but also other electrical elements such as eg Heating elements, conductors, printed conductors and structural elements - such as e.g. On closing contacts and the like.
- circuit elements such as semiconductors (eg power transistors and diodes), integrated components (ICs), passive components but also other electrical elements such as eg Heating elements, conductors, printed conductors and structural elements - such as e.g. On closing contacts and the like.
- Such components are often operated in high packing or power density and convert electrical energy into heat energy. This leads to a heating of the components, which can lead to a functional impairment and at worst to a destruction of the components. Therefore, for a reliable dissipation of the operational arising .
- a component e.g. an electric heater, which is arranged isolated from a heat-receiving component, to realize a heat flow with low thermal resistance to the component.
- US Pat. No. 5,559,374 discloses an electrical arrangement of the type mentioned in the introduction and a method for the production thereof.
- the known arrangement comprises a metallic substrate, on the upper side of which a multilayer film is laminated by means of so-called thermo-setting under pressure and heat.
- This consists of an upper-side copper foil and an underlying plastic carrier foil.
- the plastic forms an insulating layer.
- photo-etching can then be used to produce copper structures which form mounting regions and interconnects. Reflow soldering in the mounting areas on the copper structures produces thick film
- Conductors are formed, with which by means of the reflow soldering process copper plates are soldered, which are designed for a high current flow.
- the copper plates serve with in ⁇ tegralen extensions for external connection to power-side high current lines.
- On the copper plates are components in the form of power semiconductors such. Soldered IGBTs.
- the object of the present invention is therefore to specify an arrangement and a method for its production which can be produced simply and inexpensively at particularly high maximum permissible operating temperatures even in the area of complicated substrate topologies.
- the electrical arrangement comprises a substrate on which at least one electrical component, for example a power semiconductor such as an IGBT, and / or a conductor track is or is arranged. At least one cold gas sprayed metallization is applied to the substrate.
- An essential aspect of the invention is therefore that by means of known cold gas spraying a Metalli ⁇ tion for interconnection and / or recording or fixing e- lektrischer or mechanical components is used.
- the coating material is not molten or melted, in contrast to known common spraying processes. Rather, the coating material in fine or very fine powder form - the powder particles have a size of, for example, 1 .mu.m to 50 .mu.m - accelerated in ei ⁇ nem to.
- the powder particles reach speeds of about 300 m / s to 1200 m / s.
- the gas stream may preferably have an anti-oxidizing effect on the particles.
- the particles deform on impact on the substrate and form a dense and firmly adhering layer thereon.
- any surface oxides formed on the substrate are advantageously also broken up and a micro-friction between the particles results Such an increase in temperature causes microwelding to occur at the contact surfaces.
- the inventive arrangement is superior in its electrical, thermal and mechanical properties: To view Lotver ⁇ bonds already when heated above about 115 0 C, a sig ⁇ nifikante change their mechanical properties - which he find contemporary arrangement On the other hand, they are still mechanically stable in these temperature ranges.
- a particularly advantageous aspect in the arrangement according to the invention is that not only thin, but also comparatively larger layer thicknesses or structures can be realized by means of cold gas spraying. Thicker structures are advantageous with regard to the heat conduction and the minimization of the electrical line resistance.
- This arrangement can also be realized, which are characterized by a particularly homogeneous, reliable and even on Berei ⁇ surfaces with complex geometries reliable metallization.
- Another essential aspect of the invention is that a large number of starting materials can be used which, for example, have a comparatively low heat resistance and thus an effective heat flow, for example of components to the substrate (heat dissipation) or of a heating device. tion to a component to be heated (heat) on the substrate allow.
- the properties of the metallization can thus be directly influenced.
- the choice of copper, silver or gold as starting material the realization of extremely low-ohmic, good heat-conducting metallizations.
- Such low-resistance metallizations are especially in the high current range at low operating voltages - such. in automotive engineering - advantageous.
- the metallization may also preferably itself form a conductor track. According to a further preferred embodiment of the invention, this conductor forms a surface which serves for electromagnetic shielding against EMC interference.
- the metallization may be used to form electrical resistances, preferably of a resistive material, such as, e.g. Konstantan or Manginan exist.
- the resistor regions thus formed are inexpensive and easy to implement and, because of their proximity to the substrate, are characterized by a good thermal connection to the substrate.
- the resistance values can be determined by appropriate design of the resistive material
- Layer thickness and / or layer geometry are additionally adapted to the respective requirements.
- the material known under the name Konstantan is usually an alloy of 55% copper and 45% nickel, which is characterized by a constant in a wide temperature range electrical resistance.
- An alloy (86% copper / 12% manganese / 2% nickel) with a similar low Temperature coefficient is commercially available under the name Manganin.
- the metallization can preferably also be a valve metal or a valve metal alloy which is or preferably at least partially anodically oxidized.
- Valve metals are generally understood to mean metals which, in the case of anodic polarity, overlap with an oxide layer which does not become conductive (strikes through) even at high voltages.
- insulation layers can be selectively produced on a previously cold-sprayed metallization.
- the valve metal used is preferably aluminum, magnesium, titanium, zirconium or tantalum and as the valve metal alloy AlCu, AlCuMg, AlMg, AlZnMg, AlZnMgCu, AlSiCu, AlMgSi, AlSi, AlMn or AlMgMn.
- the metallization may be applied to an electrical insulator such as e.g. be sprayed a ceramic substrate.
- a substrate is used which consists of a relatively soft base material (e.g., plastic) into which hard fillers or packing (e.g., ceramic powder) are incorporated.
- the soft base material is at least partially removed during the cold gas spraying, so that the actual coating comes into contact to a greater extent with the har ⁇ th fillers. As a result, a particularly solid and hard coating can be realized.
- Substrate surface and metallization provided an insulating layer.
- aluminum may be applied to a ceramic (for example SiC or A12O3) and oxidized to form an insulating layer, preferably by plasma electrochemical oxidation (PEO).
- a metallization can then be sprayed onto this insulating layer, on which in turn e.g. an electrical component can be mounted and contacted.
- this metallization can also be oxidized to form an insulation layer. In this way, a multi-layered construction - also using different materials - is possible to better compensate for thermally induced stresses and to achieve an improved mechanical behavior.
- the invention plays one of its particular advantages, namely the comparatively low thermal load of the substrate. Since the metallization is associated with only a very small amount of heat input, hardly any thermally induced mechanical stresses arise and thus no deflections or deformations of the substrate (as for example in conventional DCB (Direct Copper Bonding) technology). Therefore, according to the invention, it is also possible to metallize arrangements with comparatively large surfaces, which requires considerably more effort in traditional technology. Further reduction of thermal stress can be achieved by using mechanical buffers - e.g. Molybdenum - be applied as an intermediate layer in the cold gas spraying process.
- mechanical buffers e.g. Molybdenum
- the metallization may preferably have at least one recess or geometric depression-referred to as a countersunk hole for short. net - fill out. In this way, the mechanical connection between the substrate and the metallization is improved and, if required, contacting of deeper substrate regions or connection of a component electrically insulated on the substrate with the substrate is possible and the heat conduction into or out of the volume of the substrate is improved ,
- connection contacts can also be formed as integral constituents.
- this can preferably be realized by virtue of the fact that by means of a mask applied during the cold gas spraying process, e.g. a high standing pin or contact extension is formed.
- the metallization is an additional material, for example silicon, ceramic and / or carbon, attached.
- advantageously parameters - such as e.g. the hardness, the Leit ⁇ ability or the thermal expansion coefficient - the metallization depending on the application and needs can be adjusted.
- Another essential advantage of the invention consists - as already mentioned - in that comparatively thick or massive metallizations can be produced with little effort and low thermal stress on the substrate or the structures formed thereon.
- an embodiment of the invention is preferred in which the metallization forms an electrical connection between two conductors, of which at least one conductor is arranged on the substrate.
- the metallization represents a material and possibly a positive connection. fertilize.
- This compound also has the advantage that it has a very wide range of applications, is extremely low-resistance, good heat-conducting and yet thermally and mechanically very stable. It is therefore also ideally suited for applications with very high electric currents.
- one of the conductors may be used as a terminal, e.g. be designed as a pin or eyelet.
- the connection contact is mechanically supported by a housing.
- a production-wise advantageous arrangement according to the invention which is preferred for a particularly compact and protected arrangement of a component on a substrate, provides that a base metallization is applied to the substrate. On this at least one electrical Bau ⁇ part is arranged and the component is at least partially surrounded by a circuit board.
- the metallization realizes an electrical connection between the component and the circuit board.
- the component can be placed in a recess of the circuit board and the component to be surrounded by insulation.
- the insulation may be formed by a sealing and insulating material, eg a plastic or resin.
- the insulation can surround the component like a ring, so that there is an upper opening or recess through which the metallization can be applied in order to contact the component in the desired manner.
- the arrangement according to the invention can also be configured in that the cold-sprayed metallization connects a plurality of conductor tracks on different spatial levels. According to a preferred embodiment of the invention, it is provided that the metallization connects an electrical conductor arranged on the substrate in a first plane to an electrical conductor which is arranged in a second plane on the substrate.
- the invention also relates to a method for producing an electrical arrangement with the aim of applying an electrically conductive layer or a conductive connection region with excellent electrical and thermal conductivity properties with high thermal and mechanical stability to a substrate substantially free of stress.
- This object is achieved according to the invention by arranging a component and / or a printed conductor on a substrate and applying a metallization by cold gas spraying, which contacts the component and / or the printed conductor electrically.
- the substrate is preferably masked during cold gas spraying; In this way, it is possible to apply targeted targeted metallization to desired substrate areas.
- an advantageous further development of the method according to the invention provides that the substrate is aligned with its upper surface in relation to a support plane of a support, at least one electrical connection contact is formed by cold gas spraying of a metallization which is the Closing contact extends at least partially on the support plane, and the carrier is removed after completion of the terminal contact.
- FIG. 1 shows the basic structure of a device for producing an arrangement according to the invention and for carrying out the method according to the invention
- FIG. 2 shows a device modified relative to FIG. 1 for producing a device with a connection
- FIG. 3 shows an arrangement with a connection contact protruding from a connection plane
- FIG. 4 shows a modified arrangement compared to FIG. 3
- FIG. 5 shows an arrangement with a component
- FIG. 6 shows a further arrangement with a component
- FIG. 7 shows a further arrangement with a component that is insulated and protected
- FIG. 8 shows an arrangement with an electrical shield
- FIG. 9 shows an arrangement with a connection of two conductors in different planes
- Figure 10 shows an arrangement with contact terminals
- Figure 11 shows the conditions when using a substrate made of a soft base material, which is filled with hard grains.
- an anti-oxidizing conveying gas 1 flows at a pressure of 15 to 35 bar into a device 2 and is heated to a few 100 ° C. by means of heating elements 3.
- copper is supplied in the form of the finest copper particles 6 as the starting material (coating material). These are not melted or melted in contrast to known common spraying method, but accelerated by the high-pressure gas flow in a fine powder form from a nozzle 7 as a jet on an upper surface 8 of a ceramic substrate 9.
- the powder particles reach speeds of about 300 to 1200 m / s.
- the comparatively high kinetic energy deforms the particles when they impact the upper side 8, thereby forming a solid "entangled" copper layer in the form of a metallization 10.
- the metallization forms in this simple embodiment, a conductor 11, which can serve for elekt ⁇ cal contacting and / or heat dissipation from a component, not shown.
- the metallization 10 can fill a suggestively lowered recess 9a in the substrate 9 in order, for example, to realize an improved heat conduction from the substrate.
- a resistance material IIa such as Konstantan or manginane as starting material 5 can also directly electrical resistances are formed on the substrate, which are characterized by a good thermal connection to the substrate and thus by a good dissipation ent ⁇ standing in the heat resistance.
- FIG. 2 shows a device modified with respect to FIG. 1, in which the irradiation of the surface 8 of the substrate 9 with particles 6 takes place from the nozzle 7 in the vertical direction 12.
- two conductor tracks 14, 15 are arranged on the upper side 8. These are electrically connected to one another by the cold-sprayed, highly conductive and mechanical resistant connection 16.
- the substrate is designed here as an insulator (ceramic). However, it is also conceivable to manufacture the substrate from a conductive material (for example aluminum) and to realize an insulation to the substrate by providing an insulating layer on the substrate.
- aluminum can be applied to a ceramic (for example SiC or A12O3) and oxidized to form an insulating layer, preferably by plasma electrochemical oxidation (PEO).
- a metallization can then be sprayed onto this insulating layer, on which in turn e.g. An electrical component can be mounted and contacted.
- this metallization can also be oxidized to form an insulation layer. In this way, a multilayer construction is possible.
- FIG. 3 shows an arrangement with a connection contact projecting from a connection plane;
- an electrical conductor 18 is arranged as a connection element or connection contact 19 on the substrate 9 and connected to a further conductor 20 by a cold-sprayed metallization 21.
- the Conductor 18 extends at right angles out of the connecting plane and is supported by a housing 22, which is indicated only schematically. The housing thus absorbs the external mechanical forces acting on the terminal contact and thus protects the connection. It can be seen that the metallization in a double function not only effects the electrical connection, but also the mechanical fixation of the conductor 18 on the upper side of the conductor 20.
- FIG. 4 shows a modified arrangement with respect to FIG. 3, in which the conductor 18 lies with its connection-side end in the same plane as the conductor 20 and is connected via a cold-sprayed metallization 23 and fixed mechanically on the substrate 9.
- the portion of the conductor 18 forming the terminal contact 19 may be supported by a relief or a housing as shown in FIG.
- Figure 5 shows an arrangement with a substrate 9, on which an electrical conductor 25 is applied.
- an electrical component 26 On the conductor 25 is an electrical component 26.
- an electrical insulator 27 made of plastic, which has a sealing and insulating circumferential lip. This insulates the edge of the component and is essentially ring-shaped.
- an opening 28 is provided, through which the cold-sprayed metallization 29 penetrates and forms a connection through which the upper side of the component is contacted by means of an integrally formed conductor track.
- FIG. 6 shows a further arrangement with a component similar to the embodiment according to FIG.
- a metallization 30 is applied to a substrate or carrier material 9, on which a power semiconductor (component) 31, for example an IGBT, is arranged and with its lower connection electrode is electrically connected.
- a power semiconductor (component) 31 for example an IGBT
- the edge region of the component 31 is covered by an insulator 32 for protection and insulation.
- a circuit board 33 is arranged, which has an opening or a recess 34 for the component.
- the upper side 35 of the circuit board 33 is provided with copper chasing or conductor tracks 36 known per se, with which the component 31 is electrically connected by means of a cold-sprayed metallization 37.
- the metallization also ensures a mechanically fixed fixation of the component in this arrangement.
- On the metallization 37 may preferably be mounted for heat dissipation, a cooling element 38 or a heat sink.
- FIG. 7 shows a further arrangement with a substrate or carrier element 9 and with a component 40 insulated and protected thereon.
- the substrate On its upper side 8, the substrate has at least two interconnects 41, 42 insulated from one another.
- the component 40 is connected via small electrical Ver ⁇ connecting elements 43 with its underside with the conductor 42 -. by soldering - electrically connected.
- Component 40, the Ardiemente 43 and the conductor 42 below the component are Tin-sprayed metallization 46, an electrical connection of the component top side 47 to the conductor track 41 is realized.
- FIG. 8 shows a perspective view of an embodiment of the invention in which a metallization 50 is designed for electrical shielding or against EMC interference.
- the metallization 50 - as explained in detail in connection with FIG. 1 - can be cold-sprayed onto the (inner) surface 51 of a nonconductive substrate 53 designed as a housing shell.
- a highly conductive starting material such as copper or gold. This can prevent electromagnetic interference from leaking out of or entering the housing 53.
- the metallization could also be applied to the outer surface 54 of the housing shell 53.
- the housing shell may cover another substrate 55, which may be metallized as described above, for example.
- FIG. 9 shows an arrangement with a connection of two conductors in different planes.
- a substrate 9 has a first plane 60 with a metallic coating or conductor track 61 and a second plane 62 with a coating or conductor track 63.
- a metallization 65 is provided, which is made of a cold-sprayed, highly conductive material, such as e.g. Copper exists. This extends under conductive connection of the conductor tracks 61, 63 through a recess 66 in the substrate.
- the recess is conical, that is designed with mutually facing bevels. This allows for a preferred perpendicular irradiation of the substrate through a mask 67 having openings 68, 69 therethrough.
- the metallization 65 is generated through the opening 68, as are material residues 70 in this mask region.
- a metallization or a particle beam 6 is also shown through the opening 69.
- several mask openings can be irradiated simultaneously.
- a substrate for Koch ⁇ head mounting (flip-chip) of a component can be realized.
- the interconnects can also serve for external contacting of the component.
- FIG. 10 shows an embodiment of the method according to the invention for producing an arrangement with partially free cantilever-type contact connections.
- a substrate 9 is here aligned with its upper side 8 in relation to a support plane 71 of a carrier 72 indicated only by dashed lines, flat and flush. Subsequently, as explained in detail, e.g. By masking at least one electrical connection contact 74, 75, 76, 77 by cold gas spraying of Me ⁇ tall isten 78 formed.
- the metallizations are in each case in electrical contact with a connection surface 81, 82, 83, 84.
- the substrate surface is therefore in one plane with a surrounding carrier substrate (indicated by dashed lines) which, after completion of the process Metallizations is removed. This results in the protruding crest-carrier-like connection contacts recognizable in FIG.
- a support of the terminal contacts by e.g. housing-side elements take place.
- FIG. 11 shows the conditions when using a substrate 90 made of a soft base material which is filled with hard grains.
- the initial state of the substrate is shown schematically on the left in FIG. 11; softer base material (e.g., plastic) 91 and filler particles or grains 92 of a hard material, e.g. Ceramic grains.
- connection 18 conductor
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Coating By Spraying Or Casting (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004047357A DE102004047357A1 (de) | 2004-09-29 | 2004-09-29 | Elektrische Anordnung und Verfahren zum Herstellen einer elektrischen Anordnung |
DE102004047357.9 | 2004-09-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006034767A1 true WO2006034767A1 (fr) | 2006-04-06 |
Family
ID=35124727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2005/009406 WO2006034767A1 (fr) | 2004-09-29 | 2005-09-01 | Dispositif electrique et procede de production d'un dispositif electrique |
Country Status (2)
Country | Link |
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DE (1) | DE102004047357A1 (fr) |
WO (1) | WO2006034767A1 (fr) |
Cited By (1)
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US20210400800A1 (en) * | 2018-10-30 | 2021-12-23 | Kyocera Corporation | Board-like structure and heater system |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006027085B3 (de) * | 2006-06-10 | 2008-01-03 | WKW Erbslöh Automotive GmbH | Verfahren zum Verbinden von Bauteilen und danach hergestellte Verbindungen |
DE102006037532A1 (de) | 2006-08-10 | 2008-02-14 | Siemens Ag | Verfahren zur Erzeugung einer elektrischen Funktionsschicht auf einer Oberfläche eines Substrats |
JP4586823B2 (ja) * | 2007-06-21 | 2010-11-24 | トヨタ自動車株式会社 | 成膜方法、伝熱部材、パワーモジュール、車両用インバータ、及び車両 |
DE102007029422A1 (de) * | 2007-06-26 | 2009-01-08 | Behr-Hella Thermocontrol Gmbh | Thermische Kontaktierung eines Leistungsbauelements auf einem Schaltungsträger durch Kaltgasspritzen |
DE102007050405B4 (de) * | 2007-10-22 | 2010-09-09 | Continental Automotive Gmbh | Elektrische Leistungskomponente, insbesondere Leistungshalbleiter-Modul, mit einer Kühlvorrichtung und Verfahren zum flächigen und wärmeleitenden Anbinden einer Kühlvorrichtung an eine elektrische Leistungskomponente |
DE102008003616A1 (de) * | 2008-01-09 | 2009-07-23 | Siemens Aktiengesellschaft | Verfahren zur Verbindung mehrerer Teile durch Kaltgasspritzen |
DE102008011248A1 (de) * | 2008-02-26 | 2009-09-03 | Maschinenfabrik Reinhausen Gmbh | Verfahren zur Herstellung von Leiterplatten mit bestückten Bauelementen |
DE102011017521A1 (de) * | 2011-04-26 | 2012-10-31 | Robert Bosch Gmbh | Elektrische Anordnung mit Beschichtung und Getriebeanordnung mit einer solchen Anordung |
DE102011076773A1 (de) * | 2011-05-31 | 2012-12-06 | Continental Automotive Gmbh | Verfahren zur Herstellung einer integrierten Schaltung |
US9406646B2 (en) | 2011-10-27 | 2016-08-02 | Infineon Technologies Ag | Electronic device and method for fabricating an electronic device |
DE102011089927A1 (de) * | 2011-12-27 | 2013-06-27 | Robert Bosch Gmbh | Kontaktsystem mit einem Verbindungsmittel und Verfahren |
WO2018092798A1 (fr) | 2016-11-18 | 2018-05-24 | 矢崎総業株式会社 | Procédé de formation de corps de circuit et corps de circuit |
DE102017003977A1 (de) | 2017-04-25 | 2018-10-25 | e.solutions GmbH | Gehäusebauteil für ein elektronisches Gerät, Verfahren zum Herstellen des Gehäusebauteils und elektronisches Gerät mit dem Gehäusebauteil |
DE102017213930A1 (de) * | 2017-08-10 | 2019-02-14 | Siemens Aktiengesellschaft | Verfahren zur Herstellung eines Leistungsmoduls |
DE102018208925A1 (de) * | 2018-06-06 | 2019-12-12 | Bayerische Motoren Werke Aktiengesellschaft | Verfahren zum Abschirmen von Bauteilen |
EP3613872A1 (fr) * | 2018-08-21 | 2020-02-26 | Siemens Aktiengesellschaft | Procédé de fabrication d'une pièce structurelle pour un composant électrique ou électronique ainsi que pièce structurelle |
Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2746225A1 (de) * | 1977-09-14 | 1979-03-22 | Bbc Brown Boveri & Cie | Verfahren zur herstellung von lokalen anodischen oxidschichten |
DE3509022A1 (de) * | 1984-04-18 | 1985-11-07 | Villamosipari Kutató Intézet, Budapest | Verfahren zur herstellung von elektrischen kontaktteilen |
DE3909677A1 (de) * | 1989-03-23 | 1990-09-27 | Siemens Ag | Spritzzusatz zum thermischen spritzen loetfaehiger schichten elektrischer bauelemente |
US5302414A (en) * | 1990-05-19 | 1994-04-12 | Anatoly Nikiforovich Papyrin | Gas-dynamic spraying method for applying a coating |
US5559374A (en) * | 1993-03-25 | 1996-09-24 | Sanyo Electric Co., Ltd. | Hybrid integrated circuit |
DE10045783A1 (de) * | 2000-05-08 | 2001-11-22 | Ami Doduco Gmbh | Verfahren zum Herstellen von Werkstücken, welche der Leitung von elektrischem Strom dienen und mit einem überwiegend metallischen Material beschichtet sind |
DE10222271A1 (de) * | 2002-05-18 | 2003-06-26 | Leoni Ag | Verfahren zur Erhöhung der Widerstandsfähigkeit einer elektrischen Kontaktverbindung zwischen zwei Kontaktteilen und elektrische Kontaktverbindung |
WO2003070524A1 (fr) * | 2002-02-22 | 2003-08-28 | Leoni Ag | Procede pour produire une piste conductrice sur un composant support et composant support |
US20030175559A1 (en) * | 2002-03-15 | 2003-09-18 | Morelli Donald T. | Kinetically sprayed aluminum metal matrix composites for thermal management |
EP1351562A2 (fr) * | 2002-04-02 | 2003-10-08 | Delphi Technologies, Inc. | Blindage contre les interférences electromagnétiques pour le conditionnement par surmoulage d'un ensemble électronique |
EP1365637A2 (fr) * | 2002-05-23 | 2003-11-26 | Delphi Technologies, Inc. | Circuit de cuivre formé par pulvérisation cinétique |
US20040101620A1 (en) * | 2002-11-22 | 2004-05-27 | Elmoursi Alaa A. | Method for aluminum metalization of ceramics for power electronics applications |
WO2004060579A1 (fr) * | 2002-12-17 | 2004-07-22 | Research Foundation Of The State University Of New York | Impression directe de motifs conducteurs metalliques sur des surfaces isolantes |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2556696A1 (de) * | 1975-12-17 | 1977-06-30 | Renz Hans Werner Dipl Ing | Verfahren zur herstellung von verteilten rc-elementen in duennschichttechnik |
DE3106587A1 (de) * | 1981-02-21 | 1982-09-02 | Heraeus-Elektroden Gmbh, 6450 Hanau | "elektrode" |
DE3304672C3 (de) * | 1983-02-11 | 1993-12-02 | Ant Nachrichtentech | Verfahren zur Kontaktierung von Körpern und seine Anwendung |
US4561954A (en) * | 1985-01-22 | 1985-12-31 | Avx Corporation | Method of applying terminations to ceramic bodies |
WO1994007611A1 (fr) * | 1992-10-01 | 1994-04-14 | Motorola, Inc. | Procede de formation de circuits par atomisation au pochoir |
DE19818375A1 (de) * | 1998-04-24 | 1999-11-04 | Dornier Gmbh | PTCR-Widerstand |
JP2000244100A (ja) * | 1999-02-24 | 2000-09-08 | Yazaki Corp | 溶射回路体及びその製造方法 |
DE19963391A1 (de) * | 1999-12-28 | 2001-07-05 | Bosch Gmbh Robert | Handwerkzeugmaschine, mit einem elektromotorischen Antrieb |
DE10162276C5 (de) * | 2001-12-19 | 2019-03-14 | Watlow Electric Manufacturing Co. | Rohrförmiger Durchlauferhitzer und Heizplatte sowie Verfahren zu deren Herstellung |
-
2004
- 2004-09-29 DE DE102004047357A patent/DE102004047357A1/de not_active Ceased
-
2005
- 2005-09-01 WO PCT/EP2005/009406 patent/WO2006034767A1/fr active Application Filing
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2746225A1 (de) * | 1977-09-14 | 1979-03-22 | Bbc Brown Boveri & Cie | Verfahren zur herstellung von lokalen anodischen oxidschichten |
DE3509022A1 (de) * | 1984-04-18 | 1985-11-07 | Villamosipari Kutató Intézet, Budapest | Verfahren zur herstellung von elektrischen kontaktteilen |
DE3909677A1 (de) * | 1989-03-23 | 1990-09-27 | Siemens Ag | Spritzzusatz zum thermischen spritzen loetfaehiger schichten elektrischer bauelemente |
US5302414A (en) * | 1990-05-19 | 1994-04-12 | Anatoly Nikiforovich Papyrin | Gas-dynamic spraying method for applying a coating |
US5302414B1 (en) * | 1990-05-19 | 1997-02-25 | Anatoly N Papyrin | Gas-dynamic spraying method for applying a coating |
US5559374A (en) * | 1993-03-25 | 1996-09-24 | Sanyo Electric Co., Ltd. | Hybrid integrated circuit |
DE10045783A1 (de) * | 2000-05-08 | 2001-11-22 | Ami Doduco Gmbh | Verfahren zum Herstellen von Werkstücken, welche der Leitung von elektrischem Strom dienen und mit einem überwiegend metallischen Material beschichtet sind |
WO2003070524A1 (fr) * | 2002-02-22 | 2003-08-28 | Leoni Ag | Procede pour produire une piste conductrice sur un composant support et composant support |
US20030175559A1 (en) * | 2002-03-15 | 2003-09-18 | Morelli Donald T. | Kinetically sprayed aluminum metal matrix composites for thermal management |
EP1351562A2 (fr) * | 2002-04-02 | 2003-10-08 | Delphi Technologies, Inc. | Blindage contre les interférences electromagnétiques pour le conditionnement par surmoulage d'un ensemble électronique |
DE10222271A1 (de) * | 2002-05-18 | 2003-06-26 | Leoni Ag | Verfahren zur Erhöhung der Widerstandsfähigkeit einer elektrischen Kontaktverbindung zwischen zwei Kontaktteilen und elektrische Kontaktverbindung |
EP1365637A2 (fr) * | 2002-05-23 | 2003-11-26 | Delphi Technologies, Inc. | Circuit de cuivre formé par pulvérisation cinétique |
US20040101620A1 (en) * | 2002-11-22 | 2004-05-27 | Elmoursi Alaa A. | Method for aluminum metalization of ceramics for power electronics applications |
WO2004060579A1 (fr) * | 2002-12-17 | 2004-07-22 | Research Foundation Of The State University Of New York | Impression directe de motifs conducteurs metalliques sur des surfaces isolantes |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20210400800A1 (en) * | 2018-10-30 | 2021-12-23 | Kyocera Corporation | Board-like structure and heater system |
Also Published As
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DE102004047357A1 (de) | 2006-04-06 |
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