WO2005106927A2 - Transistor a electrons chauds - Google Patents

Transistor a electrons chauds Download PDF

Info

Publication number
WO2005106927A2
WO2005106927A2 PCT/US2005/014249 US2005014249W WO2005106927A2 WO 2005106927 A2 WO2005106927 A2 WO 2005106927A2 US 2005014249 W US2005014249 W US 2005014249W WO 2005106927 A2 WO2005106927 A2 WO 2005106927A2
Authority
WO
WIPO (PCT)
Prior art keywords
base
emitter
collector
transistor
electrode
Prior art date
Application number
PCT/US2005/014249
Other languages
English (en)
Other versions
WO2005106927A3 (fr
Inventor
Michael J. Estes
Blake J. Eliasson
Original Assignee
The Regents Of The University Of Colorado
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by The Regents Of The University Of Colorado filed Critical The Regents Of The University Of Colorado
Priority to JP2007510882A priority Critical patent/JP2007535178A/ja
Priority to EP05739776A priority patent/EP1743379A2/fr
Publication of WO2005106927A2 publication Critical patent/WO2005106927A2/fr
Publication of WO2005106927A3 publication Critical patent/WO2005106927A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/7606—Transistor-like structures, e.g. hot electron transistor [HET]; metal base transistor [MBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching

Definitions

  • the present writing relates generally to transistors and, more particularly, to transistors based on tunneling structures and their applications. More specifically, the present writing relates to tiiin-film transistors based on tunneling structures and applications.
  • Tunneling hot electron transistor amplifiers including a metal-insulator-metal-insulator-metal (M-
  • FIG. ⁇ an exemplary M-I-M-I-M transistor of the prior art is illustrated. It is noted that the figures are not drawn to scale for purposes of clarity.
  • FIG. 1 illustrates a partial cross sectional view of a typical M-I-M-I-M transistor, generally indicated by a reference numeral 100.
  • M-I-M-I-M transistor 100 includes alternating single layers of metals and insulators, including an emitter electrode 110, a base electrode 112, a collector electrode 114, an emitter barrier 116, and a collector barrier 118.
  • Other researchers have investigated similar transistor structures using epitaxial metal-insulator structures 3 , ffl-V semiconductor structures 4a,4b , and structures using ferromagnetic metals 40 and insulators* 1 .
  • Prior art hot hole transistors 8 have the same M-I-M-I-M as the previously described hot electron transistors. Device operation is also similar, with the exception that holes, instead of electrons, are the charge carriers in the device. However, the hot hole transistors of the prior art share the same problems as in prior art M-I-M-I-M hot electron transistors.
  • the present invention provides a remarkable improvement over the prior art as discussed above by virtue of its ability to provide fast thin-film devices with increased performance while resolving the aforedescribed problems present in the current state of the art.
  • a hot electron transistor adapted for receiving at least one input signal.
  • the transistor includes an emitter electrode and a base electrode spaced apart from the emitter electrode such that at least a portion of the input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode.
  • the transistor also includes a first tunneling structure disposed between the emitter and base electrodes and configured to serve as a transport of electrons between and to the emitter and base electrodes.
  • the first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer disposed directly adjacent to and configured to cooperate with the first amorphous insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling.
  • the transistor further includes a collector electrode, spaced apart from the base electrode, and a second tunneling structure between the base and collector electrodes.
  • the second tunneling structure is configured to serve as a transport, between the base and collector electrodes, of at least a portion of the electrons emitted from the emitter electrode by means of ballistic transport such that the portion of the electrons is collected at the collector electrode.
  • the input signal may include, for example, bias voltage, signal voltage, or electromagnetic radiation.
  • ⁇ - 0 the transistor at least a selected one of the base and collector electrodes is formed, at least in part, of a semi-metal.
  • a selected one of the base and collector electrodes is formed of a metal-silicide or a metal-nitride.
  • the second tunneling structure is configured to exhibit a first value of hot electron reflection, and wherein the second tunneling structure includes a shaped barrier energy band characteristic such that the first value of hot electron reflection is lower than a second value of hot electron reflection that would be exhibited by the second tunneling structure without the shaped barrier energy band characteristic. More specifically, the shaped barrier energy band characteristic includes a parabolic grading of the second tunneling structure.
  • the transistor is configured to exhibit a first value of electron emission energy width, and wherein the first tunneling structure includes a shaped barrier energy band characteristic such that the first value of electron emission energy width is lower than a second value of electron emission energy width that would be exhibited by the transistor without the shaped barrier energy band characteristic.
  • the emitter electrode is configured to exhibit a given Fermi level
  • the first tunneling structure is configured to exhibit a given conduction band such that the given conduction band differs from the given Fermi level by less than 2 eV.
  • a hot hole transistor adapted for receiving at least one input signal.
  • the hot hole transistor includes an emitter electrode and a base electrode spaced apart from the emitter electrode such that at least a portion of the input signal may be applied across the emitter and base electrodes and, consequently, holes are emitted from the emitter electrode toward the base electrode.
  • the hot hole transistor also includes a first tunneling structure disposed between the emitter and base electrodes, and configured to serve as a transport of holes between and to the emitter and base electrodes.
  • the first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer disposed directly adjacent to and configured to cooperate with the first amorphous insulating layer such that the transport of holes includes, at least in part, transport by means of tunneling.
  • the hot hole transistor further includes a collector electrode spaced apart from the base electrode, and a second tunneling structure disposed between the base and collector electrodes and configured to serve as a transport, between the base and collector electrodes, of at least a portion of the hot holes emitted by the emitter electrode by means of ballistic transport such that the portion of the holes is collected by the collector electrode.
  • a method for use in a hot electron transistor including a plurality of layer with a plurality of interfaces defined therebetween and ballistic electrons being transported therebetween is disclosed.
  • the plurality of layers includes at least a first layer and a second layer adjacent and juxtaposed to each other and defining a first interface therebetween such that at least a portion of the ballistic electrons may be reflected at the first interface.
  • the method for reducing electron reflection at at least the first interface includes configuring the first layer to exhibit a first, selected wave function, and configuring the second layer to exhibit a second, selected wave function such that a first fraction of the ballistic electrons is reflected at the first interface. This first fraction is smaller than a second fraction of the ballistic electrons that would be reflected at the first interface without the second layer being configured to exhibit the second, selected wave function.
  • a transistor adapted for receiving at least one input signal includes an emitter electrode and a base electrode spaced apart from the emitter electrode such that at least a portion of the input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode.
  • the transistor also includes a first tunneling structure disposed between the emitter and base electrodes and configured to serve as a transport of electrons between and to the emitter and base electrodes.
  • the transistor further includes a collector electrode spaced apart from the base electrode, and a second tunneling structure disposed between the base and collector electrodes, and configured to serve as a transport, between the base and collector electrodes, of at least a portion of the electrons emitted by the emitter electrode by means of ballistic transport such that the portion of the electrons is collectable at the collector electrode.
  • the second tunneling structure is configured to exhibit a first value of hot electron reflection, and the second tunneling structure is further configured to exhibit a selected wave function such that the first value of hot electron reflection is lower than a second value of hot electron reflection that would be exhibited by the second tunneling structure without the selected wave function.
  • the linear amplifier includes a hot electron transistor, which in turn includes a first emitter electrode and a first base electrode spaced apart from the first emitter electrode such that at least a first portion of the input signal may be applied across the first emitter and first base electrodes and, consequently, electrons are emitted from the first emitter electrode toward the first base electrode.
  • the hot electron transistor also includes a first tunneling structure disposed between the first emitter and first base electrodes and configured to serve as a transport of electrons between and to the first emitter and first base electrodes.
  • the first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer disposed directly adjacent to and configured to cooperate with the first amorphous insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling.
  • the hot electron transistor further includes a first collector electrode spaced apart from the first base electrode, and a second tunneling structure disposed between the first base and first collector electrodes and configured to serve as a transport, between the first base and first collector electrodes, of at least a portion of the electrons emitted from the first emitter electrode by means of ballistic transport such that the portion of the electrons is collectable at the first collector electrode.
  • the linear amplifier also includes a hot hole transistor, which in turn includes a second emitter electrode and a second base electrode spaced apart from the second emitter electrode such that at least a second portion of the input signal may be applied across the second emitter and second base electrodes and, consequently, holes are emitted from the second emitter electrode toward the second base electrode.
  • the hot hole transistor also includes a third tunneling structure disposed between the second emitter and second base electrodes and configured to serve as a transport of holes between and to the second emitter and second base electrodes.
  • the third tunneling structure includes at least a third amorphous insulating layer and a different, fourth insulating layer disposed directly adjacent to and configured to cooperate with the third amorphous insulating layer such that the transport of holes includes, at least in part, transport by means of tunneling.
  • the hot hole transistor further includes a second collector electrode spaced apart from the second base electrode, and a fourth tunneling structure disposed between the second base and second collector electrodes and configured to serve as a transport, between the second base and second collector electrodes, of at least a portion of the hot holes emitted by the second emitter electrode by means of ballistic transport such that the portion of the holes is collectable at the second collector electrode.
  • the hot electron transistor and the hot hole transistor are configured in a push-pull amplifier configuration.
  • FIG. 1 is a diagrammatic view, in partial cross section, of a junction transistor device as disclosed in the aforementioned '185 patent.
  • FIG. 2 is an energy band diagram corresponding to a hot electron transistor of the present invention.
  • FIG. 3 is an energy band diagram corresponding to a hot hole transistor of the present invention.
  • FIG. 4A is an energy band diagram corresponding to another embodiment of a hot electron transistor of the present invention.
  • FIG.4B is a diagrammatic view, in partial elevation, of a hot electron transistor of the present invention, along with an equivalent circuit diagram superimposed thereon.
  • FIG. 5 is an energy band diagram corresponding to an embodiment of a hot electron transistor of the present invention, shown here to indicate a variety of gain limiting mechanisms that are to be overcome in order to attain a useful device.
  • FIG. 6A is a comparison of two energy band diagrams, shown here to compare and contrast the effect of the inclusion of a double-insulator structure on the electron energy distribution of the electrons emitted from the emitter barrier in comparison to that of a single-insulator structure.
  • FIG. 6B is a diagrammatic view, in partial cross section, of a transistor device in accordance with the present invention including a double-insulator structure emitter barrier and a textured collector electrode.
  • FIG. 7 is a composite graph shown here to illustrate the differences in tunneling probability as a function of electron energy for square collector barriers with various conduction band depths, ranging from 0.5 eV to lO eV.
  • FIG. 8 is a composite graph shown here to illustrate the differences in tunneling probability as a function of electron energy for parabolic and square (“SQ") collector barriers with various conduction band depths, ranging from 0 eV to 2 eV.
  • SQL parabolic and square
  • FIG. 9 is a composite graph shown here to illustrate the differences in tunneling probability as a function of electron energy for different collector barrier shapes.
  • a 0 eV conduction band offset is assumed, with a barrier height of 0.4 eV.
  • FIGS. 10A-10X are diagrammatic illustrations, in partial cross section, of the plurality of steps involved in a stack process for fabricating one embodiment of the hot electron transistor of the present invention.
  • FIGS. 11 A-l II are diagrammatic illustrations, in partial cross section, of the plurality of steps involved in a planar process for fabricating another embodiment of the hot electron transistor of the present invention.
  • FIG. 12A is an equivalent circuit diagram of a linear amplifier based on the hot electron transistor and the hot hole transistor of the present invention.
  • FIG. 12B is an equivalent circuit diagram of a switch based on the hot electron transistor of the present invention.
  • FIGS. 12C and 12D are energy band diagrams illustrating the operation of the two states of the switch shown in FIG. 12B.
  • FIG. 12E is an equivalent circuit diagram of an oscillator by negative differential resistance
  • NDR based on the hot electron transistor of the present invention.
  • FIG. 12F is an equivalent circuit diagram of a multivibrator based on the hot electron transistor of the present invention.
  • FIG. 12G is an equivalent circuit diagram of a common emitter, with positive biasing, based on the hot electron transistor of the present invention.
  • FIG. 12H is an equivalent circuit diagram of an oscillator with a varactor diode (for controlling oscillation voltage) based on the hot electron transistor of the present invention.
  • FIG. 121 is an equivalent circuit diagram of a mixer with input matching and output matching based on the hot electron transistor of the present invention.
  • FIG. 13 is an energy band diagram illustrating the use of a double-insulator plus metal layer configuration in the collector barrier.
  • an I-I configuration in the emitter barrier solves at least two problems.
  • the I-I structure results in a tunnel junction having significantly greater nonlinearity than a single insulator tunnel junction, the result is higher differential conductivity (for high speed) at lower DC bias current (for high efficiency and lower noise).
  • the emitter-base capacitance may also be reduced by using two insulator layers.
  • the distribution of hot electrons emitted into the base is much narrower in energy than that from a single-insulator tunnel junction, thereby resulting in higher current gain.
  • junction transistor having a structure including a multilayer tunneling structure as one or both of the I-layers in the M-I-M-I-M transistor of FIG. 1 was disclosed. That is, in the case of a junction transistor, emitter barrier 116 and/or collector barrier 118 includes a multilayer tunneling structure.
  • junction transistors use bias voltages or currents from an external bias source (not shown) to set the operating point of the transistor and power to drive the output.
  • external bias sources are configured to apply voltage, for example, in a common emitter configuration, as a potential at the base-emitter junction and/or as a potential at the collector-emitter junction.
  • a bias source may be used to apply a voltage across the emitter and base electrodes to control the potential in emitter barrier 116 and, consequently, the tunneling probability of electrons from emitter electrode 110 to base electrode 112.
  • the collection efficiency is a function of the fraction of electrons that tunnel unimpeded through base electrode 112.
  • the tunneling probability is determined by the applied voltage at the base, along with other material properties.
  • FIG. 2 One example of such a junction transistor, including a double-insulator structure in the emitter barrier, is illustrated in FIG. 2.
  • the emitter tunnel junction injects hot electrons into the base.
  • the electrons travel across the thin metal base by ballistic transport.
  • Ballistic transport is understood to be the motion (e.g., of electrons) with velocities higher than their equilibrium thermal velocity which are not subject to scattering.
  • resonant tunneling is the motion of an electron through a quasi-stationary energy level.
  • the N-layers may be formed of a variety of materials such as, but not limited to, metals, semi-metals, metal-silicides and metal-nitrides.
  • Energy band diagram 200 includes an x-axis 202 (indicating thin-film stack thickness t) and a y-axis 204 (indicating energy E).
  • the various portions of energy band diagram 200 of the N-I-I-N-I-N hot electron transistor structure corresponds to an emitter electrode 210, a base electrode 212, a collector electrode 214, an emitter barrier structure 216 and a collector barrier structure 218.
  • Emitter barrier structure 216 includes a first insulating layer 216A and a second insulating layer 216B.
  • emitter electrode 210, base electrode 212 and collector electrode 214 correspond to the "N" layers in the N-I-I-N-I-N hot electron transistor structure, while first insulating layer 216A and second insulating layer 216B in emitter barrier structure 216 and collector barrier structure 218 correspond to the " layers in the N-I-I-N-I-N hot electron transistor structure.
  • a bias voltage (not shown) applied between emitter electrode 210 and base electrode 212 causes the emission of ballistic electrons 220 from emitter electrode 210 with an electron energy distribution 221, indicated by a peaked curve centered around an energy level 222, indicated by an arrow.
  • first insulating layer 216A and second insulating layer 216B the transistor structure represented by energy band diagram 200 leads to, for example, a narrowing of the peak width of electron energy distribution 221 , thereby increasing the efficiency of the transistor.
  • a semi-metal material a metal-silicide, or a metal-nitride, may be used to form one or both of the base electrode and the collector electrode.
  • Metal-silicides for example, such as cobalt suicide (CoSi 2 ) and tungsten suicide (WSi 2 ) are semi-metallic in that their conductivities and carrier concentrations are between those of a metal and a semiconductor.
  • a shaped barrier may be achieved by varying factors such as composition, electron affinity, charge neutrality level, electron mass and dielectric constant during formation of the barrier.
  • a rounded collector barrier for example, reduces the reflection of hot electrons at the interfaces between the electrodes and the barrier.
  • a shaped emitter barrier leads to the narrowing of the electron emission width from the emitter electrode toward the base electrode.
  • Still another improvement to the thin-film transistor is the use of low barriers in one or both of the emitter and collector barriers.
  • the use of low barriers in contrast to the high barriers used in prior art thin-film transistors, result in both high conductivity (for high speed) and low scattering rates of hot electrons (for high gain).
  • the N-I-I-N-I-N transistor of the present invention presents a variety of advantages over the prior art.
  • the N-I-I-N-I-N transistor is a thin-film device which may be formed without the use of semiconductors and epitaxy.
  • the N-I-I-N-I-N transistor may be formed entirely of metals and insulators (i.e., as a M-I-l-M-I-M structure) such that the transistor may be formed on a variety of substrates.
  • FIGS. 4A and 4B the structure of the N-I-I-N-I-N tunneling hot electron transistor of the present invention is described.
  • FIG. 4A shows an energy band diagram 400 corresponding to an improved N-I-I-N-I-N tunneling hot electron transistor of the present invention.
  • Energy band diagram 400 includes energy band levels for an emitter electrode 410, a base electrode 412, a collector electrode structure 414, an emitter barrier structure 416, and a collector barrier structure 418.
  • Emitter barrier structure includes a double-insulator configuration, including a first insulating layer 416A and a second insulating layer 416B.
  • Base electrode 412 is formed of ametal-silicide.
  • collector electrode structure 414 includes a metal- silicide layer 414A and a metal layer 414B.
  • FIG.4B A diagrammatic view, in partial elevation, of a N-I-I-N-I-N tunneling hot electron transistor 450 (and the equivalent circuit diagram) corresponding to energy band diagram, is shown in FIG.4B.
  • the N-I-I-N-I-N tunneling hot electron transistor represented by energy band diagram 400 in FIG.
  • FIG. 4A and diagrammatic view 450 in FIG. 4B embodies the various improvements provided by the present invention over the prior art. A variety of factors contribute to the improvements in this N-I-I-N-I-N transistor.
  • the response of the transistor structure of FIG. 4B is fast due to: 1) the thinness of the films and active junction regions, leading to short carrier transit times; 2) the use of metallic or semi-metallic conductive layers up to and within the device, leading to lower series resistance, particularly in the thin base layer and particularly at frequencies above a few hundred gigahertz; 3) the use of a high differential conductivity N-I-I-N emitter structure, leading to low emitter resistance and high transimpedance gain; and 4) the use of low dielectric-constant substrate materials, resulting in lower parasitic substrate capacitance.
  • the tunneling time through the emitter barrier is on the order of one femtosecond. Furthermore, ballistic transport of hot electrons across base electrode 412 ( ⁇ 10 nm thick) and collector barrier structure 418 ( ⁇ 8 nm thick) is on the order of 0.1 picosecond or less.
  • high conductivity metal leads extend all the way up to the junctions, thereby greatly reducing parasitic resistance, in comparison to semiconductor devices, and leading to a high maximum oscillation frequency (f ⁇ ). Also, it is known that the high frequency conductivity through a particular material is limited by the plasma frequency of the material.
  • the plasma frequency of a semiconductor is on the order of one terahertz at most, the plasma frequency of metals is in the ultraviolet range, such that the high frequency conductivity of the electrode layers in the N-I- I-N-I-N transistor is much higher than that of a semiconductor device.
  • the use of the double- insulator configuration in the emitter barrier allows high differential conductivity for high transconductance gain at relatively low DC bias currents, thereby resulting in a high cut-off frequency f ⁇ (Details of the double- insulator configuration are disclosed, for example, in the '784 patent).
  • the transistor of FIG. 4A incorporates several improvements in current gain performance.
  • the shaped characteristic of the collector barrier portion of energy band diagram 400 helps reduce electron reflection at the base electrode - collector barrier - collector electrode structure interfaces.
  • the semi-metallic base and collector layers (labeled in FIG.4A as metal suicides) also reduce electron reflections at these interfaces when compared with normal metal layers.
  • the M-I-I-M tunnel emitter exhibits higher differential conductivity and a narrower energy spread of emitted electrons than a simple M-I-M emitter structure.
  • low barrier heights between the metal Fermi energy levels and the conduction band edges of the insulators reduces electron reflections and inelastic electron scattering. The details of the aforedescribed improvement factors are discussed immediately hereinafter. [0056] Certain important recognitions by Applicants have led to the development of the improved thin- film transistor.
  • Applicants have recognized and thoroughly analyzed the physics of the gain- limiting processes in thin-film transistors based on combinations of non-insulating and insulating layers, as well as ways to over come these gain-limiting mechanisms. It is recognized that current gain in the hot electron transistor is limited by four mechanisms: 1) hot electron scattering in the base electrode; 2) base-collector leakage current; 3) energy spread of injected hot electron distribution; and 4) quantum mechanical reflections at the electrode-barrier interfaces.
  • FIG. 5 includes the components of energy band diagram 200 of the N-I-I-N-I-N hot electron transistor from FIG. 2, along with the four aforementioned gain limiting mechanisms.
  • the gain limiting mechanisms shown in FIG. 5 include hot electron scattering effect 505 in the base (indicated by a downward arrow and a number 1 in a circle), base-collector leakage current 510 (indicated by a horizontal arrow and a number 2 in a circle), energy spread of injected hot electron distribution 520 (indicated by a pair of arrows on either side of electron energy distribution curve 221 and a number 3 in a circle) and quantum mechanical reflections 530 at the electrode- barrier interfaces (indicated by curved arrows and a number 4 in a circle).
  • Hot electron scattering 505 in the base electrode is the inelastic scattering due to electron-electron interactions and electron-phonon interactions. Such inelastic scattering reduces the number of hot electrons with sufficient energy to surmount the collector barrier. As is known, scattering probability increases rapidly with increasing electron energy above the Fermi level.
  • This problem of hot electron scattering may be overcome by the use of low tunneling barriers (e.g., 2eV or lower), such as niobium (Nb) - niobium pentoxide (Nb 2 0 5 ), tantalum (Ta) - titanium oxide (Ti0 2 ) and Ta - tantalum oxide (Ta 2 0 5 ), and by the use of a semi-metallic base electrode, such as a metal suicide.
  • Prior art M-I-M-I-M structures used high barrier oxides, such as aluminum oxide (A1 2 0 3 ), which severely limits, if not completely quench, current gain.
  • the probability that the injected hot electron will cross the base electrode ballistically without scattering is given by the base transport factor, u B :
  • x B is the base electrode thickness
  • L B is the mean free path in the material forming the base electrode (in units of nm/eV 2 ) and V e is the hot electron energy above the Fermi level.
  • Typical values for L B in metal are on the order of 20 nm/eV 2 . 4 Therefore, a 0.3 eV hot electron traversing a 10 nm base electrode, for example, would have a base transport factor of approximately a B ⁇ 0.14.
  • the base-collector leakage current problem may be overcome by appropriate selection of collector barrier energy band height, width and shape. Selection of collector barrier energy band height is a trade-off between reducing hot electron scattering (requiring low barrier height) and reducing base-collector tunneling current (requiring high barrier height). Using device models, Applicants have found that collector barriers having an energy band height in the range 0.3 to 0.8 eV results in a good trade-off between these two competing factors. Also, the base-collector leakage current problem may be naturally alleviated by the use of a lower collector barrier energy band height, as discussed earlier in reference to the hot electron scattering problem, since the quantum-mechanical image force maybe enhanced by using materials with low dielectric constants.
  • collector barrier energy band thickness is a tradeoff between device speed and leakage current. Thicker barriers would yield lower leakage current, but the transport time of the ballistic electron across the barrier would also increase. That is, a hot election traveling at a ballistic velocity between 10 7 -10 8 cm/s would take longer to traverse a 20 nm barrier than it would take to traverse a 5 nm barrier. A further problem is if the ballistic electron scatters and thermalizes down to the conduction band edge of the barrier. Since the barriers used in the devices of the present invention have generally included amorphous materials, the mobility for electron conduction (i.e., drift and diffusion) is very low. Consequently, the time for a given electron to reach the collector electrode would increase significantly if the electron thermalizes. Therefore, barrier thickness should be selected to minimize the probability of thermalizing collisions.
  • collector barrier energy band shape has a strong influence on hot electron transmission probability.
  • barrier energy band shape affects base-collector leakage current as the effective barrier energy band height is approximately equal to the mean barrier energy band height. 5, n
  • leakage current should also be considered when selecting an appropriate barrier energy band shape for hot electron transmission, which will be discussed in further detail at an appropriate point in the disclosure below.
  • the third problem of energy spread 520 of injected hot electron distribution is due to the fact that electrons tunneling through the emitter barrier are not mono-energetic. That is, the electrons emerging from the emitter barrier are hot elections with a spread of energies. Since very hot (i.e., high energy) electrons have a much greater probability of inelastic scattering while relatively cold (i.e., low energy) electrons have a low probability of clearing the collector barrier, the result is a reduced transistor gain.
  • the hot electron energy spread may be addressed through the inclusion of a double-insulator configuration in the emitter barrier. Details of a variety of double-insulator configurations have been discussed in detail in the '784 patent and the '185 patent.
  • the narrowing of the emitted electron distribution is illustrated in FIG. 6A, in which the theoretical hot electron distribution from a single insulator emitter is compared with that of an emitter including a double-insulator configuration.
  • FIG. 6 A shows a comparison of the energy distribution of hot elections injected from a single-insulator M-I-M emitter and a double-insulator M-I-I-M emitter.
  • FIG. 6A includes a composite graph 600 including a first graph 601A and a second graph 601B.
  • the top portion of graph 600 includes a first x-axis 602A, corresponding to distance, and a y-axis 604 A, corresponding to energy, for an energy band diagram 610A of a single-insulator M-I-M emitter.
  • Y-axis 604A and a second x-axis 615A, corresponding to current, are the axes for a current versus energy distribution curve 620A.
  • the bottom portion of graph 600 includes a first x-axis 602B, corresponding to distance, and a y-axis 604B, corresponding to energy, for an energy band diagram 610B of a double-insulator M-I-I-M emitter, with a corresponding, current versus energy distribution curve 620B indicated on y-axis 604B and a second x- axis 615B.
  • current versus energy distribution curves 620A and 620B the double-insulator configuration in the emitter yields a much narrower peak of current/energy distribution.
  • the narrower distribution of hot elections from the emitter with a double-insulator structure included therein results in increased current gain.
  • the narrow electron distribution resulting from the emitter including the double-insulator configuration may also be useful in some of the non-traditional applications of the N-I-I-N-I-N tiansistor, such as in frequency multipliers and short pulse generators.
  • the N-I-I-N diode configuration offers an additional benefit of low currents in reverse bias, which maybe useful in switching applications.
  • the low currents in reverse bias may be further enhanced by using a thin textured emitter metal, which may be formed, for example, by sputtering at high pressures and low cathode voltages.
  • An example eof such a textured collector electrode is shown in FIG.
  • FIG. 6B illustrating a transistor 650 including a double-insulator emitter barrier (with first and second insulator layers 654 and 656, respectively), wherein a collector electrode 658 is shown to include a step-like texture on the side away from collector barrier 118.
  • the fourth problem of quantum mechanical reflections 530 of hot electrons at non-insulator — insulator interfaces may be the most challenging of the four gain-limiting mechanisms to overcome. 6 Ludeke et al. have experimentally observed the oscillatory transmission of hot electrons in palladium (Pd) - silicon dioxide (Si02) - silicon (Si) structures. 7 In general, Applicants have recognized that the reduction of the quantum mechanical reflection problem requires the reduction of the wave function contrast across the thin-film transistor device. Applicants submit a two-prong approach to solving this critical problem, as will be discussed in detail immediately hereinafter.
  • the first approach is based on the use of semi-metallic base and collector electrodes.
  • a typical metal such as aluminum or copper, has a conduction band edge on the order of 10 eV below the Fermi level.
  • Certain other metals, such as niobium and silver have conduction band edges on the order of 5 eV below the Fermi level, thus making these metals more preferable for use in the transistor of the present invention.
  • metal-silicides have carrier concentrations of ⁇ 10 22 cm '3 , this information may be extrapolated to predict that metal-silicides have conduction band depths of only 1 to 2 eV.
  • FIG. 7 includes a composite graph 700 combining the calculated hot electron transmission curves for a variety of conduction band depth values.
  • the inset graph illustrates the model used for the calculations, namely a square barrier 710 flanked by a first electrode 720 and a second electrode 740.
  • the barrier in the present calculation is assumed to have a thickness of 4 nm and energy band height of 0.77 eV.
  • the numbers given in the legend correspond to the conduction band depth (E c , in units of eV) below the Fermi level in the electrodes.
  • E c conduction band depth
  • r is the transistor cutoff frequency (determined by the emitter differential resistance at bias and the emitter junction capacitance)
  • R B is the small signal base resistance
  • C c is the collector junction capacitance.
  • the base resistance may be reduced by using a thicker layer of semi-metal as the base electrode and/or by adding a thin layer of a high-conductivity metal, such as tungsten.
  • both approaches would somewhat reduce transistor gain since they tend to increase hot electron scattering in the base electrode and since the interface between the conventional metal and the semi- metal layer would additionally reflect hot electrons.
  • the operation of transistor maybe limited to operation at one of the oscillation peaks, as shown in FIG. 7.
  • ferromagnetic insulators and/or metals may be used in conjunction with the emitter or collector regions in order to enhance hot electron collection and differential resistance Rs and provide electromagnetic feedback.
  • Differential resistance R s is the resistance seen by an input, for example, an oscillating voltage Vcos (wt), about a bias point.
  • Vcos oscillating voltage
  • the multi-layer metal approach may be further refined to produce a quarterwave anti-reflection layer between the conventional metal layer in the base electrode and the collector barrier.
  • the second approach to reduce quantum mechanical reflections is based on the use of a graded collector barrier energy band.
  • the "shaped" barrier may be attained, for instance, by compositional changes in the barrier, rather than physical shaping of the conduction band edge in the oxide.
  • a graded barrier energy ⁇ band may be achieved, for example, by gradually grading a collector oxide from a low barrier material to a high barrier material (e.g., Nb 2 Os - Nb 2 Ta 2 .
  • FIG. 8 in conjunction with FIG. 7, the effect of the grading of collector barriers in different ways is compared.
  • composite graph 700 indicates calculated hot electron transmission curves for a square barrier for a variety of conduction band depth values.
  • FIG. 8 shows a composite graph 800 combining the calculated hot electron tiansmission curves for a parabolic barrier with a variety of conduction band depth values.
  • the inset graph illustiates the model used for the calculations, namely a parabolic barrier 810 flanked by a first electrode 820 and a second electrode 840.
  • a parabolic barrier 810 flanked by a first electrode 820 and a second electrode 840.
  • the transmission of a square barrier energy band is compared with that of a parabolic barrier energy band, as mdicated in the legend.
  • FIG. 8 shows that the parabolic grading of the collector barrier significantly reduces hot electron reflections over that in the case of square collector barriers.
  • FIG. 9 the effects of differently graded collector barriers are compared. In FIG.
  • FIG. 9 includes a graph 900 showing tunneling probability as a function of electron energy for a variety of collector barrier shapes. A 0 eV conduction band offset and a 0.4 eV barrier height are assumed. For the "half designations, only the leading edge (i.e., base electrode side) of the collector barrier was assumed to be shaped.
  • grading one side of the collector barrier energy band reduces oscillations, while grading of both sides of the collector barrier energy band yields the greatest reduction of quantum mechanical reflection.
  • the grading of the conduction band edge of the barrier energy band from the metal conduction band edge to the maximum barrier energy band height then back down to the minimum height provides the greatest reduction in hot electron reflection.
  • the closest approach would be to grade the energy band of the barrier material from as low of an energy as possible.
  • the quantum mechanical reflection of hot electrons is naturally alleviated by the use of a lower barrier energy band. This effect is due to the quantum-mechanical image force, which may be enhanced, for example, by the use of low dielectric constant insulating materials. Use of insulating materials with similar electron affinities but different dielectric constants may also contribute to the tailoring of the conduction band slope, or electric field, through the thin-film transistor structure. [0079] The quantum mechanical reflections of hot electrons may be further reduced by incorporating an insulating material with a near-unity electron-tunnel mass.
  • the base-collector dark current is reduced while decreasing the oscillation depth in the tunnel probability and, simultaneously, increasing the oscillation frequency, thereby resulting in a higher average tunneling probability over a range of energy.
  • a general consideration in the fabrication of an efficient, high speed thin-film tiansistor device is the consideration of wave function matching across the thin film layers as the ballistic electron traverses the device.
  • the electron reflection at each interface between the layers may be tailored as desired.
  • a particular material may be selected for use within a thin-film transistor structure due to the fact that the material exhibits a desired dielectric constant characteristic or chemical composition for that layer.
  • the wave function of a given thin-film layer may be further influenced, for example, by grading the composition of the layer (e.g., to achieve a parabolic energy band profile), by application or generation of a magnetic field (e.g., in the case of ferromagnetic materials) or by adding a surface texture to that layer.
  • a double-insulator structure within, for instance, the emitter barrier, a narrower distribution of emitted electrons (i.e., more monochromatic energy electrons) maybe achieved within the transistor.
  • FIG. 3 The energy band diagram of a M-I-M-I-M hot hole transistor is shown in FIG. 3. Compared to the hot electron transistor, shown in FIG. 2, the energy bands are reversed; that is, barrier height for tunneling holes is the energy difference between the metal Fermi energy and the insulator valence band edge. [0083] Continuing to refer to FIG. 3, an energy band diagram 300 corresponding to an N-I-N-I-N hot hole transistor structure is illustrated. The various portions of energy band diagram 300 corresponds to the variety of layers forming the N-I-N-I-N hot hole transistor, including an emitter electrode 310, a base electrode 312, a collector electrode 314, an emitter barrier structure 316 and a collector barrier structure 318. A hot hole 320 is emitted from the emitter electrode and surmounts the collector barrier to be subsequently collected in the collector electrode.
  • the difference between the work function of the metal and the electron affinity of the insulator should be larger than the difference between the bandgap plus electron affinity of the insulator and the work function of the metal.
  • external control methods maybe used to suppress electron tunneling.
  • 9 [0085]
  • Several improvements to the basic M-I-M-I-M hot hole transistor may be achieved in accordance with the techniques of the present invention. For instance, the incorporation of a double-insulator structure in the emitter barrier would yield the same advantages as those described above in reference to the hot election transistor. Additionally, the double-insulator structure may be included in the collector barrier, which may help reduce base-collector leakage current and increase hot hole tiansmission.
  • the use of a graded collector barrier energy band would reduce hot hole reflection at the non- insulator - insulator interfaces. Also, as in the hot electron device, hot hole reflections may be minimized by the appropriate selection of base and collector electrode materials.
  • hot electron and hot hole devices One major difference between the hot electron and hot hole devices is that, in the hot electron device, electrons tunnel from the conduction band of the metal into the conduction band of the insulator. In the hot hole case, holes tunnel from the conduction band of the metal into the valence band of the collector barrier.
  • the first method involves depositing the entire MbMxIxM transistor stack in a single vacuum deposition system.
  • the "M" layers referred to in the present narrative may be any appropriate non-insulating material including, for instance, metals or some combination of metals and non-metals.
  • the layers may be deposited by various conventional methods such as, but not limited to, thermal evaporation, sputtering, chemical vapor deposition, and atomic layer epitaxy.
  • a cluster tool may be used to perform varying depositions in separate chambers without exposing the structure to atmosphere.
  • the stack process is believed to provide maximum control of layer thickness, composition, and cleanliness.
  • the stack process maybe subdivided into two domains: materials and processing.
  • the materials challenge is to deposit the stack using possibly varying deposition methods to produce the desired electronic interfaces.
  • the processing challenge is develop procedures that allow one to pattern and subsequently make contact to the desired layers which may be buried within central layers of the stack. It may be possible to break the transistor fabrication or stack, into multiple stacks, if one ensures the break regions are tolerant to intermediate processing.
  • the layers of the stack include an emitter metal, emitter-base oxide, base metal, base-collector oxide, collector metal. Since the top surface of the collector metal will be exposed to atmosphere following deposition, an oxidation resistant material, NbN for example, should be used to cap the collector metal unless milling, for example argon ion milling, is used in-situ to later remove any native oxide or contamination formed on top of the collector metal during subsequent processing.
  • the base metal must be made thin with respect to the hot-elections mean free path ( ⁇ 100nm depending on electron energy and base metal). The base metal must also be "dug out" of the stack so it may be contacted to an external circuit.
  • An etch stop may be incorporated to facilitate milling to the base layer.
  • the base layer must not oxidize once exposed. This may be accomplished by incorporating a capping layer, for example NbN).
  • the thin ( ⁇ l-5nm) emitter oxide may incorporate multiple adjacent oxides (or metals) to promote the emission of a mono-energetic electron beam.
  • the thick ( ⁇ 4-20nm) collector oxide may incorporate multiple adjacent oxides or suicides to reduce reflections of the emitted hot-electrons, while minimizing base-collector bias current.
  • the emitter, base, and collector's are all described as metals, they may be semimetals, suicides, semiconductors, superconductors, or superlattices.
  • the emitter-base and collector-base oxides need not be limited to conventional oxides.
  • FIGS. lOA-lOX A summary of the fabrication process for a typical device is shown in FIGS. lOA-lOX and described below: 1. Thoroughly clean a silicon wafer, for example using a standard SPM, SCI, BOE, SC2 sequence. 2. Thermally oxidize the substrate, less than 1 ⁇ m thick, to provide electrical isolation between the MIxMxIxM tiansistor and silicon substrate. . 3.
  • Form an emitter contact pad (for electrically accessing the device): a. Lithography to define the contact pad shape: i. Spin on a primer (HMDS) at 6000 rpm for 30 seconds, ii. Spin on a resist at 6000 rpm for 30 seconds (time and spin speed are dependent on the specific resist used), iii. Pre-bake the resist layer on a hotplate at 110°C for 60 seconds (time and temperature are dependent on the specific resist used), iv. Expose the resist layer for 18 seconds (exposure time is dependent on the specific resist used and the resist thickness), v. Develop the resist layer using a developer solution (4: 1 ratio of DI water to developer) for a predetermined time, (developer solution depends upon specific resist and developer used) vi.
  • this step may be broken into multiple steps. For example, large traces maybe patterned with standard optical lithography and connections from the transistor to these traces may be formed with election beam lithography.
  • the transistor stack may be either deposited over the entire wafer, or, in specific regions of the wafer defined by a lift-off step.
  • the following stack provides an example of a stack which is deposited in a single vacuum deposition tool.
  • the metal is deposited by, for example, direct sputtering.
  • Interdisposed within the base metal is a Cr layer which functions as an RIE etch stop, allowing one to precisely stop at the base metal, and easily oxidize the edges.
  • the NbN provides an oxidation resistant contact to the base electrode after the Cr is removed.
  • the metal is deposited by, for example, direct sputtering.
  • the nitride may be formed by a nitrogen plasma, reactively sputtered, or directly sputtered.
  • Nb 2 0 5 base-collector oxide (lOnm) - a low and wide collector oxide is used to allow for passage of the hot elections arriving from the emitter while lowering the base- collector current that may result from a bias that may be applied or generated across the collector oxide. Grading the oxide composition, to obtain a non-abrupt metal- oxide interface is preferable for reducing reflection of hot-electrons impinging the barrier.
  • the oxide is deposited, for example, by reactive sputtering.
  • Nb/NbN collector metal (20nm/lnm) - the collector metal is chosen for its barrier properties with the collector oxide, ability to RIE mill in CF 4 /0 2 , and the compatibility with the stable nitride NbN.
  • the metal is deposited by, for example, direct sputtering.
  • the nitride may be formed by plasma, reactively sputtered, or directly sputtered.
  • Deposit collector definition metal the collector definition metal is used to provide an RIE etch mask and as such defines the size of die collector-base side of the transistor.
  • a lift-off process with Cr/Au (5nm/35nm) may be used.
  • Au is resilient to the RIE etch and provides a good electrical contact to the transistor and external probes/pads.
  • a 50: 1 H 2 0:HF dip may be used to remove any possible oxidation that may have occurred on top of the NbN in previous processing steps.
  • emitter definition metal - using lift-off techniques aluminum is deposited over the stack (including a portion of the collector) to define the emitter-base size.
  • the Al functions as an etch mask.
  • RIE etch emitter-base portion of the stack.
  • Edge Oxidation The edges of the emitter and base metal may now be oxidized to protect and passivate. This may be accomplished by oxide deposition or use of a oxygen plasma.
  • a base contact metal is deposited. Cr/Au (5nm 180nm) is deposited on top of the exposed base NbN.
  • a 50:1 H 2 0:HF dip may be used to remove any possible oxidation that may have occurred on top of the NbN in previous processing steps.
  • This process may also include a collector metal contact to extend the collector contact to external circuit or probe pads.
  • the resulting structure places the emitter at the bottom of the stack and the collector at the top of the stack. This is not a necessity and the emitter and collector locations could be reversed. Depending on the depositions techniques used a particular order may be advantageous.
  • the second fabrication method involves patterning base contacts and collector or emitter contacts onto the substrate before subsequent fabrication of the remainder of the transistor structure.
  • the advantage of this method is that it eliminates the need to etch down to the thin base metal - a tenuous process.
  • the disadvantage of this method is that it breaks the deposition of the MIMIM stack into two stages so that one interface in the transistor structure is exposed to ambient atmosphere, which may lead to contamination of this interface and possibly native oxidation of the exposed surface.
  • FIGS. 11 A-l II A summary of the fabrication process for a typical device is shown in FIGS. 11 A-l II and described below: 1. Clean silicon (or polysilicon) substrate surface 2. Pattern base and collector (or emitter) electrode metals on silicon surface 3.
  • FIG. 12A shows an equivalent circuit diagram of a linear amplifier 1200 including a hot electron transistor 1210 of the present invention and a hot hole transistor 1212 of the present invention in a push-pull configuration.
  • a hot electron transistor 1210 of the present invention may be useful as power amplifiers, low-noise amplifiers, or oscillators in high frequency circuits.
  • a push-pull amplifier configuration may be realized. Because these devices are thin film and very fast, they may find use in flexible electronics, microwave circuits on low loss or flexible substrates, and hybrid circuits where they may be integrated with silicon CMOS or III-V optoelectronics, for example.
  • hot electron (hole) transistors have a non-zero turn-on voltage since emitted elections must have enough energy to surmount the' collector barrier. Since the majority of emitted electrons have an energy approximately equal to that of the base-emitter voltage, the turn-on threshold is approximately equal to this barrier height. Thus, for base-emitter voltages greater than the threshold, the majority of emitter current goes to the collector contact; for base-emitter voltages less than the threshold, however, the emitter current cannot surmount the collector barrier and goes out the base contact. In this way the hot election transistor functions as a single-pole, double-throw (SPDT) switch.
  • SPDT single-pole, double-throw
  • the concept of a multivibrator follows from the SPDT switch concept above. With appropriate feedback from collector to base, the transistor may be made to oscillate output current between base and collector with the emitter as the common electrode.
  • the equivalent circuit diagram of such a device is shown in FIG. 12F. For simplicity, the biasing CKT is not shown in FIG. 12F.
  • the hot electron transistor has a turn-on threshold when the emitted electrons have enough energy to surmount the collector barrier.
  • a flat gain response for linear amplification and the transistor would have to be biased well above the threshold voltage.
  • an application where nonlinear gain is useful One such application would be for a short pulse generator.
  • M ⁇ MIM transistor structures considered to date may be as short as 100 fs, depending on base resistance. The ultimate limit would be V(2 ⁇ f ⁇ ).
  • Common emitter 1400 acts as an NDK amplifier when based in the NDR region. Linear versus nonlinear amplification depends on the operating point of the tiansistor. Common emitter 1400 also acts as a frequency multiplier by the appropriate selection of transistor design. Common collector or base configuration are also possible. Discrete components may include RF transmission line components. A matching network may precede the load and/or follow the source. In addition, filtering and or cascading amplifiers are possible. The device may also act as an IR (or terahertz or microwave) detector by the use of such inputs.
  • IR or terahertz or microwave
  • FIG. 12H An equivalent circuit diagram for an oscillator with a varactor diode (such that the oscillation is voltage controlled) 1450 is shown in FIG. 12H.
  • Nonlinear Rectifier/Mixer with Gain Similarly to the application above, we may use relatively sharp turn-on response of the transistor to provide high nonlinearity for rectification and mixing applications.
  • the transistor should be biased at the turn-on threshold, and the input signal should be between base and emitter.
  • the output signal is collector current.
  • the "sharpness" of the turn-on nonlinearity, and consequently the efficiency of rectification or mixing, is limited largely by the breadth of the hot electron distribution from the emitter.
  • the M ⁇ M emitter structure has an advantage over the IvUM emitter.
  • Base-collector bias voltage also has an effect on nonlinearity, with higher (collector positive with respect to base) voltages giving a sharper turn-on.
  • the transistor adds power gain to the signal by virtue of the base-collector bias voltage.
  • An added advantage of this rectifier/mixer device over conventional two-terminal diodes is that the input and output impedances may be different and tailored to match the specific source and load impedances. As an example, one may want to interface the input to a 200 ⁇ antenna as the source and drive a 50 ⁇ transmission line as the load.
  • FIG. 121 An equivalent circuit diagram for a mixer 1500 based on such principles is shown in FIG. 121.
  • Mixer 1500 includes input matching and output matching.
  • One significant advantage provided by mixer 1500 over a diode mixer is gain.
  • Infrared Detector with Gain This application is similar to the rectifier/mixer application above, the difference being that for infrared input signals, photon-assisted tunneling is expected to dominate over classical rectification. In this case, photons lose their energy to tunneling electrons. Thus, the base-emitter voltage may be reduced below the turn-on threshold by as niuch as a photon energy. At lower bias, the base-emitter diode has lower DC bias current and therefore lower shot noise. Again, signal power gain is determined by the ratio of base-collector bias voltage and base-emitter bias voltage.
  • modifications may include, but not limited to, a M-I-M-I-M-I-M emitter structure in the transistor, M-I-I-I-M emitter/collector structure in the transistor, N-M-N base electrode, the use of multiple insulator layers in the collector barrier, the addition of various matching/filter/biasing configurations to the applications, the implementation of various logic circuits based on the aforedescribed switch (e.g., NAND, NOR, inverter, etc.), and the connection of antennas as inputs/outputs for various applications.
  • a thin metal within the collector barrier may be used to apply a voltage within the collector barrier and, thereby, further tailor the barrier conduction band shape by application of an external voltage.
  • FIG. 13 An example of such a configuration is shown in FIG. 13, including an energy band diagram for a transistor configuration including a triple-layer collector barrier 1602, which in turn includes a first insulating layer 1604, a metal layer 1606 and a second insulating layer 1608.
  • a triple-layer collector barrier 1602 which in turn includes a first insulating layer 1604, a metal layer 1606 and a second insulating layer 1608.
  • metal layer 1606 By application of an external voltage (not shown) to metal layer 1606, the overall shape of the energy band of collector barrier 1602 may be tailored as desired.
  • This technique of using a thin metal if applied normal to the direction of conduction, may further add additional barrier conduction band shaping control. Therefore, the present examples are to be considered as illustrative and not restrictive, and the invention is not to be limited to the details given herein but may be modified within the scope of the appended claims.
  • hot electron transistor includes an emitter electiode, a base electrode, a collector electrode, and a first tunneling structure disposed and serving as a transport of electrons between the emitter and base electrodes.
  • the first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer such that the transport of electrons includes transport by means of tunneling.
  • the transistor further includes a second tunneling structure disposed between the base and collector electrodes.
  • the second tunneling structure serves as a transport of at least a p rtion of the previously mentioned electrons between the base and collector electrodes by means of ballistic r 'transport such that the portion of the electrons is collected at the collector electrode.
  • a tiansistor adapted for receiving at least one input signal, said transistor comprising an emitter electrode, a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode, a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes, said first tuimeling structure including at least a first amorphous layer such that the transport of electrons includes, at least in part, transport by means of tunneling, a collector electrode spaced apart from said base electrode and a second tunneling structure disposed between said base and collector electrodes and configured to serve as a tiansport, between said base and collector electrodes, of at least a portion of said electrons

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

L'invention concerne un transistor à électrons chauds qui comprend une électrode d'émission, une électrode de base, une électrode de collecte, et une première structure de transmission tunnel disposée entre les électrodes d'émission et de base afin d'assurer le transport des électrons entre celles-ci. La première structure de transmission tunnel comprend au moins une première couche d'isolation amorphe et une deuxième couche d'isolation différente de sorte que le transport des électrons soit assuré, au moins en partie, par transmission tunnel. Ledit transistor comprend en outre une deuxième structure de transmission tunnel disposée entre les électrodes de base et de collecte. Cette deuxième structure de transmission tunnel sert à transporter au moins une partie des électrons précédemment mentionnés entre les électrodes de base et de collecte par transport balistique de façon que la partie des électrons soit collectée au niveau de l'électrode de collecte. L'invention concerne également un procédé associé de réduction de la réflexion des électrons au niveau d'interfaces dans un transistor à couches minces.
PCT/US2005/014249 2004-04-26 2005-04-25 Transistor a electrons chauds WO2005106927A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007510882A JP2007535178A (ja) 2004-04-26 2005-04-25 ホットエレクトロン・トランジスタ
EP05739776A EP1743379A2 (fr) 2004-04-26 2005-04-25 Transistor a electrons chauds

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US56570004P 2004-04-26 2004-04-26
US60/565,700 2004-04-26

Publications (2)

Publication Number Publication Date
WO2005106927A2 true WO2005106927A2 (fr) 2005-11-10
WO2005106927A3 WO2005106927A3 (fr) 2005-12-29

Family

ID=35242334

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/014249 WO2005106927A2 (fr) 2004-04-26 2005-04-25 Transistor a electrons chauds

Country Status (5)

Country Link
EP (1) EP1743379A2 (fr)
JP (1) JP2007535178A (fr)
KR (1) KR20070053160A (fr)
CN (1) CN101015066A (fr)
WO (1) WO2005106927A2 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014039550A1 (fr) * 2012-09-04 2014-03-13 Carnegie Mellon University Transistor à électrons chauds ayant des bornes en métal
US9553163B2 (en) 2012-04-19 2017-01-24 Carnegie Mellon University Metal-semiconductor-metal (MSM) heterojunction diode
EP3039723A4 (fr) * 2013-08-27 2017-05-10 Georgia State University Research Foundation, Inc. Photodétecteur à porteurs chauds accordable
US10651255B2 (en) 2017-07-27 2020-05-12 Samsung Electronics Co. Ltd. Thin film transistor and method of manufacturing the same

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5182775B2 (ja) * 2006-03-22 2013-04-17 国立大学法人大阪大学 トランジスタ素子及びその製造方法、電子デバイス、発光素子並びにディスプレイ
EP2608267B1 (fr) * 2011-12-23 2019-02-27 IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik Transistor de type p avec une base en graphène
JP6230593B2 (ja) * 2012-04-04 2017-11-15 フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング 再現可能なステップエッジ型ジョセフソン接合
US9112130B2 (en) * 2013-11-01 2015-08-18 Samsung Electronics Co., Ltd. Quantum interference based logic devices including electron monochromator
JP7068265B2 (ja) * 2016-07-07 2022-05-16 アモルフィックス・インコーポレイテッド アモルファス金属ホットエレクトロントランジスタ
JP2021175027A (ja) * 2020-04-21 2021-11-01 株式会社村田製作所 電力増幅器、電力増幅回路、電力増幅デバイス
CN115389891B (zh) * 2022-07-26 2023-07-25 安庆师范大学 一种检测分子半导体材料中电学输运带隙的方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980312A (en) * 1989-02-27 1990-12-25 U.S. Philips Corporation Method of manufacturing a semiconductor device having a mesa structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980312A (en) * 1989-02-27 1990-12-25 U.S. Philips Corporation Method of manufacturing a semiconductor device having a mesa structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9553163B2 (en) 2012-04-19 2017-01-24 Carnegie Mellon University Metal-semiconductor-metal (MSM) heterojunction diode
US9941382B2 (en) 2012-04-19 2018-04-10 Carnegie Mellon University Metal-semiconductor-metal (MSM) heterojunction diode
WO2014039550A1 (fr) * 2012-09-04 2014-03-13 Carnegie Mellon University Transistor à électrons chauds ayant des bornes en métal
US9543423B2 (en) 2012-09-04 2017-01-10 Carnegie Mellon University Hot-electron transistor having multiple MSM sequences
EP3039723A4 (fr) * 2013-08-27 2017-05-10 Georgia State University Research Foundation, Inc. Photodétecteur à porteurs chauds accordable
US10347783B2 (en) 2013-08-27 2019-07-09 Georgia State University Research Foundation, Inc. Tunable hot-carrier photodetector
US10651255B2 (en) 2017-07-27 2020-05-12 Samsung Electronics Co. Ltd. Thin film transistor and method of manufacturing the same

Also Published As

Publication number Publication date
CN101015066A (zh) 2007-08-08
KR20070053160A (ko) 2007-05-23
WO2005106927A3 (fr) 2005-12-29
EP1743379A2 (fr) 2007-01-17
JP2007535178A (ja) 2007-11-29

Similar Documents

Publication Publication Date Title
US7173275B2 (en) Thin-film transistors based on tunneling structures and applications
WO2005106927A2 (fr) Transistor a electrons chauds
KR102156320B1 (ko) 이차원 물질을 포함하는 인버터와 그 제조방법 및 인버터를 포함하는 논리소자
KR101021736B1 (ko) 쇼트키 장벽 양자 우물 공명 터널링 트랜지스터
US7838875B1 (en) Metal transistor device
JP2001522534A (ja) ＩｎＡ１ＡｓＳｂ／Ａ１Ｓｂバリヤを備えた電子デバイスの設計および製造
KR102088629B1 (ko) 금속-반도체-금속(msm) 이종접합 다이오드
WO1992017908A1 (fr) Transistor a effet de champ
JP6582759B2 (ja) 電子デバイス及びその製造方法
JPH03502985A (ja) 量子ウェル電界制御半導体トリオード
JP2779323B2 (ja) 光制御共鳴透過振動子
Turker et al. Material considerations for the design of 2D/3D hot electron transistors
JP2001156301A (ja) 共鳴トンネル装置
JPH11163316A (ja) 電界効果トランジスタおよびその製造方法
Strobel et al. High Gain Graphene Based Hot Electron Transistor with Record High Saturated Output Current Density
JPH0337735B2 (fr)
US20230320235A1 (en) Superconducting silicon transistor and fabrication thereof
US11121335B2 (en) Carbon nanotube transistor and logic with end-bonded metal contacts
TWI831512B (zh) 半導體裝置和其形成方法
JP7456449B2 (ja) 電界効果型トランジスタの製造方法
JP2002064183A (ja) 半導体装置およびその製造方法
JP2513118B2 (ja) トンネルトランジスタおよびその製造方法
Bhat et al. Review of Compound Semiconductors Relieving Bottlenecks of Incessant MOSFET Scaling: Heroism or A Race in the Dark
JP2006210462A (ja) 金属ベーストランジスタおよびそれを用いた発振器
Shaffi Bhat et al. Review Of Compound Semiconductors Relieving Bottlenecks Of Incessant MOSFET Scaling: Heroism Or A Race In The Dark

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2005739776

Country of ref document: EP

Ref document number: 2007510882

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 200580013289.X

Country of ref document: CN

NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Ref document number: DE

WWE Wipo information: entry into national phase

Ref document number: 1020067023210

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 2005739776

Country of ref document: EP