WO2005098836A1 - レーザパルス制御回路 - Google Patents
レーザパルス制御回路 Download PDFInfo
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- WO2005098836A1 WO2005098836A1 PCT/JP2005/006502 JP2005006502W WO2005098836A1 WO 2005098836 A1 WO2005098836 A1 WO 2005098836A1 JP 2005006502 W JP2005006502 W JP 2005006502W WO 2005098836 A1 WO2005098836 A1 WO 2005098836A1
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- light emission
- emission level
- level
- setting
- laser pulse
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/12—Heads, e.g. forming of the optical beam spot or modulation of the optical beam
- G11B7/125—Optical beam sources therefor, e.g. laser control circuitry specially adapted for optical storage devices; Modulators, e.g. means for controlling the size or intensity of optical spots or optical traces
- G11B7/126—Circuits, methods or arrangements for laser control or stabilisation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/12—Heads, e.g. forming of the optical beam spot or modulation of the optical beam
- G11B7/125—Optical beam sources therefor, e.g. laser control circuitry specially adapted for optical storage devices; Modulators, e.g. means for controlling the size or intensity of optical spots or optical traces
- G11B7/126—Circuits, methods or arrangements for laser control or stabilisation
- G11B7/1263—Power control during transducing, e.g. by monitoring
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/12—Heads, e.g. forming of the optical beam spot or modulation of the optical beam
- G11B7/125—Optical beam sources therefor, e.g. laser control circuitry specially adapted for optical storage devices; Modulators, e.g. means for controlling the size or intensity of optical spots or optical traces
- G11B7/126—Circuits, methods or arrangements for laser control or stabilisation
- G11B7/1267—Power calibration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
- G11B7/006—Overwriting
- G11B7/0062—Overwriting strategies, e.g. recording pulse sequences with erasing level used for phase-change media
Definitions
- the present invention relates to a laser pulse control circuit.
- phase change optical disk As a rewritable optical disk, a phase change optical disk (CD-RW, DVD player RW, DVD-RAM, etc.) is widely used.
- a phase change optical disk when a recording layer is irradiated with a laser beam that becomes a laser beam of a certain level or more and then is rapidly cooled, it becomes an amorphous state.
- the recording layer is irradiated with laser light having a laser power lower than the laser power for forming the non-crystalline state, the recording layer becomes crystalline when cooled slowly.
- the laser power for forming the amorphous state is defined as the laser power for recording information on the optical disk (hereinafter, write power PW), and the laser power for forming the crystalline state.
- the laser power for erasing the information recorded on the optical disk hereinafter, erase power PE.
- recording is performed by a laser pulse having three power levels including a bias power PB lower than the erase power PE.
- An optical disk device that performs recording and reproduction on a phase change optical disk includes, for example, a laser diode (hereinafter, LD (Laser Diode)), a front monitor diode (hereinafter, FMD (Front Monitor Diode)), an LD drive circuit, and the like.
- LD Laser Diode
- FMD Front Monitor Diode
- a digital signal processing circuit that performs digital signal processing for disk drive encode Z decode, digital servo, etc.
- the analog signal processing circuit particularly generates a voltage control signal VWDC for setting the write power PW and supplies the voltage control signal VWDC to the LD drive circuit, and a voltage for setting the erase power PE.
- the control signal VEDC is generated and supplied to the LD drive circuit. It has a race power setting unit and a bias power setting unit that generates a voltage control signal VBDC for setting the bias power PB and supplies it to the LD drive circuit. Therefore, the LD drive circuit drives the LD with a laser pulse composed of three power levels corresponding to the voltage control signals VWDC, VEDC, and VBDC.
- the digital signal processing circuit constitutes a laser pulse control circuit that controls the write power setting section and the erase power setting section.
- the laser pulse control circuit controls the write power setting unit and the erase power setting unit to control the ratio of the erase power PE to the write power PW (PEZPW) before starting the actual recording. Make adjustments.
- the purpose of this Epsilon adjustment is to set the write power PW and erase power PE to appropriate power levels that match media-specific conditions such as media material and recording speed, and surrounding environmental conditions (temperature, etc.). Is to do.
- FIG. 10 is a flowchart for explaining Epsilon adjustment by a conventional laser pulse control circuit.
- an appropriate light receiving level (hereinafter referred to as an FMD target value) in an FMD when a predetermined E psilon is set is statistically obtained in advance using experimental data obtained from a plurality of experimental optical disk devices. It is assumed that it is done. Then, the conventional laser noise control circuit sets the current recording before starting the OPC (Optimum Power Control) process of performing test writing on the PCA (Power Calibration Area) provided on the phase-change optical disk. Determine the Epsilon to be used (hereinafter referred to as Epsilon recommended value) and erase power PE. At this time, the FMD target value corresponding to the Epsilon recommended value is also determined (S1000).
- OPC Optimum Power Control
- the write power PW is gradually increased (S1001), and each time, the average value of the received light level per predetermined period (hereinafter, referred to as FMD observation value) observed by the FM D is calculated by LPF (Low Pass Filter) and the like (S1002).
- FMD observation value the average value of the received light level per predetermined period observed by the FM D is calculated by LPF (Low Pass Filter) and the like (S1002).
- LPF Low Pass Filter
- S1002 Low Pass Filter
- the next stepwise adjustment of the write power PW is performed.
- the FMD observation force exceeds the FMD target value for the first time (S1003: YES)
- the write power PW force at that time is the Epsilon recommended value to be set this time and the write power PW for the erase power PE (S1004).
- the conventional laser pulse control circuit uses the FMD observation value at the time of Epsilon adjustment, for example, as in the laser pulse level adjustment disclosed in Patent Document 1 shown below.
- the stepwise adjustment of PW was repeated many times.
- Patent Document 1 Japanese Patent Application Laid-Open No. 2001-34987
- the conventional laser pulse control circuit requires the FMD observation value to be set before the power levels of the write power PW and the erase power PE according to the Epsilon recommended value are set. Acquisition and stepwise adjustment of write power PW based on FMD observations will be repeated many times.
- a main aspect of the present invention for solving the above-described problem is a first light emission level setting unit for setting a first light emission level of a laser element for erasing information recorded on an optical disc, A second light-emission level setting unit for setting a second light-emission level of the laser element for recording information to the laser device, the laser having the first and second light-emission levels
- the setting of the first and second light emission levels according to a predetermined ratio of the first light emission level to the second light emission level includes setting the first and second light emission levels.
- Second flash A laser pulse control circuit for causing a bell setting unit to perform adjustment of the second light emission level with respect to the second light emission level setting unit based on the first light emission level.
- the relationship between the amount of operation to be performed and the reciprocal of the ratio is a straight line that always passes through a certain point in the case of the predetermined first light emission level, and the relationship between the straight line and the predetermined reference straight line.
- the operation amount corresponding to the first light emission level and the reciprocal of the ratio according to the optical disc, based on the regularity that the intersection angle between them is proportional to the predetermined first light emission level. Is calculated, and the second light emission level setting unit sets the second light emission level according to the calculated operation amount.
- FIG. 1 is a diagram illustrating an overall configuration of an optical disc system according to an embodiment of the present invention.
- FIG. 2 is a diagram illustrating a relationship between lZEpsilon and APCATT.
- FIG. 3 is a diagram for explaining a method of obtaining a reference straight line according to one embodiment of the present invention.
- FIG. 4 is a flowchart illustrating a method of obtaining a reference straight line according to one embodiment of the present invention.
- FIG. 5 is a diagram for explaining a method of obtaining an intersection and an intersection angle change rate according to an embodiment of the present invention.
- FIG. 6 is a flowchart illustrating a method of acquiring an intersection and an intersection angle change rate according to an embodiment of the present invention.
- FIG. 7 is a diagram for explaining Epsilon adjustment by a laser pulse control circuit according to one embodiment of the present invention.
- FIG. 8 is a flowchart illustrating Epsilon adjustment of the laser pulse control circuit according to one embodiment of the present invention.
- FIG. 9 is a waveform diagram of a laser pulse employing a multi-pulse modulation method.
- FIG. 10 is a flowchart illustrating conventional Epsilon adjustment. Explanation of reference numerals
- FIG. 1 is a diagram showing an overall configuration of an optical disk device 600 including a laser pulse control circuit according to an embodiment of the present invention.
- the optical disc 100 is a rewritable phase-change optical disc (CD-RW, DVD player RW, DVD-RAM, etc.).
- the optical disk device 600 mainly includes an optical pickup 200, a digital signal processing circuit 300, and an analog signal processing circuit 400.
- the optical disk device 600 is communicably connected to an external host computer 500.
- the optical pickup 200 includes an LD (Laser Diode) 20, an FMD (Front Monitor Diode) 21, a PD (Photo Detector) 23, an LD drive circuit 24, and other components such as an optical lens and a servo actuator (not shown). Is provided.
- LD Laser Diode
- FMD Front Monitor Diode
- PD Photo Detector
- LD drive circuit 24 and other components such as an optical lens and a servo actuator (not shown). Is provided.
- the LD 20 is a semiconductor laser device that emits a laser beam for performing recording and reproduction on the optical disc 100 based on the drive current ILD supplied from the LD drive circuit 24.
- a laser pulse to which a multi-pulse modulation method is applied (hereinafter, referred to as a multi-pulse modulation pattern) is generally used.
- a laser pulse pattern such as a multi-pulse modulation pattern is commonly called a write strategy.
- the multi-pulse modulation pattern includes an erase power PE (“first Light emission level ”), write power PW (“ second light emission level ”) for recording information on the optical disc 100, and bias power PB.
- PE first Light emission level
- PW second light emission level
- a laser beam of erase power PE is emitted from the LD 20
- the write power PW peak level
- a pulse train of laser light having an amplitude between the laser beam and the bias power PB (bottom level) is emitted from the LD 20.
- the section having the noise power PB in the mark section is the cooling section, and the heat distribution is made uniform.
- the FMD 21 receives a laser beam emitted from the LD 20 to the optical disk 10 and generates a light receiving current IFMD proportional to the received light amount.
- the light receiving current IFMD is proportional to the light emitting power of the LD 20. Therefore, the FMD 21 can be said to be a light receiving element for observing the emission power of the LD 20.
- the light receiving current IFMD generated by the FMD 21 is converted to a light receiving voltage VFMD via an iZV converter (not shown) and supplied to the SZH units 40 and 43.
- the PD 23 When reproducing information recorded on the optical disc 100, the PD 23 receives the reflected light from the optical disc 100 with respect to the laser light emitted from the LD 20, and generates a light receiving current IPD proportional to the received light quantity. To do.
- the light receiving current I PD generated by the PD 23 is converted into a light receiving voltage VPD via an IZV converter (not shown) and supplied to the RF amplifier 48.
- the LD drive circuit 24 Based on the modulation signal Vmod supplied from the switch 47, the LD drive circuit 24 generates a drive current ILD according to the modulation signal Vmod. Then, the LD drive circuit 24 drives the LD 20 with the drive current ILD.
- a modulation signal Vmod based on only the control signal VBDC from the bias power setting unit 42 is supplied to the LD drive circuit 24 via the switch 47.
- a control signal VBDC output from the bias power setting unit 42, a control signal VEDC output from the erase power setting unit 45, and a control signal VWDC output from the write power setting unit 46 are synthesized at switch 47 and the result is As a result, the modulation signal Vmod having a predetermined pattern is supplied to the LD drive circuit 24.
- the digital signal processing circuit 300 is an integrated circuit that performs digital signal processing for driving an optical disk (digital servo, encode Z decode, etc.). Note that the laser pulse control circuit according to one embodiment of the present invention is implemented as a digital signal processing circuit 300. Note that each function of the digital signal processing circuit 300 such as digital servo / encode Z-decode may be implemented as a separate chip. That is, the laser pulse control circuit according to one embodiment of the present invention may be implemented as a single chip.
- the CPU 30 controls the entire digital signal processing circuit 300, and furthermore, the overall system control of the optical disk device 600.
- Each function of the CPU 30 is implemented as firmware (program), and is stored in the memory 31 accessible by the CPU 30.
- Each function of the CPU 30 may be realized as hardware (circuit).
- a microprocessor, a microcomputer, or the like may be employed.
- the CPU 30 performs an APC (Automatic Automatic Modulation) in order to perform an appropriate Epsilon adjustment suitable for the conditions (recording speed, material, and the like) specific to the optical disc 100 before the OPC process is started upon recording on the optical disc.
- APC Automatic Automatic Modulation
- Power Control The following processing is performed to operate the processing units 41 and 44 and the attenuator 461 at appropriate timing.
- the CPU 30 controls the APC processing unit 41 to control the light emission level of the LD 20 to a predetermined value.
- the reference value B handled by the CPU 30 is a digital value. Therefore, when the CPU 30 specifies the reference value B to the APC processing unit 41, the reference value B (digital value) from the CPU 30 is supplied to the APC processing unit 41, which converts the digital value into an analog value.
- the CPU 30 specifies the reference value B as an operation amount for causing the APC processing unit 41 to set the bias power PB in the mark section of the multi-pulse modulation pattern during the Epsilon adjustment. I do. Even in this case, when the CPU 30 specifies the reference value B to the APC processing unit 41, the reference value B (digital value) from the CPU 30 is converted into a DZA. The analog value is supplied to the APC processing unit 41.
- the CPU 30 specifies the reference value E to the APC processing unit 44 as an operation amount for setting the erase power PE in the space section of the multi-pulse modulation pattern at the time of Epsilon adjustment. Even in this case, when the CPU 30 specifies the reference value E to the APC processing unit 44, the analog value obtained by DZA-converting the reference value E (digital value) from the CPU 30 is transmitted to the APC processing unit 44. Supplied.
- the CPU 30 specifies the attenuation rate ATT as an operation amount for causing the attenuator 461 to set the write power PW in the mark section of the multi-pulse modulation pattern.
- the attenuation rate ATT is designated from the CPU 30 to the attenuator 461
- the attenuation rate ATT (digital value) from the CPU 30 is supplied to the analog value attenuator 461 obtained by converting the DZA.
- the memory 31 employs a nonvolatile memory such as an EEPROM in order to always store a program executed by the CPU 30 and data used by the program.
- a nonvolatile memory such as an EEPROM
- the memory 31 stores data having an erase power PE of 7.0 mW as data used to determine a straight line ("straight line") for APCATT calculation in the Epsilon adjustment for the present invention.
- OmW. The intersection (X 0, Y 0), and the intersection angle change rate ⁇ ⁇ ⁇ are stored in advance. This eliminates the need to transfer these data from an external device (for example, the host computer 500) every time the Epsilon adjustment is performed, so that the Epsilon adjustment can be performed at a high speed.
- the memory 31 stores in advance a reference value E for setting the Epsilon recommended value and the erase power PE associated with the identification data of the optical disc 100.
- the recording management information such as the Epsilon recommended value pre-defined as a preformat is pre-defined on the optical disc 100 as in the conventional case.
- the encoder 32 has an encoding processing unit 321 and a write strategy unit 322.
- the encoding processing unit 321 performs a predetermined encoding process according to the optical disc 100 on the recording data (image data, audio data, video data, etc.) supplied from the host computer 500 in the case of optical disc recording. .
- the write strategy unit 322 generates a modulation switch signal Smod based on the recording data (hereinafter, coded data) on which a predetermined encoding process has been performed by the encoding processing unit 321, and transmits the modulation switch signal Smod to the switch 47. Supply.
- the modulation signal Vmod is generated by the switching operation of the switch 47 based on the modulation switch signal Smod, and the LD 20 is driven by the multi-pulse modulation pattern.
- the decoder 33 performs a predetermined decoding process on the RF signal reproduced from the optical disk 100 when reproducing the optical disk.
- the data subjected to the decryption processing (hereinafter, reproduction data) is supplied to the host computer 500. Further, the decoder 33 performs a predetermined decoding for extracting identification data of the optical disc 100 from ATIP information (in the case of CD-RW media) or wobbling information (in the case of DVD players) in which the power of the optical disc 100 is also reproduced. Perform processing. As a result, the identification data of the optical disc 100 is decrypted and supplied to the CPU 30.
- the analog signal processing circuit 400 performs analog signal processing for driving an optical disc, such as amplification of RF / HF signals, generation of AGC (Automatic Gain Control), APC (Automatic Power Control), and servo control signals.
- analog signal processing circuit 400 is an embodiment of the control unit according to the present invention, and is implemented by being connected to the digital signal processing circuit 300.
- the S / H (Sample Hold) unit 40 sets the FMD 21 for a predetermined sampling period when setting the bias power PB in the mark section of the multi-pulse modulation pattern in the case of reproducing an optical disk or recording an optical disk. Sample-hold the received light voltage VFMD generated via this. At this time, the signal sampled and held is referred to as a BSHO signal. This BSHO signal is supplied to the APC processing unit 41.
- the S / H (Sample Hold) section 43 is a multi-pulse modulation pattern for optical disc recording.
- the received light voltage VFMD generated via the FMD 21 is sampled and held for a predetermined sampling period.
- the sampled and held signal is referred to as a WSHO signal.
- This WS HO signal is also supplied to the APC processing unit 44.
- the APC processing unit 41 obtains a differential voltage according to a deviation between the level of the RSHO signal sampled and held in the SZH unit 40 and the reference value B supplied from the CPU 30 via the DZA conversion. . Then, the APC processing unit 41 executes APC so as to reduce the difference voltage.
- the APC processing unit 44 also has a differential voltage corresponding to the deviation between the level of the WSHO signal sampled and held in the SZH unit 43 and the reference value E supplied from the CPU 30 via the DZA conversion. Ask for. Then, the APC processing unit 44 executes the APC so as to reduce the difference voltage.
- the bias power setting unit 42 generates a voltage control signal VBDC for setting the bias power PB to a power level corresponding to the reference value B based on the APC output from the APC processing unit 41. I do.
- the voltage control signal VBDC is supplied to the LD drive circuit 24 when selected by the switching operation of the switch 47.
- the erase power setting section 45 generates a voltage control signal VEDC for setting the erase power PE to a power level corresponding to the reference value E based on the APC output from the APC processing section 44. .
- the voltage control signal VEDC is supplied to the LD drive circuit 24 when selected by the switching operation of the switch 47.
- the write power setting section 46 is a level shift amount APCATT determined by the attenuation rate ATT of the attenuator 461 supplied from the CPU 30 via DZA conversion and a predetermined fixed amplification rate of the amplifier 462. (dB), the voltage control signal VEDC from the erase power setting unit 45 is level-shifted.
- the level shift of the voltage control signal VEDC is the voltage control signal VWDC for setting the write power PW to the power level according to APCATT.
- the voltage control signal VWDC is supplied to the LD drive circuit 24 when selected by the switching operation of the switch 47.
- RF amplifier 48 amplifies received light voltage VPD generated via PD23 by a predetermined amplification rate. By doing so, an RF signal is generated.
- the RF amplifier 48 generates ATIP information (in the case of CD-RW media) or wobbling information (in the case of DVD players RW media) including identification data of the optical disc 100.
- the RF signal and the ATIP information Z-wobbling information are supplied to the decoder 33.
- the write power setting unit 46 may be configured with only one variable gain amplifier that level-shifts the control voltage signal VEDC.
- the CPU 30 designates the level shift amount in the variable gain amplifier to the write power setting unit 46.
- FIG. 2 is used to explain the relationship established between Epsilon and APCATT based on the erase power PE, which was considered when devising the Epsilon adjustment according to the present invention.
- APCATT is a level shift amount with respect to the erase power PE for determining the write power PW. That is, there is a proportional relationship between the reciprocal of Epsilon and APCATT. In the following, this proportional relationship is expressed as a straight line that associates the reciprocal of Epsilon with APCATT.
- a straight line that associates the reciprocal of Epsilon with APCATT has a certain point X at any erase power PE. It can be seen that they intersect. Note that this single point X indicates the case where Epsilon is 1.0 and the APCATT force is OdB. That is, when Epsilon is 1.0, the write power PW and the erase power PE have the same power level, and at this time, the APCATT sets the erase power PE in the write power setting section 46 as OdB that does not amplify or attenuate. It is uniquely determined independently of the erase power PE. That is, the state indicated by the intersection X is a case where the state is not affected by the control characteristics of the attenuator 461 and the amplifier 462.
- the Epsilon adjustment that works in the present invention is based on the proportional relation established between the reciprocal of Epsilon and APCATT, and the straight line representing the proportional relation always passes through a certain point X regardless of the erase power PE. Utilization of regularity such as the relationship between the relationship and the slope of the straight line that associates the reciprocal of Epsilon with APCATT and the erase power PE.
- two arbitrary erase powers PE are determined and their erase powers are determined.
- two reference lines representing the proportional relationship between the reciprocal of Epsilon and APCATT with respect to PE are obtained.
- an intersection X or an intersection angle change rate ⁇ ⁇ corresponding to a proportional coefficient between the eraser PE and the inclination of the straight line is determined.
- the two optional erase power PEs power levels included in the range defined as the erase power PE are adopted.
- the erase power PE is specified as a minimum value of 7. OmW and a maximum value of 15. OmW. Therefore, as two arbitrary erase power PEs, for example, 7. OmW and 10. OmW are adopted as power levels within the specified range from 7. OmW power to 15. OmW. In this way, by adopting any two power levels within the specified range of the erase power PE, it is possible to acquire the appropriate data (straight line, intersection point, intersection angle change rate) for performing the Epsilon adjustment. .
- the CPU 30 specifies the reference value E for setting the 7. OmW erase power PE to the APC processing section 44 (S400). Further, the CPU 30 specifies the attenuation rate ATT according to the predetermined A PCATT (AO) to the attenuator 461 (S401).
- the erase power setting section 45 generates a voltage control signal VEDC for setting the erase power PE to 7.OmW
- the write power setting section 46 converts the voltage control signal VED C to APCATT (AO ) A voltage control signal VWDC level-shifted is generated.
- the switch 47 generates a voltage control signal VEDC generated in the erase power setting section 45 and a voltage control signal VEDC generated in the write power setting section 46 based on the switch modulation signal Smod from the write strategy section 322.
- the modulated voltage control signal VWDC is synthesized to generate a modulation signal Vmod.
- This modulation signal Vmod is supplied to the LD drive circuit 22, and as a result, the LD 20 is driven (S402).
- the power meter acquires WO (7. OmW) as the first measurement data of the light power PW in the mark section, as the emission power of the LD 20 (S403). Therefore, by calculating the ratio of 7.OmW to W0 (7.OmW) (7.0mW / W0 (7.OmW)), the first sample data EO (7.OmW) of Epsilon was extracted. (S404)
- the CPU 30 sends a predetermined APCATT to the attenuator 461 without changing the erase power PE setting.
- a new attenuation rate ATT corresponding to (Al) is specified (S401).
- the power meter uses the W1 (7. OmW) force as the second measurement data of the write power PW in the mark section. S is acquired (S403). Therefore, by calculating the ratio of 7.OmW to W1 (7.OmW) (7.OmW / Wl (7.OmW)), the second sample data E1 (7.OmW) of Epsilon is extracted. (S404).
- a first reference straight line (hereinafter, referred to as a first reference straight line) is obtained by connecting the two coordinate data with a straight line (S406).
- the first and second reference straight lines can be easily determined only by extracting two pieces of coordinate data under a predetermined erase power PE. Also, by determining the first and second reference straight lines, the intersection and the intersection angle change rate can be uniquely determined. Therefore, unlike the conventional case, it is not necessary to perform a complicated operation such as obtaining an empirical formula by calculating a large amount of experimental data obtained from a plurality of experimental optical disk devices, and the adjustment of Epsilon according to the present invention is not required. Necessary data can be easily obtained.
- the first and second reference straight lines may be approximated by a straight line approximation using more than two pieces of coordinate data. Depending on the decision.
- a method of acquiring the intersection and the intersection angle change rate will be described with reference to FIG. 5 and the flowchart of FIG. 6 as appropriate.
- the main part of the operation shown in the flowchart of FIG. 6 is, for example, a CPU (not shown) mounted on an external device such as a power meter.
- Equation 1 the first and second reference straight lines are represented by the following Equation 1, respectively.
- (xO, yO) is an intersection of the first and second reference straight lines.
- Yl is the APCATT when 1 / Epsilon in the first reference line is xl
- y2 is the second reference line.
- the intersection (xO, yO) of the first and second reference straight lines is calculated by the following equation 2 (S600).
- intersection angle ⁇ 1 between the first and second reference straight lines is calculated by the following equation 3 (S60 Do
- ⁇ 1 calculated by Expression 3 corresponds to the erase power PE for 3. OmW (10.0mW-7.OmW). Therefore, the intersection angle change rate ⁇ ⁇ corresponding to the proportionality constant between the erase power PE and the slope of the reference straight line can be calculated by dividing ⁇ 1 calculated by Equation 3 by the predetermined unit of erase power PE. .
- the predetermined unit of the erase power PE is preferably a minimum unit (for example, 0.1 lmW) in which the erase power PE can be adjusted. This makes it possible to finely adjust the Epsilon according to the adjustment sensitivity of the erase power PE.
- the crossing angle change rate ⁇ ⁇ per erase power PE of about 0.1 lmW is calculated by the following Expression 4 (S602).
- intersection (xO, yO) and the intersection angle change rate ⁇ ⁇ force obtained as described above are combined with either the deviation of the first or second reference straight line, and the digital signal processing circuit 300 To be stored in the memory 31.
- Epsilon adjustment of the digital signal processing circuit 300 according to the present invention will be described with reference to FIG. 7 and the flowchart of FIG.
- the operation shown in the flowchart of FIG. 8 is performed by the CPU 30 unless otherwise specified.
- the reference straight line stored in the memory 31 in advance is a first reference straight line. Further, in the description of the flowchart of FIG. However, for the sake of explanation, it is assumed that a non-multi-pulse modulation method in which the bias power PB is not set is adopted.
- the optical disk 100 is stored in a disk storage unit (not shown) provided in the optical disk device 600 in order to start optical disk recording.
- the LD 20 is driven based on the bias power PB set by the bias power setting unit 42 and! /, And the reproduction of the optical disc 100 is started.
- the identification data of the optical disc 100 is decoded and supplied to the CPU 30 from the ATIP information (in the case of CD-RW media) or the wobbling information (in the case of DVD player RW media) reproduced from the optical disc 100. .
- the CPU 30 reads out the reference value E and the Epsilon recommended value of the erase power PE associated with the identification data of the optical disc 100 from the memory 31 so that the erase power in the Epsilon adjustment at this time is read.
- PE hereinafter, erase power Pe
- Epsilon hereinafter, Epsilon
- the CPU 30 subsequently reads out the first reference straight line, the intersection (x0, y0), and the intersection angle change rate ⁇ ⁇ ⁇ from the memory 31. Then, based on the first reference straight line, the intersection (x0, y0), and the crossing angle change rate ⁇ ⁇ ⁇ ⁇ read from the memory 31, the CPU 30
- the Epsilon straight line (hereinafter, referred to as APCATT calculation straight line) is calculated (S801).
- intersection angle ⁇ 2 between the APCATT calculation straight line and the first reference straight line is calculated by the following Expression 5.
- ⁇ 2 ⁇ ⁇ -10- (PemW- 7. OmW)
- y2 y0 + ((xl -x0) ⁇ (yl -yO) + (xl— ⁇ ) "2-tan ( ⁇ 2)) / ((xl -x0)-(yl -yO) -tan (0 2))
- the erase power setting section 45 generates the voltage control signal VEDC for setting the current erase power Pe, and the write power setting section 46 applies the voltage control signal VEDC to the current power.
- a voltage control signal VWD C level-shifted by APCATT is generated (S803).
- the voltage control signal VEDC generated in the erase power setting section 45 based on the switch modulation signal Smod corresponding to the OPC write strategy from the write strategy section 322 and the write power setting section 46 Are combined to generate a modulation signal Vmod.
- the modulated signal Vmod is supplied to the LD drive circuit 22, and as a result, the LD 20 is driven to perform the OPC process (S804). Then, after the end of the OPC process, the recording based on the actual recording data is started (S805).
- the digital signal processing circuit 300 that is, the laser pulse control circuit according to the present invention performs the adjustment repeatedly many times based on the FMD observation value as in the case of the conventional Epsilon adjustment.
- the proportional relationship that holds between the reciprocal of Epsilon and APCATT, the relationship that the straight line representing the proportionality always passes through a certain point X for any erase power PE, and the reciprocal of Epsilon Based on the proportionality established between the slope of the straight line that associates APCATT with APCATT and the erase power PE, the erase power PE and APCATT (ie, light power PW ) Is determined promptly by calculation. As a result, recording starts immediately.
- the FMD 21 does not intervene when adjusting the write power PW as in the conventional case, the accuracy of the FMD 21 is not affected, and the accuracy of the Epsilon adjustment can be improved.
- the deviation of either the first reference line or the second reference line, the intersection (xO, yO), and the intersection angle change rate ⁇ are used. Since the APCATT calculation line is determined by one operation, the above-mentioned regularity can be identified quickly, and the Epsilon adjustment can be quickly performed.
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- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Head (AREA)
- Optical Recording Or Reproduction (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/599,742 US7512057B2 (en) | 2004-04-09 | 2005-04-01 | Laser pulse control circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004115954A JP2005302136A (ja) | 2004-04-09 | 2004-04-09 | レーザパルス制御回路 |
JP2004-115954 | 2004-04-09 |
Publications (1)
Publication Number | Publication Date |
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WO2005098836A1 true WO2005098836A1 (ja) | 2005-10-20 |
Family
ID=35125315
Family Applications (1)
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PCT/JP2005/006502 WO2005098836A1 (ja) | 2004-04-09 | 2005-04-01 | レーザパルス制御回路 |
Country Status (6)
Country | Link |
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US (1) | US7512057B2 (ja) |
JP (1) | JP2005302136A (ja) |
KR (1) | KR100777919B1 (ja) |
CN (1) | CN1930618A (ja) |
TW (1) | TWI260006B (ja) |
WO (1) | WO2005098836A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8130609B1 (en) * | 2007-05-22 | 2012-03-06 | Marvell International Ltd. | System and method of bias control |
US9159355B1 (en) | 2010-01-21 | 2015-10-13 | Marvell International Ltd. | DVD-RAM header or land/groove detection |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080075064A1 (en) * | 2006-08-30 | 2008-03-27 | Microsoft Corporation | Device to PC authentication for real time communications |
JP4279338B1 (ja) * | 2008-03-28 | 2009-06-17 | 株式会社東芝 | 光ディスク装置および光パワーの補正方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04196592A (ja) * | 1990-11-28 | 1992-07-16 | Kawasaki Steel Corp | レーザ駆動装置 |
JP2001034987A (ja) * | 1999-07-23 | 2001-02-09 | Ricoh Co Ltd | 光情報記録装置 |
JP2001229561A (ja) * | 2000-02-09 | 2001-08-24 | Matsushita Electric Ind Co Ltd | レーザ制御装置 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5703855A (en) * | 1993-04-06 | 1997-12-30 | Hitachi, Ltd. | Optical disk apparatus and recording and reading method for an optical disk using the same |
JP3969958B2 (ja) * | 2001-02-14 | 2007-09-05 | 株式会社リコー | 光情報記録方法 |
-
2004
- 2004-04-09 JP JP2004115954A patent/JP2005302136A/ja not_active Withdrawn
-
2005
- 2005-04-01 CN CNA2005800072314A patent/CN1930618A/zh active Pending
- 2005-04-01 US US10/599,742 patent/US7512057B2/en not_active Expired - Fee Related
- 2005-04-01 WO PCT/JP2005/006502 patent/WO2005098836A1/ja active Application Filing
- 2005-04-01 KR KR1020067020901A patent/KR100777919B1/ko not_active IP Right Cessation
- 2005-04-08 TW TW094111103A patent/TWI260006B/zh not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04196592A (ja) * | 1990-11-28 | 1992-07-16 | Kawasaki Steel Corp | レーザ駆動装置 |
JP2001034987A (ja) * | 1999-07-23 | 2001-02-09 | Ricoh Co Ltd | 光情報記録装置 |
JP2001229561A (ja) * | 2000-02-09 | 2001-08-24 | Matsushita Electric Ind Co Ltd | レーザ制御装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8130609B1 (en) * | 2007-05-22 | 2012-03-06 | Marvell International Ltd. | System and method of bias control |
US9159355B1 (en) | 2010-01-21 | 2015-10-13 | Marvell International Ltd. | DVD-RAM header or land/groove detection |
Also Published As
Publication number | Publication date |
---|---|
TWI260006B (en) | 2006-08-11 |
CN1930618A (zh) | 2007-03-14 |
KR100777919B1 (ko) | 2007-11-21 |
JP2005302136A (ja) | 2005-10-27 |
TW200605047A (en) | 2006-02-01 |
KR20060128048A (ko) | 2006-12-13 |
US7512057B2 (en) | 2009-03-31 |
US20070274191A1 (en) | 2007-11-29 |
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