WO2005078793A1 - Procede pour realiser un module de puissance, et module de puissance - Google Patents

Procede pour realiser un module de puissance, et module de puissance Download PDF

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Publication number
WO2005078793A1
WO2005078793A1 PCT/EP2005/050298 EP2005050298W WO2005078793A1 WO 2005078793 A1 WO2005078793 A1 WO 2005078793A1 EP 2005050298 W EP2005050298 W EP 2005050298W WO 2005078793 A1 WO2005078793 A1 WO 2005078793A1
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WIPO (PCT)
Prior art keywords
power module
module
components
substrate
film
Prior art date
Application number
PCT/EP2005/050298
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German (de)
English (en)
Inventor
Ralf-Michael Franke
Original Assignee
Siemens Aktiengesellschaft
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Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO2005078793A1 publication Critical patent/WO2005078793A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
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Definitions

  • the invention relates to a method for producing a power module and a power module.
  • Power electronic components such as transistors and diodes are now often combined in power modules in order to implement certain topologies such as pulse converters and / or line rectifiers in one module.
  • a disadvantage of such bond connections is that each bond connection introduces an additional inductance into the power module, as a result of which the voltage load on the individual components increases during a switching operation. A significant reduction in this parasitic inductance is not possible for geometric and manufacturing reasons. Furthermore, the current density at the bond points (connection points) itself is relatively high, which reduces the reliability of the connections. It is also disadvantageous that complicated topologies can hardly be realized with this manufacturing technology because of crossing bond connections.
  • An alternative method for contacting electrical contact surfaces on the surface of a substrate is known from WO 03/030247 A2. This procedure includes the following steps:
  • each contact surface to be contacted on the surface by opening respective windows in the film
  • the present invention is based on the object of specifying a method for producing power modules in which the contacting and electrical connection of power modules with one another and with conductor tracks on a substrate is carried out in such a way that the disadvantages mentioned at the outset are avoided during production in accordance with the known bonding method become.
  • a corresponding power module should also be specified.
  • the method according to claim 1 is used to produce a power module comprising one or more power electronic components arranged on a substrate with one or more contact surfaces, in which the contacting of the contact surfaces and the formation of one or more electrical ones Connections between the contact surfaces of the power component and contact surfaces of the substrate and / or between contact surfaces of power components comprises the following steps: - Laminating a film made of electrically insulating plastic material onto a surface formed by substrate and components under vacuum, so that the film covers the surface including substrate and components covered with the contact surface (s) and adhering to this surface,
  • This method according to the invention is based on the consideration of applying the method known from WO 03/030247 A2 to power modules.
  • the advantages achieved with the invention are, in particular, that the contacts and connections produced in this way have a higher electrical conductivity than the prior art, a larger conductor cross-section, a lower leakage inductance and better heat dissipation. Furthermore, these contacts and connections are more robust against higher temperatures, i.e. Resistant even at temperatures above 200 ° C.
  • the manufacturing method according to the invention enables multi-layer wiring and thus complex structures and topologies of a power module. Furthermore, direct connection of connections of the power module is possible.
  • any substrates on an organic or inorganic basis can be used as substrates.
  • substrates are, for example, PCB (Printed Circuit Board) -, DCB (Direct Copper Bonding) -, IM (Insulated Metal) -, HTCC (High Temperature ture Cofired Ceramics) - and LTCC (Low Temperature Cofired Ceramics) - substrates.
  • the lamination is advantageously carried out in a vacuum press. Vacuum deep drawing, hydraulic vacuum pressing, vacuum gas pressure pressing or similar laminating processes are also conceivable.
  • the pressure is advantageously applied isostatically.
  • the lamination is carried out, for example, at temperatures from 100 ° C to 250 ° C and a pressure of 1 bar to 10 bar.
  • the exact process parameters of lamination, ie pressure, temperature, time etc., depend, among other things, on the topology of the substrate, the plastic material of the film and the thickness of the film.
  • electrically conductive material For flat contact, physical or chemical • deposition of the electrically conductive material is advantageously carried out.
  • Such physical processes are sputtering and vapor deposition (Physical Vapor Deposition, PVD).
  • Chemical deposition can be carried out from the gaseous phase (Chemical Vapor Deposition, CVD) and / or liquid phase (Liquid Phase Chemical Vapor Deposition). It is also conceivable that a thin electrically conductive partial layer is first applied by one of these methods, on which a thicker electrically conductive partial layer is then electrodeposited.
  • the substrate with the components arranged on it usually has height differences due to its topology.
  • the film is therefore designed in such a way that a height difference of up to 500 ⁇ m can be overcome.
  • semiconductor components and / or passive components are provided as components of the power module.
  • the power module has a 3-phase rectifier and / or 6-pulse converter, in particular with diodes, preferably SiC diodes, and / or a chopper and / or a chopper transistor.
  • a chopper is understood to be a DC chopper.
  • a DC chopper is a low-loss actuator of the power electronics between a DC voltage source and a DC voltage consumer. The voltage of the DC source is switched by the actuator to the consumer. Depending on the duration and number of impulses per unit of time, an average voltage value is generated at the consumer, which can be set continuously.
  • the power module comprises a power amplifier module or a power amplifier, in particular a power amplifier module or a power amplifier of a converter.
  • Inverters are converters that convert an AC system with a specific voltage, frequency and number of phases into an AC system with a different voltage, frequency and, if necessary, number of phases.
  • the power module comprises a matrix converter module or a matrix converter, in particular a matrix converter module or a matrix converter with shunt resistors (shunt resistors, parallel resistors) for current measurement.
  • Matrix inverters belong to the family of direct inverters. In contrast to DC link converters, all input phases in the matrix converter are connected to all output phases via a switching matrix.
  • the power module can comprise an F3E module or an F3E architecture.
  • F3E describes a specific type of modulation, namely frequency modulation.
  • a further embodiment variant of the method according to the invention can also provide that the power module is an inverter module or an inverter, in particular a Three-point inverter module or a three-point inverter. Inverters convert direct current into alternating or three-phase current.
  • the conductor tracks are designed as planar conductor tracks.
  • the conductor tracks can be formed at least partially from copper.
  • the substrate has conductor tracks and the components of the power module are arranged in contact with these conductor tracks and / or are insulated next to these conductor tracks on the substrate.
  • the laminated or laminated film can consist of any thermoplastic, thermoset and mixtures thereof.
  • the film used is preferably and advantageously a film made of a plastic material based on polyimide (PI), polyethylene (PE), polyphenol, polyether ether ketone (PEEK) and / or epoxy.
  • PI polyimide
  • PE polyethylene
  • PEEK polyether ether ketone
  • the film can have an adhesive coating on the surface.
  • the thickness of the film can be 10 ⁇ m to 500 ⁇ m.
  • a laminated film with a thickness of 25 to 150 ⁇ m is used in the method according to the invention.
  • a tempering step is carried out in particular.
  • a temperature treatment improves the adhesion of the film to the surface.
  • the lamination (with or without annealing step) is repeated until a certain thickness of the laminated film is reached.
  • films of reduced thickness are processed into a laminated film of higher thickness.
  • These foils are advantageous from a kind of plastic material. It is also conceivable that foils consist of several different plastic materials. The result is a layered, laminated film.
  • a window in the film is opened by laser ablation.
  • a ⁇ wavelength of a laser used for this is between 300 nm and 1100 nm.
  • the power of the laser is between 1 W and 100 W.
  • the windows are opened without damaging an aluminum contact that may be under the film.
  • Photo film is used and a window is opened by a photolithographic process.
  • the photolithographic process includes exposing the photosensitive film, developing the exposed and / or unexposed areas of the film, and removing the exposed or unexposed areas of the film.
  • the cleaning step is carried out, for example, using wet chemistry.
  • a plasma cleaning process is also conceivable.
  • a layer composed of a plurality of partial layers arranged one above the other and made of different, electrically conductive material is used.
  • different metal layers are applied one above the other.
  • the number of sub-layers or metal layers is, in particular, 2 to 5.
  • the electrically conductive layer composed of a plurality of sub-layers can, for example, integrate a sub-layer functioning as a diffusion barrier.
  • Such a partial layer consists, for example, of a titanium-tungsten alloy (TiW).
  • TiW titanium-tungsten alloy
  • a partial layer that promotes or improves the adhesion is applied directly to the surface to be contacted.
  • Such a partial layer consists, for example, of titanium.
  • At least one conductor track is produced from the electrically conductive material after the two-dimensional contacting and / or on the layer.
  • the conductor track can be applied to the layer.
  • the layer is structured to produce the conductor track. This means that the conductor track is created in this layer.
  • the conductor track is used, for example, to make electrical contact with a component.
  • the structuring is usually carried out in a photolithographic process.
  • a photoresist can be applied to the electrically conductive layer, dried and then exposed and developed.
  • a tempering step may follow in order to stabilize the applied photoresist against subsequent treatment processes.
  • Conventional positive and negative resists (coating materials) can be used as photoresist.
  • the photo lacquer is applied, for example, by a spraying or dipping process. Electro-deposition (electrostatic or electrophoretic deposition) is also conceivable.
  • photosensitive foils can also be used, which are laminated on and exposed and developed in a manner comparable to the applied photoresist layer.
  • the following can be used to generate the conductor track: in a first sub-step, the electrically conductive layer is structured and in a subsequent sub-step a further metallization is applied to the conductor track produced.
  • the conductor track is reinforced by the further metallization.
  • copper is deposited on the conductor track created by structuring. Vanically deposited in a thickness of 1 ⁇ m to 400 ⁇ m.
  • the photoresist layer or the laminated film is then removed. This can be done, for example, with an organic solvent, an alkaline developer or the like. Subsequent differential etching removes the flat, metallically conductive layer that is not reinforced with the metallization.
  • the reinforced conductor track is retained.
  • the steps of laminating, exposing, contacting and generating the conductor track are carried out several times to produce a multilayer device.
  • the invention uses an advantageous technology known from WO 03/030247 for the electrical contacting and wiring of connection pads or contact surfaces in the production of power modules, in particular in the above-mentioned special power modules. This means that even complex power modules can be implemented with this technology. With this method, the flat connection and the special insulation also result in a low-inductance connection that enables fast and low-loss switching.
  • the film is laminated under vacuum in the process according to the invention by isostatic lamination.
  • An electrical insulation layer is produced by laminating the film.
  • the production of the insulation layer by laminating the film according to the invention offers the following advantages:
  • a film made of polyimide for example, is resistant up to 300 ° C.
  • the entire contact area can be used so that high currents can be derived.
  • Contact areas from 60 mm 2 to 100 mm 2 can be realized.
  • the chips can be controlled homogeneously due to the flat contact.
  • the inductance of the contact in a contact area is smaller due to the areal geometry than with thick wire bonding.
  • the invention also provides a power module with the features according to claim 19.
  • a power module comprises: a) one or more power electronic components arranged on a substrate with one or more contact surfaces and b) one or more electrical connections between the contact surfaces of the component and contact surfaces of the Substrate and / or between contact surfaces of one or more components, c) being laminated to a surface formed by the substrate and components under vacuum of a film made of electrically insulating plastic material, which closely covers the surface including the substrate and components and which is on this surface adheres, d) the film having a window at each contact surface, in which this contact surface is free of the film and is in contact with a surface of a layer of electrically conductive material, and e) the electrical connection is made in and / or on the layer the conductive path generated is conductive.
  • semiconductor components and / or passive components are provided as components.
  • the power module comprises a 3-phase rectifier and / or a 6-pulse converter, in particular with diodes, preferably SiC diodes, and / or a chopper and / or a chopper transistor.
  • the power module comprises a power amplifier module or a power amplifier, in particular a power amplifier module or a power amplifier of a converter.
  • the power module according to the invention comprises a matrix converter module or a matrix converter, in particular a matrix converter module or a matrix converter with shunt resistors for current measurement.
  • the power module can also comprise an F3E module or an F3E architecture.
  • the power module comprises an inverter module or an inverter, in particular a three-point inverter module or a three-point inverter.
  • the conductor tracks are designed as planar conductor tracks.
  • the conductor tracks can preferably consist at least partially of copper.
  • the substrate has conductor tracks and the components are arranged in contact with these conductor tracks and / or are insulated next to these conductor tracks on the substrate.
  • FIG. 1 shows a vertical section through an example of a power module according to the invention
  • the substrate of the example is generally designated 1.
  • This substrate 1 has, for example, a DCB substrate, which is known to consist of a layer 10 of ceramic material, a layer 12 of copper applied to a lower surface 102 of the layer 10 and a surface facing away from the lower surface 102 101 of layer 10 applied layer 11 consists of copper.
  • the layer 11 on the upper surface 101 of the layer 10 is partially removed down to the upper surface 101, so that the upper surface 101 is exposed there, but this is of no significance for the invention.
  • Power semiconductor chips 2 which can be the same and / or different from one another, are applied to the surface 111 of the remaining copper layer 11 facing away from the layer 10.
  • Each power semiconductor chip 2 contacts the upper surface 111 of the layer 11 with a contact surface, not shown, which is present on a lower surface 202 of the chip 2 facing the layer 11 of copper.
  • this contact surface is soldered to the layer 11.
  • each chip 2 facing away from the layer 11 of copper and the lower surface 202 there is in each case a contact 21 with a contact surface 210 facing away from the chip 2.
  • the contact area on the lower surface 202 of this chip 2 is the contact area of a collector or drain contact
  • the contact 21 on the upper surface 201 of the chip 2 is an emitter or source contact whose contact area the contact area is 210.
  • the overall upper surface, generally designated 20, of the substrate 1 equipped with the power semiconductor chips 2 is due to the exposed parts of the upper surface 101
  • Layer 10 the upper surface 111 of the layer 11 made of copper outside the chips 2 and through the free surface each of the chip 2 itself, which is determined by the upper surface 201 and the side surface 203 of this chip 2.
  • the surface 20 of the substrate 1 is the surface relevant for the invention.
  • a film 3 made of electrically insulating plastic material is laminated onto the surface 20 of the substrate 1 under vacuum, so that the film 3 closely covers the surface 20 with the contact surfaces 210 and adheres to this surface 20 (FIGS. 2, 301).
  • the laminated film 3 serves as an insulator and as a carrier for conductor tracks 5.
  • the film 3 consists of a plastic material based on polyimide or epoxy.
  • Typical thicknesses d of the film 3 are in the range from 25-150 ⁇ m, although larger thicknesses can also be achieved from layer sequences ... of thinner films 3. Isolation field strengths in the kV range can thus advantageously be realized.
  • Each contact surface to be contacted is now exposed on the surface 20 of the substrate 1 by opening respective windows 31 in the film 3 (FIGS. 2, 302).
  • a contact area to be contacted is not only a contact area 210 on a semiconductor chip 2, but can also be any area 112 of the upper surface 111 of the layer 11 made of copper or another metal that is exposed in the film 3 by opening a window 31.
  • a window 31 in the film 3 is preferably opened by laser ablation. Thereafter, each exposed contact area 210 and 112 is surface-contacted with a layer 4 of electrically conductive material, preferably metal, by metallizing and structuring the exposed contact areas 210 and 112 using the usual methods and thus making contact in a planar manner (FIGS. 2, 303). ,
  • the layer 4 can be applied over the entire surface both to each contact surface 210 and 112 and also to the upper surface 32 of the film 3 facing away from the surface 20 of the substrate 1 and then structured, for example photolithographically, in such a way that each contact surface 210 and 112 remains in surface contact and outside of the contact surfaces 210 and 112 printed conductors 5 arise.
  • a mask is applied to the upper surface 32 of the film 3 facing away from the surface 20 of the substrate 1, which mask leaves the contact areas 210 and 112 and areas for the conductor tracks 5, and then the layer 4 of the electrically conductive material over the entire surface of the mask and the contact surfaces 210 and 112 and the areas free of the mask is applied.
  • the mask with the layer 4 located thereon is then removed, so that only the surface-contacted contact surfaces 210 and 112 and the conductor tracks 5 remain on the mask-free regions.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

La présente invention concerne un procédé pour réaliser un module de puissance comprenant un ou plusieurs composants électroniques de puissance (2) qui sont disposés sur un substrat (1) et présentent une ou plusieurs surfaces de contact (210). Selon l'invention, la mise en contact des surfaces de contact (210) et la constitution d'une ou plusieurs connexions électriques entre les surfaces de contact (210) du composant de puissance (2) et les surfaces de contact (112) du substrat (1) et/ou entre les surfaces de contact (210) de composants de puissance (2), comprennent les étapes suivantes: laminage sous vide d'un film (3) de matière plastique électriquement isolante, sur une surface (20) formée par le substrat (1) et les composants (2), de sorte que le film (3) recouvre la surface (20) en étant en contact étroit avec elle et en incluant le substrat (1) et les composants (2) qui présentent la/les surface(s) de contact (210, 112), et adhère à ladite surface (20); exposition sur la surface (20), de chaque surface de contact (210, 112) à mettre en contact, grâce à l'ouverture de fenêtres respectives (31) dans le film (3); mise en contact superficielle de chaque surface de contact exposée (210, 112) avec une couche (4, 6) de matière électriquement conductrice; et production d'au moins une piste conductrice dans et/ou sur la couche (4, 6) de matière électriquement conductrice. L'invention a également pour objet un module de puissance correspondant.
PCT/EP2005/050298 2004-02-12 2005-01-24 Procede pour realiser un module de puissance, et module de puissance WO2005078793A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200410007009 DE102004007009A1 (de) 2004-02-12 2004-02-12 Verfahren zur Herstellung eines Leistungsmoduls und Leistungsmodul
DE102004007009.1 2004-02-12

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WO2005078793A1 true WO2005078793A1 (fr) 2005-08-25

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DE102006040729A1 (de) * 2006-08-31 2008-05-08 Siemens Ag Verfahren zum Übertragen eines Layouts einer leitenden Struktur auf eine Oberfläche eines Substrats
DE102007046969B3 (de) 2007-09-28 2009-04-02 Siemens Ag Elektronische Schaltung aus Teilschaltungen und Verfahren zu deren Herstellung und demgemäßer Umrichter oder Schalter
US8507320B2 (en) 2008-03-18 2013-08-13 Infineon Technologies Ag Electronic device including a carrier and a semiconductor chip attached to the carrier and manufacturing thereof

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US5291066A (en) * 1991-11-14 1994-03-01 General Electric Company Moisture-proof electrical circuit high density interconnect module and method for making same
US5675310A (en) * 1994-12-05 1997-10-07 General Electric Company Thin film resistors on organic surfaces
US6294741B1 (en) * 1995-07-10 2001-09-25 Lockheed Martin Corporation Electronics module having high density interconnect structures incorporating an improved dielectric lamination adhesive
WO2003030247A2 (fr) * 2001-09-28 2003-04-10 Siemens Aktiengesellschaft Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques
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