WO2005106951A1 - Dispositif comprenant un composant electrique commandable sur un substrat et procede pour produire ce dispositif - Google Patents

Dispositif comprenant un composant electrique commandable sur un substrat et procede pour produire ce dispositif Download PDF

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Publication number
WO2005106951A1
WO2005106951A1 PCT/EP2005/051225 EP2005051225W WO2005106951A1 WO 2005106951 A1 WO2005106951 A1 WO 2005106951A1 EP 2005051225 W EP2005051225 W EP 2005051225W WO 2005106951 A1 WO2005106951 A1 WO 2005106951A1
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Prior art keywords
component
substrate
contact surface
thermal contact
thermal
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PCT/EP2005/051225
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German (de)
English (en)
Inventor
Eckhard Wolfgang
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Siemens Aktiengesellschaft
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Publication of WO2005106951A1 publication Critical patent/WO2005106951A1/fr

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Definitions

  • the invention relates to an arrangement of at least one controllable electrical component on a substrate and a method for producing the arrangement.
  • the controllable electrical component is a power semiconductor component which is arranged on a substrate (circuit carrier).
  • the substrate is, for example, a DGB (Direct Copper Bonding) substrate, which consists of a carrier layer made of a ceramic material, on which electrically conductive layers of copper (copper foils) are applied on both sides.
  • the ceramic material is, for example, aluminum oxide (Al 2 O 3 ).
  • the power semiconductor component is soldered onto one of the electrically conductive layers made of copper.
  • a certain amount of heat is generated during operation of the power semiconductor component. This amount of heat is dissipated away from the power semiconductor component by heat conduction.
  • the heat conduction takes place via the solder connection between the power semiconductor component and the electrically conductive copper layer to the carrier layer of the substrate made of aluminum oxide. Since aluminum oxide also has a certain thermal conductivity (the specific one
  • Thermal conductivity coefficient ⁇ of aluminum oxide is about 30 Wm 1 -K 1 ), the carrier layer of the substrate acts as an efficient heat sink for the.
  • a method for producing the arrangement is to be specified.
  • an arrangement of at least one controllable electrical component on a substrate is specified, the substrate having at least one thermal contact surface with a thermally conductive material, the component at least one thermal
  • the component Has contact surface on which a certain amount of heat occurs during operation of the component, the component is arranged on the substrate such that the thermal contact surface of the component is turned away from the substrate, at least one thermal connecting line for transferring the specific amount of heat from the thermal contact surface of the component is present on the thermal contact surface of the substrate and the thermal connecting line has a metallization layer deposited on the arrangement.
  • a method for producing the arrangement is also specified with the following method steps: a) arranging the component on the substrate such that the thermal contact surface of the component is turned away from the substrate, b) producing an electrical insulation layer on the component such that the thermal contact surface of the component and the thermal contact surface of the substrate are freely accessible, and depositing at least one metallization layer on the thermal contact surface of the component, the thermal contact surface of the substrate and the insulation layer for Establishing the thermal connection line between the thermal contact surfaces.
  • the substrate on which the component is arranged can be any circuit carrier based on organic and in particular inorganic.
  • Such circuit carriers or substrates are, for example, PCB (printed circuit board), DGB, IM (insulated metal), HTCC (high temperature cofired ceramics) and LTCC (low temperature cofired ceramics) substrates.
  • the metallization layer functioning as a thermal connecting line is connected directly to the thermal contact surface of the substrate.
  • the substrate which acts as a heat sink for the amount of heat occurring during operation of the controllable electrical component, is designed in such a way that there is heat conduction through the substrate.
  • the heat conduction takes place through a volume of the substrate.
  • the substrate not only has a thermally conductive material on the thermal contact surface, but also in the volume of the substrate.
  • the substrate consists entirely of the thermally conductive material. It is also conceivable that only one layer of the substrate consists of the thermally conductive material.
  • Such a layer is, for example, the carrier layer of a DCB substrate made of aluminum oxide. The entire carrier layer is used to dissipate the amount of heat.
  • a thermal via is present in the volume of the substrate.
  • the substrate is an LTCC substrate, in the volume of which the thermal via is embedded.
  • the thermal via is formed, for example, by a thermally highly conductive metal. Such a metal is, for example, silver.
  • the thermal via leads from one surface section of the substrate to another surface section of the substrate. The upper surface section and the further surface section have turned away from each other.
  • the surface sections are arranged, for example, on different main surfaces of the substrate.
  • One of the surface sections of the substrate forms the thermal contact surface of the substrate, which is thermally conductively connected to the thermal connecting line of the arrangement. The amount of heat that occurs at the thermal contact surface of the component can thus be dissipated through the substrate via the thermal connecting line and the thermal via.
  • the specific thermal conductivity coefficient ⁇ of the thermally conductive material of the thermal contact surface of the substrate at a temperature of about 20 ° C. is at least 1 w- ⁇ rf 1 - ⁇ X
  • the thermally conductive material is advantageously also characterized by a low electrical conductivity.
  • a thermally conductive and electrically insulating ceramic material is particularly suitable.
  • the thermally conductive material therefore has at least one ceramic material selected from the group consisting of aluminum nitride (A1N) and / or aluminum oxide.
  • the specific thermal conductivity coefficient ⁇ of aluminum nitride is about 180 w-nX-K -1 at 20 ° C.
  • Other ceramic materials for example silicon carbide (SiC) or silicon nitride (SiüNa) are also conceivable.
  • the thermally conductive material can form the thermal contact surface of the substrate or the entire substrate.
  • the substrate consists of a composite material with a matrix of a polymer, in which particles of the thermally conductive material are embedded.
  • a thermally conductive composite material there is a thermally conductive composite material.
  • the metallization layer forms the thermal connection line.
  • the metallization layer has a metal with a relatively high thermal conductivity.
  • the metallization layer adheres very well to the thermal contact surface of the component and the thermal contact surface of the substrate.
  • the metallization layer therefore has at least one metal selected from the group consisting of aluminum, gold, copper, molybdenum, silver, titanium, vanadium, tungsten and / or zirconium.
  • the metallization layer can consist of a single layer. There is a single-layer metallization layer.
  • the metallization layer has a multilayer structure with at least two partial metallization layers arranged one above the other. Each of the partial metallization layers is associated with different functions.
  • a first partial metallization layer leads, for example, to very good mechanical adhesion of the metallization layer to the thermal contact surface of the component and to the thermal contact surface of the substrate.
  • This partial metallization layer functions as an adhesion promoting layer.
  • an adhesion-promoting layer made of titanium has proven itself.
  • suitable materials for the adhesion-promoting layer are, for example, chromium, vanadium or zirconium.
  • a second partial metallization layer arranged above the adhesion-promoting layer functions, for example, as a diffusion barrier.
  • a partial metallization layer consists, for example, of a titanium-tungsten alloy.
  • Metallization layer or partial metallization layers carried out a vapor deposition process.
  • Vapor deposition is, for example, a physical vapor deposition (PVD) process.
  • the PVD process is, for example, sputtering.
  • a chemical vapor deposition (CVD) process is also conceivable.
  • the galvanic deposition can have a layer thickness of up to several hundred ⁇ m. Such a large layer thickness leads to an increased thermal
  • the galvanic deposition consists, for example, of copper.
  • the galvanic deposition of copper is advantageously carried out on a thin copper layer a few micrometers thick. This thin copper layer, which is referred to as the seed layer, is produced, for example, by a vapor deposition process.
  • the metallization layer is electrically insulated from surface sections of the component to be insulated.
  • the metallization layer is therefore deposited on an electrical insulation layer for the electrical insulation of a surface section of the component.
  • the insulation layer preferably has an insulation layer thickness selected from the range from 50 ⁇ m to 500 ⁇ m inclusive and in particular from the range from 100 ⁇ m to 300 ⁇ m inclusive.
  • the insulation layer can be single-layered. It is also conceivable that the insulation layer is multi-layered.
  • the insulation layer has a multilayer structure at least two partial insulation layers arranged one above the other.
  • an electrically insulating lacquer is applied in a corresponding thickness.
  • the varnish is applied to the component and the substrate in a printing process. It can be ensured that the lacquer is not applied to the thermal contact surfaces of the component and / or the substrate.
  • the thermal contact areas remain free. However, the thermal contact areas can also only be exposed after application.
  • corresponding openings are produced in the insulation layer after curing and / or after the lacquer has dried.
  • the opening or openings are produced in particular by a photolithography process and / or by laser ablation.
  • a photosensitive varnish is used for the photolithography process.
  • the following further method steps are carried out to produce the insulation layer on the component: d) laminating at least one electrical insulation film on the component and the substrate and e) creating an opening in the insulation film so that the thermal contact surface of the component is freely accessible ,
  • the same process step can also be carried out for exposing the thermal contact point of the substrate.
  • the insulation film can also be laminated on in such a way that the thermal contact surface of the substrate remains free. In this case, it is not necessary to create an opening to expose the thermal contact surface of the substrate.
  • Component is laminated by at least one on the component and optionally on the substrate Insulation film formed.
  • at least part of the insulation film is laminated onto the surface section of the component to be electrically insulated such that a surface contour of the component is depicted in a surface contour of the part of the insulation film that corresponds to the
  • Component is facing away.
  • the surface contour does not concern a roughness or waviness of the
  • the surface contour results, for example, from an edge of the component.
  • the surface contour shown is in particular not specified by the shape of the component alone, but also by the shape of the substrate on which the component is arranged.
  • the insulation film is laminated on under vacuum. Laminating under vacuum creates a particularly firm and intimate contact between the insulation film and the component or the insulation film and the substrate.
  • An insulation film used for this purpose has an electrical insulation material. Any thermosetting (thermosetting) and / or thermoplastic plastic is conceivable as insulation material.
  • the insulation film has at least one electrical insulation material selected from the group consisting of liquid-crystalline polymer, organically modified ceramic, polyacrylate, polyimide, polyisocyanate, polyethylene, polyphenol, polyether ether kitone, polytetrafluoroethylene and / or epoxy. Mixtures of the plastics mentioned and / or Copolymers of monomers of plastics are also conceivable.
  • the insulation foils are laminated in such a way that the openings come to rest on the thermal contact surfaces of the component and the substrate.
  • the openings in the insulation film are advantageously only created after the lamination.
  • the openings in the insulation foils are created by removing material. This can be done photolithographically.
  • the openings in the insulation films are produced by laser ablation. Material is removed using a laser. For example, a CO2 aser with a wavelength of 9.24 ⁇ m is used for laser ablation. The use of a UV laser is also conceivable.
  • the thermal connection line also takes over the function of the electrical connection line via which the component is electrically contacted.
  • the arrangement can have any controllable electrical component.
  • the controllable electrical component is, for example, a semiconductor component.
  • the semiconductor component is preferably a power semiconductor component selected from the group consisting of a diode, MOSFET, IGBT, tyristor and / or bipolar transistor.
  • the power semiconductor components mentioned are suitable for high
  • the power semiconductor components each have switches via at least one input, one output and one control contact. These contacts are electrically contacted via corresponding electrical contact surfaces.
  • the thermal contact surface of the component and the electrical contact surfaces of the component can be different from one another. In particular, the thermal contact area and the electrical contact area of the component are identical.
  • FIG. 1 shows an arrangement of an electrical component on a substrate.
  • FIG. 2 shows a section of the arrangement of the component on the subs council according to FIG. 1.
  • FIG. 3 shows a method for producing the arrangement.
  • the arrangement 1 has at least one controllable electrical component 2 on a substrate 5 (FIG. 1).
  • the substrate 5 is a DGB substrate with a carrier layer 50 and an electrically conductive layer 51 made of copper applied to the carrier layer 50.
  • the electrically conductive layer 51 is formed by an approximately 300 ⁇ m thick copper foil.
  • the carrier layer 50 consists of a thermally conductive and electrically insulating material. This material is a ceramic material. In a first embodiment, the ceramic material is aluminum oxide. In further alternative configurations, the ceramic material is aluminum nitride, silicon carbide or silicon nitride.
  • the electrical component 2 is a power semiconductor component in the form of a MOSFET with a Height of about 350 ⁇ m.
  • the power semiconductor component 2 is soldered to the electrically conductive layer 51.
  • the solder connection has a layer thickness of approximately 100 ⁇ m.
  • the electrically conductive layer 51 made of copper is used for electrical contacting of one of the contacts of the power semiconductor component 2 (source, gate or drain).
  • the power semiconductor component 2 is soldered onto the electrically conductive layer 51 such that a thermal contact surface 20 of the power semiconductor component 2 faces away from the substrate 5.
  • the thermal contact surface 20 is from an electrical contact surface 21 of the
  • Power semiconductor device 2 formed.
  • One of the contacts of the power semiconductor component 2 is also electrically contacted via the electrical contact surface 21.
  • the thermal connecting line 3 functions as an electrical connecting line 6 for electrically contacting the electrical contact surface 21 of the power semiconductor component 2.
  • the electrical connecting line 6 is connected to a further electrically conductive layer 53 of the substrate 5.
  • the further electrically conductive layer 53 is likewise formed from a copper foil applied to the carrier layer 50.
  • a thermal connecting line 3 is provided to dissipate the amount of heat generated.
  • the thermal connecting line 3 is connected to the thermal contact surface 20 of the power semiconductor component 2 and a thermal one
  • the thermal contact surface 52 of the substrate 5 is thermally conductively connected.
  • the thermal contact surface 52 of the substrate is from the Carrier layer 50 of substrate 5 is formed from the ceramic material.
  • the thermal connection line 3 forms a heat conduction path 33, via which the amount of heat is conducted away by heat conduction from the power semiconductor component 2 to the carrier layer 50 of the substrate 5.
  • the thermal connection line 3 has a metallization layer 30.
  • the amount of heat generated during operation of the power semiconductor component 2 is dissipated via the metallization layer 30.
  • the metallization layer 30 of the connecting line is applied directly to the thermal contact surface 52 of the substrate 5 or the carrier layer 50 of the substrate 5.
  • the metallization layer 30 of the connecting line 3 is distinguished by a multilayer structure (FIG. 2).
  • the metallization layer 30 consists of individual partial metallization layers 32 arranged one above the other.
  • Power semiconductor component 2 or the thermal contact surface 52 of the carrier layer 50 of the substrate 5 is connected, consists of titanium and functions as an adhesion-promoting layer.
  • the partial metallization layer 322 arranged above is made of a titanium-tungsten alloy. This partial metallization layer 322 acts as a diffusion barrier.
  • a thin partial metallization layer 323 made of copper is applied over the partial metallization layer 322 functioning as a diffusion barrier.
  • a partial metallization layer 324 in the form of electrodeposited copper is present over the thin copper layer 323.
  • the thin copper layer 323 acts as a seed layer for the galvanic deposition of the copper. While the partial metallization layers 321, 322 and 323 are each only a few ⁇ m thick (these partial metallization layers are produced by a PVD method) the partial metallization layer 324 is applied with a relatively large layer thickness. The result is one
  • Total layer thickness 31 of the metallization layer 30 of approximately 200 ⁇ m.
  • the metallization layer 30 is almost completely formed by the thick partial metallization layer 324.
  • Power semiconductor component 2 is efficiently forwarded to the substrate 5. Since the ceramic material of the carrier layer 52 of the substrate 5 also has a relatively high thermal conductivity, the amount of heat can be efficiently transported away from the power semiconductor component 2.
  • the power semiconductor component 2 is soldered onto a DCB substrate 5.
  • An insulation film 4 is then laminated on (FIG. 3,
  • Insulation film 4 is applied in such a way that a surface contour 25 which results from the
  • Power semiconductor component 2 the electrically conductive layer 51 and the carrier layer 50 of the DCB substrate results, is imaged in a surface contour 47 of part of the insulation film 4.
  • a surface of the insulation film 4 facing away from the substrate 5 and the power semiconductor component 2 essentially shows the same surface contour as the power semiconductor component 2 and the substrate.
  • the insulation film 4 follows the topography of the power semiconductor component 2 and the substrate 5.
  • the insulation film 4 has a film thickness of approximately 100 ⁇ m on.
  • the result is an insulation layer thickness 41 of approximately 100 ⁇ m.
  • a height difference of approximately 850 ⁇ m is overcome, which is given by the layer thickness of the electrically conductive layer 51, the layer thickness of the solder connection and the height 22 of the power semiconductor component 2.
  • an opening 42 for contacting the thermal contact surface 20 of the power semiconductor component 2 and an opening 43 for contacting the thermal contact surface 52 of the substrate 5 are produced in the insulation film 4 (FIG. 3, reference number 302).
  • One window each is opened in the insulation film 4.
  • the windows are opened by removing material using laser ablation. For this purpose, a CO 2 laser with a wavelength of 9.24 ⁇ m is used.
  • a cleaning step is carried out in order to remove residues of the insulation material of the insulation film 4.
  • Metallization layer 30 applied to the thermal contact surface 21 of the power semiconductor component 2, the thermal contact surface 52 of the substrate 5 and the insulation film 4 (FIG. 3, reference number 303).
  • the metallization layer 30 is applied in such a way that in each case first the partial metallization layer 321 made of titanium, then the partial metallization layer 322 made of the titanium-tungsten alloy and then a thin copper layer 323 are deposited in a vapor deposition process. Copper is then electrodeposited.
  • the partial metallization layer 324 is formed in the form of a copper deposition.
  • the heat dissipation path 33 via the metallization layer 30 of the thermal connecting line 3 there is a further heat dissipation path 34 in the arrangement 1 described, which extends from the power semiconductor component 2 via the Solder connection and leads via the electrically conductive layer 51 to the carrier layer 51 of the substrate 5.
  • the carrier layer 52 functions as a heat sink for the amount of heat.
  • the substrate 5 is connected to a further heat sink, not shown, in a further embodiment.
  • the further heat sink is a heat sink or a cooling fluid.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

La présente invention concerne un dispositif (1) comprenant au moins un composant électrique commandable (2) sur un substrat. Le substrat présente au moins une surface de contact thermique (52) avec une matière thermoconductrice. Le composant présente au moins une surface de contact thermique (21) sur laquelle arrive une quantité définie de chaleur lors du fonctionnement du composant. Le composant est monté sur le substrat de manière que la surface de contact thermique du composant soit opposée au substrat. Au moins une ligne de connexion thermique (3) conçue pour transférer la quantité de chaleur définie de la surface de contact thermique du composant se trouve sur la surface de contact thermique du substrat. Cette ligne de connexion thermique présente une couche de métallisation (30) déposée sur ledit dispositif. La présente invention concerne également un procédé pour produire ce dispositif. Ce procédé consiste a) à placer le composant sur le substrat de manière que la surface de contact thermique du composant soit opposée au substrat, b) à produire une couche d'isolation électrique (4) sur le composant, de manière à pouvoir accéder librement à la surface de contact thermique du composant et à la surface de contact thermique du substrat, puis à déposer au moins une couche de métallisation sur la surface de contact thermique du composant, la surface de contact thermique du substrat et la couche d'isolation, afin de produire la ligne de connexion thermique entre les surfaces de contact thermiques. Le composant est un composant à semi-conducteur de puissance. La couche de métallisation présente du cuivre déposé par dépôt électrolytique. La ligne de connexion thermique résultante présente une voie de dissipation de la chaleur efficace (33).
PCT/EP2005/051225 2004-04-29 2005-03-17 Dispositif comprenant un composant electrique commandable sur un substrat et procede pour produire ce dispositif WO2005106951A1 (fr)

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DE102004021064 2004-04-29

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166864A (en) * 1991-05-17 1992-11-24 Hughes Aircraft Company Protected circuit card assembly and process
US5315480A (en) * 1991-11-14 1994-05-24 Digital Equipment Corporation Conformal heat sink for electronic module
US5856913A (en) * 1996-04-29 1999-01-05 Semikron Elektronik Gmbh Multilayer semiconductor device having high packing density
US5929468A (en) * 1996-10-31 1999-07-27 Sanyo Electric Co., Ltd. Compound semiconductor device
US6292368B1 (en) * 1999-03-09 2001-09-18 Sagem Sa Electrical power component mounted by brazing on a support and corresponding mounting process
WO2003030247A2 (fr) * 2001-09-28 2003-04-10 Siemens Aktiengesellschaft Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166864A (en) * 1991-05-17 1992-11-24 Hughes Aircraft Company Protected circuit card assembly and process
US5315480A (en) * 1991-11-14 1994-05-24 Digital Equipment Corporation Conformal heat sink for electronic module
US5856913A (en) * 1996-04-29 1999-01-05 Semikron Elektronik Gmbh Multilayer semiconductor device having high packing density
US5929468A (en) * 1996-10-31 1999-07-27 Sanyo Electric Co., Ltd. Compound semiconductor device
US6292368B1 (en) * 1999-03-09 2001-09-18 Sagem Sa Electrical power component mounted by brazing on a support and corresponding mounting process
WO2003030247A2 (fr) * 2001-09-28 2003-04-10 Siemens Aktiengesellschaft Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
FILLION R ET AL: "A HIGH PERFORMANCE POLYMER THIN FILM POWER ELECTRONICS PACKAGING TECHNOLOGY", ADVANCING MICROELECTRONICS, IMAPS, RESTON, VA,, US, vol. 30, no. 5, September 2003 (2003-09-01), pages 7 - 12, XP009047125 *
GUO-QUAN LU: "3-D, bond wireless interconnection of power devices in modules will cut resistance, parasitics and noise", PCIM POWER ELECTRONIC SYSTEMS, vol. 26, no. 5, May 2000 (2000-05-01), pages 40,46-48,65,66,68, XP009053854, ISSN: 1523-4908 *

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