WO2004095579A1 - Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi - Google Patents

Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi Download PDF

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Publication number
WO2004095579A1
WO2004095579A1 PCT/JP2003/005200 JP0305200W WO2004095579A1 WO 2004095579 A1 WO2004095579 A1 WO 2004095579A1 JP 0305200 W JP0305200 W JP 0305200W WO 2004095579 A1 WO2004095579 A1 WO 2004095579A1
Authority
WO
WIPO (PCT)
Prior art keywords
pattern
integrated circuit
semiconductor integrated
circuit device
substrate
Prior art date
Application number
PCT/JP2003/005200
Other languages
English (en)
Japanese (ja)
Inventor
Jun Sakuma
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2003/005200 priority Critical patent/WO2004095579A1/fr
Publication of WO2004095579A1 publication Critical patent/WO2004095579A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)

Abstract

L'invention concerne un procédé de production d'un dispositif de circuit intégré à semi-conducteurs qui consiste à reconnaître les défauts présents sur la surface d'un substrat, à recouvrir d'une couche ladite surface, y compris les défauts, et à modéliser la couche dans une zone d'élément définie sur le substrat de façon à former un modèle de zone d'élément correspondant à ladite zone d'élément, et la formation du modèle de zone d'élément est mise en oeuvre, les zones contenant des défauts étant exclues.
PCT/JP2003/005200 2003-04-23 2003-04-23 Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi WO2004095579A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/005200 WO2004095579A1 (fr) 2003-04-23 2003-04-23 Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/005200 WO2004095579A1 (fr) 2003-04-23 2003-04-23 Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi

Publications (1)

Publication Number Publication Date
WO2004095579A1 true WO2004095579A1 (fr) 2004-11-04

Family

ID=33307222

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2003/005200 WO2004095579A1 (fr) 2003-04-23 2003-04-23 Procede de production de dispositif de circuit integre a semi-conducteurs sur un substrat de soi

Country Status (1)

Country Link
WO (1) WO2004095579A1 (fr)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5351978A (en) * 1976-10-22 1978-05-11 Hitachi Ltd Manufacture of semiconductor device
JPH0378729A (ja) * 1989-08-22 1991-04-03 Toppan Printing Co Ltd 薄膜トランジスタアレイの製造方法
JPH0582633A (ja) * 1991-09-19 1993-04-02 Hitachi Ltd 貼りあわせ基体とその製造方法
US5352341A (en) * 1993-06-24 1994-10-04 Texas Instruments Incorporated Reducing leakage current in silicon-on-insulator substrates
JPH11233417A (ja) * 1998-02-18 1999-08-27 Mitsubishi Electric Corp Ｘ線マスクおよびその製造方法
JP2001356367A (ja) * 2000-06-13 2001-12-26 Matsushita Electric Ind Co Ltd 液晶画像表示装置及び画像表示装置用半導体装置の製造方法
JP2002358029A (ja) * 2001-06-04 2002-12-13 Hitachi Ltd 平面ディスプレイパネル及び平面ディスプレイパネルの配線欠陥修正方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5351978A (en) * 1976-10-22 1978-05-11 Hitachi Ltd Manufacture of semiconductor device
JPH0378729A (ja) * 1989-08-22 1991-04-03 Toppan Printing Co Ltd 薄膜トランジスタアレイの製造方法
JPH0582633A (ja) * 1991-09-19 1993-04-02 Hitachi Ltd 貼りあわせ基体とその製造方法
US5352341A (en) * 1993-06-24 1994-10-04 Texas Instruments Incorporated Reducing leakage current in silicon-on-insulator substrates
JPH11233417A (ja) * 1998-02-18 1999-08-27 Mitsubishi Electric Corp Ｘ線マスクおよびその製造方法
JP2001356367A (ja) * 2000-06-13 2001-12-26 Matsushita Electric Ind Co Ltd 液晶画像表示装置及び画像表示装置用半導体装置の製造方法
JP2002358029A (ja) * 2001-06-04 2002-12-13 Hitachi Ltd 平面ディスプレイパネル及び平面ディスプレイパネルの配線欠陥修正方法

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