WO2004004014A1 - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
WO2004004014A1
WO2004004014A1 PCT/JP2003/007761 JP0307761W WO2004004014A1 WO 2004004014 A1 WO2004004014 A1 WO 2004004014A1 JP 0307761 W JP0307761 W JP 0307761W WO 2004004014 A1 WO2004004014 A1 WO 2004004014A1
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WO
WIPO (PCT)
Prior art keywords
nitrogen
insulating film
semiconductor device
film
silicon substrate
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PCT/JP2003/007761
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French (fr)
Japanese (ja)
Inventor
Heiji Watanabe
Kazuhiko Endo
Kenzo Manabe
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Nec Corporation
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Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to US10/519,084 priority Critical patent/US8125016B2/en
Priority to AU2003244275A priority patent/AU2003244275A1/en
Publication of WO2004004014A1 publication Critical patent/WO2004004014A1/en
Priority to US13/353,089 priority patent/US8575677B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/518Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Definitions

  • the present invention relates to a semiconductor device having a high dielectric constant thin film and a method for manufacturing the same, and more particularly to a semiconductor device having a metal oxide semiconductor field effect transistor (MOSFET).
  • MOSFET metal oxide semiconductor field effect transistor
  • Silicon oxide film has process stability and excellent insulation properties, and is used as a gate insulating film material for MOS FETs.
  • the gate insulating film is becoming thinner with the recent miniaturization of devices.
  • the thickness of the silicon oxide film, which is the gate insulating film is 1.5 It is necessary to be smaller than nm.
  • the tunnel current with the insulating layer inserted when a gate bias is applied becomes a value that cannot be ignored with respect to the source Z drain current. This is a major issue in electrification.
  • gate electrode polysilicon electrode
  • the gate electrode that is usually used in MOS FET is made by doping polysilicon deposited on a gate insulating film at a high concentration to have metallic properties. If it is thin, the problem that the dopant from the gate electrode penetrates through the insulating film layer and diffuses toward the silicon substrate becomes a problem.
  • These oxides, as well as these silicate thin films, are being studied as candidate materials.
  • the third problem is pointed out as follows: (1) Deterioration of the electrical characteristics at the interface between the dielectric constant thin film and the silicon substrate. In ⁇ conductivity thin film interface compared to a conventional silicon oxide film interface high interfacial defect density, there is normally 1 0 "Z cm 2 or more defects. MOSFET These interface defects (Oh Rui Makuchu defects) Mobility of several minutes compared to silicon oxide film The problem is that the threshold of transistor operation fluctuates due to degradation and fixed charges in the film and at the interface. As a remedy for these problems, it is effective to insert a silicon oxide film at the high dielectric constant thin film interface as in the remedy for the first problem. However, when the interfacial silicon oxide layer is thick, the equivalent oxide thickness of the entire gate insulating film increases.
  • the interfacial oxide layer is thin, the interfacial thermal stability and the effect of preventing dopant penetration are insufficient. Furthermore, a structure in which an ultra-thin silicon oxynitride / silicon nitride film is inserted at the interface between the high-dielectric-constant thin film and the silicon substrate is effective for improving interfacial thermal stability and suppressing dopant penetration, but deteriorates electrical characteristics. This is due to the introduction of new interface defects caused by nitrogen, which causes mobility and reliability degradation compared to the conventional silicon-silicon oxide interface.
  • nitrogen can be introduced into the film by heat-treating the sample in a gas atmosphere containing nitrogen such as NH 3 or NO gas. A large amount of nitrogen is biased at the interface of, causing the mobility and reliability degradation shown in the third problem. Nitrogen can also be introduced into a high-dielectric-constant insulating film by annealing in a gas atmosphere containing nitrogen, but also in this case, there is a concern about the problem of nitrogen segregation at the silicon substrate interface. I have.
  • An object of the present invention is to provide a semiconductor device having a gate insulating film structure capable of simultaneously realizing the above-described measures for thermal stability, dopant penetration suppression, and improvement of interfacial electrical characteristics for device application of a dielectric constant gate insulating film. And a method for producing the same.
  • FIG. 1 is a conceptual diagram showing one embodiment of a semiconductor device of the present invention
  • FIG. 2 is a flowchart showing one embodiment of a method of manufacturing a semiconductor device of the present invention.
  • FIG. 3 is a conceptual diagram showing another embodiment of the semiconductor device of the present invention.
  • FIG. 4 is a graph showing the AI 2 0 3 film and a nitrogen inlet membrane nitrogen profiles measurements when performing in (secondary ion mass analysis) by nitrogen plasma exposure.
  • FIG. 5 is a graph showing the evaluation of the bonding state of the hafnium silicate surface subjected to the plasma nitriding treatment by X-ray photoelectron spectroscopy.
  • FIG. 6 is a flowchart showing another embodiment of the method of manufacturing a semiconductor device of the present invention (a method of manufacturing a gate insulating film structure by oxidizing a laminated structure having a metal nitride layer).
  • FIG. 4 is a flowchart showing another embodiment of the method of manufacturing a semiconductor device of the present invention (a method of manufacturing a gate insulating film structure by oxidizing a stacked structure having a silicon nitride film).
  • Reference numeral 101 denotes a silicon substrate
  • reference numeral 102 denotes a silicon oxide film (interface oxide film layer)
  • reference numeral 103 denotes a nitrogen-containing high dielectric constant insulating film
  • reference numeral 104 denotes a gate electrode.
  • Reference numeral 201 denotes a silicon substrate
  • reference numeral 202 denotes a hydrogen-terminated surface
  • reference numeral 203 denotes a silicon oxide film
  • reference numeral 204 denotes a metal layer
  • reference numeral 205 denotes a metal layer.
  • a nitrogen-containing layer reference numeral 206 denotes a nitrogen-containing dielectric constant insulating film
  • reference numeral 301 denotes a silicon substrate
  • reference numeral 302 denotes a silicon oxide film
  • reference numeral 303 denotes a nitrogen-containing film.
  • High dielectric constant insulating film reference numeral 304 denotes a gate electrode
  • reference numeral 601 denotes a silicon substrate
  • reference numeral 602 denotes a hydrogen-terminated surface
  • reference numeral 603 denotes a silicon oxide film.
  • Reference numeral 604 denotes a metal Zr deposited layer
  • reference numeral 605 denotes a ZrN deposited layer
  • reference numeral 606 denotes a nitrogen-containing high dielectric constant insulating film
  • reference numeral 701 denotes a silicon substrate
  • Reference numeral 702 indicates a hydrogen-terminated surface
  • reference numeral 703 indicates a silicon oxide film
  • Reference numeral 704 denotes an HfSi deposited layer
  • reference numeral 705 denotes a silicon nitride film
  • reference numeral 706 denotes a nitrogen-containing high dielectric constant insulating film (nitrogen-containing Hf silicon layer). Is shown. BEST MODE FOR CARRYING OUT THE INVENTION
  • the gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal oxide or a metal silicate, and the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film is increased in the thickness direction. Has a distribution,
  • a semiconductor device in which a position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is located in a region away from the silicon substrate.
  • the position where the nitrogen concentration in the nitrogen-containing high-dielectric-constant insulating film becomes maximum in the film thickness direction is in a region separated from the silicon substrate by 0.5 nm or more.
  • the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is localized on the gate electrode side of the nitrogen-containing high dielectric constant insulating film.
  • the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is localized at the center of the nitrogen-containing high dielectric constant insulating film.
  • the nitrogen concentration at the interface between the gate insulating film and the silicon substrate is less than 3 atomic%.
  • the gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
  • the gate insulating film has a silicon oxide film formed in contact with the silicon substrate and the nitrogen-containing high dielectric constant insulating film formed in contact with the silicon oxide film. Is preferred.
  • the gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
  • composition of the nitrogen-containing high-dielectric-constant insulating film continuously changes in the film thickness direction, and silicon is present at an intermediate portion between the interface between the silicon-substrate-side interface and the gate electrode-side interface of the nitrogen-containing high-dielectric-constant insulating film.
  • concentration has a minimum
  • a semiconductor device characterized in that nitrogen is introduced only between a position where the silicon concentration has a minimum value and the gate electrode side interface.
  • the gate insulating film has a stacked structure including a first silicon oxide film, a metal oxide film or a metal silicate film, and a second silicon oxide film in order from the silicon substrate side, and only the second silicon oxide film is formed.
  • a semiconductor device having a structure in which nitrogen is introduced into silicon oxide.
  • the silicon substrate and the gate insulating film are in contact, the gate insulating film is in contact with the gate electrode, and the gate electrode is a polysilicon or polysilicon germanium conductive film.
  • the gate insulating film may be composed of Zr, Hf, Ta, Al, Ti, Nb, Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd , Tb, Dy, Ho, Er, Tm, Yb, and Lu.
  • a gate insulating film and a gate electrode are formed on a silicon substrate in this order.
  • the semiconductor device according to the first, second, or third aspect, wherein a step of introducing the nitrogen by irradiating a nitrogen-containing plasma to a high dielectric constant insulating film made of a metal oxide or a metal silicate is included.
  • a method for manufacturing a semiconductor device is provided.
  • the semiconductor device is the semiconductor device according to the fourth aspect,
  • a method for manufacturing a semiconductor device comprising a step of introducing the nitrogen by irradiating the stacked structure with a nitrogen-containing plasma.
  • the semiconductor device is the semiconductor device according to the second aspect,
  • a method for manufacturing a semiconductor device is provided.
  • the semiconductor device according to the first, second, or third aspect, wherein a stacked structure including a metal layer and a nitrogen-containing layer containing nitrogen is formed on a silicon substrate and then subjected to oxidation treatment.
  • a method for manufacturing a semiconductor device comprising a step of forming a gate insulating film.
  • the nitrogen-containing layer is a silicon oxynitride film or a silicon nitride film.
  • the nitrogen-containing layer is a metal nitride film.
  • the silicon substrate surface has a thickness of less than 1 nm. It is also preferable to form the laminated structure after forming the oxide film.
  • the gate insulating film contains nitrogen and a metal oxide or metal silicate
  • the nitrogen concentration in the gate insulating film has a distribution in the thickness direction
  • a semiconductor device wherein a position where the nitrogen concentration in the gate insulating film becomes maximum in the film thickness direction is located in a region away from the silicon substrate.
  • the position where the nitrogen concentration in the high dielectric constant gate insulating film becomes maximum is preferably separated from the silicon substrate interface by 0.5 nm or more, and the nitrogen at the interface between the high dielectric constant gate insulating film and the silicon substrate is A gate insulating film structure with a concentration preferably reduced to less than 3% is proposed.
  • a step of selectively nitriding a region other than the vicinity of the silicon substrate by exposing to a plasma containing nitrogen, or a lamination of a metal layer and a nitrogen-containing layer on a silicon substrate By adopting the step of performing the oxidation treatment after forming the structure, the distribution of nitrogen in the gate insulating film can be controlled.
  • the high dielectric constant means that the dielectric constant is higher than that of the silicon nitride film. More specifically, the relative dielectric constant of the high dielectric constant gate insulating film is preferably 8 or more, more preferably 10 or more, from the viewpoint that the equivalent silicon oxide film thickness can be reduced. However, when alumina is used as the metal oxide, the number may be 7 or more.
  • FIG. 1 shows a semiconductor device having a typical high dielectric constant gate insulating film structure proposed in the present invention.
  • nitrogen is localized in the upper layer of the high-dielectric-constant thin film made of metal oxide or metal silicide to form a nitrogen-containing high-dielectric-constant insulating film 103.
  • a gate insulating film structure composed of a nitrogen-containing high dielectric constant insulating film 103 and a silicon oxide film 102 formed by inserting an interface oxide film layer (silicon oxide film 102) will be described as an example.
  • the effects provided by the gate insulating film structure shown in FIG. 1 will be described below.
  • the thermal stability of the high dielectric constant thin film can be improved.
  • the thermal stability of the interface between the dielectric constant thin film and the silicon substrate Can be improved by inserting an extremely thin silicon oxide film 102 at the interface between the high dielectric constant thin film and the substrate.
  • the high concentration of nitrogen is localized above the high dielectric constant thin film, it is possible to suppress the penetration of the dopant from the gate electrode.
  • the electrical characteristics of the interface between the silicon substrate and the silicon substrate are based on the fact that the high dielectric constant thin film is not in direct contact with the silicon substrate, but rather through the ultra-thin silicon oxide film. It is possible to suppress mobility and reliability deterioration.
  • Various methods can be considered as a method for manufacturing the gate insulating film in the present invention. For example, a selective nitriding method of a high-dielectric-constant thin film by applying nitrogen-containing plasma irradiation and lamination of a metal layer and a nitrogen-containing layer are described below. Nitrogen introduction and profile control through the oxidation process of the structure are effective.
  • the first method of applying plasma irradiation is to form a gate insulating film (with no nitrogen introduced) containing a high dielectric constant insulating film on a silicon substrate, and irradiate it with active nitrogen generated by plasma.
  • a gate insulating film (with no nitrogen introduced) containing a high dielectric constant insulating film on a silicon substrate, and irradiate it with active nitrogen generated by plasma.
  • a high dielectric constant insulating film made of a metal oxide or a metal silicate can be formed, and the surface of the high dielectric constant insulating film can be irradiated with nitrogen-containing plasma.
  • the diffusion of nitrogen into the gate insulating film can be suppressed to prevent nitrogen from reaching the silicon substrate, and only the film surface (or a region other than the interface with the silicon substrate) can be selectively selected. It becomes possible to nitride. In other words, it is possible to localize the nitrogen profile in a region (film surface side) distant from the silicon substrate interface.
  • the nitrogen concentration distribution in the film can be controlled by the oxidation treatment of the laminated structure shown in the flowchart of FIG.
  • a metal layer is formed on the surface of the oxide film.
  • a metal layer 204 is deposited (FIG. (C)).
  • a nitrogen-containing layer 205 which is a layer containing nitrogen
  • a metal nitride layer is deposited on the metal layer to form a laminated structure ((d) in the same figure), and heat treatment is performed in an oxygen atmosphere.
  • the nitrogen concentration in the high dielectric constant insulating film can be localized near the surface layer.
  • a nitrogen-containing high dielectric constant insulating film 206 having a nitrogen concentration distribution as shown in FIG. 2 (e) can be obtained, and the nitrogen-containing high dielectric constant insulating film 206 and the silicon oxide film are obtained.
  • a gate insulating film made of 203 can be formed.
  • a nitride film of a metal element constituting a metal oxide, a silicon nitride film (oxynitride film), or the like is effective.
  • An effective technique for depositing a metal nitride is a metal nitride target or a reactive sputtering method using a metal target.
  • the thickness of the nitrogen-containing layer is preferably 1 nm or more from the viewpoint of suppressing the diffusion of the dopant, etc., since even if a large amount of nitrogen is contained, the effect of nitrogen inclusion does not improve in proportion thereto. It is preferably not more than nm.
  • the oxidation treatment is appropriately determined depending on the material to be used.
  • the oxidation treatment can be performed at 500 to 900 °.
  • a gate electrode is provided thereon by a known method, whereby the semiconductor device of the present invention can be obtained.
  • the thermal stability is improved and the dopant penetration phenomenon from the gate electrode side is suppressed, and at the same time, the gate insulating film is formed.
  • the problem of mobility degradation and reliability degradation is solved by localizing the position of nitrogen in the film away from the silicon substrate interface and on the film surface or central portion.
  • the nitrogen distribution in the gate insulating film that achieves the above effects is not limited to the profiles shown in the conceptual diagram of FIG. 1, but the effects can be obtained for various profiles shown in FIG. Fig. 3 (a) shows the case where nitrogen is distributed almost uniformly in a part of the high dielectric constant insulating film 303, which was inserted at the interface between the high dielectric constant insulating film and the silicon substrate 301. This is the case where the nitrogen concentration sharply drops at the interface between the silicon oxide film 302 and the high dielectric constant insulating film, and no nitrogen exists in the silicon oxide film 302 inserted into the interface.
  • Fig. 3 (a) shows the case where nitrogen is distributed almost uniformly in a part of the high dielectric constant insulating film 303, which was inserted at the interface between the high dielectric constant insulating film and the silicon substrate 301. This is the case where the nitrogen concentration sharply drops at the interface between the silicon oxide film 302 and the high dielectric constant insulating film, and no nitrogen exists in the silicon oxide film 302
  • FIG. 3 (b) shows the case where the maximum value of the nitrogen concentration is located at the center of the high-k insulating film (nitrogen is localized at the center). With The nitrogen concentration drops sharply toward the interface, and there is no nitrogen at the interface with the silicon substrate. Also, in Fig. 3 (c), ⁇ although the profile shape is such that nitrogen is localized on the surface side (gate electrode side) in the dielectric constant insulating film, ⁇ due to nitrogen diffusion in the dielectric constant insulating film, etc. This is the case where some nitrogen segregates at the interface between the high dielectric constant insulating film and the silicon oxide film.
  • the region where nitrogen is localized (the maximum value of the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film in the thickness direction) is preferably 0% from the silicon substrate. If the distance is 5 nm or more, more preferably 1 nm or more, and the nitrogen concentration near the silicon substrate interface is sufficiently low, the structures shown in FIGS. 1 and 3 (a) and (b) Of course, an excellent semiconductor device can be obtained even with the structure shown in FIG.
  • the allowable nitrogen concentration at the silicon substrate interface is related to the allowable value of device mobility degradation and reliability degradation (device design), but from the viewpoint of interface electrical characteristics, the allowable nitrogen concentration at the silicon substrate interface of the gate insulating film.
  • the nitrogen concentration is preferably less than 3 atomic%, and it is more preferable that nitrogen does not exist at the substrate interface.
  • the maximum nitrogen concentration in the gate insulating film is desirably 1 atomic% or more in order to obtain the thermal stability and the effect of suppressing dopant penetration. From the viewpoint of the insulating properties and reliability of the gate insulating film, it is desirable that the maximum amount of the nitrogen concentration in the film is less than 20 atomic%.
  • the nitrogen concentration range is deeply involved in the design of the device characteristics, and is not limited to the above range.
  • a silicon oxide film is formed on the surface of a silicon substrate, and then a stacked structure including a metal layer and a nitrogen-containing layer is formed thereon.
  • the thickness of the oxide film is preferably less than 1 nm from the viewpoint of reducing the equivalent silicon oxide film thickness to the physical thickness of the gate insulating film. Further, from the viewpoint of interfacial electric characteristics, the thickness is preferably 0.5 nm or more.
  • the thickness of the nitrogen-containing high dielectric constant gate insulating film varies depending on the case.
  • the physical thickness of the gate insulating film is 1.5 n from the viewpoint of preventing a sudden increase in the leak current at present. m or more, and the present invention can be suitably applied to such a gate insulating film. If the maximum value of the nitrogen concentration in the film thickness direction is more than 0.5 nm away from the silicon substrate, a film thickness exceeding 0.5 nm is naturally required.
  • La 203 is an oxide of Rantanoido based element, Ce02, P r 203, N d 2 03, Sm203, E u 203 is intended, G d 2 O 3 S T b 203 , D y 203, ⁇ 2 ⁇ 3, E r 203, Tm 2 0 3, Y b 2 0 3, L u 2 0 3, further there is a silicate one Bok material obtained by adding a divorced these metal oxides .
  • the ultra-thin silicon oxide film is also stacked on the high dielectric constant insulating film. It is effective to selectively nitride only the silicon oxide film layer on the surface side (gate electrode side) (or a region away from the silicon substrate interface).
  • the gate insulating film in this case has, for example, a stacked structure including a first silicon oxide film, a film made of a metal oxide or a metal silicate, and a second silicon oxide film from the silicon substrate side. Nitrogen is introduced only into the first silicon oxide film, and nitrogen is not introduced into the first silicon oxide film and the film made of metal oxide or metal silicate.
  • the thickness of the first and second silicon oxide films is preferably 0.5 nm or more from the viewpoint of the effect of improving interfacial electrical characteristics, and the equivalent silicon oxide film thickness is smaller than the physical thickness of the gate insulating film.
  • the thickness is preferably 1 nm or less from the viewpoint of the performance.
  • the thickness of the film made of the metal oxide or metal silicate is preferably 2 nm or more from the viewpoint of suppressing the tunnel current, and 5 nm or less from the viewpoint of easiness of manufacture and balance of the shape of the semiconductor device. preferable.
  • the above-mentioned silicon oxide film High dielectric constant insulating film Even if it is not a laminated structure having an interface, it is a structure in which the composition in the thickness direction of the metal silicide thin film is modulated, as proposed in Japanese Patent Application No. 2001-252522.
  • a structure in which the silicon composition is increased in the upper layer and the lower layer of the gate insulating film a structure in which only the region having a high silicon concentration on the surface side is selectively nitrided is also effective.
  • the gate insulating film has a nitrogen-containing ⁇ dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate, and the composition of the nitrogen-containing ⁇ dielectric constant insulating film is in accordance with the film thickness.
  • the silicon concentration has a minimum value at an intermediate portion between the silicon substrate-side interface and the gate electrode side interface of the nitrogen-containing high dielectric constant insulating film, and the silicon concentration has a minimum value. Nitrogen is introduced only between the position and the interface on the gate electrode side, and no nitrogen is introduced between the position where the silicon concentration has the minimum value and the interface on the silicon substrate side.
  • the concentration of the metal element in the metal silicate increases in the middle portion, and the silicon composition increases in the upper and lower layers of the film, so that the gate insulating film and the silicon substrate (lower interface) and At the boundary with the gate electrode (upper interface), it is possible to form a structure close to the SiO 2 / Si interface, and the interface electrical characteristics can be improved. It is also feared that the silicate temperature of a high-concentration silicate material is relatively low. However, by forming a structure in which this high-concentration metal region is sandwiched by a high-concentration silicon high-concentration region, thermal conductivity is increased. Stability can be improved.
  • a nitrogen-containing high-permittivity insulating film in which the composition of the metal silicate changes in the film thickness direction is divided into a first region, an intermediate region, and a second region from the silicon substrate side.
  • the first region is in contact with the silicon substrate and the second region is in contact with the gate electrode
  • the silicon concentration in the metal silicide decreases continuously from the silicon substrate side interface of the first region
  • the minimum value is reached in the intermediate region
  • the value then increases, and continuously increases to the gate electrode side interface in the second region.
  • silicon metal is used.
  • the element ratio is higher than the average value of the entire gate insulating film, the silicon metal element ratio is lower than the average value of the entire gate insulating film in the intermediate region, and nitrogen is introduced only in the second region.
  • the thickness of the first and second regions is preferably 0.5 nm or more from the viewpoint of the effect of improving interfacial electrical characteristics.
  • the thickness is preferably 1 nm or less from the viewpoint of reducing the equivalent silicon oxide film thickness to the physical thickness of the insulating film.
  • the thickness of the intermediate region is preferably 2 nm or more from the viewpoint of suppressing tunnel current, and is preferably 5 nm or less from the viewpoint of easiness of manufacturing and the balance of the shape of the semiconductor device.
  • the metal element constituting the metal oxide or metal silicate layer or silicon in the silicate, or the upper layer of the high dielectric constant film or
  • Several bonding modes metal-nitrogen, silicon-nitrogen, or oxygen-nitrogen bonds) between the silicon-oxygen and nitrogen atoms that make up the silicon oxide film inserted in the lower layer can be considered.
  • a substance composed of a bond between a metal atom and a nitrogen atom often has relatively low insulating properties, so that when introducing nitrogen into a film, a large amount of a metal-nitrogen bond is formed.
  • AIN aluminum nitride
  • metal-nitrogen bonds there are more silicon-nitrogen bonds than metal-nitrogen bonds.
  • a gate insulating film (without introducing nitrogen) containing a high dielectric constant insulating film is formed on a silicon substrate and irradiated with a nitrogen-containing plasma, a high dielectric constant thin film made of metal oxide and silicon are used.
  • a plasma nitridation process on a laminated structure with an oxide film or a metal silicate thin film, it is possible to selectively nitride only silicon atoms in the film (particularly on the film surface side) by adjusting the plasma irradiation conditions. .
  • an AI 2 O 3 film formed by an atomic layer deposition method (Atomic Layer Chemical I Vapor Deposition: ALD) is used. The result of introducing nitrogen by irradiation of nitrogen radicals therein is shown.
  • FIG. 4 is a typical radical irradiation condition results nitrogen concentration of AI 2 0 3 film obtained by nitriding prepared was evaluated by secondary ion mass spectrometry. From these results, when the substrate temperature is high and the nitrogen gas pressure is low (700 ° C, 0.3 Pa), nitrogen is distributed over the entire film and high concentration nitrogen is introduced to the interface. When the temperature was lowered and the nitrogen gas pressure was raised (300 ° C, 0.9 Pa), the nitrogen concentration in the film decreased, and a profile in which nitrogen was localized on the surface side was obtained. You can see that it is done. Therefore, the amount of nitrogen introduced can be controlled by the substrate temperature, and the nitrogen concentration in the film can be localized on the film surface side by optimizing the nitrogen gas partial pressure (in the above case, increasing the pressure). It is.
  • transistors nitrogen concentration at the interface had a high gate insulating film (nitride Conditions: 700 ° C, 0. 3 P a) to AI 2 0 3 film surface as compared with The mobility is approximately 20 for a transistor having a gate insulating film structure in which nitrogen is localized (nitriding conditions: 300 ° C, 0.9 Pa). Was growing. (Example 2)
  • nitriding treatment was performed by irradiating hafnium siligate (HfSIO) with nitrogen plasma.
  • HfSIO hafnium siligate
  • a MOSFET field region was formed on a silicon wafer in advance, and a 0.6-nm-thick silicon oxide film was formed in this region as a base oxide film (interface oxide layer).
  • a 3 nm-thick silicate film containing 10 atomic% of Hf formed thereon was irradiated with active nitrogen generated from nitrogen gas using an ECR plasma source.
  • the irradiation conditions were a substrate temperature of 300 ° C., a nitrogen partial pressure of 6.7 Pa, and a power supply of 60 for 1 minute. As a result, a silicide film containing 10 ⁇ 1 ⁇ 2 of nitrogen in atomic% was obtained.
  • FIG. 5 shows the X-ray photoelectron spectrum (Si 2 p core level spectrum) obtained from the H f silicate film before and after the plasma irradiation in this example.
  • the peak energy of 102.5 eV caused by the silicide is shifted to the lower binding energy side by nitriding. This indicates that S i -N bonds were formed in the film.
  • the nitrogen introduction effect was improved by the nitrogen introduction effect (the crystallization temperature was improved by 100 ° C or more), and the mobility and reliability did not deteriorate due to the nitrogen introduction. Further, the effect of preventing dopant penetration from the polysilicon gate was confirmed.
  • the Si—O bond in the silicate film is selectively replaced with nitrogen, so that nitrogen can be contained in the silicate film without an increase in leak current.
  • the relative dielectric constant increases (the average dielectric constant of the silicide film increases from 10 to 12).
  • a zirconium silicide or a lanthanum silicide was nitrided instead of a hafnium silicide, the same effect was obtained. Obtained.
  • a third embodiment of the present invention show in accordance with the flow diagram of an example in which the nitrogen added to the Z r O 2 in the high dielectric constant ⁇ inserting the silicon oxide film extremely thin silicon substrate interface Figure 6 c
  • the chemical oxide film formed on the substrate surface was separated by hydrofluoric acid solution treatment, and the silicon surface was terminated with hydrogen atoms ((a) in the same figure).
  • This wafer was oxidized at 700 ° C. in a reduced-pressure oxygen atmosphere of 5 Torr (670 Pa) to form a 0.6 nm-thick silicon oxide film 603 (FIG. 2B).
  • the deposition of the metal layer and the nitrogen-containing layer on the surface of the oxide film was performed using a sputtering system having a plurality of targets.
  • a sputtering system having a plurality of targets.
  • a low-damage deposition method employing ECR discharge was adopted.Argon gas was used as the sputtering gas, gas pressure was 5 ⁇ 10-4 Torr (0.067 Pa), and high-frequency output was 100 W. .
  • a polysilicon electrode was formed on the gate insulating film having the silicon oxide film 603 and the high-dielectric-constant insulating film 606 manufactured by the above-described manufacturing method, thereby manufacturing a MOSF.
  • the equivalent silicon oxide film thickness was 1.4 nm
  • the leakage current flowing through the gate insulating film was equivalent to the equivalent oxide film thickness. It was reduced by about three orders of magnitude compared to the silicon oxide film.
  • the crystallization temperature of the gate insulating film layer is lower than that when nitrogen is not added. Improved by 50 ° C or more. Furthermore, no abnormalities in the transistor operating characteristics due to the penetration of the dopant were observed in the heat treatment at 1050 ° C, which is the dopant activation step.
  • a ZrO 2 fl matrix with nitrogen localized on the surface side was prepared in the same procedure as in the third embodiment, and then a polysilicon germanium electrode was formed as a gate electrode.
  • the effect of gate electrode depletion was reduced, and the on-current of the transistor was increased.
  • nitrogen was added via a silicon nitride film to a Hf silicate high dielectric constant thin film having a silicon oxide film inserted at the silicon substrate interface (FIG. 7).
  • a silicon oxide film 703 having a thickness of 0.6 nm was formed (FIG. 7B).
  • An amorphous ⁇ ! 51 layer 704 with a physical film thickness of 2 nm was formed on this surface by sputter deposition using an HfSi sintered body target (Fig. 3 (c)).
  • the sputtering film formation conditions were the same as in Example 2.
  • a 0.5 nm thick silicon nitride film 705 was formed on the surface of the wafer by CVD (chemical vapor deposition) using SiH 4 and NH 3 as source gases (see FIG. )).
  • the sample was oxidized at 700 ° C. in a reduced pressure oxygen atmosphere of 1 Torr (130 Pa) to form a nitrogen-introduced hafnium silicate (HfSiO) film 706, A nitrogen-containing high dielectric constant insulating film was used.
  • HfSiO hafnium silicate
  • the thermal stability of the high dielectric constant thin film is improved.
  • a semiconductor device capable of simultaneously obtaining a plurality of effects such as improvement of the resistance, prevention of the penetration of dopant from the gate electrode, and prevention of deterioration of the electrical characteristics at the interface between the gate insulating film and the silicon substrate.
  • a manufacturing method effective for manufacturing a semiconductor device having a gate insulating film structure having the above-mentioned high dielectric constant thin film is provided.

Abstract

A semiconductor device having a gate insulting film and a gate electrode formed in this order on a silicon substrate, wherein the gate insulating film includes a nitrogen-containing high dielectric constant insulating film with a structure in which nitrogen is introduced into a metal oxide or a metal silicate, the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film has a distribution in the direction of the film thickness, and the position where the nitrogen concentration is maximum in the direction of the film thickness is present in a region away from the silicon substrate. A method for manufacturing a semiconductor device comprising a step of introducing nitrogen into a high dielectric constant insulating film of a metal oxide or a metal silicate by exposure to a nitrogen-containing plasma is also disclosed. As a result, the thermal stability of the high dielectric constant gate insulating film is improved, and the dopant penetration is suppressed, thereby preventing the electric characteristics of the interface with the silicon substrate from degrading.

Description

明 細 書 半導体装置およびその製造方法 技術分野  Description Semiconductor device and method for manufacturing the same
本発明は、 高誘電率薄膜を有した半導体装置ならびにその製造方法に関するもの であり、 特 Iこ MO S FET (Me t a l O x i d e S em i c o n d u c t o r F i e l d E f f e c t T r a n s i s t o r) を槍成す ケート $Ε稼 fl吴 の高性能化と低消費電力化に関する技術である。 背景技術  The present invention relates to a semiconductor device having a high dielectric constant thin film and a method for manufacturing the same, and more particularly to a semiconductor device having a metal oxide semiconductor field effect transistor (MOSFET). This technology is related to high performance and low power consumption of fl 吴. Background art
シリコン酸化膜はプロセス上の安定性や優れた絶縁特性を有し、 MOS FETの ゲート絶縁膜材料として用いられている。 近年の素子微細化と共にゲート絶縁膜の 薄層化が進んでおり、 ゲー卜長が 100 nm以下のデバイスではスケ一リング則の 要請からゲート絶縁膜であるシリコン酸化膜の厚さは 1. 5 n m以下であることが 必要となっている。 しかし、 この様な極薄の絶縁膜を用いた場合、 ゲートバイアス 印加時に絶縁層を挿んでのトンネル電流がソース Zドレイン電流に対して無視でき ない値となり、 MOS FETの高性能化と低消費電力化における大きな課題となつ ている。  Silicon oxide film has process stability and excellent insulation properties, and is used as a gate insulating film material for MOS FETs. The gate insulating film is becoming thinner with the recent miniaturization of devices. For devices with a gate length of 100 nm or less, the thickness of the silicon oxide film, which is the gate insulating film, is 1.5 It is necessary to be smaller than nm. However, when such an extremely thin insulating film is used, the tunnel current with the insulating layer inserted when a gate bias is applied becomes a value that cannot be ignored with respect to the source Z drain current. This is a major issue in electrification.
ゲート絶縁膜の薄層化に伴うもう一つの問題点は、 ゲート電極 (ポリシリコン電 極) からのドーパントの拡散現象である。 通常 MOS F ETで用いられているゲー ト電極は、 ゲ一卜絶縁膜上に堆積したポリシリコンを高濃度にドーピングして金属 的な性質を持たせたものであり、 シリコン酸化膜が非常に薄い場合にはゲート電極 からのドーパン卜が絶縁膜層を突き抜けてシリコン基板側に拡散する現象が問題と なる。  Another problem with thinner gate dielectrics is the phenomenon of dopant diffusion from the gate electrode (polysilicon electrode). The gate electrode that is usually used in MOS FET is made by doping polysilicon deposited on a gate insulating film at a high concentration to have metallic properties. If it is thin, the problem that the dopant from the gate electrode penetrates through the insulating film layer and diffuses toward the silicon substrate becomes a problem.
上記のゲー卜絶縁膜の薄層化に付随したリーク電流の増加やドーパント突き抜け の問題を解決するための技術開発が進められている。 その一つは、 シリコン酸化膜 中に窒素を添加することで純粋なシリコン酸化膜に比べて誘電率を増加させ、 物理的な膜厚を薄層化することなしに実効的 (電気的) なゲート絶縁層の膜厚を減 少させる方法である。 加えて窒素添加により絶縁膜中のドーパン卜の拡散が抑制さ れることが確認されておリ、 ゲート絶縁膜への窒素添加は上述の二つの課題を解決 する有力な技術として注目を集めている。 しかし、 シリコン酸化膜への窒素添加に よる高誘電率化には限界があることに加えて、 窒素に起因した界面欠陥や膜中の固 定電荷発生に伴う トランジスターの移動度ならびに信頼性の劣化が問題として指摘 されている。 Technology development is underway to solve the problems of increased leakage current and dopant penetration associated with the thinner gate insulating film. One of them is the silicon oxide film The addition of nitrogen increases the dielectric constant compared to pure silicon oxide, and reduces the effective (electrical) gate insulation layer thickness without reducing the physical thickness. It is a method to reduce. In addition, it has been confirmed that the addition of nitrogen suppresses the diffusion of dopants in the insulating film, and the addition of nitrogen to the gate insulating film has attracted attention as a promising technology for solving the above two problems. . However, there is a limit to increasing the dielectric constant by adding nitrogen to the silicon oxide film, and the mobility and reliability of the transistor deteriorate due to interface defects caused by nitrogen and the generation of fixed charges in the film. Is pointed out as a problem.
従って、 シリコン酸化膜に代わる次世代のゲート絶縁膜の材料として、 シリコン 酸窒化膜ゃシリコン窒化膜に比べて比誘電率が高く、 かつドーパント拡散の防止効 果を有した材料の探索が進められている。 まず比誘電率が高い材料としては、 A I 2 0 3、 Z r O 2や H f O 2、 および Y 2 0 3などの希土類元素酸化物、 また L a 2 0 a のなどのランタノィド系希土類元素の酸化物、 さらにはこれらのシリケ一卜薄膜が 候補材料として検討されている。 Therefore, as a material for the next-generation gate insulating film that replaces the silicon oxide film, the search for a material that has a higher dielectric constant than silicon oxynitride film / silicon nitride film and has an effect of preventing dopant diffusion has been promoted. ing. The first material having a high dielectric constant, AI 2 0 3, Z r O 2 and H f O 2, and Y 2 0 3 rare earth element oxides such as, also Rantanoido rare earth elements such as the L a 2 0 a These oxides, as well as these silicate thin films, are being studied as candidate materials.
この様な高誘電率膜を用いればゲート長を微細にしてもスケーリング則に則った ゲート絶縁膜容量を保持しつつトンネル電流を防げる厚さにできるというのがその 根拠である。  The rationale is that the use of such a high dielectric constant film can prevent tunnel current while maintaining the gate insulating film capacitance in accordance with the scaling rule even when the gate length is reduced.
ゲート絶縁膜の種類によらず、 ゲー卜絶縁膜材料がシリコン酸化膜であると仮定 して、 ゲート容量から逆算して得られる絶縁層の膜厚をシリコン酸化膜換算膜厚と 呼ぶ。 すなわち、 絶縁膜とシリコン酸化膜の比誘電率をそれぞれ ε h、 S oとし、 絶縁膜の厚さを d hとした時、 シリコン酸化膜換算膜厚 d eは d e = d h ( ε o / ε h ) となる。 ε oに較べて大きな誘電率 ε hをもった材料を用いれば絶縁膜が厚 くても薄いシリコン酸化膜と同等になりうることを示している。 シリコン酸化膜の 比誘電率 ε οは 3 . 9程度なので例えば ε h = 3 9の高誘電体膜を用いれば 1 5 n mの厚さにしても 1 . 5 n mのシリコン酸化膜換算膜厚になり、 トンネル電流を激 減できるわけである。  Regardless of the type of the gate insulating film, assuming that the gate insulating film material is a silicon oxide film, the thickness of the insulating layer obtained by calculating backward from the gate capacitance is called a silicon oxide film equivalent thickness. That is, assuming that the relative permittivity of the insulating film and the silicon oxide film is ε h and S o, respectively, and the thickness of the insulating film is dh, the equivalent silicon oxide film thickness de is de = dh (ε o / ε h) It becomes. It is shown that if a material having a dielectric constant ε h larger than ε o is used, a thick insulating film can be equivalent to a thin silicon oxide film. Since the relative dielectric constant ε ο of a silicon oxide film is about 3.9, for example, if a high dielectric film with ε h = 39 is used, even if the thickness is 15 nm, the equivalent silicon oxide film thickness is 1.5 nm. Therefore, the tunnel current can be drastically reduced.
上述の様に、 次世代 M O S F E Tの開発では、 髙誘電率薄膜をゲート絶縁膜材料 として採用することが検討されており、 髙誘電率薄膜としては上記の金属酸 化物薄膜ゃシリゲート薄膜が有望である。 しかしこれらの高誘電率薄膜についても 以下の問題が指摘されている。 As mentioned above, in the development of next-generation MOSFETs, 髙 It has been studied to adopt と し て the above-mentioned metal oxide thin film ゃ silicide thin film as the dielectric constant thin film. However, the following problems have been pointed out for these high dielectric constant thin films.
第一に高誘電率ゲート絶縁膜の熱安定性の問題が生じている。 つまりゲート電極 に打ち込んだドーパントを活性化する熱処理工程で上記の高誘電率ゲート材料が結 晶化したり、 シリコン基板との界面反応が進行することが報告されている。 高誘電 率膜の結晶化が起きた場合には、 結晶粒同士の境界 (結晶粒界) が発生し、 これら の粒界での絶縁特性の劣化や、 結晶化に伴う膜厚の面内不均一性などが生じる。 こ の結晶化問題を改善する手段としては、 熱安定性の高い高誘電率材料を選択する事 に加え、 金属酸化物ゃシリゲート膜中に窒素添加を施すことが有効である。 一方、 気相中の酸素は高誘電率膜中を容易に拡散するために、 成膜および後熱処理時にシ リコン基板との界面に反応層が形成されることが問題となる。  First, there is a problem of thermal stability of the high dielectric constant gate insulating film. In other words, it is reported that the high-k gate material is crystallized or an interfacial reaction with a silicon substrate proceeds in a heat treatment step for activating the dopant implanted in the gate electrode. When crystallization of the high dielectric constant film occurs, boundaries between crystal grains (crystal grain boundaries) are generated, and the insulation properties at these grain boundaries are degraded, and the in-plane thickness of the film due to the crystallization is reduced. Uniformity occurs. As a means of solving this crystallization problem, it is effective to select a high dielectric constant material having high thermal stability and to add nitrogen to the metal oxide / silicide film. On the other hand, oxygen in the gas phase easily diffuses into the high dielectric constant film, so that there is a problem that a reaction layer is formed at the interface with the silicon substrate during film formation and post-heat treatment.
この問題に対しては、 高誘電率薄膜とシリコン基板との界面に非常に薄い (通常 0 . 5 n m〜 1 n m程度) のシリコン酸化膜を挿入した構造が検討されている。 さらに 近年では上述の界面挿入層としてシリコン酸窒化膜ゃシリコン窒化膜が効果的であ ることが報告されている。 To address this problem, a structure in which a very thin (usually about 0.5 nm to 1 nm) silicon oxide film is inserted at the interface between the high dielectric constant thin film and the silicon substrate has been studied. In recent years, it has been reported that a silicon oxynitride film / silicon nitride film is effective as the above-mentioned interface insertion layer.
第二の問題点としては、 シリコン酸化膜と同様に高誘電率ゲート絶縁膜に関して もドーパントの突き抜けによるデバイス特性の劣化が知られている。 この問題は絶 縁膜材料の種類で差異はあるものの、 高誘電率ゲー卜絶縁膜ではシリコン酸化膜に 比べて物理膜厚を厚くできるにも関わらず、 膜中でのドーパン卜の拡散速度が速く、 ポリシリコンゲー卜電極やポリシリコンゲルマニウム電極を用いる場合には致命的 な問題となる。 しかし近年の研究報告では、 A l 2 0 3や Z r O 2に窒素を添加する ことでドーパント拡散を抑制できることが報告されている。 As a second problem, it is known that, similarly to the silicon oxide film, the device characteristics of the high dielectric constant gate insulating film are deteriorated due to the penetration of the dopant. Although this problem is different depending on the type of insulating film material, the diffusion rate of the dopant in the film is high in the high-k gate insulating film despite the fact that the physical film thickness can be made larger than the silicon oxide film. This is a fatal problem when using a polysilicon gate electrode or a polysilicon germanium electrode. However, in recent research report, it can be suppressed dopant diffusion by adding nitrogen to A l 2 0 3 and Z r O 2 have been reported.
第三の問題点としては、 髙誘電率薄膜とシリコン基板との界面電気特性の劣化が 指摘されている。 従来のシリコン酸化膜界面に比べて髙誘電率薄膜界面では界面欠 陥密度が高く、 通常 1 0 "Z c m 2以上の欠陥が存在する。 これらの界面欠陥 (あ るいは膜中欠陥) によって M O S F E Tの移動度がシリコン酸化膜に比べて数分の 一に劣化したり、 膜中および界面での固定電荷によってトランジスター動作 の閾値が変動する問題が生じている。 これらの問題に対する改善策としては、 先の 第一の問題に対する改善策と同様に高誘電率薄膜界面にシリコン酸化膜を挿入する ことが効果的である。 しかし、 界面シリコン酸化膜層が厚い場合にはゲート絶縁膜 全体の酸化膜換算膜厚が増加する。 これに対して界面酸化膜層が薄い場合には界面 熱安定性やドーパン卜の突き抜け防止効果が不十分である。 さらに高誘電率薄膜と シリコン基板との界面に極薄のシリコン酸窒化膜ゃシリコン窒化膜を挿入した構造 は、 界面熱安定性改善とドーパント突き抜け抑制に効果的であるが電気特性が劣化 する。 これは窒素に起因した界面欠陥が新たに導入されるためであり、 従来のシリ コン シリコン酸化膜界面に比べ、 移動度や信頼性劣化を引き起こす。 The third problem is pointed out as follows: (1) Deterioration of the electrical characteristics at the interface between the dielectric constant thin film and the silicon substrate. In髙誘conductivity thin film interface compared to a conventional silicon oxide film interface high interfacial defect density, there is normally 1 0 "Z cm 2 or more defects. MOSFET These interface defects (Oh Rui Makuchu defects) Mobility of several minutes compared to silicon oxide film The problem is that the threshold of transistor operation fluctuates due to degradation and fixed charges in the film and at the interface. As a remedy for these problems, it is effective to insert a silicon oxide film at the high dielectric constant thin film interface as in the remedy for the first problem. However, when the interfacial silicon oxide layer is thick, the equivalent oxide thickness of the entire gate insulating film increases. On the other hand, if the interfacial oxide layer is thin, the interfacial thermal stability and the effect of preventing dopant penetration are insufficient. Furthermore, a structure in which an ultra-thin silicon oxynitride / silicon nitride film is inserted at the interface between the high-dielectric-constant thin film and the silicon substrate is effective for improving interfacial thermal stability and suppressing dopant penetration, but deteriorates electrical characteristics. This is due to the introduction of new interface defects caused by nitrogen, which causes mobility and reliability degradation compared to the conventional silicon-silicon oxide interface.
上述の様に、 第一と第二の問題点の解決には高誘電率ゲー卜絶縁膜中への窒素導 入は有効であるが、 シリコン基板との界面に存在する窒素は悪影響を及ぼす。 シリ コン酸化膜への窒素導入に際しては、 N H 3や N Oガスなどの窒素を含んだガス雰 囲気中で試料を熱処理することで、 膜中に窒素を導入することができるが、 シリコ ン基板との界面に窒素が多く偏祈し、 第三の問題点で示した移動度ならびに信頼性 劣化を引き起こす。 また高誘電率絶縁膜でも窒素を含んだガス雰囲気中でァニール することでも膜中に窒素を導入することができるが、 この場合も同様にシリコン基 板界面での窒素の偏析問題が懸念されている。 As described above, introduction of nitrogen into the high dielectric constant gate insulating film is effective for solving the first and second problems, but nitrogen present at the interface with the silicon substrate has an adverse effect. When introducing nitrogen into the silicon oxide film, nitrogen can be introduced into the film by heat-treating the sample in a gas atmosphere containing nitrogen such as NH 3 or NO gas. A large amount of nitrogen is biased at the interface of, causing the mobility and reliability degradation shown in the third problem. Nitrogen can also be introduced into a high-dielectric-constant insulating film by annealing in a gas atmosphere containing nitrogen, but also in this case, there is a concern about the problem of nitrogen segregation at the silicon substrate interface. I have.
高誘電率薄膜への新しい窒素導入方法として、 金属窒化物膜に酸化処理を施すェ 程が提案されている (小山他、 T e c h . D i g . I E D M 2 0 0 1 , p 4 5 9 . )。 具体的にはシリコン基板表面にスパッタリング法によって Z r N fl莫を堆積し、 これに 5 0 0 °Cで酸化処理を施すことで Z r O 2への窒素添加を行い、 従来の Z r O 2膜に比べて優れた熱安定性を実現している。 しかし本手法では Z r N堆積時と 酸化処理の際にシリコン基板との界面に窒素を高濃度に含んだ S i O N層が形成さ れ、 上述の第三の問題点を解決するには至らない。 発明の開示 本発明の目的は、 髙誘電率ゲート絶縁膜のデバイス応用に向けての上記の 熱安定性、 ドーパント突き抜け抑制ならびに界面電気特性の改善に対する対策を同 時に実現可能なゲート絶縁膜構造を有する半導体装置ならびにその製造方法を提供 することにある。 As a new method for introducing nitrogen into a high dielectric constant thin film, a method of oxidizing a metal nitride film has been proposed (Koyama et al., Tech.Dig. IEDM 201, p459.) . Depositing a Z r N fl trillions by the specific sputtering surface of the silicon substrate, to which performs addition of nitrogen to the Z r O 2 in at 5 0 0 ° C is subjected to oxidation treatment, conventional Z r O Excellent thermal stability compared to two films. However, in this method, a SiON layer containing a high concentration of nitrogen is formed at the interface with the silicon substrate during the deposition of ZrN and during the oxidation treatment, and it is not possible to solve the third problem described above. Absent. Disclosure of the invention SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device having a gate insulating film structure capable of simultaneously realizing the above-described measures for thermal stability, dopant penetration suppression, and improvement of interfacial electrical characteristics for device application of a dielectric constant gate insulating film. And a method for producing the same.
図面の簡単な説明 BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の半導体装置の一形態を示す概念図であり、 第 2図は、 本発明 の半導体装置の製造方法の一形態を示すフロー図である。  FIG. 1 is a conceptual diagram showing one embodiment of a semiconductor device of the present invention, and FIG. 2 is a flowchart showing one embodiment of a method of manufacturing a semiconductor device of the present invention.
第 3図は、 本発明の半導体装置の他の形態を示す概念図である。 更に、 第 4図は、 窒素プラズマ照射によって A I 2 0 3膜中に窒素導入を行った際の膜中窒素プロフ アイル測定結果 (2次イオン質量分析結果) を示すグラフである。 FIG. 3 is a conceptual diagram showing another embodiment of the semiconductor device of the present invention. Furthermore, FIG. 4 is a graph showing the AI 2 0 3 film and a nitrogen inlet membrane nitrogen profiles measurements when performing in (secondary ion mass analysis) by nitrogen plasma exposure.
第 5図は、 プラズマ窒化処理を施したハフニウムシリケ一卜表面の X線光電子分 光測定による結合状態評価を示すグラフである。  FIG. 5 is a graph showing the evaluation of the bonding state of the hafnium silicate surface subjected to the plasma nitriding treatment by X-ray photoelectron spectroscopy.
第 6図は、 本発明の半導体装置の製造方法の他の形態 (金属窒化物層を有した積 層構造の酸化処理によるゲート絶縁膜構造の製造方法) を示すフロー図であり、 第 7図は、 本発明の半導体装置の製造方法の他の形態 (シリコン窒化膜を有した積層 構造の酸化処理によるゲート絶縁膜構造の製造方法) を示すフロー図である。  FIG. 6 is a flowchart showing another embodiment of the method of manufacturing a semiconductor device of the present invention (a method of manufacturing a gate insulating film structure by oxidizing a laminated structure having a metal nitride layer). FIG. 4 is a flowchart showing another embodiment of the method of manufacturing a semiconductor device of the present invention (a method of manufacturing a gate insulating film structure by oxidizing a stacked structure having a silicon nitride film).
以下、 図中で用いている符合を説明する。  Hereinafter, the symbols used in the drawings will be described.
符合 1 0 1はシリコン基板を、 符合 1 0 2は、 シリコン酸化膜 (界面酸化膜層) を、 符合 1 0 3は、 窒素含有高誘電率絶縁膜を、 符合 1 0 4は、 ゲート電極を、 符 合 2 0 1は、 シリコン基板を、 符合 2 0 2は、 水素終端表面を、 符合 2 0 3は、 シ リコン酸化膜を、 符合 2 0 4は、 金属層を、 符合 2 0 5は、 窒素含有層を、 符合 2 0 6は、 窒素含有髙誘電率絶縁膜を、 符合 3 0 1は、 シリコン基板を、 符合 3 0 2 は、 シリコン酸化膜を、 符合 3 0 3は、 窒素含有高誘電率絶縁膜を、 符合 3 0 4は、 ゲート電極を、 符合 6 0 1は、 シリコン基板を、 符合 6 0 2は、 水素終端表面を、 符合 6 0 3は、 シリコン酸化膜を、 符合 6 0 4は、 金属 Z r堆積層を、 符合 6 0 5 は、 Z r N堆積層を、 符合 6 0 6は、 窒素含有高誘電率絶縁膜を、 符合 7 0 1は、 シリコン基板を、 符合 7 0 2は、 水素終端表面を、 符合 7 0 3は、 シリコン酸化膜 を、 符合 7 0 4は、 H f S i堆積層を、 符合 7 0 5は、 シリコン窒化膜を、 符合 7 0 6は、 窒素含有高誘電率絶縁膜 (窒素含有 H f シリケ一卜層) を示す。 発明を実施するための最良の形態 Reference numeral 101 denotes a silicon substrate, reference numeral 102 denotes a silicon oxide film (interface oxide film layer), reference numeral 103 denotes a nitrogen-containing high dielectric constant insulating film, and reference numeral 104 denotes a gate electrode. Reference numeral 201 denotes a silicon substrate, reference numeral 202 denotes a hydrogen-terminated surface, reference numeral 203 denotes a silicon oxide film, reference numeral 204 denotes a metal layer, and reference numeral 205 denotes a metal layer. , A nitrogen-containing layer, reference numeral 206 denotes a nitrogen-containing dielectric constant insulating film, reference numeral 301 denotes a silicon substrate, reference numeral 302 denotes a silicon oxide film, and reference numeral 303 denotes a nitrogen-containing film. High dielectric constant insulating film, reference numeral 304 denotes a gate electrode, reference numeral 601 denotes a silicon substrate, reference numeral 602 denotes a hydrogen-terminated surface, reference numeral 603 denotes a silicon oxide film. Reference numeral 604 denotes a metal Zr deposited layer, reference numeral 605 denotes a ZrN deposited layer, reference numeral 606 denotes a nitrogen-containing high dielectric constant insulating film, reference numeral 701 denotes a silicon substrate, Reference numeral 702 indicates a hydrogen-terminated surface, reference numeral 703 indicates a silicon oxide film. Reference numeral 704 denotes an HfSi deposited layer, reference numeral 705 denotes a silicon nitride film, and reference numeral 706 denotes a nitrogen-containing high dielectric constant insulating film (nitrogen-containing Hf silicon layer). Is shown. BEST MODE FOR CARRYING OUT THE INVENTION
本発明の第 1の形態として、 シリコン基板上に、 ゲート絶縁膜とゲート電極とを この順に有する半導体装置において、  As a first embodiment of the present invention, in a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲート絶縁膜が、 金属酸化物もしくは金属シリケー卜に窒素が導入された構造の 窒素含有高誘電率絶縁膜を有し、 該窒素含有高誘電率絶縁膜中の窒素濃度は膜厚方 向に分布を持ち、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal oxide or a metal silicate, and the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film is increased in the thickness direction. Has a distribution,
該窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 シリコン 基板から離れた領域に存在することを特徴とする半導体装置が提供される。 A semiconductor device is provided in which a position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is located in a region away from the silicon substrate.
この半導体装置において、 前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向 で最大となる位置が、 シリコン基板から 0 . 5 n m以上離れた領域に存在すること が好ましい。  In this semiconductor device, it is preferable that the position where the nitrogen concentration in the nitrogen-containing high-dielectric-constant insulating film becomes maximum in the film thickness direction is in a region separated from the silicon substrate by 0.5 nm or more.
また、 前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 窒素含有高誘電率絶縁膜のゲート電極側に局在していることも好ましい。  It is also preferable that the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is localized on the gate electrode side of the nitrogen-containing high dielectric constant insulating film.
前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 窒素 含有高誘電率絶縁膜の中央部分に局在していることも好ましい。  It is also preferable that the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is localized at the center of the nitrogen-containing high dielectric constant insulating film.
前記ゲート絶縁膜のシリコン基板側界面における窒素濃度が 3原子%未満である ことも好ましい。  It is also preferable that the nitrogen concentration at the interface between the gate insulating film and the silicon substrate is less than 3 atomic%.
本発明の第 2の形態として、 シリコン基板上に、 ゲート絶縁膜とゲート電極とを この順に有する半導体装置において、  As a second mode of the present invention, in a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
前記ゲート絶縁膜が、 金属シリケ一卜に窒素が導入された構造の窒素含有高誘電率 絶縁膜を有し、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
該窒素含有高誘電率絶縁膜中の窒素原子が金属シリケー卜中のシリコン原子と選択 的に結合している半導体装置が提供される。 There is provided a semiconductor device in which nitrogen atoms in the nitrogen-containing high dielectric constant insulating film are selectively bonded to silicon atoms in metal silicate.
この半導体装置において、 前記金属シリゲート中のシリコン原子と選択的に結合 した窒素原子が、 シリコン基板から離れた位置に存在することが好ましい。 上記半導体装置において、 前記ゲート絶縁膜が、 前記シリコン基板上に接して形 成されたシリコン酸化膜と、 該シリコン酸化膜上に接して形成された前記窒素含有 高誘電率絶縁膜とを有することが好ましい。 In this semiconductor device, selectively bonding with silicon atoms in the metal silicide It is preferable that the removed nitrogen atoms be present at positions away from the silicon substrate. In the above semiconductor device, the gate insulating film has a silicon oxide film formed in contact with the silicon substrate and the nitrogen-containing high dielectric constant insulating film formed in contact with the silicon oxide film. Is preferred.
本発明の第 3の形態として、 シリコン基板上に、 ゲート絶縁膜とゲート電極とを この順に有する半導体装置において、  According to a third aspect of the present invention, in a semiconductor device having a gate insulating film and a gate electrode on a silicon substrate in this order,
前記ゲー卜絶縁膜が、 金属シリケ一卜に窒素が導入された構造の窒素含有高誘電率 絶縁膜を有し、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
該窒素含有高誘電率絶縁膜の組成が膜厚方向で連続的に変化し、 該窒素含有高誘電 率絶縁膜のシリコン基板側界面とゲ一卜電極側界面との間の中間部分においてシリ コン濃度が最小値を有し、 The composition of the nitrogen-containing high-dielectric-constant insulating film continuously changes in the film thickness direction, and silicon is present at an intermediate portion between the interface between the silicon-substrate-side interface and the gate electrode-side interface of the nitrogen-containing high-dielectric-constant insulating film. The concentration has a minimum,
シリコン濃度が最小値を有する位置と該ゲート電極側界面との間のみに窒素が導入 されたことを特徴とする半導体装置が提供される。 There is provided a semiconductor device characterized in that nitrogen is introduced only between a position where the silicon concentration has a minimum value and the gate electrode side interface.
本発明の第 4の形態として、 シリコン基板上に、 ゲート絶縁膜とゲート電極とを この順に有する半導体装置において、  As a fourth mode of the present invention, in a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲート絶縁膜が、 シリコン基板側から順に、 第 1のシリコン酸化膜、 金属酸化物 膜もしくは金属シリケート膜および第 2のシリコン酸化膜を有する積層構造を有し、 第 2のシリコン酸化膜のみが、 シリコン酸化物に窒素が導入された構造を有するこ とを特徴とする半導体装置が提供される。 The gate insulating film has a stacked structure including a first silicon oxide film, a metal oxide film or a metal silicate film, and a second silicon oxide film in order from the silicon substrate side, and only the second silicon oxide film is formed. There is provided a semiconductor device having a structure in which nitrogen is introduced into silicon oxide.
上記半導体装置において、 前記シリコン基板と前記ゲート絶縁膜が接し、 該ゲー 卜絶縁膜とゲート電極とが接し、 かつ、 該ゲート電極が、 ポリシリコンもしくはポ リシリコンゲルマニウム導電膜であることが好ましい。  In the above semiconductor device, it is preferable that the silicon substrate and the gate insulating film are in contact, the gate insulating film is in contact with the gate electrode, and the gate electrode is a polysilicon or polysilicon germanium conductive film.
上記半導体装置において、 前記ゲー卜絶縁膜が、 Z r、 H f 、 T a、 A l、 T i、 N b、 S c、 Y、 L a、 Ce、 P r、 Nd、 Sm、 Eu、 Gd、 T b、 Dy、 H o、 E r、 Tm、 Y bおよび L uからなる群から選ばれる少なくとも一種を含むことが 好ましい。  In the above-described semiconductor device, the gate insulating film may be composed of Zr, Hf, Ta, Al, Ti, Nb, Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd , Tb, Dy, Ho, Er, Tm, Yb, and Lu.
また本発明により、 シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に 有する半導体装置の製造方法において、 According to the present invention, a gate insulating film and a gate electrode are formed on a silicon substrate in this order. In a method of manufacturing a semiconductor device having
該半導体装置が前記第 1、 第 2または第 3の形態の半導体装置であって、 金属酸化物もしくは金属シリゲートからなる高誘電率絶縁膜への窒素含有プラズマ 照射によって前記窒素の導入を行う工程を有することを特徴とする半導体装置の製 造方法が提供される。 The semiconductor device according to the first, second, or third aspect, wherein a step of introducing the nitrogen by irradiating a nitrogen-containing plasma to a high dielectric constant insulating film made of a metal oxide or a metal silicate is included. A method for manufacturing a semiconductor device is provided.
本発明により、 シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有す る半導体装置の製造方法において、  According to the present invention, in a method for manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が前記第 4の形態の半導体装置であって、 The semiconductor device is the semiconductor device according to the fourth aspect,
前記積層構造への窒素含有プラズマ照射によって前記窒素の導入を行う工程を有す ることを特徴とする半導体装置の製造方法が提供される。 A method for manufacturing a semiconductor device is provided, comprising a step of introducing the nitrogen by irradiating the stacked structure with a nitrogen-containing plasma.
本発明により、 シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有す る半導体装置の製造方法において、  According to the present invention, in a method for manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が前記第 2の形態の半導体装置であって、 The semiconductor device is the semiconductor device according to the second aspect,
金属シリゲートからなる高誘電率薄膜への窒素含有プラズマ照射によって、 金属シ リゲート中にシリコンと窒素との結合のみを選択的に形成し、 前記窒素の導入を行 う工程を有することを特徴とする半導体装置の製造方法が提供される。 A step of selectively forming only a bond between silicon and nitrogen in the metal silicide by irradiating the high dielectric constant thin film composed of the metal silicide with nitrogen-containing plasma, and introducing the nitrogen. A method for manufacturing a semiconductor device is provided.
本発明により、 シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有す る半導体装置の製造方法において、  According to the present invention, in a method for manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が前記第 1、 第 2または第 3の形態の半導体装置であって、 シリコン基板上に金属層と窒素を含有する窒素含有層からなる積層構造を形成した 後に酸化処理を施すことによってゲート絶縁膜を形成する工程を有することを特徴 とする半導体装置の製造方法が提供される。 The semiconductor device according to the first, second, or third aspect, wherein a stacked structure including a metal layer and a nitrogen-containing layer containing nitrogen is formed on a silicon substrate and then subjected to oxidation treatment. There is provided a method for manufacturing a semiconductor device, comprising a step of forming a gate insulating film.
この製造方法において、 前記窒素含有層がシリコン酸窒化膜もしくはシリコン窒 化膜であることが好ましい。  In this manufacturing method, it is preferable that the nitrogen-containing layer is a silicon oxynitride film or a silicon nitride film.
また、 この製造方法において、 前記窒素含有層が金属窒化物膜であることも好ま しい。  In this manufacturing method, it is also preferable that the nitrogen-containing layer is a metal nitride film.
さらに、 この製造方法において、 シリコン基板表面に膜厚 1 n m未満のシリコン 酸化膜を形成後に、 前記積層構造を形成することも好ましい。 In addition, in this manufacturing method, the silicon substrate surface has a thickness of less than 1 nm. It is also preferable to form the laminated structure after forming the oxide film.
また、 本発明により、 シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順 に有する半導体装置において、  According to the present invention, in a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲート絶縁膜が窒素と金属酸化物もしくは金属シリケー卜とを含み、 The gate insulating film contains nitrogen and a metal oxide or metal silicate,
該ゲート絶縁膜中の窒素濃度は膜厚方向に分布を持ち、 The nitrogen concentration in the gate insulating film has a distribution in the thickness direction,
該ゲート絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 シリコン基板から離 れた領域に存在することを特徴とする半導体装置も提供される。 There is also provided a semiconductor device, wherein a position where the nitrogen concentration in the gate insulating film becomes maximum in the film thickness direction is located in a region away from the silicon substrate.
本発明では、 高誘電率ゲート絶縁膜中の窒素濃度が最大となる位置をシリコン基 板界面から好ましくは 0 . 5 n m以上離し、 かつ高誘電率ゲート絶縁膜とシリコン 基板との界面での窒素濃度を好ましくは 3 %未満に低減したゲー卜絶縁膜構造を提 案する。 本ゲート絶縁膜構造を実現する製造方法として、 窒素を含有したプラズマ に曝すことでシリコン基板近傍以外の領域を選択的に窒化する工程、 またはシリコ ン基板上に金属層と窒素含有層からなる積層構造を形成した後に酸化処理を施すェ 程を採用することでゲート絶縁膜中の窒素分布を制御することができる。  In the present invention, the position where the nitrogen concentration in the high dielectric constant gate insulating film becomes maximum is preferably separated from the silicon substrate interface by 0.5 nm or more, and the nitrogen at the interface between the high dielectric constant gate insulating film and the silicon substrate is A gate insulating film structure with a concentration preferably reduced to less than 3% is proposed. As a manufacturing method for realizing the gate insulating film structure, a step of selectively nitriding a region other than the vicinity of the silicon substrate by exposing to a plasma containing nitrogen, or a lamination of a metal layer and a nitrogen-containing layer on a silicon substrate By adopting the step of performing the oxidation treatment after forming the structure, the distribution of nitrogen in the gate insulating film can be controlled.
なお、 高誘電率とはシリコン窒化膜に比べて比誘電率が高いことをいう。 より具 体的には、 高誘電率ゲート絶縁膜の比誘電率は、 シリコン酸化膜換算膜厚を薄くで きるという観点から、 好ましくは 8以上、 より好ましくは 1 0以上である。 ただし 金属酸化物としてアルミナを用いる場合には、 7以上でよい。  The high dielectric constant means that the dielectric constant is higher than that of the silicon nitride film. More specifically, the relative dielectric constant of the high dielectric constant gate insulating film is preferably 8 or more, more preferably 10 or more, from the viewpoint that the equivalent silicon oxide film thickness can be reduced. However, when alumina is used as the metal oxide, the number may be 7 or more.
本発明で提案する典型的な高誘電率ゲー卜絶縁膜構造を有する半導体装置を第 1 図に示した。 ここでは金属酸化物もしくは金属シリゲートからなる高誘電率薄膜の 上層部分に窒素を局在させて窒素含有高誘電率絶縁膜 1 0 3とし、 これとシリコン 基板 1 0 1との間に極薄の界面酸化膜層 (シリコン酸化膜 1 0 2 ) を挿入して形成 した、 窒素含有高誘電率絶縁膜 1 0 3とシリコン酸化膜 1 0 2とからなるゲート絶 縁膜構造を例にとって説明する。  FIG. 1 shows a semiconductor device having a typical high dielectric constant gate insulating film structure proposed in the present invention. Here, nitrogen is localized in the upper layer of the high-dielectric-constant thin film made of metal oxide or metal silicide to form a nitrogen-containing high-dielectric-constant insulating film 103. A gate insulating film structure composed of a nitrogen-containing high dielectric constant insulating film 103 and a silicon oxide film 102 formed by inserting an interface oxide film layer (silicon oxide film 102) will be described as an example.
まず第 1図に示したゲート絶縁膜構造がもたらす効果について以下に記述する。 金属酸化物もしくは金属シリケート中に窒素を添加することで高誘電率薄膜の熱安 定性を改善することができる。 また髙誘電率薄膜とシリコン基板との界面熱安定性 は高誘電率薄膜と基板との界面に極薄のシリコン酸化膜 1 0 2を挿入するこ とで改善可能である。 一方、 高誘電率薄膜上部に高濃度の窒素が局在しているため、 ゲート電極からのドーパント突き抜けを抑制することが可能である。 さらにシリコ ン基板と界面電気特性は、 高誘電率薄膜がシリコン基板に直接接触するのではなく 極薄のシリコン酸化膜を介し、 膜中の窒素がシリコン基板界面に存在しないため、 界面欠陥密度を低減し、 移動度や信頼性劣化を抑制することができる。 First, the effects provided by the gate insulating film structure shown in FIG. 1 will be described below. By adding nitrogen to the metal oxide or metal silicate, the thermal stability of the high dielectric constant thin film can be improved. The thermal stability of the interface between the dielectric constant thin film and the silicon substrate Can be improved by inserting an extremely thin silicon oxide film 102 at the interface between the high dielectric constant thin film and the substrate. On the other hand, since the high concentration of nitrogen is localized above the high dielectric constant thin film, it is possible to suppress the penetration of the dopant from the gate electrode. Furthermore, the electrical characteristics of the interface between the silicon substrate and the silicon substrate are based on the fact that the high dielectric constant thin film is not in direct contact with the silicon substrate, but rather through the ultra-thin silicon oxide film. It is possible to suppress mobility and reliability deterioration.
本発明におけるゲー卜絶縁膜の製造方法としては様々な手法が考えられるが、 例 えば、 以下の窒素含有プラズマ照射を応用した高誘電率薄膜の選択窒化法ならびに 金属層と窒素含有層との積層構造の酸化工程による窒素導入とプロフアイル制御が 効果的である。  Various methods can be considered as a method for manufacturing the gate insulating film in the present invention. For example, a selective nitriding method of a high-dielectric-constant thin film by applying nitrogen-containing plasma irradiation and lamination of a metal layer and a nitrogen-containing layer are described below. Nitrogen introduction and profile control through the oxidation process of the structure are effective.
第一のプラズマ照射を応用した方法は、 シリコン基板上に高誘電率絶縁膜を含ん だゲート絶縁膜 (窒素未導入) を形成し、 ここにプラズマによって生成した活性窒 素を照射するものである。 例えば金属酸化物もしくは金属シリケ一卜からなる高誘 電率絶縁膜を形成し、 窒素含有ブラズマをこの高誘電率絶縁膜表面に照射すること ができる。 プラズマ生成条件を調整することにより、 ゲート絶縁膜あるいは高誘電 率絶縁膜を構成する元素と反応性が非常に高い活性窒素を供給することが可能であ リ、 窒素と上記元素との反応を速やかに進行させ、 ゲート絶縁膜中への窒素拡散を 抑制して、 窒素がシリコン基板に到達することを防ぐことができ、 膜表面 (あるい はシリコン基板との界面以外の領域) のみを選択的に窒化することが可能となる。 つまり、 シリコン基板界面から離れた領域 (膜表面側) に窒素プロファイルを局在 させることが可能となる。  The first method of applying plasma irradiation is to form a gate insulating film (with no nitrogen introduced) containing a high dielectric constant insulating film on a silicon substrate, and irradiate it with active nitrogen generated by plasma. . For example, a high dielectric constant insulating film made of a metal oxide or a metal silicate can be formed, and the surface of the high dielectric constant insulating film can be irradiated with nitrogen-containing plasma. By adjusting the plasma generation conditions, it is possible to supply active nitrogen that is extremely reactive with the elements that make up the gate insulating film or high-dielectric-constant insulating film. The diffusion of nitrogen into the gate insulating film can be suppressed to prevent nitrogen from reaching the silicon substrate, and only the film surface (or a region other than the interface with the silicon substrate) can be selectively selected. It becomes possible to nitride. In other words, it is possible to localize the nitrogen profile in a region (film surface side) distant from the silicon substrate interface.
また第二の作製方法では、 第 2図のフロー図に示した積層構造の酸化処理によつ て膜中の窒素濃度分布を制御できる。 例えばシリコン基板 2 0 1の表面 (水素終端 表面 2 0 2 ) に極薄のシリコン酸化膜 2 0 3を形成した後 (同図 (b ) )、 この酸化 膜表面に、 金属からなる層である金属層 2 0 4を堆積する (同図 (c ) )。 続いて窒 素を含有する層である窒素含有層 2 0 5として金属窒化物層を金属層の上部に堆積 して積層構造を作製した後 (同図 (d ) )、 酸素雰囲気中で熱処理を施すことで金属 層を酸化すると共に、 高誘電率絶縁膜中の窒素濃度を表面層付近に局在させ ることができる。 こうして、 第 2図 (e ) に示すような、 窒素濃度分布を持った窒 素含有高誘電率絶縁膜 2 0 6を得ることができ、 窒素含有高誘電率絶縁膜 2 0 6と シリコン酸化膜 2 0 3からなるゲート絶縁膜を形成できる。 なお、 窒素含有層とし ては金属酸化物を構成する金属元素の窒化物膜やシリコン窒化膜 (酸窒化膜) など が有効である。 また金属窒化物を堆積する手段として有効な手法は金属窒化物ター ゲットあるいは金属ターゲッ卜を用いた反応性スパッタリング法が挙げられる。 窒素含有層の厚さは、 ドーパントの拡散抑制等の観点から 1 n m以上であること が好ましく、 窒素を多量に含有させてもそれに比例して窒素含有による効果が向上 するわけではないことから 2 n m以下であることが好ましい。 In the second manufacturing method, the nitrogen concentration distribution in the film can be controlled by the oxidation treatment of the laminated structure shown in the flowchart of FIG. For example, after an ultra-thin silicon oxide film 203 is formed on the surface of the silicon substrate 201 (hydrogen-terminated surface 202) (FIG. 2B), a metal layer is formed on the surface of the oxide film. A metal layer 204 is deposited (FIG. (C)). Subsequently, as a nitrogen-containing layer 205, which is a layer containing nitrogen, a metal nitride layer is deposited on the metal layer to form a laminated structure ((d) in the same figure), and heat treatment is performed in an oxygen atmosphere. By applying metal While oxidizing the layer, the nitrogen concentration in the high dielectric constant insulating film can be localized near the surface layer. Thus, a nitrogen-containing high dielectric constant insulating film 206 having a nitrogen concentration distribution as shown in FIG. 2 (e) can be obtained, and the nitrogen-containing high dielectric constant insulating film 206 and the silicon oxide film are obtained. A gate insulating film made of 203 can be formed. As the nitrogen-containing layer, a nitride film of a metal element constituting a metal oxide, a silicon nitride film (oxynitride film), or the like is effective. An effective technique for depositing a metal nitride is a metal nitride target or a reactive sputtering method using a metal target. The thickness of the nitrogen-containing layer is preferably 1 nm or more from the viewpoint of suppressing the diffusion of the dopant, etc., since even if a large amount of nitrogen is contained, the effect of nitrogen inclusion does not improve in proportion thereto. It is preferably not more than nm.
酸化処理は、 用いる材料によって適宜決定されるが、 例ぇば5 0 0〜9 0 0 ¾で 行うことができる。  The oxidation treatment is appropriately determined depending on the material to be used. For example, the oxidation treatment can be performed at 500 to 900 °.
このようにしてシリコン基板上にゲ一ト絶縁膜を形成した後、 その上に公知の方 法によってゲート電極を設けることによリ本発明の半導体装置を得ることができる。 本発明の半導体装置の構造では、 高誘電率薄膜を有したゲー卜絶縁膜中に窒素を 添加することで、 熱安定性の向上ならびにゲート電極側からのドーパント突き抜け 現象を抑制すると同時に、 ゲート絶縁膜中の窒素の存在位置をシリコン基板界面か ら離して膜表面あるいは中央部分に局在させることで移動度劣化ならびに信頼性劣 化の問題を解決するものである。  After the gate insulating film is formed on the silicon substrate in this manner, a gate electrode is provided thereon by a known method, whereby the semiconductor device of the present invention can be obtained. In the structure of the semiconductor device of the present invention, by adding nitrogen to the gate insulating film having a high dielectric constant thin film, the thermal stability is improved and the dopant penetration phenomenon from the gate electrode side is suppressed, and at the same time, the gate insulating film is formed. The problem of mobility degradation and reliability degradation is solved by localizing the position of nitrogen in the film away from the silicon substrate interface and on the film surface or central portion.
以上の効果を得るゲート絶縁膜中の窒素分布は第 1図の概念図に示したプロファ ィルに限るものではなく、 第 3図に示した様々なプロファイルについても効果を得 ることができる。 第 3図 (a ) は高誘電率絶縁膜 3 0 3中の一部でほぼ均一に窒素 が分布した場合であるが、 高誘電率絶縁膜とシリコン基板 3 0 1との界面に挿入し たシリコン酸化膜 3 0 2と高誘電率絶縁膜との界面で急激に窒素濃度が低下し、 界 面に挿入したシリコン酸化膜 3 0 2中には窒素が存在していない場合である。 第 3 図 (b ) は高誘電率絶縁膜の中央部分に窒素濃度の最大値が位置した場合であり (中央部分に窒素が局在する)、 この場合も高誘電率絶縁膜とシリコン酸化膜との 界面に向けて窒素濃度が急激に低下し、 シリコン基板との界面では窒素が存 在しない。 また第 3図 (c ) では、 髙誘電率絶縁膜中の表面側 (ゲート電極側) に 窒素が局在したプロファイル形状ではあるが、 髙誘電率絶縁膜中での窒素拡散など の理由で、 高誘電率絶縁膜とシリコン酸化膜界面に若干の窒素が偏析した場合であ る。 この様な場合、 シリコン酸化膜とシリコン基板との界面から窒素が局在する領 域までの隔たりが 1 n m未満である場合には、 状況によっては窒素に起因した界面 固定電荷などの影響によって移動度ならびに信頼性劣化を引き起こす可能性がある 点で不利であるが、 窒素の局在した領域 (窒素含有高誘電率絶縁膜中の窒素濃度の 膜厚方向最大値) がシリコン基板から好ましくは 0 . 5 n m以上、 より好ましくは 1 n m以上離れており、 かつシリコン基板界面近傍での窒素濃度が十分に低い場合 には、 第 1図や第 3図 (a )、 ( b ) に示す構造はもちろん、 第 3図 (c ) に示した 構造でも優れた半導体装置を得ることができる。 この際、 シリコン基板界面での許 容窒素濃度は、 素子の移動度劣化と信頼性劣化の許容値 (デバイス設計) とも関連 するが、 界面電気特性の観点からゲー卜絶縁膜のシリコン基板界面での窒素濃度は 好ましくは 3原子%未満であり、 窒素が基板界面に存在しないことがよリ好ましい。 またゲー卜絶縁膜中の最大窒素濃度は、 熱安定性やドーパント突き抜け抑制効果を 得るために 1原子%以上であることが望ましい。 ゲート絶縁膜の絶縁特性や信頼性 の観点から、 膜中窒素濃度の最大量は 2 0原子%未満であることが望ましい。 ただ し窒素濃度範囲は素子特性の設計に深く関与するものであり、 上記の範囲に限るも のではない。 The nitrogen distribution in the gate insulating film that achieves the above effects is not limited to the profiles shown in the conceptual diagram of FIG. 1, but the effects can be obtained for various profiles shown in FIG. Fig. 3 (a) shows the case where nitrogen is distributed almost uniformly in a part of the high dielectric constant insulating film 303, which was inserted at the interface between the high dielectric constant insulating film and the silicon substrate 301. This is the case where the nitrogen concentration sharply drops at the interface between the silicon oxide film 302 and the high dielectric constant insulating film, and no nitrogen exists in the silicon oxide film 302 inserted into the interface. Fig. 3 (b) shows the case where the maximum value of the nitrogen concentration is located at the center of the high-k insulating film (nitrogen is localized at the center). With The nitrogen concentration drops sharply toward the interface, and there is no nitrogen at the interface with the silicon substrate. Also, in Fig. 3 (c), 髙 although the profile shape is such that nitrogen is localized on the surface side (gate electrode side) in the dielectric constant insulating film, で due to nitrogen diffusion in the dielectric constant insulating film, etc. This is the case where some nitrogen segregates at the interface between the high dielectric constant insulating film and the silicon oxide film. In such a case, if the distance from the interface between the silicon oxide film and the silicon substrate to the region where nitrogen is localized is less than 1 nm, depending on the situation, it may move due to the effects of nitrogen-induced fixed charges at the interface. Although it is disadvantageous in that it may cause deterioration in reliability and reliability, the region where nitrogen is localized (the maximum value of the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film in the thickness direction) is preferably 0% from the silicon substrate. If the distance is 5 nm or more, more preferably 1 nm or more, and the nitrogen concentration near the silicon substrate interface is sufficiently low, the structures shown in FIGS. 1 and 3 (a) and (b) Of course, an excellent semiconductor device can be obtained even with the structure shown in FIG. 3 (c). At this time, the allowable nitrogen concentration at the silicon substrate interface is related to the allowable value of device mobility degradation and reliability degradation (device design), but from the viewpoint of interface electrical characteristics, the allowable nitrogen concentration at the silicon substrate interface of the gate insulating film. The nitrogen concentration is preferably less than 3 atomic%, and it is more preferable that nitrogen does not exist at the substrate interface. Further, the maximum nitrogen concentration in the gate insulating film is desirably 1 atomic% or more in order to obtain the thermal stability and the effect of suppressing dopant penetration. From the viewpoint of the insulating properties and reliability of the gate insulating film, it is desirable that the maximum amount of the nitrogen concentration in the film is less than 20 atomic%. However, the nitrogen concentration range is deeply involved in the design of the device characteristics, and is not limited to the above range.
シリコン基板表面にまずシリコン酸化膜を形成した後、 この上に金属層と窒素含 有層からなる積層構造を形成し、 これに酸化処理を施してゲート絶縁膜を形成する 際には、 このシリコン酸化膜の膜厚としては、 ゲート絶縁膜の物理膜厚に対してシ リコン酸化膜換算膜厚を薄くする観点から 1 n m未満が好ましい。 また界面電気特 性の観点から 0 . 5 n m以上が好ましい。  First, a silicon oxide film is formed on the surface of a silicon substrate, and then a stacked structure including a metal layer and a nitrogen-containing layer is formed thereon. The thickness of the oxide film is preferably less than 1 nm from the viewpoint of reducing the equivalent silicon oxide film thickness to the physical thickness of the gate insulating film. Further, from the viewpoint of interfacial electric characteristics, the thickness is preferably 0.5 nm or more.
窒素含有高誘電率ゲート絶縁膜の膜厚については、 場合によって異なるが、 例え ば現状リーク電流の急激な増大を防ぐ観点からゲート絶縁膜の物理膜厚は 1 . 5 n m以上であることが好ましいとされており、 本発明もこのようなゲー卜絶縁 膜に好適に適用できる。 窒素濃度の膜厚方向最大値をシリコン基板から 0. 5 nm 以上離す場合には当然 0. 5 nmを超える膜厚を要する。 The thickness of the nitrogen-containing high dielectric constant gate insulating film varies depending on the case. For example, the physical thickness of the gate insulating film is 1.5 n from the viewpoint of preventing a sudden increase in the leak current at present. m or more, and the present invention can be suitably applied to such a gate insulating film. If the maximum value of the nitrogen concentration in the film thickness direction is more than 0.5 nm away from the silicon substrate, a film thickness exceeding 0.5 nm is naturally required.
また窒素を導入する高誘電率絶縁膜材料としては、 Z r 02、 H f 02、 T a 20 5、 A I 203、 T i O 2、 N b 205や希土類元素の酸化物である S c 20 Y 203、 またランタノィド系元素の酸化物である La 203、 Ce02、 P r 203、 N d 2 03、 Sm203、 E u 203、 G d 2 O 3S T b 203、 D y 203、 Ηο 2 θ 3、 E r 203、 Tm 203、 Y b 203、 L u 203、 さらにはこれらの金属酸化物にシ リコンを添加したシリケ一卜材料がある。 As the high dielectric constant insulating film material for introducing nitrogen, the oxidation of Z r 0 2, H f 0 2, T a 2 0 5, AI 2 0 3, T i O 2, N b 2 0 5 or a rare earth element S c 2 0 Y 2 0 3 , also La 203 is an oxide of Rantanoido based element, Ce02, P r 203, N d 2 03, Sm203, E u 203 is intended, G d 2 O 3 S T b 203 , D y 203, Ηο 2 θ 3, E r 203, Tm 2 0 3, Y b 2 0 3, L u 2 0 3, further there is a silicate one Bok material obtained by adding a divorced these metal oxides .
また先述の第 1図〜第 3図に示した様に、 界面電気特性を改善する観点から高誘 電率絶縁膜とシリコン基板との界面に極薄のシリコン酸化膜を挿入した構造に加え、 ゲート絶縁膜の上部に設けられるゲー卜電極 (例えばポリシリコンまたはポリシリ コンゲルマニウム電極) との界面電気特性を向上するために高誘電率絶縁膜上部に も極薄のシリコン酸化膜を積層した構造において、 表面側 (ゲート電極側) のシリ コン酸化膜層 (あるいはシリコン基板界面から離れた領域) のみを選択的に窒化し た構造が有効である。 この場合のゲート絶縁膜は、 例えば、 シリコン基板側から第 1のシリコン酸化膜、 金属酸化物もしくは金属シリケ一卜からなる膜、 第 2のシリ コン酸化膜を有する積層構造を有し、 第 2のシリコン酸化膜のみに窒素が導入され、 第 1のシリコン酸化膜と、 金属酸化物もしくは金属シリケー卜からなる膜には窒素 は導入されない。  As shown in FIGS. 1 to 3 described above, in addition to the structure in which an ultra-thin silicon oxide film is inserted at the interface between the high dielectric constant insulating film and the silicon substrate from the viewpoint of improving the interfacial electrical characteristics, In order to improve the interfacial electrical characteristics with the gate electrode (for example, polysilicon or polysilicon germanium electrode) provided on the gate insulating film, the ultra-thin silicon oxide film is also stacked on the high dielectric constant insulating film. It is effective to selectively nitride only the silicon oxide film layer on the surface side (gate electrode side) (or a region away from the silicon substrate interface). The gate insulating film in this case has, for example, a stacked structure including a first silicon oxide film, a film made of a metal oxide or a metal silicate, and a second silicon oxide film from the silicon substrate side. Nitrogen is introduced only into the first silicon oxide film, and nitrogen is not introduced into the first silicon oxide film and the film made of metal oxide or metal silicate.
上記第 1および第 2のシリコン酸化膜の膜厚については、 界面電気特性改善効果 の観点から 0. 5 nm以上が好ましく、 ゲート絶縁膜の物理膜厚に対してシリコン 酸化膜換算膜厚を薄くする観点から 1 nm以下が好ましい。 また、 上記金属酸化物 もしくは金属シリケー卜からなる膜の膜厚については、 卜ンネル電流抑制の観点か ら 2 n m以上が好ましく、 製造の容易さや半導体装置の形状のバランスの観点から 5 nm以下が好ましい。  The thickness of the first and second silicon oxide films is preferably 0.5 nm or more from the viewpoint of the effect of improving interfacial electrical characteristics, and the equivalent silicon oxide film thickness is smaller than the physical thickness of the gate insulating film. The thickness is preferably 1 nm or less from the viewpoint of the performance. Further, the thickness of the film made of the metal oxide or metal silicate is preferably 2 nm or more from the viewpoint of suppressing the tunnel current, and 5 nm or less from the viewpoint of easiness of manufacture and balance of the shape of the semiconductor device. preferable.
さらに上述のシリコン酸化膜 高誘電率絶縁膜 シリコン酸化膜からなる明瞭な 界面を有した積層構造ではなくても、 特願 2 0 0 1— 2 5 2 2 5 8号に提案 されるような、 金属シリゲート薄膜中の膜厚方向の組成が変調された構造であり、 ゲート絶縁膜の上層ならびに下層部分でシリコン組成が増大した構造について、 表 面側のシリコン濃度が高い領域のみを選択的に窒化した構造も効果を発揮する。 こ のゲート絶縁膜構造においては、 ゲー卜絶縁膜が金属シリケ一卜に窒素が導入され た構造の窒素含有髙誘電率絶縁膜を有し、 窒素含有髙誘電率絶縁膜の組成が膜厚方 向で連続的に変化し、 該窒素含有高誘電率絶縁膜のシリコン基板側界面とゲート電 極側界面との間の中間部分においてシリコン濃度が最小値を有し、 シリコン濃度が 最小値を有する位置と該ゲ一卜電極側界面との間のみに窒素が導入され、 シリコン 濃度が最小値を有する位置とシリコン基板側界面との間には窒素が導入されない。 このような構造においては、 金属シリケ一卜中の金属元素の濃度が中間部分で増大 し、 膜上層および下層ではシリコンの組成が増大するため、 ゲート絶縁膜とシリコ ン基板 (下側界面) ならびにゲート電極 (上側界面) との境界では S i O 2/ S i 界面に近い構造を形成することが可能となリ、 界面電気特性を改善することができ る。 また金属濃度が高いシリケ一卜材料は結晶化温度が比較的低いことが懸念され ているが、 この金属高濃度領域を熱安定性が高いシリコン高濃度領域で挟み込む構 造を形成することで熱安定性を向上することができる。 In addition, the above-mentioned silicon oxide film High dielectric constant insulating film Even if it is not a laminated structure having an interface, it is a structure in which the composition in the thickness direction of the metal silicide thin film is modulated, as proposed in Japanese Patent Application No. 2001-252522. As for the structure in which the silicon composition is increased in the upper layer and the lower layer of the gate insulating film, a structure in which only the region having a high silicon concentration on the surface side is selectively nitrided is also effective. In this gate insulating film structure, the gate insulating film has a nitrogen-containing 髙 dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate, and the composition of the nitrogen-containing 率 dielectric constant insulating film is in accordance with the film thickness. The silicon concentration has a minimum value at an intermediate portion between the silicon substrate-side interface and the gate electrode side interface of the nitrogen-containing high dielectric constant insulating film, and the silicon concentration has a minimum value. Nitrogen is introduced only between the position and the interface on the gate electrode side, and no nitrogen is introduced between the position where the silicon concentration has the minimum value and the interface on the silicon substrate side. In such a structure, the concentration of the metal element in the metal silicate increases in the middle portion, and the silicon composition increases in the upper and lower layers of the film, so that the gate insulating film and the silicon substrate (lower interface) and At the boundary with the gate electrode (upper interface), it is possible to form a structure close to the SiO 2 / Si interface, and the interface electrical characteristics can be improved. It is also feared that the silicate temperature of a high-concentration silicate material is relatively low. However, by forming a structure in which this high-concentration metal region is sandwiched by a high-concentration silicon high-concentration region, thermal conductivity is increased. Stability can be improved.
上記構造の例として、 金属シリケ一卜の組成が膜厚方向で変化する窒素含有高誘 電率絶縁膜をシリコン基板側から層状に第 1の領域、 中間領域、 第 2の領域に分け て考えたとき (第 1の領域はシリコン基板に接し、 第 2の領域はゲート電極に接す る)、 金属シリゲート中のシリコン濃度が第 1の領域のシリコン基板側界面から連 続的に減少し、 中間領域において最小値をとつた後増加に転じ、 第 2の領域のゲー ト電極側界面まで連続的に増加してゆく形態であって、 第 1および第 2の領域にお いては、 シリコン 金属元素比がゲート絶縁膜全体の平均値より高く、 中間領域に おいてはシリコン 金属元素比がゲー卜絶縁膜全体の平均値よリ低く、 第 2の領域 のみに窒素が導入された形態がある。 このような場合、 第 1および第 2の領域の厚 さについては、 界面電気特性改善効果の観点から 0 . 5 n m以上が好ましく、 ゲー ト絶縁膜の物理膜厚に対してシリコン酸化膜換算膜厚を薄くする観点から 1 nm以下が好ましい。 また中間領域の厚さについては、 トンネル電流抑制の観点か ら 2 n m以上が好ましく、 製造の容易さや半導体装置の形状のバランスの観点から 5 nm以下が好ましい。 As an example of the above structure, a nitrogen-containing high-permittivity insulating film in which the composition of the metal silicate changes in the film thickness direction is divided into a first region, an intermediate region, and a second region from the silicon substrate side. (The first region is in contact with the silicon substrate and the second region is in contact with the gate electrode), the silicon concentration in the metal silicide decreases continuously from the silicon substrate side interface of the first region, In a mode in which the minimum value is reached in the intermediate region, the value then increases, and continuously increases to the gate electrode side interface in the second region. In the first and second regions, silicon metal is used. The element ratio is higher than the average value of the entire gate insulating film, the silicon metal element ratio is lower than the average value of the entire gate insulating film in the intermediate region, and nitrogen is introduced only in the second region. . In such a case, the thickness of the first and second regions is preferably 0.5 nm or more from the viewpoint of the effect of improving interfacial electrical characteristics. The thickness is preferably 1 nm or less from the viewpoint of reducing the equivalent silicon oxide film thickness to the physical thickness of the insulating film. The thickness of the intermediate region is preferably 2 nm or more from the viewpoint of suppressing tunnel current, and is preferably 5 nm or less from the viewpoint of easiness of manufacturing and the balance of the shape of the semiconductor device.
さらに高誘電率絶縁膜やシリコン酸化膜への窒素導入に際しては、 金属酸化物あ るいは金属シリケ一卜層を構成する金属元素やシリケ一卜中のシリコン、 さらには 高誘電率膜の上層または下層に挿入したシリコン酸化膜を構成するシリコンゃ酸素 と窒素原子との数種類の結合様式 (金属一窒素、 シリコン一窒素あるいは酸素ー窒 素結合) が考えられる。 これらの結合の中で、 金属原子と窒素原子との結合から構 成される物質は、 多くの場合比較的絶縁性が低いため、 膜中への窒素導入に際して は多量の金属一窒素結合の生成を抑えて、 シリコン原子を選択的に窒化した構造と することが好ましい。 ただし A Iに関しては、 窒化アルミニウムは (A I N) は絶 縁性に優れる材料であり、 A l 2 O 3材料の窒化処理の場合にはこの点は考慮しな くて良い。 シリコン原子を選択的に窒化した構造においては、 金属一窒素の結合よ リもシリコンー窒素の結合の方が多い。 In addition, when nitrogen is introduced into the high dielectric constant insulating film or silicon oxide film, the metal element constituting the metal oxide or metal silicate layer or silicon in the silicate, or the upper layer of the high dielectric constant film or Several bonding modes (metal-nitrogen, silicon-nitrogen, or oxygen-nitrogen bonds) between the silicon-oxygen and nitrogen atoms that make up the silicon oxide film inserted in the lower layer can be considered. Of these bonds, a substance composed of a bond between a metal atom and a nitrogen atom often has relatively low insulating properties, so that when introducing nitrogen into a film, a large amount of a metal-nitrogen bond is formed. It is preferable to have a structure in which silicon atoms are selectively nitrided while suppressing silicon. However, regarding AI, aluminum nitride (AIN) is a material with excellent insulating properties, and this point does not need to be considered when nitriding Al 2 O 3 materials. In a structure in which silicon atoms are selectively nitrided, there are more silicon-nitrogen bonds than metal-nitrogen bonds.
シリコン基板上に高誘電率絶縁膜を含んだゲート絶縁膜 (窒素未導入) を形成し、 ここに窒素含有プラズマを照射する場合においては、 例えば、 金属酸化物から成る 高誘電率薄臏とシリコン酸化膜との積層構造あるいは金属シリケ一卜薄膜のプラズ マ窒化処理を行う場合においては、 プラズマ照射条件の調整によって膜中 (特に膜 表面側) のシリコン原子のみを選択的に窒化することができる。 実施例  When a gate insulating film (without introducing nitrogen) containing a high dielectric constant insulating film is formed on a silicon substrate and irradiated with a nitrogen-containing plasma, a high dielectric constant thin film made of metal oxide and silicon are used. In the case of performing a plasma nitridation process on a laminated structure with an oxide film or a metal silicate thin film, it is possible to selectively nitride only silicon atoms in the film (particularly on the film surface side) by adjusting the plasma irradiation conditions. . Example
以下、 本発明に基づいた高誘電率ゲー卜絶縁膜構造を有した半導体装置およびそ の製造方法の実施例を示す。  Examples of a semiconductor device having a high dielectric constant gate insulating film structure and a method of manufacturing the same according to the present invention will be described below.
〔実施例 1〕  (Example 1)
本発明の第 1の実施例では原子層堆積法 (A t om i c La y e r Ch em i c a I Va p o r De p o s i t i o n : ALD) で成膜した A I 2 O 3膜 中に窒素ラジカル照射によって窒素導入を行った結果を示す。 In the first embodiment of the present invention, an AI 2 O 3 film formed by an atomic layer deposition method (Atomic Layer Chemical I Vapor Deposition: ALD) is used. The result of introducing nitrogen by irradiation of nitrogen radicals therein is shown.
シリコンウェハ上に MOS FETのフィールド領域をあらかじめ形成し、 この領 域に下地酸化膜 (界面酸化層) として膜厚 0. 6 nmのシリコン酸化膜を形成した c 本ウェハ上に A I (CH 3) 3および H 20原料ガスの交互供給による A L D法よつ て膜厚 4 nmの A I 20 3膜を堆積した後、 本表面に窒素ラジカルを照射した。 ラ ジカル照射はプラズマ源として ECR (E l e c t r o n C y c l o t r o n Re s o n a n c e) ラジカル源を搭載した真空装置によって実施した。 ラジカル 源はウェハ直上 20 cmに位置し、 窒素ラジカル照射条件は基板温度 300〜 70 0°C、 圧力 0. 3~0. 9 P a、 電力 1 50Wとして 30分間の窒化処理を行った c 第 4図は典型的なラジカル照射条件で作製した窒化した A I 20 3膜中の窒素濃 度を 2次イオン質量分析により評価した結果である。 本結果から高い基板温度でか つ窒素ガス圧が低い (700°C、 0. 3 P a) 場合、 窒素が膜全体に分布して界面 まで高濃度の窒素が導入されるのに対し、 基板温度を低くして窒素ガス圧を高くし た場合 (300°C、 0. 9 P a) には、 膜中の窒素濃度が減少し、 かつ表面側に窒 素が局在したプロフアイルが得られていることがわかる。 従つて窒素導入量は基板 温度によっても制御可能であり、 また窒素ガス分圧を最適化 (上記の場合は高圧 化) することで膜中の窒素濃度を膜表面側に局在させることが可能である。 Field regions of the MOS FET formed in advance on a silicon wafer, this area in the underlying oxide film (interface oxide layer) The film thickness 0. 6 nm of silicon oxide film formed was c present on the wafer AI (CH 3) 3 and H 2 0 source gas One by ALD method by alternately supplying after the deposition of the AI 2 0 3 film having a thickness of 4 nm, was irradiated with nitrogen radicals to the surface. Radical irradiation was performed by a vacuum apparatus equipped with an ECR (Electron Cyclotron Resonance) radical source as a plasma source. Radical source is located in the wafer just above 20 cm, the c nitrogen radical irradiation conditions were a substrate temperature of 300~ 70 0 ° C, pressure 0. 3 ~ 0. 9 P a , the nitriding treatment for 30 minutes as a power 1 50 W FIG. 4 is a typical radical irradiation condition results nitrogen concentration of AI 2 0 3 film obtained by nitriding prepared was evaluated by secondary ion mass spectrometry. From these results, when the substrate temperature is high and the nitrogen gas pressure is low (700 ° C, 0.3 Pa), nitrogen is distributed over the entire film and high concentration nitrogen is introduced to the interface. When the temperature was lowered and the nitrogen gas pressure was raised (300 ° C, 0.9 Pa), the nitrogen concentration in the film decreased, and a profile in which nitrogen was localized on the surface side was obtained. You can see that it is done. Therefore, the amount of nitrogen introduced can be controlled by the substrate temperature, and the nitrogen concentration in the film can be localized on the film surface side by optimizing the nitrogen gas partial pressure (in the above case, increasing the pressure). It is.
これらの窒化処理を施した高誘電率ゲート絶縁膜を用いて高濃度にドーピングを 施したポリシリコンをゲー卜電極として MOS FETを作製した結果、 窒素を導入 した全ての試料について熱安定性の向上ならびにドーパン卜の突き抜け抑制の効果 を確認した。 さらにトランジスターの移動度評価を行った結果、 界面での窒素濃度 が高いゲート絶縁膜を有したトランジスター (窒化条件: 700°C、 0. 3 P a) に比べて A I 20 3膜表面側に窒素を局在させたゲート絶縁膜構造を有したトラン ジスター (窒化条件: 300°C、 0. 9 Pa) では移動度が約 20。 増大していた。 〔実施例 2〕 As a result of fabricating MOS FETs using high-concentration doped polysilicon using these nitrided high dielectric constant gate insulating films as gate electrodes, thermal stability was improved for all nitrogen-introduced samples. In addition, the effect of suppressing penetration of the dopant was confirmed. As a result of further performing mobility evaluation transistors, transistors nitrogen concentration at the interface had a high gate insulating film (nitride Conditions: 700 ° C, 0. 3 P a) to AI 2 0 3 film surface as compared with The mobility is approximately 20 for a transistor having a gate insulating film structure in which nitrogen is localized (nitriding conditions: 300 ° C, 0.9 Pa). Was growing. (Example 2)
第 2の実施例ではハフニウムシリゲート (H f S i O) に窒素プラズマを照射し て窒化処理を行った。 シリコンウェハ上に M O S F E Tのフィールド領域をあらかじめ形成し、 この領域に下地酸化膜 (界面酸化層) として膜厚 0 . 6 n mのシリコン酸化膜を形 成した。 この上に形成した 1 0原子%のH f を含有した膜厚 3 n mのシリケ一ト膜 に、 E C Rプラズマ源を用いて窒素ガスから生成した活性窒素を照射した。 照射条 件は、 基板温度 3 0 0 °C、 窒素分圧 6 . 7 P a、 投入電力 6 0 で 1分間とした。 その結果、 原子%で 1 0 <½の窒素を含有したシリゲート膜が得られた。 In the second embodiment, nitriding treatment was performed by irradiating hafnium siligate (HfSIO) with nitrogen plasma. A MOSFET field region was formed on a silicon wafer in advance, and a 0.6-nm-thick silicon oxide film was formed in this region as a base oxide film (interface oxide layer). A 3 nm-thick silicate film containing 10 atomic% of Hf formed thereon was irradiated with active nitrogen generated from nitrogen gas using an ECR plasma source. The irradiation conditions were a substrate temperature of 300 ° C., a nitrogen partial pressure of 6.7 Pa, and a power supply of 60 for 1 minute. As a result, a silicide film containing 10 <½ of nitrogen in atomic% was obtained.
上述と同様の 2次イオン質量分析の結果、 窒素は膜表面側から 0 . 5 n mの位置 にピークを持って膜中に分布しており、 窒素含有率は深さ方向で次第に低下してシ リコン基板との界面では窒素は検出されなかった。 本実施例のプラズマ照射前後の H f シリケ一ト膜から得た X線光電子スぺク トル (S i 2 pコアレベルスぺク 卜 ル) を第 5図に示す。 本測定結果ではシリゲートに起因する 1 0 2 . 5 e Vのピー クカ《、 窒化処理によって低束縛エネルギー側にシフトしている。 これは膜中に S i 一 N結合が形成されたことを示す。 一方、 H f 4 f スぺク トルに変化はなく、 窒化 後も通常のハフニウムシリケ一卜の位置に出現したことから、 膜中に H f — N結合 は形成されていないことを確認した。 これらの結果は、 上述の窒化処理によってハ フニゥムシリゲート中の表面側のシリコン原子が選択的に窒化されたこをと示す。 本ハフニウムシリゲート膜をゲー卜絶縁膜として有した M O S F E Tを作製した結 果、 選択的な窒化工程で H f — N結合形成を抑制したために未処理 (窒素導入無 し) のハフニウムシリゲートを有したトランジスタと比較してリーク電流の増大は 観測されなかった。 また窒素導入効果によって熱安定性が向上し (結晶化温度は 1 0 0 °C以上改善)、 窒素導入に伴う移動度ならびに信頼性劣化が発生しなかった。 さらにポリシリコンゲートからのドーパント突き抜け防止効果を確認した。 本実施 例では、 シリケ一卜膜中の S i— O結合を選択的に窒素で置換するものであり、 リ ーク電流の増大なくシリゲート膜中に窒素を含有させることができ、 また窒素含有 により比誘電率が上昇する (シリゲート膜の平均の比誘電率は 1 0から 1 2に上 昇) という効果も同時に得られた。 さらに同様にしてハフニウムシリゲートに替え てジルコニウムシリゲート、 ランタンシリゲートを窒化したところ、 同様の効果が 得られた。 As a result of secondary ion mass spectrometry similar to that described above, nitrogen was distributed in the film with a peak at 0.5 nm from the film surface side, and the nitrogen content gradually decreased in the depth direction and decreased. Nitrogen was not detected at the interface with the recon substrate. FIG. 5 shows the X-ray photoelectron spectrum (Si 2 p core level spectrum) obtained from the H f silicate film before and after the plasma irradiation in this example. In this measurement result, the peak energy of 102.5 eV caused by the silicide is shifted to the lower binding energy side by nitriding. This indicates that S i -N bonds were formed in the film. On the other hand, there was no change in the Hf4f spectrum, and it appeared at the position of the normal hafnium silicate after nitriding, confirming that no Hf-N bond was formed in the film. . These results indicate that the silicon atoms on the surface side in the silicon silicate were selectively nitrided by the above-described nitriding treatment. As a result of fabricating a MOSFET having this hafnium silicide film as a gate insulating film, an untreated (no nitrogen introduced) hafnium sili- gate was obtained because the formation of Hf-N bonds was suppressed in a selective nitridation process. No increase in leakage current was observed as compared with the transistor that was fabricated. Thermal stability was improved by the nitrogen introduction effect (the crystallization temperature was improved by 100 ° C or more), and the mobility and reliability did not deteriorate due to the nitrogen introduction. Further, the effect of preventing dopant penetration from the polysilicon gate was confirmed. In the present embodiment, the Si—O bond in the silicate film is selectively replaced with nitrogen, so that nitrogen can be contained in the silicate film without an increase in leak current. As a result, the relative dielectric constant increases (the average dielectric constant of the silicide film increases from 10 to 12). In the same manner, when a zirconium silicide or a lanthanum silicide was nitrided instead of a hafnium silicide, the same effect was obtained. Obtained.
〔実施例 3〕  (Example 3)
本発明の第 3の実施例では、 シリコン基板界面に極薄のシリコン酸化膜を挿入し た Z r O 2高誘電率萍膜中に窒素添加を行った例を第 6図のフロー図に従って示す c シリコンウェハ 601を洗浄後基板表面に形成された化学酸化膜をフッ酸溶液処 理により剥離し、 シリコン表面を水素原子にて終端した (同図 (a))。 本ウェハを 5 T o r r (670 P a) の減圧酸素雰囲気中 700°Cにて酸化処理を施すことで、 膜厚 0. 6 nmのシリコン酸化膜 603を形成した (同図 (b))。 本酸化膜表面へ の金属層および窒素含有層の堆積は複数のターゲッ卜を備えたスパッタリングシス テムを用いて実施した。 スパッタ成膜は E C R放電を採用した低損傷成膜法を採用 し、 スパッタガスとしてアルゴンガス、 ガス圧は 5 X 1 0-4 T o r r (0. 067 P a) とし、 高周波出力 1 00Wとした。 上述のシリコン酸化膜 603上に、 基板 温度を室温として膜厚 2 n mの金属 Z r層 604を堆積した後 (同図 (c))、 ター ゲッ卜を交換して基板温度を室温として膜厚 1. O nmの Z r N層 605を成膜し て Z r NZZ r/S i O 2積層構造を形成した (同図 (d))。 本試料の酸化処理は 1 To r r (1 30 P a) の減圧酸素雰囲気中 500°Cで行った。 酸化処理よつて 金属層 (金属窒化物層) は Z r O 2 (Z r ON) 層に変換され、 窒素を含有する高 誘電率絶縁膜 (Z r ON高誘電率膜) 606が得られた。 膜厚方向の組成分布を 2 次イオン質量分析法によって評価した結果、 膜表面から 0. 6 nmの位置に局在し、 窒素濃度が原子%で 1 0%の最大値であった。 更に、 シリコン基板との界面では S ί ο2組成が保持されていることを確認した。 In a third embodiment of the present invention show in accordance with the flow diagram of an example in which the nitrogen added to the Z r O 2 in the high dielectric constant萍膜inserting the silicon oxide film extremely thin silicon substrate interface Figure 6 c After cleaning the silicon wafer 601, the chemical oxide film formed on the substrate surface was separated by hydrofluoric acid solution treatment, and the silicon surface was terminated with hydrogen atoms ((a) in the same figure). This wafer was oxidized at 700 ° C. in a reduced-pressure oxygen atmosphere of 5 Torr (670 Pa) to form a 0.6 nm-thick silicon oxide film 603 (FIG. 2B). The deposition of the metal layer and the nitrogen-containing layer on the surface of the oxide film was performed using a sputtering system having a plurality of targets. For sputter deposition, a low-damage deposition method employing ECR discharge was adopted.Argon gas was used as the sputtering gas, gas pressure was 5 × 10-4 Torr (0.067 Pa), and high-frequency output was 100 W. . After depositing a metal Zr layer 604 having a thickness of 2 nm on the silicon oxide film 603 at a substrate temperature of room temperature (FIG. (C)), the target is replaced and the substrate temperature is reduced to room temperature. 1. deposited Z r N layer 605 O nm was formed Z r NZZ r / S i O 2 laminated structure (Fig. (d)). The oxidation treatment of this sample was performed at 500 ° C. in a reduced-pressure oxygen atmosphere of 1 Torr (130 Pa). I oxidation connexion metal layer (metal nitride layer) is converted to Z r O 2 (Z r ON ) layer, a high dielectric constant insulating film (Z r ON high dielectric constant film) containing nitrogen 606 was obtained . The composition distribution in the film thickness direction was evaluated by secondary ion mass spectrometry. As a result, it was localized at a position of 0.6 nm from the film surface, and the nitrogen concentration was the maximum value of 10% in atomic%. Further, at the interface between the silicon substrate was confirmed to have been retained S ί ο 2 composition.
その後、 上記の製法によって作製したシリコン酸化膜 603および高誘電率絶縁 膜 606を有するゲート絶縁膜上にポリシリコン電極を形成して MO S F Ε Τを作 製した。 この MOS F ΕΤデバイスについてゲート絶縁膜容量ならびに電流一電圧 特性を評価すると、 シリコン酸化膜換算膜厚は 1. 4 nmであり、 ゲート絶縁膜を 流れるリーク電流値は同等の酸化膜換算膜厚を有したシリコン酸化膜と比べて約 3 桁低減した。 またゲート絶縁膜層の結晶化温度は窒素添加を行わない場合よリも 1 50°C以上向上した。 さらにドーパント活性化工程である 1 050°Cの熱処 理に対してもドーパントの突き抜けに伴う トランジスター動作特性の異常は見られ なかった。 Thereafter, a polysilicon electrode was formed on the gate insulating film having the silicon oxide film 603 and the high-dielectric-constant insulating film 606 manufactured by the above-described manufacturing method, thereby manufacturing a MOSF. When the gate insulating film capacitance and current-voltage characteristics of this MOS F F device were evaluated, the equivalent silicon oxide film thickness was 1.4 nm, and the leakage current flowing through the gate insulating film was equivalent to the equivalent oxide film thickness. It was reduced by about three orders of magnitude compared to the silicon oxide film. In addition, the crystallization temperature of the gate insulating film layer is lower than that when nitrogen is not added. Improved by 50 ° C or more. Furthermore, no abnormalities in the transistor operating characteristics due to the penetration of the dopant were observed in the heat treatment at 1050 ° C, which is the dopant activation step.
〔実施例 4〕  (Example 4)
第 4の実施例では実施例 3と同様の手順で表面側に窒素が局在した Z r O 2fl莫を 作製した後、 ゲート電極としてポリシリコンゲルマニウム電極を形成した。 実施例 3 (ポリシリコンゲート電極) に比べてゲート電極空乏化の影響を低減し、 トラン ジスタ一のォン電流の増加を実現した。  In the fourth embodiment, a ZrO 2 fl matrix with nitrogen localized on the surface side was prepared in the same procedure as in the third embodiment, and then a polysilicon germanium electrode was formed as a gate electrode. Compared with the third embodiment (polysilicon gate electrode), the effect of gate electrode depletion was reduced, and the on-current of the transistor was increased.
〔実施例 5〕  (Example 5)
第 5の実施例では、 シリコン基板界面にシリコン酸化膜を挿入した H f シリケ一 卜高誘電率薄膜中にシリコン窒化膜を介して窒素添加を行った (第 7図)。  In the fifth embodiment, nitrogen was added via a silicon nitride film to a Hf silicate high dielectric constant thin film having a silicon oxide film inserted at the silicon substrate interface (FIG. 7).
実施例 3と同様にシリコンウェハ 701を洗浄ならびに化学酸化膜剥離後 (同図 (a))、 膜厚 0. 6 nmのシリコン酸化膜 703を形成した (同図 (b))。 本表面 上に H f S i焼結体ターゲッ卜を用いたスパッタ成膜によって物理膜厚 2 nmの非 晶質^! 5 1層704を形成した (同図 (c))。 スパッタ成膜条件は実施例 2と同 様とした。 その後、 本ウェハ表面に S i H 4と NH 3を原料ガスとして 0. 5 nm 厚のシリコン窒化膜 705を CVD (Ch em i c a l Va p o r D e p o s ί t ί o n) 成膜した (同図 (d))。 本試料の酸化処理を 1 T o r r (1 30 P a) の減圧酸素雰囲気中 700°Cで実施して窒素が導入されたハフニウムシリケ一 卜 (H f S i O) 膜 706を形成し、 窒素含有高誘電率絶縁膜とした。 After cleaning the silicon wafer 701 and stripping the chemical oxide film in the same manner as in Example 3 (FIG. 7A), a silicon oxide film 703 having a thickness of 0.6 nm was formed (FIG. 7B). An amorphous ^! 51 layer 704 with a physical film thickness of 2 nm was formed on this surface by sputter deposition using an HfSi sintered body target (Fig. 3 (c)). The sputtering film formation conditions were the same as in Example 2. Then, a 0.5 nm thick silicon nitride film 705 was formed on the surface of the wafer by CVD (chemical vapor deposition) using SiH 4 and NH 3 as source gases (see FIG. )). The sample was oxidized at 700 ° C. in a reduced pressure oxygen atmosphere of 1 Torr (130 Pa) to form a nitrogen-introduced hafnium silicate (HfSiO) film 706, A nitrogen-containing high dielectric constant insulating film was used.
本試料について組成分布を 2次イオン質量分析によって評価した結果、 シリコン 酸化膜と H f シリゲート界面、 ならびに H f シリケ一卜層と表面側のシリコン窒化 膜 (シリコン酸素窒素膜) の界面反応で原子層レベルでのミキシングは生じるが、 窒素濃度ピークは、 原子%で 1 0%であり、 表面から 0. 5 nmの位置に最大値を 有し、 シリコン基板との界面では S i 02組成が保持されることを確認した。 このようにしてシリコン酸化膜 703およびハフニウムシリケ一卜層 706を有 するゲート絶縁膜を形成し、 その上にゲート電極を形成して作成した MOS FET では、 シリコン酸化膜換算は 1 . 6 n m、 リーク電流値は同等の酸化膜換算 膜厚を有したシリコン酸化膜に対して約 2桁以上低減していた。 産業上の利用可能性 As a result of evaluating the composition distribution of this sample by secondary ion mass spectrometry, it was found that the interface reaction between the silicon oxide film and the Hf silicate gate, and the interface reaction between the Hf silicate layer and the silicon nitride film (silicon oxygen nitrogen film) on the surface side. Mixing occurs at the layer level, but the nitrogen concentration peak is 10% at atomic%, has a maximum value at 0.5 nm from the surface, and the Si02 composition is maintained at the interface with the silicon substrate Confirmed that. In this manner, a MOS FET formed by forming a gate insulating film having a silicon oxide film 703 and a hafnium silicate layer 706, and forming a gate electrode thereon. In this case, the equivalent silicon oxide film thickness was 1.6 nm, and the leakage current was about two orders of magnitude lower than that of a silicon oxide film with an equivalent oxide film thickness. Industrial applicability
本発明によって窒素添加を施した金属酸化物薄膜あるいはシリゲート薄膜から構 成されるゲート絶縁膜構造中の窒素分布をシリコン基板界面から隔てた構造を採用 することで、 高誘電率薄膜の熱安定性の改善とゲ一ト電極からのドーパント突き抜 け防止、 ならびにゲート絶縁膜とシリコン基板界面の電気特性劣化の防止と言った 複数の効果とを同時に得ることができる半導体装置が提供された。 また本発明によ リ、 上述の高誘電率薄膜を有したゲー卜絶縁膜構造を有する半導体装置を作製する ために有効な製造方法が提供された。  By adopting a structure in which the nitrogen distribution in the gate insulating film structure composed of a metal oxide thin film or a silicide thin film to which nitrogen is added according to the present invention is separated from the silicon substrate interface, the thermal stability of the high dielectric constant thin film is improved. There has been provided a semiconductor device capable of simultaneously obtaining a plurality of effects such as improvement of the resistance, prevention of the penetration of dopant from the gate electrode, and prevention of deterioration of the electrical characteristics at the interface between the gate insulating film and the silicon substrate. Further, according to the present invention, there is provided a manufacturing method effective for manufacturing a semiconductor device having a gate insulating film structure having the above-mentioned high dielectric constant thin film.

Claims

請求の範囲 The scope of the claims
1 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体装 置において、 1. In a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲー卜絶縁膜が、 金属酸化物もしくは金属シリケ一卜に窒素が導入された構造の 窒素含有高誘電率絶縁膜を有し、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal oxide or a metal silicate;
該窒素含有髙誘電率絶縁膜中の窒素濃度は膜厚方向に分布を持ち、 The nitrogen concentration in the nitrogen-containing dielectric insulating film has a distribution in the film thickness direction,
該窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 シリコン 基板から離れた領域に存在することを特徴とする半導体装置。 A semiconductor device, wherein the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film becomes maximum in the film thickness direction is located in a region away from the silicon substrate.
2 . 前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 シリコン基板から 0 . 5 n m以上離れた領域に存在する請求項 1記載の半導体装置。  2. The semiconductor device according to claim 1, wherein the position where the nitrogen concentration in the nitrogen-containing high-dielectric-constant insulating film becomes maximum in the film thickness direction is in a region separated from the silicon substrate by 0.5 nm or more.
3 . 前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 窒素含有高誘電率絶縁膜のゲート電極側に局在している請求項 1記載の半導体装置。  3. The semiconductor device according to claim 1, wherein the position where the nitrogen concentration in the nitrogen-containing high dielectric constant insulating film is maximum in the film thickness direction is localized on the gate electrode side of the nitrogen-containing high dielectric constant insulating film.
4 . 前記窒素含有高誘電率絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 窒素含有高誘電率絶縁膜の中央部分に局在している請求項 1記載の半導体装置。  4. The semiconductor device according to claim 1, wherein a position where a nitrogen concentration in the nitrogen-containing high dielectric constant insulating film is maximum in a film thickness direction is localized in a central portion of the nitrogen-containing high dielectric constant insulating film.
5 . 前記ゲート絶縁膜のシリコン基板側界面における窒素濃度が 3原子%未満で ある請求項 1〜 4のいずれか一項記載の半導体装置。  5. The semiconductor device according to claim 1, wherein a nitrogen concentration at an interface of the gate insulating film on the silicon substrate side is less than 3 atomic%.
6 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体装 置において、  6. In a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
前記ゲー卜絶縁膜が、 金属シリケ一卜に窒素が導入された構造の窒素含有高誘電率 絶縁膜を有し、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
該窒素含有高誘電率絶縁膜中の窒素原子が金属シリゲート中のシリコン原子と選択 的に結合している半導体装置。 A semiconductor device in which nitrogen atoms in the nitrogen-containing high dielectric constant insulating film are selectively bonded to silicon atoms in a metal silicide.
7 . 前記金属シリゲート中のシリコン原子と選択的に結合した窒素原子が、 シリ コン基板から離れた位置に存在する請求項 6記載の半導体装置。  7. The semiconductor device according to claim 6, wherein a nitrogen atom selectively bonded to a silicon atom in the metal silicide exists at a position distant from the silicon substrate.
8 . 前記ゲート絶縁膜が、 前記シリコン基板上に接して形成されたシリコン酸化 膜と、 該シリコン酸化膜上に接して形成された前記窒素含有高誘電率絶縁膜とを有 する請求項 1〜 7のいずれか一項記載の半導体装置。 8. The gate insulating film has a silicon oxide film formed in contact with the silicon substrate, and the nitrogen-containing high dielectric constant insulating film formed in contact with the silicon oxide film. The semiconductor device according to claim 1, wherein:
9. シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体装 置において、  9. In a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
前記ゲート絶縁膜が、 金属シリケ一卜に窒素が導入された構造の窒素含有高誘電率 絶縁膜を有し、 The gate insulating film has a nitrogen-containing high dielectric constant insulating film having a structure in which nitrogen is introduced into a metal silicate,
該窒素含有高誘電率絶縁膜の組成が膜厚方向で連続的に変化し、 該窒素含有高誘電 率絶縁膜のシリコン基板側界面とゲート電極側界面との間の中間部分においてシリ コン濃度が最小値を有し、 The composition of the nitrogen-containing high dielectric constant insulating film changes continuously in the film thickness direction, and the silicon concentration in the intermediate portion between the interface between the silicon substrate side and the gate electrode side of the nitrogen-containing high dielectric constant insulating film is reduced. Has a minimum value,
シリコン濃度が最小値を有する位置と該ゲー卜電極側界面との間のみに窒素が導入 されたことを特徴とする半導体装置。 A semiconductor device characterized in that nitrogen is introduced only between a position where the silicon concentration has a minimum value and the gate electrode side interface.
1 0. シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体 装置において、  10. In a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲート絶縁膜が、 シリコン基板側から順に、 第 1のシリコン酸化膜、 金属酸化 物膜もしくは金属シリケ一ト膜および第 2のシリコン酸化膜を有する積層構造を有 し、 The gate insulating film has a laminated structure including a first silicon oxide film, a metal oxide film or a metal silicate film, and a second silicon oxide film in order from the silicon substrate side,
第 2のシリコン酸化膜のみが、 シリコン酸化物に窒素が導入された構造を有するこ とを特徴とする半導体装置。 A semiconductor device, characterized in that only the second silicon oxide film has a structure in which nitrogen is introduced into silicon oxide.
1 1. 前記シリコン基板と前記ゲー卜絶縁膜が接し、 該ゲート絶縁膜とゲート電 極とが接し、 かつ、  1 1. The silicon substrate is in contact with the gate insulating film, the gate insulating film is in contact with a gate electrode, and
該ゲー卜電極が、 ポリシリコンもしくはポリシリコンゲルマニウム導電膜である請 求項 1〜 1 0のいずれか一項記載の半導体装置。 The semiconductor device according to any one of claims 1 to 10, wherein the gate electrode is polysilicon or a polysilicon germanium conductive film.
1 2. 前記ゲー卜絶縁膜が、 Z r、 H f 、 T a、 A l、 T i、 N b、 S c、 Y、 L a、 Ce、 P r、 N d、 Sm、 Eu、 Gd、 T b、 D y、 Ho、 E r、 Tm、 Y bおよび L uからなる群から選ばれる少なくとも一種を含む請求項 1〜 1 1のいず れか一項記載の半導体装置。  1 2. The gate insulating film is composed of Zr, Hf, Ta, Al, Ti, Nb, Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd, The semiconductor device according to any one of claims 1 to 11, comprising at least one selected from the group consisting of Tb, Dy, Ho, Er, Tm, Yb, and Lu.
1 3. シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体 装置の製造方法において、 該半導体装置が請求項 1 ~ 9のいずれか一項記載の半導体装置であって、 金属酸化物もしくは金属シリゲートからなる高誘電率絶縁膜への窒素含有プラズマ 照射によって前記窒素の導入を行う工程を有することを特徴とする半導体装置の製 造方法。 1 3. In a method of manufacturing a semiconductor device having a gate insulating film and a gate electrode on a silicon substrate in this order, The semiconductor device according to claim 1, wherein the nitrogen is introduced by irradiating a high-k insulating film made of metal oxide or metal silicide with nitrogen-containing plasma. A method for manufacturing a semiconductor device, comprising:
1 4 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体 装置の製造方法において、  14. In a method for manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が請求項 1 0記載の半導体装置であって、 The semiconductor device according to claim 10, wherein:
前記積層構造への窒素含有ブラズマ照射によつて前記窒素の導入を行う工程を有す ることを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device, comprising a step of introducing the nitrogen by irradiating the stacked structure with nitrogen-containing plasma.
1 5 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体 装置の製造方法において、  15. In a method for manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が請求項 6または 7記載の半導体装置であって、 The semiconductor device according to claim 6 or 7, wherein
金属シリゲートからなる髙誘電率薄膜への窒素含有プラズマ照射によって、 金属シ リケー卜中にシリコンと窒素との結合のみを選択的に形成し、 前記窒素の導入を行 う工程を有することを特徴とする半導体装置の製造方法。 A method of selectively forming only a bond between silicon and nitrogen in a metal silicate by irradiating a nitrogen-containing plasma to a 髙 dielectric constant thin film made of a metal silicide, and introducing the nitrogen. Semiconductor device manufacturing method.
1 6 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する半導体 装置の製造方法において、  16. In a method of manufacturing a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該半導体装置が請求項 1〜 9のいずれか一項記載の半導体装置であって、 シリコン基板上に金属層と窒素を含有する窒素含有層からなる積層構造を形成した 後に酸化処理を施すことによってゲー卜絶縁膜を形成する工程を有することを特徴 とする半導体装置の製造方法。 The semiconductor device according to any one of claims 1 to 9, wherein the oxidation treatment is performed after forming a stacked structure including a metal layer and a nitrogen-containing layer containing nitrogen on the silicon substrate. A method for manufacturing a semiconductor device, comprising a step of forming a gate insulating film.
1 7 . 前記窒素含有層がシリコン酸窒化膜もしくはシリコン窒化膜である請求項 1 6記載の半導体装置の製造方法。  17. The method according to claim 16, wherein the nitrogen-containing layer is a silicon oxynitride film or a silicon nitride film.
1 8 . 前記窒素含有層が金属窒化物膜である請求項 1 6記載の半導体装置の製造 方法。  18. The method according to claim 16, wherein the nitrogen-containing layer is a metal nitride film.
1 9 . シリコン基板表面に膜厚 1 n m未満のシリコン酸化膜を形成後に、 前記積 層構造を形成する請求項 1 6〜 1 8のいずれか一項記載の半導体装置の製造方法。 19. The method for manufacturing a semiconductor device according to any one of claims 16 to 18, wherein the stacked structure is formed after forming a silicon oxide film having a thickness of less than 1 nm on a silicon substrate surface.
2 0 . シリコン基板上に、 ゲート絶縁膜とゲート電極とをこの順に有する 半導体装置において、 20. In a semiconductor device having a gate insulating film and a gate electrode in this order on a silicon substrate,
該ゲー卜絶縁膜が窒素と金属酸化物もしくは金属シリゲートとを含み、 The gate insulating film contains nitrogen and a metal oxide or a metal silicide,
該ゲート絶縁膜中の窒素濃度は膜厚方向に分布を持ち、 The nitrogen concentration in the gate insulating film has a distribution in the thickness direction,
該ゲー卜絶縁膜中の窒素濃度が膜厚方向で最大となる位置が、 シリコン基板から離 れた領域に存在することを特徴とする半導体装置。 A semiconductor device, wherein a position where the nitrogen concentration in the gate insulating film is maximum in a film thickness direction is located in a region away from the silicon substrate.
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