JP2008072001A - Semiconductor device and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an MOS semiconductor device that has a thin film thickness of silicon oxide film conversion and is excellent in electrical properties such as leakage current density, etc. <P>SOLUTION: The semiconductor device has a semiconductor substrate 11, a gate insulating film 15a formed on the semiconductor substrate 11, having at least one layer containing nitrogen, and a plurality of high-dielectric films with different dielectric constants are laminated, and a full silicide gate electrode 24 formed on the gate insulating film 15a. Of the multiple high-dielectric films, a high-dielectric film 32a at the gate electrode side has a higher nitrogen composition compared with a high-dielectric film 31a at the substrate side. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a MOS type semiconductor device having a gate insulating film made of a high dielectric material and a gate electrode made of a metal silicide film and a manufacturing method thereof.

  With the recent progress in technology for higher integration and higher speed in semiconductor devices, metal-oxide semiconductor field effect transistors (MOSFETs) are being miniaturized. As the gate insulating film is made thinner with miniaturization, problems such as an increase in gate leakage current due to tunneling current become obvious.

In order to suppress this problem, attempts have been made to use a high dielectric material made of a metal oxide such as hafnium oxide (HfO ₂ ) or zirconium oxide (ZrO ₂ ) for the gate insulating film. By using a metal oxide for the gate insulating film, the physical film thickness can be increased while reducing the equivalent film thickness of the silicon oxide film, so that an effect of reducing leakage current is expected.

However, metal oxides such as HfO ₂ which is a compound of hafnium (Hf) and oxygen (O) are characterized by being crystallized by a heat treatment at about 700 ° C. When crystal grain boundaries are formed in the film by crystallization, a leakage current path is formed, and the leakage current increases even if the physical film thickness is large.

  Therefore, a method has been proposed in which silicon or nitrogen is contained in a metal oxide to form a metal silicate film, a metal oxynitride film, or a metal nitride silicate (for example, an HfSiON film) to make the gate insulating film difficult to crystallize ( For example, see Non-Patent Document 1.) In the metal oxynitride film or the metal silicate film, it is considered that crystallization is suppressed because the bond between atoms is strengthened by inserting a nitrogen atom or a silicon atom between a metal atom and an oxygen atom.

  However, if the metal oxide film contains silicon and is a metal silicate film, the relative dielectric constant is reduced compared to a metal oxide film that does not contain silicon. Therefore, there is a need to reduce the physical film thickness of the gate insulating film. is there. Therefore, there is a trade-off relationship between an improvement in leakage current due to suppression of crystal grain boundaries and an increase in leakage current due to a reduction in physical film thickness.

  In addition, in a metal silicate film that does not contain nitrogen, spatial fluctuations occur in the dielectric constant due to phase separation between the metal and silicon. Spatial fluctuations in the dielectric constant become a carrier scattering source during transistor operation, so that carrier mobility is lowered and drive current capability is lowered. For this reason, it is preferable to introduce nitrogen into the metal silicate film to form a nitride.

  However, excessive introduction of nitrogen causes defects in the gate insulating film, so that it is necessary to optimize the concentration of nitrogen introduced into the gate insulating film. In order to suppress crystallization, it is better that more nitrogen is introduced into the metal silicate film, and the nitrogen composition is preferably at least about 10 atomic%. However, the nitrogen atoms reaching the silicon substrate form a carrier trap level, which deteriorates the carrier mobility in the operation of the MOSFET, and further degrades the reliability of the gate insulating film. For this reason, it is necessary to minimize the diffusion of nitrogen into the silicon substrate directly under the gate insulating film. Therefore, in order to suppress a decrease in the dielectric constant of the gate insulating film and to suppress crystallization, a metal nitride silicate film having an optimized nitrogen addition amount and a profile in the depth direction of the added nitrogen is required. Yes.

  On the other hand, the gate electrode is required to have a low electrode resistance in order to improve the operation speed. For this reason, a technique has been used in which the upper portion of the polysilicon electrode is partially silicided (CoSi or NiSi). However, when a metal oxide is used for the gate insulating film, there arises a problem that the absolute value of the threshold voltage at the time of transistor operation becomes large. The reason why the threshold voltage increases is not clear, but the gate electrode material reacts with the gate insulating film material as a result of the substrate being exposed to a high temperature of about 1000 ° C. in the transistor manufacturing process. A phenomenon called Fermi-level pinning has been reported, in which the effective work function of the is changed.

For example, in Non-Patent Document 2, when the gate electrode material is polysilicon, the effective work function value of polysilicon is an intermediate value of the band gap energy of silicon regardless of the type of dopant of polysilicon. It has been reported that the absolute value of the threshold voltage of the p-type MOSFET becomes considerably large as a result of being fixed slightly closer to N ⁺ polysilicon than (mid gap).

  As a method of suppressing the increase in the absolute value of the threshold voltage due to the Fermi level pinning phenomenon, a thin buffer layer made of a silicon nitride film or the like is interposed at the interface between the gate electrode and the gate insulating film, or the metal concentration is reduced as a whole. A method such as a gate insulating film having a silicate structure has been studied. However, when the buffer layer is provided, the buffer layer has a lower dielectric constant than the high dielectric film, and the buffer layer grows in an island shape, so that the thickness of the buffer layer is increased. Further, when the gate insulating film has a metal silicate structure with a low metal concentration, the effective dielectric constant of the gate insulating film is extremely lowered. Thus, the polysilicon electrode is not suitable as an electrode material for a MOSFET having a high dielectric film as a gate oxide film.

A full silicide gate electrode has been proposed as a gate electrode replacing the polysilicon electrode. The full silicide electrode is formed by directly depositing a metal on a polysilicon film deposited on a gate insulating film after a process such as activation of a source / drain region, and siliciding the entire polysilicon layer by heat treatment. (For example, refer to Patent Document 1). That is, a full silicide gate electrode can be formed by adding a silicidation step of the electrode after the formation process of the polysilicon gate electrode. Therefore, the manufacturing process is relatively easy because it is an extension of the conventional process. Furthermore, since the gate electrode is a conductive metal and the inversion layer capacitance is increased as compared with the polysilicon electrode in which carrier depletion occurs, there is an advantage that the current driving capability of the transistor is improved.
K. Sekine, et al., “Nitrogen profile control by plasma nitridation technique for poly-Si gate HfSiON CMOSFET with excellent interface property and ultra-low leakage current”, IEDM Tech. Dig., 2003, p. 103-105 C. Hobbs, et al., “Fermi level pinning at the poly Si / metal oxide interface”, Proceedings of the 2003 Symposium on VLSI Technology, 2003, p. 9-10 JP 2005-228868 A

However, in the formation of a gate insulating film made of a conventional metal nitride silicate film,
There is a problem that the amount of nitrogen introduced and the profile of the introduced nitrogen in the depth direction are not sufficiently controlled.

  Regarding the composition of silicon, the composition ratio can be controlled relatively well by using a chemical vapor volume (CVD) method, an atomic layer deposition method or a physical deposition method. However, since nitrogen is usually introduced by high-temperature thermal nitriding in an ammonia atmosphere, it is difficult to sufficiently control the nitrogen composition, particularly the profile in the depth direction. Since the ammonia thermal nitriding treatment involves a heat treatment at a high temperature, the diffusion length of nitrogen is extended, so that nitrogen is introduced not only into the metal silicate film but also into the silicon substrate. In order to avoid introduction of nitrogen into the silicon substrate, it is desirable to perform heat treatment at as low a temperature as possible, but if the heat treatment temperature is lowered, the nitriding species become inactive and the amount of nitrogen introduced decreases.

  In order to secure the amount of nitrogen introduced even at low temperatures, attempts have been made to use nitrogen activated by plasma or the like, but plasma or the like can be used to achieve the amount of nitridation necessary to suppress crystallization. Activation alone is not sufficient. For this reason, it is necessary to lengthen the nitriding time or increase the plasma excitation output, but this time, plasma damage such as electrical breakdown due to accumulation of charged particles or defects due to physical sputtering occurs. It becomes easy.

  On the other hand, when the full silicide gate electrode is formed on a gate insulating film containing silicon such as a metal nitride silicate film, the metal used for full silicidation reacts with silicon in the metal nitride silicate film. The electrical characteristics of the gate insulating film, such as the equivalent thickness of the silicon oxide film and the leakage current density, change according to the reaction amount of the silicon in the metal nitride silicate film, so the silicon in the metal nitride silicate film can be optimized. is necessary.

  An object of the present invention is to solve the above-mentioned conventional problems and to realize a MOS type semiconductor device having excellent electrical characteristics such as a thin silicon oxide equivalent film thickness and a low leakage current density.

  In order to achieve the above object, according to the present invention, a semiconductor device includes a gate insulating film in which a plurality of high dielectric films having different dielectric constants are stacked.

  Specifically, a semiconductor device according to the present invention includes a semiconductor substrate and a gate insulating film formed on the semiconductor substrate, wherein at least one layer includes nitrogen and a plurality of high dielectric films having different dielectric constants are stacked. And a full silicide gate electrode formed on the gate insulating film. Among the plurality of high dielectric films, the high dielectric film on the gate electrode side has a nitrogen composition as compared with the high dielectric film on the substrate side. Is characterized by high.

  According to the semiconductor device of the present invention, the high dielectric film on the gate electrode side among the plurality of high dielectric films has a higher nitrogen composition than the high dielectric film on the substrate side. And the introduction of nitrogen into the substrate can be suppressed. Accordingly, the equivalent silicon oxide film thickness of the gate insulating film can be kept thin, so that a semiconductor device with a small leakage current can be realized. In addition, since introduction of nitrogen into the substrate is small, a semiconductor device with little deterioration in carrier mobility can be realized.

  In the semiconductor device of the present invention, the high dielectric film on the gate electrode side among the plurality of high dielectric films preferably has a higher dielectric constant than the high dielectric film on the substrate side.

  In the semiconductor device of the present invention, the high dielectric film on the most gate electrode side of the plurality of high dielectric films preferably contains 10 atomic percent or more of nitrogen. With such a configuration, crystallization of the gate insulating film can be reliably reduced.

In the semiconductor device of the present invention, the full silicide gate electrode preferably includes at least one of titanium, cobalt, nickel, platinum, yttrium, and a transition metal. In the semiconductor device of the present invention, each high dielectric film includes: It is preferable to include at least one of hafnium, zirconium, titanium, tantalum, aluminum, lanthanum, and rare earth elements, and silicon and nitrogen.

  In this case, among the plurality of high dielectric films, the high dielectric film on the gate electrode side preferably has a lower silicon composition than the high dielectric film on the substrate side. With such a configuration, a gate electrode having a nitrogen profile having a high nitrogen composition on the gate electrode side and a low nitrogen composition on the substrate side can be reliably realized.

  The method for manufacturing a semiconductor device according to the present invention includes a step of forming a gate insulating film by sequentially laminating a plurality of high dielectric films having at least one layer containing nitrogen and having different dielectric constants on a semiconductor substrate ( a) and a step (b) of forming a full silicide gate electrode on the gate insulating film. In the step (a), the nitrogen in the high dielectric film on the gate electrode side among the plurality of high dielectric films is provided. The composition is characterized by being higher than the nitrogen composition of the high dielectric film on the substrate side.

  According to the method for manufacturing a semiconductor device of the present invention, since the nitrogen composition of the high dielectric film on the gate electrode side is higher than the nitrogen composition of the high dielectric film on the substrate side, the crystallization of the gate insulating film is performed. Nitrogen sufficient for suppression can be introduced into the gate insulating film, and introduction of nitrogen into the substrate can be suppressed. Accordingly, the equivalent silicon oxide film thickness of the gate insulating film can be kept thin, so that a semiconductor device with a small leakage current can be realized. In addition, since introduction of nitrogen into the substrate is small, a semiconductor device with little deterioration in carrier mobility can be realized.

  In the method for manufacturing a semiconductor device of the present invention, the step (a) includes a step (a1) of sequentially depositing a plurality of metal silicate films having different silicon compositions on a semiconductor substrate, and a gate of the plurality of metal silicate films. A step (a2) of introducing nitrogen into the metal silicate film on the electrode side so that the concentration is higher than that of the metal silicate film on the semiconductor substrate side, and in step (a1), the gate electrode of the plurality of metal silicate films The silicon composition of the metal silicate film on the side is preferably lower than the silicon composition of the metal silicate film on the substrate side. With such a configuration, the nitrogen composition of the high dielectric film on the gate electrode side can be surely made higher than the nitrogen composition of the high dielectric film on the substrate side.

  In the method for manufacturing a semiconductor device of the present invention, in the step (a2), nitrogen is preferably introduced using a nitriding species excited by plasma or ultraviolet (UV) light. With such a structure, the gate insulating film is not exposed to a reducing high-temperature gas, and thus an increase in leakage current due to deterioration of the gate insulating film can be prevented.

  In the method for manufacturing a semiconductor device of the present invention, in the step (a2), nitrogen is preferably introduced at a temperature of 400 ° C. or lower. With such a configuration, the diffusion length of nitrogen can be shortened, so that introduction of nitrogen into the substrate can be reliably suppressed.

  In the method for manufacturing a semiconductor device of the present invention, in the step (a2), nitrogen is introduced in an atmosphere containing hydrogen. With such a configuration, hydrogen reduces the metal silicate film and weakens the bond strength between the metal atom and the silicon atom, so that more nitrogen can be introduced. In addition, since the output at the time of exciting the plasma can be reduced and the plasma irradiation time can be shortened, electrical damage due to the plasma can be reduced.

  In the method for manufacturing a semiconductor device of the present invention, in the step (a), each high dielectric film is preferably formed using a chemical vapor deposition method, an atomic layer deposition method, or a physical deposition method.

  According to the semiconductor device and the manufacturing method thereof according to the present invention, it is possible to realize a MOS semiconductor device having excellent electrical characteristics such as a thin silicon oxide equivalent film thickness and a low leakage current density.

  An embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional configuration of a semiconductor device according to an embodiment. As shown in FIG. 1, the semiconductor device of this embodiment is a MOS transistor formed in an element formation region 13 surrounded by an element isolation film 12 of a semiconductor substrate 11 made of silicon.

  The gate insulating film 15a of the MOS transistor includes a first high dielectric film 31a and a second high dielectric film 32a which are sequentially formed on the gate insulating film base film 14a formed on the semiconductor substrate 11. Become. In the present embodiment, the first high dielectric film 31a and the second high dielectric film 32a are made of hafnium nitride silicate having different nitrogen compositions and different silicon compositions. The second high dielectric film 32a has a higher nitrogen composition and a lower silicon composition than the first high dielectric film. Therefore, the second high dielectric film 32a has a dielectric constant higher than that of the first high dielectric film 31a.

  A full silicide gate electrode 24 is formed on the gate insulating film 15 a, and sidewalls 19 are formed on the side surfaces of the gate electrode base film 14 a, the gate insulating film 15 a, and the full silicide gate electrode 24.

  Extension regions 20 are formed in regions on both sides of the full silicide gate electrode 24 in the element formation region 13, and source / drain regions 21 are formed in regions on both sides of the sidewall 19. A metal silicide source / drain 22 is formed on the source / drain region 21.

  An interlayer film 23 covering the entire surface of the semiconductor substrate 11 is formed, and although not shown, contact plugs and wirings connected to the full silicide gate electrode 24, the metal silicide source drain 22 and the like are formed.

  Note that the semiconductor device of this embodiment may be an n-type MOS transistor or a p-type MOS transistor.

  A method for manufacturing a semiconductor device according to an embodiment will be described below with reference to the drawings. 2 and 3 show a method of manufacturing a semiconductor device according to an embodiment in the order of steps.

  First, as shown in FIG. 2A, for example, an element isolation film made of shallow trench isolation (STI) is formed on a semiconductor substrate 11 made of silicon whose main surface has a (100) plane orientation. 12 is formed selectively. Subsequently, a p-type well is formed in the case of an n-type MOSFET and an n-type well is formed in the case of a p-type MOSFET by ion implantation on the upper portion of the semiconductor substrate 11. Thereby, a plurality of element formation regions 13 are formed on the main surface of the semiconductor substrate 11.

  Subsequently, a known standard RCA cleaning (wet cleaning based on ammonia hydrogen peroxide solution cleaning and hydrochloric acid hydrogen peroxide solution cleaning) and diluted hydrofluoric acid cleaning are sequentially performed on the surface of the semiconductor substrate 11. Thereafter, the cleaned semiconductor substrate 11 is heat-treated in an oxidizing atmosphere at a temperature of about 600 ° C. to 1000 ° C., for example. Thereby, a base film 14 made of silicon oxide is formed on the element formation region 13 in the semiconductor substrate 11. The base film 14 preferably has a film thickness of 1.0 nm or less. Further, the base film 14 may be a chemical silicon oxide film formed by a wet process.

  Next, the gate insulating film forming film 15 is formed on the base film 14 by using, for example, a metal organic chemical vapor deposition (MOCVD) method. In the present embodiment, the gate insulating film forming film 15 includes a first high dielectric film 31 made of hafnium silicate having a thickness of 2 nm, and a second high dielectric film 32 made of hafnium silicate having a thickness of 1 nm. Are stacked. The first high dielectric film 31 and the second high dielectric film 32 have different silicon compositions.

The first high dielectric film 31 includes, for example, Hf (Ot-C ₃ H ₇ ) ₄ that is a liquid hafnium source (Hf source) and Si (Ot) that is a liquid silicon source (Si source). -C ₃ H ₇ ) Bubbling is performed by blowing a carrier gas such as nitrogen into ₄ . Thereby, a source gas in which the Hf source and the Si source are made into a gaseous state is generated, and the generated source gas is introduced into the reaction furnace together with the carrier gas. Thus, the first high dielectric film 31 made of hafnium silicate is deposited. In addition, what is necessary is just to set the temperature in a reaction furnace to the temperature of about 500 degreeC. The concentration of hafnium with respect to silicon of the deposited hafnium silicate can be adjusted by the supply amount of the Hf source and the Si source.

  In the present embodiment, the hafnium composition of the hafnium oxide film that is the first high dielectric film 31 is desirably 50%. This is because if the hafnium composition is 50%, a stable phase that does not crystallize immediately after film formation can be obtained, and the relative dielectric constant can be maintained large. Resistance to nitrogen diffusion is also obtained.

  Subsequently, after the supply of the source gas is temporarily stopped, a second high dielectric film 32 is deposited on the first high dielectric film 31 by the same method.

  The second high dielectric film 32 may be a hafnium silicate having a hafnium composition of 80% or more. Excessive hafnium is more easily nitrided than a hafnium silicate film having a high silicon ratio, and in a later step, more nitrogen can be localized in a portion away from the substrate of the gate insulating film. . Moreover, since the dielectric constant is high, the equivalent silicon oxide film thickness can be reduced.

  The first high dielectric film 31 and the second high dielectric film 32 are deposited by physical deposition (sputtering), atomic layer deposition, laser ablation, or molecular beam epitaxy instead of MOCVD. May be.

  Thereafter, in order to remove residual impurities such as carbon or hydrogen, heat treatment at about 700 to 1000 ° C. is performed. The heating atmosphere at this time is nitrogen containing a small amount of oxygen so that the film thicknesses of the semiconductor substrate 11, the first high dielectric film 31, the second high dielectric film 32, and the base film 14 do not change greatly. It is desirable to do.

  Next, nitrogen is introduced into the gate insulating film formation film 15. The nitriding treatment of the gate insulating film forming film 15 is performed by supplying nitrogen activated by plasma to the gate insulating film forming film 15. Specifically, nitrogen is supplied to an atmosphere whose pressure is reduced to 1 Pa to 10 Pa or less, and nitrogen is excited by plasma to generate nitrogen radicals, which are reacted with the gate insulating film forming film 15. Nitrogen radicals excited in an atmosphere having a pressure of 10 Pa or more have a short mean free path and lose energy before reacting with the gate insulating film forming film 15, so that the nitriding amount of the gate insulating film forming film 15 may be increased. Can not. Moreover, since the nitrogen radical excited in the atmosphere of 1 Pa or less has too much energy, the amount of nitrogen introduced into the semiconductor substrate 11 increases. For this reason, the pressure during nitriding is preferably 1 Pa to 10 Pa.

  The wafer temperature during nitriding is desirably 400 ° C. or lower. If the wafer temperature is 400 ° C. or less, the diffusion length of nitrogen is short, and the amount of nitrogen introduced into the semiconductor substrate 11 can be reduced.

  In the present embodiment, an example is shown in which nitrogen radicals are generated by exciting nitrogen with plasma, but nitrogen radicals may be generated by irradiation with ultraviolet (UV) light.

  The nitriding treatment is more preferably performed in an atmosphere to which hydrogen is added. Hydrogen molecules become electrically excited hydrogen radicals by the plasma, and reduce the metal oxide film and impurities in the metal oxide film. Since the sites in the metal oxide film reduced by hydrogen are terminated with nitrogen, more nitrogen can be introduced than when nitriding with nitrogen alone. Thereby, since the plasma irradiation time can be shortened, electrical damage to the metal oxide film or the like caused by the plasma can be reduced. In this case, the inventors of the present application have found that the hydrogen concentration is desirably 50% to 75%. When the hydrogen concentration was about 25%, there was almost no difference from the case of nitrogen alone. Even when hydrogen is added, the pressure during nitriding is preferably 1 Pa to 10 Pa, and the wafer temperature is preferably 400 ° C. or lower.

  Thereafter, a silicon electrode forming film 16 having a thickness of about 100 nm is deposited on the gate insulating film forming film 15 by CVD. The silicon electrode formation film 16 may be doped. Further, a hard mask forming film 17 made of a silicon oxide film is deposited. Subsequently, a resist mask 18 having a gate pattern is formed on the hard mask formation film 17 by lithography.

  Next, as shown in FIG. 2B, the hard mask formation film 17 to the base film 14 are sequentially patterned using, for example, a dry etchant mainly composed of chlorine gas. Thereby, the hard mask 17a, the silicon electrode 16a, the gate insulating film 15a, and the gate insulating film base film 14a are formed.

  Next, as shown in FIG. 2C, ion implantation is performed on the upper portion of the semiconductor substrate 11 using a hard mask 17 a to form extension regions 20. Subsequently, sidewalls 19 made of a silicon nitride film are formed on both side surfaces of the laminated body made up of the hard mask 17a, the silicon electrode 16a, the gate insulating film 15a, and the gate insulating film base film 14a. Next, ion implantation is performed again on the upper portion of the semiconductor substrate 11 using the sidewalls 19 and the hard masks 17a as masks to form source / drain regions 21. Subsequently, the ion-implanted impurities are electrically activated by a heat treatment at 1000 ° C. or higher.

  Next, after depositing metallic nickel (not shown) on the semiconductor substrate 11, heat treatment is performed at a temperature of 300 ° C. or higher. As a result, the metal silicide source / drain 22 is formed on the source / drain region 21. Since the silicon electrode 16a is covered with the hard mask 17a, it does not react with metallic nickel. Next, unreacted metallic nickel is removed with a mixed solution of sulfuric acid and hydrogen peroxide solution, and a heat treatment for controlling the crystal phase is performed.

  Next, as shown in FIG. 3A, an interlayer film 23 made of a silicon oxide film is deposited until the hard mask 17a is sufficiently covered. Next, the interlayer film 23 is polished using a chemical mechanical polishing (CMP) method so as not to reach the hard mask 17a, and then the interlayer film 23 and the hard mask 17a are etched back and removed by dry etching. The silicon electrode 16a is exposed.

  Next, as shown in FIG. 3B, metallic nickel is deposited on the semiconductor substrate 11, and then heat treatment is performed at a temperature of 300 ° C. or higher. As a result, the silicon electrode 16 a is silicided to form a full silicide gate electrode 24. Next, unreacted metallic nickel is removed with a mixed solution of sulfuric acid and hydrogen peroxide solution, and a heat treatment for controlling the crystal phase is performed.

  In the present embodiment, the gate insulating film forming film 15 is formed by laminating the first high dielectric film 31 having a high silicon composition and the second high dielectric film 32 having a low silicon composition, and then gate insulating. The film forming film 15 is nitrided. When nitriding an insulating film made of a metal oxide containing silicon such as hafnium silicate, the lower the silicon composition, the easier it is to nitride.

  FIG. 4 shows the nitrogen composition of the obtained hafnium silicate nitride obtained when ammonia-nitrided hafnium silicates having different silicon compositions. As shown in FIG. 4, the higher the hafnium composition of the original hafnium silicate, the higher the nitrogen composition of the obtained hafnium silicate. That is, a hafnium silicate having a higher hafnium composition and a lower silicon composition is more easily nitrided, resulting in a hafnium silicate having a higher nitrogen composition. This is the same both in the case of ammonia thermal nitriding and in the case of nitriding with plasma-excited nitrogen.

  Therefore, the second high dielectric film 32 having a high hafnium composition and a low silicon composition is easily nitrided, and the first high dielectric film 31 having a low hafnium composition and a high silicon composition is not easily nitrided. For this reason, the gate insulating film of the semiconductor device of this embodiment achieves a nitrogen concentration of 10 atomic% or more that prevents crystallization of the gate insulating film on the gate electrode side, while diffusing nitrogen to the substrate side. It becomes possible to suppress.

  In the present embodiment, nitriding is performed by plasma nitridation using nitrogen plasma instead of ammonia thermal nitridation. In plasma nitriding, nitriding can be performed under a temperature condition lower than that of ammonia thermal nitriding. For this reason, the diffusion of nitrogen to the substrate side can be suppressed as compared with the case where ammonia thermal nitriding is used.

  FIG. 5 shows the result of measuring the profile in the depth direction of nitrogen by secondary ion mass spectrometry (SIMS) for a hafnium silicate film formed by performing ammonia nitridation or plasma nitridation on a hafnium silicate film. Yes. After forming a hafnium silicate film having a thickness of 5 nm and a hafnium composition of 50% on the base film formed on the surface of the silicon substrate, heat treatment at 800 ° C. for 1 minute in an ammonia atmosphere, or 400 ° C. Plasma nitriding treatment was performed at a temperature for 80 seconds to form a hafnium nitride silicate film. As shown in FIG. 5, in the case of ammonia nitriding, the nitrogen concentration changes gently from the surface side. On the other hand, in the case of plasma nitriding, the nitrogen concentration in the vicinity of the surface is almost the same as in the case of performing ammonia thermal nitriding, but the nitrogen concentration is greatly decreased toward the substrate side, and the nitrogen concentration on the surface side is increased. However, it is clear that the diffusion of nitrogen to the substrate side is suppressed.

  On the other hand, in plasma nitriding, the amount of nitrogen introduced tends to be lower than in the case of ammonia thermal nitriding. FIG. 6 shows the relationship between the processing temperature when nitriding a hafnium silicate film having a thickness of 3 nm and the nitrogen composition of the obtained nitride film. As shown in FIG. 6, when the plasma nitriding treatment is performed at 400 ° C. for 40 seconds, compared with the case where the ammonia thermal nitriding is performed at 700 ° C. to 800 ° C. for 1 minute, The amount introduced is insufficient. However, in the case of plasma nitriding, since the processing temperature is as low as 400 ° C., the processing time can be extended. For example, when the treatment for 120 seconds is performed, the composition of nitrogen is about 10 atomic%, which is sufficient for preventing the gate insulating film from being crystallized.

  FIG. 7 shows a silicon oxide equivalent film thickness of a gate insulating film for a MOSFET in which a gate insulating film made of a hafnium nitride nitride film is formed by ammonia thermal nitriding and a MOSFET in which a gate insulating film made of a hafnium silicate nitride film is formed by plasma nitriding. And the leakage current density. The equivalent silicon oxide film thickness decreases as the amount of nitrogen introduced into the gate insulating film increases. Accordingly, in FIG. 7, in the case of ammonia thermal nitriding, the heat treatment temperature is higher as the silicon oxide film equivalent film thickness is smaller. In the case of plasma nitriding, the processing time is shorter as the silicon oxide film equivalent film thickness is smaller. Indicates that it is long. In order to simplify the comparison in FIG. 7, a hafnium silicate film obtained by nitriding a hafnium silicate film having a physical film thickness of 3 nm and a hafnium composition of 50% by each method is used as a gate insulating film.

  When the gate insulating film is formed by ammonia thermal nitridation, the leakage current density increases as the processing temperature increases, the amount of nitrogen introduced increases, and the equivalent silicon oxide film thickness decreases. This is considered due to the following reasons. When the metal silicate film is exposed to a reducing gas such as ammonia at a high temperature, the metal silicate film is reduced and loses oxygen. In the case of a film containing hydrogen and carbon such as an organic substance as impurities, such as a film formed by MOCVD, the impurities are reduced and defects are generated in the metal silicate film. When the defect site is not terminated by oxygen or the like, carrier conduction through dangling bonds occurs, which causes a leakage current to flow in the gate insulating film.

  On the other hand, in the case of plasma nitriding, the leakage current density is lowered as the processing time is increased and the equivalent silicon oxide film thickness is reduced. This indicates that in the case of plasma nitriding, the gate insulating film is not damaged even if the processing time is increased.

  FIG. 7 also shows the case where the gate electrode is a polysilicon gate. In this case, a silicon oxide film having a relative dielectric constant lower than that of the hafnium nitride silicate film is formed at the interface between the gate insulating film and the gate electrode. It is thick.

  FIG. 8 shows an example in which cross sections of the silicon substrate and the gate insulating film are observed with a transmission electron microscope. As shown in FIG. 8, the thickness of the gate insulating film base film 14a is thinner when the gate insulating film is formed by plasma nitriding than when the gate insulating film is formed by ammonia thermal nitriding. This is considered to be because, in the case of ammonia thermal nitriding, the silicon substrate was nitrided by nitrogen that reached the silicon substrate by diffusion. This also indicates that in the case of plasma nitriding, diffusion of nitrogen to the substrate can be suppressed.

  As described above, the semiconductor device and the manufacturing method thereof according to the present embodiment can introduce more nitrogen at a low temperature and can suppress the diffusion of nitrogen into the silicon substrate. Further, since it is not exposed to a strong reducing atmosphere at a high temperature, the metal oxide film is not easily reduced, and the leakage current does not increase. Further, by combining the nitridation of the metal oxide film and the full silicide reaction, the equivalent film thickness of the silicon oxide film can be reduced, so that the physical film thickness can be increased and the leakage current can be further reduced.

  In the present embodiment, an example in which the gate insulating film is composed of two high dielectric films is shown, but three or more high dielectric films may be laminated. Further, although the high dielectric film is formed by nitriding hafnium silicate, nitrogen may be introduced into at least one nitride of zirconium, titanium, tantalum, aluminum, lanthanum, and rare earth elements.

  According to the semiconductor device and the manufacturing method thereof according to the present invention, it is possible to realize a MOS type semiconductor device having a thin silicon oxide equivalent film thickness and excellent electrical characteristics such as leakage current density, and gate insulation made of a high dielectric material. This is useful as a semiconductor device having a film and a gate electrode made of a metal silicide film, and a method for manufacturing the same.

It is sectional drawing which shows the semiconductor device which concerns on one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention to process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention to process order. 5 is a graph showing a correlation between a nitrogen composition and a hafnium composition of a gate insulating film in a method for manufacturing a semiconductor device according to an embodiment of the present invention. 4 is a graph showing a comparison of depth-wise nitrogen profiles of a hafnium nitride silicate film formed by plasma nitriding and a hafnium silicate film formed by ammonia nitriding. 6 is a graph illustrating a method for improving the nitrogen composition when plasma nitriding is used in the method for manufacturing a semiconductor device according to an embodiment of the present invention. It is a graph which shows the correlation with the silicon oxide film equivalent film thickness of a gate insulating film, and a leakage current density in the semiconductor device which concerns on one Embodiment of this invention. 4 is an electron micrograph showing a comparison between the thickness of a gate insulating film base film of a semiconductor device according to an embodiment of the present invention and the thickness of a gate insulating film base film of a semiconductor device formed by a conventional ammonia thermal nitriding method. .

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Semiconductor substrate 12 Element isolation film 13 Element formation area 14 Base film 14a Gate insulation film base film 15 Gate insulation film formation film 15a Gate insulation film 16 Silicon electrode formation film 16a Silicon electrode 17 Hard mask formation film 17a Hard mask 18 Resist mask 19 Sidewall 20 Extension region 21 Source / drain region 22 Metal silicide source / drain 23 Interlayer film 24 Full silicide gate electrode 31 First high dielectric film 32 Second high dielectric film

Claims (12)

A semiconductor substrate;
A gate insulating film formed on the semiconductor substrate, wherein at least one layer contains nitrogen and a plurality of high dielectric films having different dielectric constants are laminated;
A full silicide gate electrode formed on the gate insulating film,
2. The semiconductor device according to claim 1, wherein the high dielectric film on the gate electrode side of the plurality of high dielectric films has a higher nitrogen composition than the high dielectric film on the substrate side.   2. The semiconductor device according to claim 1, wherein a high dielectric film on the gate electrode side among the plurality of high dielectric films has a higher dielectric constant than a high dielectric film on the substrate side.   3. The semiconductor device according to claim 1, wherein the high-dielectric film closest to the gate electrode among the plurality of high-dielectric films contains 10 atomic percent or more of nitrogen.   4. The semiconductor device according to claim 1, wherein the full silicide gate electrode includes at least one of titanium, cobalt, nickel, platinum, yttrium, and a transition metal. 5.   5. Each of the high dielectric films includes at least one of hafnium, zirconium, titanium, tantalum, aluminum, lanthanum, and rare earth elements, and silicon and nitrogen. A semiconductor device according to 1.   6. The semiconductor device according to claim 5, wherein the high dielectric film on the gate electrode side among the plurality of high dielectric films has a lower silicon composition than the high dielectric film on the substrate side. A step (a) of forming a gate insulating film by sequentially laminating a plurality of high dielectric films having at least one layer containing nitrogen and having different dielectric constants on a semiconductor substrate;
And (b) forming a full silicide gate electrode on the gate insulating film,
In the step (a), the nitrogen composition of the high dielectric film on the gate electrode side among the plurality of high dielectric films is higher than the nitrogen composition of the high dielectric film on the substrate side. A method for manufacturing a semiconductor device. The step (a)
Sequentially depositing a plurality of metal silicate films having different silicon compositions on the semiconductor substrate (a1);
A step (a2) of introducing nitrogen into the metal silicate film on the gate electrode side among the plurality of metal silicate films so as to have a higher concentration than the metal silicate film on the semiconductor substrate side,
The silicon composition of the metal silicate film on the gate electrode side among the plurality of metal silicate films in the step (a1) is lower than the silicon composition of the metal silicate film on the substrate side. Item 8. A method for manufacturing a semiconductor device according to Item 7.   9. The method of manufacturing a semiconductor device according to claim 8, wherein in the step (a2), the introduction of nitrogen is performed using a nitriding species excited by plasma or ultraviolet light.   The method for manufacturing a semiconductor device according to claim 9, wherein in the step (a2), the introduction of nitrogen is performed at a temperature of 400 ° C. or lower.   11. The method for manufacturing a semiconductor device according to claim 9, wherein in the step (a2), the introduction of nitrogen is performed in an atmosphere containing hydrogen. 12. The method according to claim 7, wherein in the step (a), each of the high dielectric films is formed by using a chemical vapor deposition method, an atomic layer deposition method, or a physical deposition method. The manufacturing method of the semiconductor device as described in any one of Claims 1-3.