Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
  • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
  • G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
  • G11B27/24—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by sensing features on the record carrier other than the transducing track ; sensing signals or marks recorded by another method than the main recording
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
  • G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
  • G11B7/005—Reproducing
  • G11B7/0053—Reproducing non-user data, e.g. wobbled address, prepits, BCA
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B2220/00—Record carriers by type
  • G11B2220/20—Disc-shaped record carriers
  • G11B2220/21—Disc-shaped record carriers characterised in that the disc is of read-only, rewritable, or recordable type
  • G11B2220/215—Recordable discs
  • G11B2220/216—Rewritable discs
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B2220/00—Record carriers by type
  • G11B2220/20—Disc-shaped record carriers
  • G11B2220/25—Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
  • G11B2220/2537—Optical discs
  • G11B2220/2562—DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
  • G11B7/24—Record carriers characterised by shape, structure or physical properties, or by the selection of the material
  • G11B7/2407—Tracks or pits; Shape, structure or physical properties thereof
  • G11B7/24073—Tracks
  • G11B7/24082—Meandering

Definitions

• the present invention relates to a write clock generation circuit that generates a write clock from a wobble signal based on the meandering of a track formed on a medium, and an optical disk apparatus including the write clock generation circuit.
• An information recording and reproducing apparatus (optical disc apparatus) has been put to practical use that records information on an optical disc or reproduces information recorded on an optical disc by using a laser beam output from an optical pickup.
• PCs personal computers
• AV audio-visual
• Such a wobble signal must always be detected regardless of the playback / recording operation, but the data recorded on the media and the laser modulation component for recording become noise, and there is a problem that the wobble quality is degraded. . That is, although the wobble signal is included in the reflected light of the track force, the reflected light is a noise relative to the wobble signal due to the recorded data recorded on the optical disk or the output fluctuation of the laser light. Minutes are included in complexity. Therefore, for such a wobble signal, generally, for example, the reflected light from the track is received by divided light receiving elements divided into two with respect to the track tangential direction, and the difference between output signals (photoelectric conversion signals) of each divided light receiving element is calculated. To remove the noise component and extract the wobble signal.
• the divisional light receiving element is adjusted so that the reflected light from the track is positioned at the center of the light receiving surface of the divisional light receiving element before shipping, aging over time due to temperature change or vibration during operation.
• the light receiving position of the reflected light may be shifted to the center of the light receiving surface due to a change or the like.
• the noise components included in the output signal of each light receiving element are different, there is a problem that the noise component remains even if the difference in the output signal between the light receiving elements is obtained.
• the amplitude of the signal is set for each of the output signals of the divided light receiving elements divided in the track tangential direction.
• a method of detecting a wobble signal in which data signal components are clearly removed by performing so-called constant amplitude AG C (automatic gain control) to be normalized and generating a wobble signal by the difference is disclosed.
• a system which does not use the constant amplitude AGC circuit is also provided. ing.
• the present invention can detect a wobble signal with high precision even when switching from a reproduction operation to a recording operation, and can generate a write clock with a low jitter and an appropriate optical clock.
• the purpose is to do the equipment.
• the present invention provides a write clock generation circuit capable of reducing the circuit scale to achieve the above object.
• the present invention surpasses a clock generation circuit which is not influenced by the recording state (unrecorded / recorded) of the medium in order to achieve the above object.
• the present invention provides a write clock generation circuit that can reliably prevent a pullback of a PL L circuit and can generate a good write clock with low jitter and small jitter when realizing the above object.
• a write clock generation circuit that generates a write clock from a wobble signal based on the meandering of a track formed on a medium is generated, and at least a dividing line in the track tangential direction is used.
• Two variable gain amplifiers that amplify the output signal of each of the divided light receiving elements divided into two according to the determined gain, and the gain of the variable gain amplifier is stepped during a fixed period immediately after the start of recording.
• a subtractor for obtaining a wobble signal by calculating an output difference between the two variable gain amplifiers, and a subtracter for outputting the subtracter.
• a constant-amplitude AGC circuit whose gain is automatically adjusted so that the amplitude of the wobble signal is held constant, and an output from the constant-amplitude AGC circuit It comprises a binarization circuit for obtaining a binary Woburu signal and digitizes the signals, and P L L circuit that generates a write clock based on the binary Woburu signal output from the binarizing circuit.
• the write clock is generated from the wobble signal obtained by stepwise changing by the gain control circuit of the variable gain amplifier at the rear stage of the divided light receiving element during a fixed period immediately after the start of recording,
• the variation of the wobble signal immediately after the start of recording is suppressed, and the gain fluctuation of the wobble signal amplitude is constant. Therefore, even when switching between playback and recording, it is possible to suppress the high-frequency fluctuation of the wobble frequency and generate a write clock with less jitter, and to gradually change the gain of the variable gain amplifier. After the final change, the proper signal recovery can be maintained during recording, so stable write clock generation can be performed.
• a write clock generation circuit that generates a write clock from a wobble signal based on the meandering of a track formed on a medium, split light reception divided into at least two division lines in the track tangential direction.
• a subtractor that obtains a wobble signal by computing the difference between the output signals of each of the elements, a variable gain amplifier that amplifies the wobble signal output from the subtractor in accordance with the determined gain, and immediately after the start of recording
• the gain control circuit determines the gain of the variable gain amplifier by changing the gain of the variable gain amplifier stepwise in a fixed period, and the amplitude of the wobble signal output from the variable gain amplifier is made constant. Let it hold
• a constant-amplitude AGC circuit whose gain is automatically adjusted, a binarization circuit which obtains a binary enable signal by digitizing a signal output from the constant-amplitude AGC circuit, and this binarization circuit And a PLL circuit that generates a write clock based on the output binarized wobble signal.
• the write clock is generated from the wobble signal obtained by stepwise changing the gain of the variable gain amplifier after the subtracter by the gain control circuit.
• the circuit scale is smaller than that of the above embodiment, the same action and effect can be obtained.
• the gain control circuit is configured to, during a predetermined period immediately after the start of recording, reproduce the gain of the variable gain amplifier. After making it smaller than the gain level, it is made variable up to the gain level at the time of reproduction.
• the wobble signal input to the variable gain amplifier is large immediately after the start of recording, by setting the gain smaller than the gain level at the time of reproduction, it is possible to obtain a wobble signal similar to that during the reproduction operation. While the gain component of the variable gain amplifier is large because the noise component is also large during recording operation after steady state. Therefore, by gradually increasing the gain to the gain level at the time of reproduction, a wobble signal can be reliably obtained, and an appropriate write clock can be generated.
• the constant swing amplitude AGC circuit follows the stepwise change of the gain of the variable gain amplifier, and the write clock generation operation can be properly performed.
• the gain controller may be configured to receive the amplitude of the wobble signal immediately before the start of recording and the wobble immediately after the start of recording.
• the gain of the variable gain amplifier before the start of recording is switched according to whether the position immediately before the recording start position is the unrecorded area or the recorded area so that the amplitude of the signal becomes equal.
• the gain of the variable gain amplifier before the start of recording is switched according to whether the area immediately before the recording start position is the unrecorded area or the force recording area, and the amplitude of the wobble signal immediately before the start of recording and the wobble signal immediately after the start of recording. Therefore, regardless of the recording status of the media (unrecorded or already recorded), the change in wobble signal from immediately before recording to immediately after the start of recording is suppressed, and the wobble signal amplitude is fixed.
• the gain fluctuation of AGC can be reduced, so that the high frequency band wobble can be suppressed even when switching the reproduction Z recording, and a write clock with less jitter can be generated.
• the loop gain of the PLL circuit is increased by increasing the nolap gain of the PLL circuit during a fixed period immediately after the start of recording. It has a PLL gain controller circuit that determines the
• the loop gain of the PLL circuit is increased during a fixed period immediately after the start of self-recording, the pull-in capability of the PLL circuit is increased only when the wobble signal change is expected to be large.
• the stable signal stage is stable Can produce a good write clock with small jitter.
• the PLL gain control circuit makes the loop gain of the PLL circuit high during a predetermined period immediately after the start of recording. Set, then change to lower gain.
• the PL L gain control circuit changes the loop gain of the PL L circuit stepwise from high gain to low gain.
• the binarized wobble signal is converted to a high frequency band due to the change in quality and amplitude of the wobble signal when switching from reproduction to recording. Even if a frequency fluctuation occurs, the lock signal of the wobble signal can be reliably prevented, and a good write clock with small jitter can be generated by switching to a low gain step by step toward the stabilization of the wobble signal. it can.
• an optical disk apparatus comprises: a rotational drive mechanism for rotating a medium having a track serpentinely formed on a recording surface; a split light receiving element divided into two by at least a split line in the track tangential direction; An optical pickup having a laser light source for irradiating the medium with a laser beam, a light source drive circuit for controlling a light emitting operation of the light source, and a signal output from the divided light receiving element to be received.
• the write clock generation circuit according to any one of the above aspects, which outputs a write response to the side.
• FIG. 1 is a schematic block diagram showing a configuration of an optical disc apparatus according to a first embodiment of the present invention.
• FIG. 2 is an explanatory diagram of the media, the split light receiving element, and the like.
• F I G. 3 is a block diagram showing a write clock generation circuit.
• F I G. 4 is a waveform diagram showing a steady state signal waveform.
• F I G. 5 is a waveform diagram showing a signal waveform when the VGA gain is fixed.
• F.I.G. 6 is a waveform diagram showing signal waveforms when the VGA gain is changed stepwise.
• F I G. 7 is a block diagram of a write clock generation circuit showing a second embodiment of the present invention.
• F.G. 8 is a waveform diagram showing signal waveforms in each recording state showing the third embodiment of the present invention.
• F I G. 9 is a block diagram of a PL L circuit showing a fourth embodiment of the present invention.
• a first embodiment of the present invention will be described based on FI G. 1 to FI G. 6.
• a spindle motor 2 which constitutes a main part of a rotary drive mechanism for rotating a recordable medium 1 such as CD-R / RW, DVD-R / RW.
• an optical pickup 3 is provided which irradiates a spot of laser light from a laser light source (not shown) to the rotationally driven medium 1 and detects reflected light from the medium 1 by a divided light receiving element described later. It is done.
• a reproduction circuit 4 for filtering and digitizing the detected reproduction signal
• a decoder 5 for converting the data format of the user data component generated by the reproduction circuit 4 in this order.
• the information to be recorded is transferred from the external host to the encoder 7 through the CPU 6, the data format is converted by the encoder 7, and the laser control circuit 8 which is a light source drive circuit responds to the information bit. It is configured to write on the media 1 by controlling the light emission of the laser light source.
• an arithmetic circuit 9 for generating a servo signal based on an output signal obtained from the divided light receiving element in the optical pickup 3 is provided, and this servo signal is output to the servo circuit 10 to obtain an objective lens of the optical pickup 3 It is configured to perform position control (not shown).
• the servo circuit 10 also controls the rotation of the spindle motor 2 based on the write clock signal obtained from the PL circuit 11.
• a wobble detection circuit 12 is provided which receives the divided light receiving element output calculated by the calculation circuit 9 and extracts a wobble signal.
• the wobble signal output from the wobble detection circuit 1 2 is input to the PL L circuit 1 1, and a write clock signal is generated based on the wobble signal.
• the write clock generation circuit of the present invention is configured by the PL L circuit 11 and the wobble detection circuit 12.
• a wobble signal including physical address information is sent to the address detection circuit 13, converted into address information by the address decoder 14, and configured to reproduce address information of an access position.
• FIG. 2 (a) meandering tracks are spirally or concentrically incised on the medium 1.
• the split light receiving element 15 is divided into two parts by a dividing line 16 corresponding to the track tangential direction with respect to the reflection signal from the spot 3 irradiated on the medium 1 in a column shown in FIG. 2 (b).
• the light receiving areas A and B are formed.
• FIG. 2 (c) an example of detection from the difference (A-B) of the received light amount of each light receiving area A and B of the divided light receiving element 15 is cited.
• the split light receiving element on the optical pickup 3 is not limited to the two split structure, but may be a multiple split structure such as a four split structure. 2585
• the write clock generation circuit 21 is composed of the wobble detection circuit 12 and the PLL circuit 11.
• the wobble detection circuit 12 first, output signals from the light reception areas A and B of the divided light reception elements 15 in the optical pickup 3 pass through the arithmetic circuit 9 are input to two variable gain amplifiers VGA 2 2 a and 2 2 b is provided.
• VGA 2 2 a and 2 2 b are capable of amplifying or attenuating the output signal from each of the light receiving areas A and B with a desired gain, and a VGA gain control circuit 23 for variably setting the gain is provided.
• the VGA gain control circuit 23 is good even if it has a function capable of automatically processing according to the operation state of the apparatus (such as recording Z reproduction), but in the present embodiment, the instruction of the CPU 6 power etc.
• the gain can be changed based on Further, a subtractor 24 for outputting a wobble signal by calculating the difference between both output signals is connected to the output side of these variable gain amplifiers VGA 2 2a and 2 2b.
• a filter circuit 25 is connected to the subsequent stage of the subtractor 24.
• This filter circuit 25 includes noise components other than the original wobble signal component, such as leakage of data signals on the media 1 and DC offset due to positional deviation of the optical pickup 3, and extracts only necessary frequency components. It is to do.
• the wobble signal frequency-separated by the filter circuit 25 is a wobble (WB L) constant amplitude AG C (automatic gain control) circuit that adjusts and controls the amplitude of the wobble signal to a constant value so that the amplitude is sufficient for binarization.
• WB L wobble
• AG C automatic gain control
• AGC circuit 26 is connected a binarization circuit 27 for digitizing the wobble signal into a binarized wobble signal.
• the PLL circuit 11 generates a write clock based on the binarized double signal obtained from the binarization circuit 27.
• the filter circuit 25 may be disposed after the WB L constant amplitude AGC circuit 26.
• a signal waveform in a steady state (not at the time of switching between reproduction and recording but at a stable state after switching) will be described with reference to FIG.
• the DC level of the output signal of the split light receiving element 15 in the unrecorded and reproduced steady state is small because the laser power is small.
• the DC component is removed and the wobble component is extracted.
• the WB L fixed amplitude AGC circuit is made to obtain the target wobble signal amplitude necessary for binary data or for address detection (in accordance with the format, address is superimposed on the wobble signal). Amplified from (dotted line state to solid line state). The AGC gain at this time is large.
• the gain of the WB L constant amplitude AGC circuit 26 is small when control is performed to amplify from the dotted state to the solid state (target amplitude).
• jitter swing in the time axis direction
• a shift for example, hysteresis
• a constant period immediately after the start of recording at the time of operation switching from reproduction to recording is set by the VGA gain control one-nore circuit 23 of the variable gain amplifiers VGA 22 a and 22 b.
• the gain is changed stepwise.
• An example of operation when the gain of the gain amplifiers VGA22 a and 22 b is gradually changed immediately after the start of recording is shown in F I G.6.
• the wobble signal is input to the WB L amplitude constant AGC circuit 26. 2585
• the gain amplifiers VGA 2 2 a and 2 2 b should preferably have a large gain at the stage when the recording steady state is entered.
• the gains of VGA 2 2 a and 2 2 b are gradually increased. In this case, the gain step and the time interval are set so that the subsequent WB L amplitude constant AGC circuit 26 can sufficiently follow and not make a large output change.
• the fixed period immediately after the start of recording can be obtained by stepwise changing the gain of the variable gain amplifiers VGA 2 2a and 2 2b by the VGA gain control circuit 23. Since the write clock is generated using the wobble signal, the change of the wobble signal from immediately before the recording start to immediately after the recording start is suppressed, and the gain fluctuation of the WB L amplitude constant AGC circuit 26 is relaxed. Therefore, even when switching the playback Z recording, it is possible to suppress the high-frequency fluctuation of the wobble frequency and generate a write clock with less jitter.
• the WB L amplitude—constant AGC circuit 26 reliably follows the stepwise change of the gains of the variable gain amplifiers VGA 2 2 a and 2 2 b, the write clock generation operation can be properly performed. it can. Furthermore, no special switching function etc. are required for the WB L amplitude constant AG C circuit 26 which requires delicate characteristics, and there is no restriction due to external parts etc.
• the generation circuit can also be manufactured by incorporating it in an LSI.
• a second embodiment of the present invention will be described based on FIG.
• the same parts as the parts shown in the first embodiment are indicated by the same reference numerals, and the description will be omitted.
• the order of the variable gain amplifier and the subtractor is reversed, and after the difference between the output signals from the divided light receiving element 15 is calculated by the subtractor 24 to form a wobble signal,
• the wobble signal is input to the variable gain amplifier VGA 2 2 and amplified or attenuated according to the gain.
• the recording start is started by switching the gain of the variable gain amplifier VGA 22 a, 22 b (or 22) before the recording start depending on whether the recording start position immediately before the recording start position is the unrecorded area or the recorded area.
• the amplitude of the previous wobble signal is made equal to the amplitude of the wobble signal immediately after the start of recording.
• variable gain amplifier VGA 22 a depending on whether the area immediately before the start of recording is unrecorded or recorded.
• 22 b or 22 gain needs to be changed.
• the setting of the VGA gain control circuit 23 may be switched by the CPU 6 or the like according to the information.
• the WBL constant amplitude AGC circuit It is possible to moderate the gain fluctuation of 26. Therefore, it is possible to generate a light clock with less jitter by suppressing high-frequency fluctuation of the wobble frequency even when switching between reproduction and recording.
• the present embodiment relates particularly to the configuration of the write clock generation circuit 21 and the configuration of the PL L circuit 11.
• the PLL circuit 11 is basically configured as a loop circuit including a PD (phase comparator) 31, a filter 32, a VCO controlled oscillator) 33, and a 1 / n divider 34, as is well known.
• a plurality of filters having different characteristics for example, two filters 32a and 32b, are prepared and configured to be switchable by the PL roll circuit 35.
• the steady-state PLL characteristics should be able to follow the low frequency fluctuation generated by the rotation of media 1, and the loop gain is designed to be relatively small, with a focus on reducing the jitter of the write clock.
• the quality and amplitude of the wobble signal change as described above, so high-frequency fluctuations occur in the binary wobble signal obtained by the binarization circuit 27. If the loop gain is as it is, the PLL circuit 11 is likely to be unlocked. Therefore, in the present embodiment, as described above, the loop gain switching function is added by providing the PLL gain controller 35.
• the output signal of VCO (Voltage Control Oscillator) 33 is the write clock, but n division by the i Zn divider 34 of the write clock (n: division ratio with the same frequency as the wobble signal) signal PD (phase comparator) 31 compares the phase with the binary table signal from the binarization circuit 2 7.
• the comparison result is supplied to a plurality of types of filters 32a and 32b with different characteristics, and the output is used as an input signal to determine the oscillation frequency of V C O 33.
• a plurality of filters 32 a and 32 b are switched by PL L gain control circuit 35, or the ON / OFF control of F and L changes the loop gain of PL L circuit 1 1.
• the loop gain is temporarily set to high immediately after the start of recording, and switched to the low reap gain when the fluctuation of the wobble signal is settled.
• a plurality of PLL gains may be prepared, and the loop gain may be gradually reduced immediately after the start of recording as in the case of the variable gain amplifiers VGA 2 2a and 2 2b.
• ⁇ / a gain of PLL circuit 11 is increased during a fixed period immediately after the start of recording, it is expected that the change of the wobble signal is large.
• the pull-in capability of the PLL circuit 11 is increased only during the delay period to prevent the noise, and when the wobble signal is stable, the jitter is small and a good write clock can be generated.
• the wobble signal obtained by changing the gain of the variable gain amplifier in the subsequent stage of the divided light receiving element stepwise by the gain control circuit during a fixed period immediately after the start of recording.
• the change in gain of the constant wobble signal amplitude AGC can be made gentle, so that switching between playback and recording is possible.
• the wobble signal obtained by stepwise changing the gain of the variable gain amplifier at the rear stage of the subtractor by the gain control circuit during a fixed period immediately after the start of recording. Since the write clock is generated more, the same effect can be obtained although the circuit scale is smaller than the above invention.
• the write clock generation circuit since the write clock generation circuit is used, recording failure due to unlocking of the PLL circuit does not occur, and the recording quality at the start of recording is improved. It is possible to provide an optical disk device without deterioration.

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• Optical Recording Or Reproduction (AREA)
• Signal Processing For Digital Recording And Reproducing (AREA)

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• 2002
  • 2002-03-05 JP JP2002058517A patent/JP4079658B2/ja not_active Expired - Fee Related
• 2003
  • 2003-03-05 WO PCT/JP2003/002585 patent/WO2003075264A1/ja not_active Ceased
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