WO2003009365A1 - Procede de fabrication d'une plaquette en silicium, d'une plaquette epitaxiale en silicium, et plaquette epitaxiale en silicium - Google Patents

Procede de fabrication d'une plaquette en silicium, d'une plaquette epitaxiale en silicium, et plaquette epitaxiale en silicium Download PDF

Info

Publication number
WO2003009365A1
WO2003009365A1 PCT/JP2002/005000 JP0205000W WO03009365A1 WO 2003009365 A1 WO2003009365 A1 WO 2003009365A1 JP 0205000 W JP0205000 W JP 0205000W WO 03009365 A1 WO03009365 A1 WO 03009365A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon
wafer manufacturing
epitaxial wafer
silicon epitaxial
silicon wafer
Prior art date
Application number
PCT/JP2002/005000
Other languages
English (en)
French (fr)
Inventor
Hiroshi Takeno
Original Assignee
Shin-Etsu Handotai Co.,Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co.,Ltd. filed Critical Shin-Etsu Handotai Co.,Ltd.
Priority to EP02726467A priority Critical patent/EP1406294A4/en
Priority to KR1020037001055A priority patent/KR100881511B1/ko
Priority to JP2003514610A priority patent/JP4473571B2/ja
Priority to US10/482,843 priority patent/US7033962B2/en
Publication of WO2003009365A1 publication Critical patent/WO2003009365A1/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
PCT/JP2002/005000 2001-07-10 2002-05-23 Procede de fabrication d'une plaquette en silicium, d'une plaquette epitaxiale en silicium, et plaquette epitaxiale en silicium WO2003009365A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP02726467A EP1406294A4 (en) 2001-07-10 2002-05-23 PROCESS FOR PRODUCING SILICON WAFER, EPITAXIAL SILICON WAFER, AND EPITAXIAL SILICON WAFER
KR1020037001055A KR100881511B1 (ko) 2001-07-10 2002-05-23 실리콘웨이퍼의 제조방법, 실리콘 에피텍셜 웨이퍼의제조방법 및 실리콘 에피텍셜 웨이퍼
JP2003514610A JP4473571B2 (ja) 2001-07-10 2002-05-23 シリコンウェーハの製造方法
US10/482,843 US7033962B2 (en) 2001-07-10 2002-05-30 Methods for manufacturing silicon wafer and silicone epitaxial wafer, and silicon epitaxial wafer

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP2001209160 2001-07-10
JP2001-209160 2001-07-10
JP2001296745 2001-09-27
JP2001296743 2001-09-27
JP2001-296744 2001-09-27
JP2001296744 2001-09-27
JP2001-296745 2001-09-27
JP2001-296743 2001-09-27

Publications (1)

Publication Number Publication Date
WO2003009365A1 true WO2003009365A1 (fr) 2003-01-30

Family

ID=27482417

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/005000 WO2003009365A1 (fr) 2001-07-10 2002-05-23 Procede de fabrication d'une plaquette en silicium, d'une plaquette epitaxiale en silicium, et plaquette epitaxiale en silicium

Country Status (6)

Country Link
US (2) US7033962B2 (ja)
EP (4) EP1983562A2 (ja)
JP (1) JP4473571B2 (ja)
KR (1) KR100881511B1 (ja)
TW (1) TWI245084B (ja)
WO (1) WO2003009365A1 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005051040A (ja) * 2003-07-29 2005-02-24 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び半導体基板
JP2005286282A (ja) * 2004-03-01 2005-10-13 Sumco Corp Simox基板の製造方法及び該方法により得られるsimox基板
WO2008038786A1 (fr) * 2006-09-29 2008-04-03 Sumco Techxiv Corporation Procédé de traitement thermique de plaquettes en silicium
JP2010064953A (ja) * 2008-09-10 2010-03-25 Siltronic Ag 単結晶シリコンからなる半導体ウェハ及びその製造方法
JP2012039117A (ja) * 2010-08-11 2012-02-23 Siltronic Ag シリコンウェハおよびシリコンウェハの製造方法
KR20170013984A (ko) 2014-07-09 2017-02-07 가부시키가이샤 사무코 에피택셜 실리콘 웨이퍼 및 그 제조 방법

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7151975B2 (en) * 2004-02-09 2006-12-19 Macronix International Co., Ltd. System and method for monitoring wafer furnace production efficiency
JP5032986B2 (ja) * 2004-06-24 2012-09-26 ベネク・オサケユキテュア 材料にドーピングするための方法およびドーピングされた材料
JP4868880B2 (ja) * 2006-02-15 2012-02-01 富士通株式会社 シリコンウェーハの処理方法及びウェーハ処理装置
US8987115B2 (en) * 2008-08-21 2015-03-24 Alliance For Sustainable Energy, Llc Epitaxial growth of silicon for layer transfer
US8890291B2 (en) * 2009-03-25 2014-11-18 Sumco Corporation Silicon wafer and manufacturing method thereof
US8357939B2 (en) 2009-12-29 2013-01-22 Siltronic Ag Silicon wafer and production method therefor
WO2015003022A1 (en) * 2013-07-01 2015-01-08 Solexel, Inc. High-throughput thermal processing methods for producing high-efficiency crystalline silicon solar cells
US10249493B2 (en) 2015-12-30 2019-04-02 Siltronic Ag Method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber
DK3229262T3 (en) 2016-04-05 2018-12-03 Siltronic Ag PROCEDURE FOR STEAM PHASE Etching of a Semiconductor Wafer for Trace Metal Analysis

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821829A (ja) * 1981-07-31 1983-02-08 Fujitsu Ltd 半導体装置の製造方法
JPS5887833A (ja) * 1981-11-20 1983-05-25 Hitachi Ltd 半導体装置の製造方法
EP0090320A1 (en) * 1982-03-26 1983-10-05 International Business Machines Corporation A method for tailoring oxygen precipitate particle density and distribution in silicon
JPH03185831A (ja) * 1989-12-15 1991-08-13 Komatsu Denshi Kinzoku Kk 半導体装置の製造方法
JPH04276628A (ja) * 1991-03-05 1992-10-01 Olympus Optical Co Ltd 半導体装置の製造方法
JPH05308076A (ja) * 1992-03-03 1993-11-19 Fujitsu Ltd シリコンウエーハの酸素析出方法
JPH0845946A (ja) * 1994-08-01 1996-02-16 Hitachi Ltd シリコン半導体単結晶基板の熱処理方法及び熱処理装置、半導体装置
JPH0897220A (ja) * 1994-09-26 1996-04-12 Toshiba Ceramics Co Ltd シリコンエピタキシャルウェーハの製造方法及びシリコンエピタキシャルウェーハ
JPH11297704A (ja) * 1998-04-14 1999-10-29 Sumitomo Metal Ind Ltd 酸素析出物密度の評価方法
US6200872B1 (en) * 1997-09-30 2001-03-13 Fujitsu Limited Semiconductor substrate processing method
JP2001151597A (ja) * 1999-11-26 2001-06-05 Mitsubishi Materials Silicon Corp 点欠陥の凝集体が存在しないシリコンウェーハの製造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4229857A (en) * 1978-02-27 1980-10-28 Toder Ellis I Dual wheel carrier for use in conjunction with curtain track
DE3177017D1 (en) * 1981-12-31 1989-04-27 Ibm Method for reducing oxygen precipitation in silicon wafers
EP0098406A1 (en) * 1982-07-06 1984-01-18 Texas Instruments Incorporated Ramped nucleation of solid state phase changes
DK198490D0 (da) * 1990-08-21 1990-08-21 Novo Nordisk As Heterocykliske forbindelser, deres fremstilling og anvendelse
US5286658A (en) * 1991-03-05 1994-02-15 Fujitsu Limited Process for producing semiconductor device
CA2064486C (en) * 1992-03-31 2001-08-21 Alain Comeau Method of preparing semiconductor wafer with good intrinsic gettering
EP0702221A3 (en) * 1994-09-14 1997-05-21 Delco Electronics Corp Sensor integrated on a chip
US5611855A (en) * 1995-01-31 1997-03-18 Seh America, Inc. Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
US5593494A (en) * 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
TW331017B (en) * 1996-02-15 1998-05-01 Toshiba Co Ltd Manufacturing and checking method of semiconductor substrate
KR100296365B1 (ko) * 1996-06-28 2001-11-30 고지마 마타오 실리콘단결정웨이퍼의열처리방법과그열처리장치및실리콘단결정웨이퍼와그제조방법
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
TW429478B (en) * 1997-08-29 2001-04-11 Toshiba Corp Semiconductor device and method for manufacturing the same
JP3460551B2 (ja) 1997-11-11 2003-10-27 信越半導体株式会社 結晶欠陥の少ないシリコン単結晶ウエーハ及びその製造方法
JP3747123B2 (ja) 1997-11-21 2006-02-22 信越半導体株式会社 結晶欠陥の少ないシリコン単結晶の製造方法及びシリコン単結晶ウエーハ
KR100581305B1 (ko) * 1998-09-02 2006-05-22 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 저결함 밀도 단결정 실리콘으로부터의 soi 구조체
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
KR100701341B1 (ko) * 1999-03-16 2007-03-29 신에쯔 한도타이 가부시키가이샤 실리콘 웨이퍼의 제조방법 및 실리콘 웨이퍼
EP1229155A4 (en) * 2000-04-14 2009-04-29 Shinetsu Handotai Kk SILICON WAFER, EPITAXIAL SILICON WAFER, ANNEALING WAFER, AND METHOD OF PRODUCING SAME

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821829A (ja) * 1981-07-31 1983-02-08 Fujitsu Ltd 半導体装置の製造方法
JPS5887833A (ja) * 1981-11-20 1983-05-25 Hitachi Ltd 半導体装置の製造方法
EP0090320A1 (en) * 1982-03-26 1983-10-05 International Business Machines Corporation A method for tailoring oxygen precipitate particle density and distribution in silicon
JPH03185831A (ja) * 1989-12-15 1991-08-13 Komatsu Denshi Kinzoku Kk 半導体装置の製造方法
JPH04276628A (ja) * 1991-03-05 1992-10-01 Olympus Optical Co Ltd 半導体装置の製造方法
JPH05308076A (ja) * 1992-03-03 1993-11-19 Fujitsu Ltd シリコンウエーハの酸素析出方法
JPH0845946A (ja) * 1994-08-01 1996-02-16 Hitachi Ltd シリコン半導体単結晶基板の熱処理方法及び熱処理装置、半導体装置
JPH0897220A (ja) * 1994-09-26 1996-04-12 Toshiba Ceramics Co Ltd シリコンエピタキシャルウェーハの製造方法及びシリコンエピタキシャルウェーハ
US6200872B1 (en) * 1997-09-30 2001-03-13 Fujitsu Limited Semiconductor substrate processing method
JPH11297704A (ja) * 1998-04-14 1999-10-29 Sumitomo Metal Ind Ltd 酸素析出物密度の評価方法
JP2001151597A (ja) * 1999-11-26 2001-06-05 Mitsubishi Materials Silicon Corp 点欠陥の凝集体が存在しないシリコンウェーハの製造方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
AKATSUKA MASANORI ET AL.: "Effect of oxide precipitate size on slip generation in large diameter epitaxial wafers", JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 37, no. 9A, September 1998 (1998-09-01), pages 4663 - 4666, XP002956610 *
See also references of EP1406294A4 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005051040A (ja) * 2003-07-29 2005-02-24 Matsushita Electric Ind Co Ltd 半導体装置の製造方法及び半導体基板
US7144829B2 (en) * 2003-07-29 2006-12-05 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor device and semiconductor substrate
CN100369220C (zh) * 2003-07-29 2008-02-13 松下电器产业株式会社 半导体装置的制造方法
JP2005286282A (ja) * 2004-03-01 2005-10-13 Sumco Corp Simox基板の製造方法及び該方法により得られるsimox基板
WO2008038786A1 (fr) * 2006-09-29 2008-04-03 Sumco Techxiv Corporation Procédé de traitement thermique de plaquettes en silicium
JP5275036B2 (ja) * 2006-09-29 2013-08-28 Sumco Techxiv株式会社 シリコンウェーハの熱処理方法
JP2010064953A (ja) * 2008-09-10 2010-03-25 Siltronic Ag 単結晶シリコンからなる半導体ウェハ及びその製造方法
US8398766B2 (en) 2008-09-10 2013-03-19 Siltronic Ag Semiconductor wafer composed of monocrystalline silicon and method for producing it
JP2012039117A (ja) * 2010-08-11 2012-02-23 Siltronic Ag シリコンウェハおよびシリコンウェハの製造方法
KR20170013984A (ko) 2014-07-09 2017-02-07 가부시키가이샤 사무코 에피택셜 실리콘 웨이퍼 및 그 제조 방법
US10192754B2 (en) 2014-07-09 2019-01-29 Sumco Corporation Epitaxial silicon wafer and method for producing the epitaxial silicon wafer

Also Published As

Publication number Publication date
EP1983560A2 (en) 2008-10-22
US20040171234A1 (en) 2004-09-02
KR20030051602A (ko) 2003-06-25
JP4473571B2 (ja) 2010-06-02
EP1406294A4 (en) 2007-09-12
EP1983561A2 (en) 2008-10-22
EP1406294A1 (en) 2004-04-07
US20060130736A1 (en) 2006-06-22
US7033962B2 (en) 2006-04-25
KR100881511B1 (ko) 2009-02-05
TWI245084B (en) 2005-12-11
EP1983562A2 (en) 2008-10-22
JPWO2003009365A1 (ja) 2004-11-11

Similar Documents

Publication Publication Date Title
WO2003009365A1 (fr) Procede de fabrication d'une plaquette en silicium, d'une plaquette epitaxiale en silicium, et plaquette epitaxiale en silicium
EP0984483A3 (en) Semiconductor substrate and method for producing the same
SG123642A1 (en) Argon/ammonia rapid thermal annealing for silicon wafers, silicon wafers fabricated thereby and czochralski pullers for manufacturing monocrystalline silicon ingots
WO2003096426A1 (en) Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods
CN100407429C (zh) 具有低翘曲度和低弯曲度的层结构的半导体晶片及其制造方法
EP0673059A3 (en) Semiconductor wafer with pre-process denudation
TW200613589A (en) Method for producing silicon wafer and the silicon wafer produced thereby
EP1598452A4 (en) SILICON WAFER, METHOD OF MANUFACTURING THEREOF, AND METHOD OF PULLING A SILICON INK CRYSTAL
TW200503076A (en) III-V compound semiconductor crystal and method for production thereof
EP1124258A3 (en) Reduction of orientation dependent oxidation for vertical sidewalls of semiconductor substrates
EP1513193A4 (en) PROCESS FOR PRODUCING A SILICON WAFER
EP1229155A4 (en) SILICON WAFER, EPITAXIAL SILICON WAFER, ANNEALING WAFER, AND METHOD OF PRODUCING SAME
EP1657740A4 (en) EPITAXIAL SILICON CARBIDE WAFER, PROCESS FOR PRODUCING SUCH WAFER
SG133504A1 (en) Annealed wafer and manufacturing method of annealed wafer
TW200520106A (en) Technique for forming transistors having raised drain and source regions with different heights
TW200704834A (en) Silicon wafer and manufacturing method for same
TW200705712A (en) Method of producing nitride-based semiconductor device, and light-emitting device produced thereby
EP1220320A4 (en) SIGEC SEMICONDUCTOR CRYSTAL AND MANUFACTURING METHOD THEREOF
EP1284311A3 (en) Silicon semiconductor substrate and process for producing the same
WO2005043582A3 (en) Method for manufacturing p-type group iii nitride semiconductor, and group iii nitride semiconductor light-emitting device
WO2003060982A3 (en) Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same
WO2007079372A3 (en) An oxygen enhanced metastable silicon germanium film layer
TWI267144B (en) Method of producing SIMOX substrate and the substrate produced thereby
TW200511438A (en) Method for slowing down dopant-enhanced diffusion in substrates and devices fabricated therefrom
EP1536044A4 (en) SILICON WAFERS FOR EPITACTIC WAXING, EPITACTIC WAFER AND MANUFACTURING METHOD DAF R

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref country code: JP

Ref document number: 2003 514610

Kind code of ref document: A

Format of ref document f/p: F

Ref document number: 2003514610

Country of ref document: JP

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 1020037001055

Country of ref document: KR

AK Designated states

Kind code of ref document: A1

Designated state(s): JP KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWP Wipo information: published in national office

Ref document number: 1020037001055

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 2002726467

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 10482843

Country of ref document: US

WWP Wipo information: published in national office

Ref document number: 2002726467

Country of ref document: EP