WO2003005436A1 - Coating material of semiconductor chip for controlling magnetic disc drive and method of coating semiconductor chip for controlling magnetic disc drive - Google Patents

Coating material of semiconductor chip for controlling magnetic disc drive and method of coating semiconductor chip for controlling magnetic disc drive Download PDF

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Publication number
WO2003005436A1
WO2003005436A1 PCT/JP2001/005776 JP0105776W WO03005436A1 WO 2003005436 A1 WO2003005436 A1 WO 2003005436A1 JP 0105776 W JP0105776 W JP 0105776W WO 03005436 A1 WO03005436 A1 WO 03005436A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor chip
coating
coating layer
magnetic disk
resin
Prior art date
Application number
PCT/JP2001/005776
Other languages
French (fr)
Japanese (ja)
Inventor
Kenji Kobae
Hidehiko Kira
Norio Kainuma
Hiroshi Kobayashi
Katsutoshi Hirasawa
Takatoyo Yamakami
Masumi Katayama
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2001/005776 priority Critical patent/WO2003005436A1/en
Priority to PCT/JP2002/005404 priority patent/WO2003005441A1/en
Publication of WO2003005436A1 publication Critical patent/WO2003005436A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909—Post-treatment of the layer connector or bonding area
    • H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]

Definitions

  • the present invention relates to a coating material for a semiconductor chip for drive control of a magnetic disk device and a coating method for a semiconductor chip for drive control of a magnetic disk device.
  • the present invention relates to a semiconductor chip bright coating material and a semiconductor chip coating method for enclosing dust from a semiconductor chip that drives and controls a magnetic disk drive.
  • semiconductor chips are coated with a coating material in order to seal dust.
  • FIG. 22 shows a method of coating the semiconductor chip 10 with a potting resin.
  • FIG. 23 shows a method of printing a coating resin on a semiconductor chip 10 by using a mask 11 and curing the coating resin by heat or by irradiating ultraviolet rays. .
  • the method of covering the semiconductor chip 10 with potting resin is as follows. Since the potting resin is liquid, as shown in FIG. 22, the potting resin 12 is pulled toward the substrate by surface tension, and the corners of the semiconductor chip 10 are exposed, and a sufficient covering effect cannot be obtained. There is a problem that. Of course, if a sufficient amount of the potting resin is used, the corners of the semiconductor chip 10 can be covered without exposing them, but the coating area increases and it goes against the demand for miniaturization. In short, we want to obtain a sufficient coating effect with a small amount of coating material.
  • the resin is supplied by the squeegee 13, so that it is necessary to increase the viscosity of the resin 14.
  • the resin becomes the semiconductor chip 10 and the mask 11. Disclosure of invention that may not be sufficiently filled during
  • the present invention has been made to solve the above problems, and an object of the present invention is to provide a magnetic disk drive control semiconductor coating material capable of performing coating without exposing the corners of the semiconductor chip. It is an object of the present invention to provide a method for coating a semiconductor chip for drive control of a magnetic disk device: a coating material for a semiconductor chip for drive control of a magnetic disk device according to the present invention is formed on a base material and on one side of the base material. A first coating layer made of a thermosetting resin, and a thermosetting resin resin formed on the first coating layer, wherein the flow at the time of softening is higher than that of the first coating layer. And a second coating layer made of a highly reactive resin.
  • a method of coating a semiconductor chip for drive control of a magnetic disk device includes a step of flip-chip connecting a semiconductor chip to a substrate; a step of filling an underfill material between the substrate and the semiconductor chip; A coating material in which a coating layer made of a thermosetting resin is formed on one side of the material is placed on a semiconductor chip with the coating layer facing the semiconductor chip side, and the coating material is pressed and heated. The coating layer is softened, and the softened coating layer is filled with the substrate surface or the fillet of the underfill material. A pressure and a heating step of holding the semiconductor chip at a surface tension between the surface and the substrate surface and curing the semiconductor chip while covering the side surface of the semiconductor chip.
  • the softened coating layer is held at the surface tension between the substrate surface or the fillet surface of the underfill material and the substrate surface, and is cured as it is while covering the side surfaces of the semiconductor chip. Therefore, it is possible to prevent the corners of the semiconductor chip from being exposed.
  • FIG. 1 is an explanatory view of a coating material
  • FIG. 2 is an explanatory view of a state in which a semiconductor chip is coated with the coating material of FIG. 1
  • FIG. 3 is an explanatory view of a state in which a semiconductor chip is chamfered.
  • Fig. 4 is an explanatory view of a state in which a step is formed at the edge of the semiconductor chip
  • Figs. 5A and 5B are views showing an example in which a bent piece is formed on an FPC sheet to be used as a base material.
  • FIG. 6 is an explanatory view of a coating material without a base material
  • FIG. 7 is an explanatory view of a state in which a semiconductor chip is coated with the coating material of FIG. 6, and
  • FIG. 8 is a mask.
  • FIG. 9 is an explanatory view of a state in which a coating resin is injected by using an ultraviolet ray
  • FIG. 9 is an explanatory view of a state in which ultraviolet light is irradiated by using a light diffusion plate in FIG. 8
  • FIG. 10 is an explanatory view of FIG. Then, light reflecting particles are applied to the inner wall of the mask hole to irradiate ultraviolet rays.
  • Fig. 11 is an explanatory view showing an example of irradiating ultraviolet rays by an ultraviolet irradiator in Fig. 8, and Figs. 12 and 12B show an ultraviolet irradiator arranged around the coating area.
  • FIG. 13 is an explanatory view showing an example.
  • FIG. 11 is an explanatory view showing an example of irradiating ultraviolet rays by an ultraviolet irradiator in Fig. 8, and Figs. 12 and 12B show an ultraviolet irradiator arranged around the coating area.
  • FIG. 13 is an explanatory view
  • FIG. 13 is an explanatory view showing an example in which a semiconductor chip is formed in a trapezoidal shape.
  • FIG. 14 is a state in which air is blown between the underfill material and the lower surface of the mask.
  • FIG. 15 is an explanatory view showing an example in which the underfill material is ground and flattened, and
  • FIG. 16 is an explanatory view showing a state in which a mask is pressed against the underfill material.
  • FIG. 17 is an explanatory view showing a state in which a cap is attached to the ridge of the semiconductor chip,
  • FIGS. 18A and 18B are explanatory views showing a state in which the ridge of the semiconductor chip is chamfered, and FIG. FIG.
  • FIG. 3 is an explanatory view of a state in which a step is formed at an edge of a semiconductor chip.
  • Ri Figure 2 0 fines
  • Fig. 21 is an explanatory view of a state in which a back layer is formed.
  • Fig. 21 is an explanatory view of a state in which a fine powder layer is irradiated with infrared rays.
  • Fig. 22 is a state in which a corner of a semiconductor chip is exposed by a conventional coating method.
  • FIG. 23 is an explanatory view showing a method of filling a coating resin with a squeegee using a mask.
  • FIG. 1 is an explanatory diagram of a coating material.
  • the coating material 20 includes a substrate 21, a first coating layer 22 formed of a thermosetting resin formed on one side of the substrate 21, and the first coating layer 2.
  • the first coating layer 22 is formed on the second coating layer 23 and is made of a resin having higher flowability at the time of softening than the first coating layer 22.
  • the base material 21 is made of polyimide resin, for example, and preferably has a thickness of about 50 m.
  • the material of the substrate 21 is not necessarily limited to resin.
  • a mixed resin of a thermosetting epoxy resin and an acrylic resin as a binder can be used.
  • An ultraviolet curable resin may be further mixed with this mixed resin. However, it is not limited to these.
  • thermosetting epoxy resin for example, a bisphenol A type thermosetting epoxy resin and a resin such as dicyclopentene can be used.
  • the first coating layer 22 and the second coating layer 23 are different from the first coating layer 22 in that the flowability at the time of softening during thermosetting is adjusted by adjusting the mixing ratio of the compounded resin. Is also adjusted so that the second coating layer 23 is higher.
  • the elastic modulus at 100 is For the coating layer 22 of the present invention, a solid and low flow property of about 600 to 900 Pa is preferable, and for the second coating layer 23, about 30 to 100 Pa. Soft, good flowability was preferred.
  • the first coating layer 22 preferably has an elastic modulus of about 8 OOPa, and the second coating layer 23 has an elastic modulus of about 40 Pa.
  • a semiconductor chip 24 is flip-chip connected to a substrate 25 and mounted.
  • the substrate 25 is a wiring substrate, package, FPC, or the like, and is not particularly limited.
  • a space between the semiconductor chip 24 and the substrate 25 is filled with a sealing resin (underfill material 26) having good flowability, such as epoxy resin, and cured.
  • a sealing resin underfill material 26 having good flowability, such as epoxy resin, and cured.
  • the coating material 20 is placed on the semiconductor chip 24 with the second coating layer 23 facing the semiconductor chip 24 side, and is pressed and heated from above the base material 21.
  • the coating layer is thermally cured.
  • Curing conditions are: curing at 110 ° C. for about 30 seconds, and after-curing in an oven at 150 ° C. for about 30 minutes.
  • the first coating layer 22 and the second coating layer 23 are both softened and pressurized from above the substrate 21, as shown in FIG. It is pushed out to the side of 24.
  • the second coating layer 23 with good flowability flows out between the lower side surface of the semiconductor chip 24 and the fillet surface 26 a (inclined surface) of the underfill material 26.
  • the first coating layer 22 having not so high flowability flows out between the upper portion of the side surface of the semiconductor chip 24 and the surface of the base material 21.
  • Both resins are in contact with the fillet surface 26a, the side surface of the semiconductor chip 24, and the lower surface of the substrate 21.
  • the surface tension between these surfaces causes the fillet surface 26a and the substrate surface to contact each other. Held between.
  • thermoset in this state In particular, the first viscous core
  • the one-piece material 22 does not flow down the side surface of the semiconductor chip 24, is held between the base material 21 and the upper side of the semiconductor chip 24, and is heat-cured. The dust on the surface of the semiconductor chip 24 can be completely sealed without being exposed.
  • the base material 21 is larger than the semiconductor chip 24, and it is preferable to protrude outward from the edge of the semiconductor chip, because the surface tension is more easily exerted.
  • the thickness of the first coating layer 22 and the second coating layer 23 is preferably about 4: 1 to 3: 1. This is because if the amount of the second coating layer 23 having good flowability is too large, the second coating layer 23 flows down, and the side surfaces of the semiconductor chip 24 may be exposed.
  • the coating material 20 is coated directly on the semiconductor chip 30 as described above without filling the underfill material between the substrate 31 and the semiconductor chip 30 in advance.
  • the air between the substrate 31 and the semiconductor chip 30 is sucked and exhausted by a suction tool (not shown) or the like, and the second coating layer 23 with good flowability is filled with an underfill material. It can be made to be filled as. That is, it serves as both a coating material and an underfill material.
  • the coating layer has a two-layer structure, but may be a single layer.
  • the first coating layer 22 and the second coating layer are used as the material of the coating layer.
  • a resin with a flowability in the middle of 23 will be selected.
  • an ultraviolet-curable resin may be used for the coating layer, and a transparent material may be used for the base material 21, and the coating may be cured by irradiating ultraviolet rays while applying pressure.
  • FIG. 3 shows an example in which a chamfered portion 27 is formed on a ridge of a semiconductor chip 24. By chamfering the ridge line in this manner, the angle of a part of the corner becomes large. Therefore, by using the above-described coating material 20 (including one having a single coating layer), the corner can be further exposed. Can be prevented. chamfer May be performed on all ridges or only some ridges.
  • FIG. 4 shows an example in which a step 28 is formed on the ridge of the semiconductor chip 24. Also in this case, the use of the above-described coating material 20 (including one having a single coating layer) can further prevent the corners from being exposed.
  • the step portion may be formed on all the ridge portions, or may be formed only on some ridge portions.
  • 5A and 5B show still another embodiment.
  • the semiconductor chip 24 is mounted on an FPC (flexible printed circuit) sheet 31 made of polyimide film or the like, and a bent piece 31 a is formed on the FPC sheet near the semiconductor chip 24. Then, the above-mentioned coating layer (including one and two layers, not shown) is formed on the bent piece 31a, and the bent piece 31a is bent on the semiconductor chip 24, pressurized, and pressed. Heating cures the coating layer. This makes it possible to prevent the corners of the semiconductor chip 24 from being exposed by a very simple method.
  • FPC flexible printed circuit
  • a two-layer coating material 20 having no base material 21 is used. That is, the coating material 20 is obtained by simply laminating the first coating layer 22 and the second coating layer 23 similar to the above.
  • the coating material 20 is placed on the semiconductor chip 30 mounted on the substrate 31 with the second coating layer 23 facing the semiconductor chip side.
  • the coating material 20 is melted as if the sheet-like cheese melts. It is softened to cover the side surfaces of the semiconductor chip 30 and is thermally cured in this state. Since the first coating layer 22 is made of a resin having low flowability at the time of softening, the corners of the semiconductor chip 30 are not exposed.
  • the semiconductor chip 30 is directly filled as described above without previously filling an underfill material between the substrate 31 and the semiconductor chip 30.
  • the coating material 20 is coated. In this coating, the air between the substrate 31 and the semiconductor chip 30 is sucked and exhausted by a suction tool (not shown) or the like, and the second core having good flowability is drawn.
  • the single layer 23 may be filled as an underfill material. That is, the coating step and the filling step of the underfill material are combined, and the coating step is also used as the underfill material.
  • FIG. 8 shows still another embodiment.
  • the side of the semiconductor chip 30 mounted on the substrate 31 is covered with a mask 35, and the inside of the hole 36 of the mask 35 is crawled by the surface tension on the inner wall of the mask hole 36.
  • the semiconductor chip 30 is covered by injecting a coating resin 37 having a viscosity low enough to cause rise (wetting).
  • the injected coating resin 37 is heat-cured or ultraviolet-cured.
  • the coating resin can be reliably filled even when the coating area is narrow. Further, by directly curing, the coating resin 37 is cured in a state where the peripheral portion is higher than the central portion, so that the corners of the semiconductor chip 30 can be reliably prevented from being exposed.
  • the underfill material may be separately filled in advance, or the coating resin 37 may be filled and cured.
  • FIG. 9 shows an example in which the light diffusing plate 38 is arranged between the ultraviolet irradiation lamp 39 and the coating resin 37 when the coating resin 37 is cured by ultraviolet light in FIG. In this way, the ultraviolet light is diffused by the light diffusing plate 38 and is evenly applied to the coating resin 37, so that the narrow part of the mask hole 36 is also irradiated with the ultraviolet light. It can be prevented.
  • FIG. 10 shows that in FIG. 8, when the coating resin 37 is cured by ultraviolet rays, light reflecting particles 40 such as glass fixed with a binder are applied to the wall surfaces of the mask holes 36 and the side surfaces of the semiconductor chip 30.
  • light reflecting particles 40 such as glass fixed with a binder
  • FIG. 10 shows that in FIG. 8, when the coating resin 37 is cured by ultraviolet rays, light reflecting particles 40 such as glass fixed with a binder are applied to the wall surfaces of the mask holes 36 and the side surfaces of the semiconductor chip 30.
  • An example of application is shown.
  • the ultraviolet rays are irregularly reflected by the light-reflecting particles, and the ultraviolet rays reach deep inside the mask hole 36. Irradiation can prevent the occurrence of uncured portions.
  • FIG. 11 shows that in FIG. 8, when the coating resin 37 is to be cured with ultraviolet light, the ultraviolet irradiator 41 is inserted so that its tip is located at the lower part of the mask hole 36, and the lower part of the mask hole 36 is formed. After curing the resin, the irradiator 41 is pulled up, and the whole is irradiated with ultraviolet rays to cure the coating resin 37. This can also prevent the generation of uncured portions.
  • FIGS. 12A and 12B a plurality of ultraviolet irradiators 41 are arranged in a strip around the coating area, and the coating resin is supplied while irradiating the ultraviolet rays, so that the resin is discharged outside the area.
  • An example of preventing uncured portions while preventing protrusion is shown below.
  • FIG. 13 shows that in FIG. 8, when the coating resin 37 is cured with ultraviolet light, the semiconductor chip 30 is formed into a trapezoidal shape so that the ultraviolet light is irradiated to the bottom of the mask hole 36 and coated. An example of preventing generation of an uncured portion of the resin 37 will be described.
  • Fig. 14 shows the case of Fig. 8, in order to prevent the resin from flowing out from the gap between the underfill material 26 and the bottom of the mask hole 36, and from the nozzle 42 into the gap from the side.
  • An example is shown in which the coating resin 37 is injected while blowing air.
  • Fig. 15 shows that the underfill material 26 and the mask hole 3 6 are prepared by grinding the filler material 26 beforehand so that the surface of the underfill material 26 becomes flat, and then placing the mask 35.
  • An example is shown in which a gap is prevented from forming with the bottom. Thereby, it is possible to prevent the coating resin 37 from flowing out.
  • FIG. 16 shows that the underfill material 26 is thermally cured while the mask 35 is pressed against the still uncured underfill material 26, which results in a gap between the underfill material 26 and the bottom of the mask hole 36.
  • This can prevent the coating resin 37 from flowing out.
  • the underfill material 26 and the coating resin 37 may be simultaneously cured by injecting the coating resin 37 simultaneously with the curing of the underfill material 26.
  • FIG. 17 shows an example in which a semiconductor chip 30 is coated with a coating resin 43 after a cap 45 capable of covering the ridge portion of the upper surface of the semiconductor chip 30 is attached to the semiconductor chip 30 in advance. .
  • the corners of the semiconductor chip 30 are not exposed because they are covered with the cap 45.
  • a conventional material a thermosetting resin or an ultraviolet curable resin
  • 4 6 are bumps.
  • FIGS. 18A and 18B show an example in which a chamfered portion 47 is formed on the ridge of the semiconductor chip 30 as shown in FIG. 18B.
  • the coating resin 43 may be a normal resin (a thermosetting resin or an ultraviolet curable resin), but has a flowability intermediate between the first coating layer 22 and the second coating layer 23. It is preferable to use a resin.
  • FIG. 19 shows an example in which a step portion 48 is formed on a ridge portion on the upper surface of the semiconductor chip 30.
  • the step portion 48 becomes a pool of resin, so that when the semiconductor chip 30 is coated with the coating resin 43, the corner portions can be prevented from being exposed.
  • the coating resin 43 may be an ordinary resin (a thermosetting resin or an ultraviolet curable resin), but has a fluidity intermediate between the first coating layer 22 and the second coating layer 23. It is preferable to use a resin having the same.
  • FIG. 20 shows that a fine powder layer 50 having a thickness of about 5 to 10 is formed by spraying a fine resin powder such as an epoxy resin mixed with a binder on the surface of the semiconductor chip 30.
  • a coating resin 43 is applied on a powder layer 50 and cured by heat or ultraviolet light.
  • the coating resin 43 may be an ordinary resin (a thermosetting resin or an ultraviolet curable resin), but the first coating layer 22 and the second coating layer may be used. It is preferable to use a resin having an intermediate fluidity with that of the sealing layer 23.
  • Figure 21 shows a fine powder layer 50 with a thickness of about 10 to 15 / im by spraying fine resin powder such as epoxy resin mixed with a binder on the surface of the semiconductor chip 30. Subsequently, an example in which the fine powder layer 50 is heated and cured by the infrared irradiation lamp 51 will be described. This is a so-called baking process, in which the flow of the resin hardly occurs and the corner portions of the semiconductor chip 30 can be prevented from being exposed. The invention's effect
  • the softened coating layer is held by the surface tension between the substrate surface or the fillet surface of the underfill material and the substrate surface, and covers the side surface of the semiconductor chip. Since it is cured in a state, it is possible to prevent the corners of the semiconductor chip from being exposed.
  • the softened coating material covers the upper and side surfaces of the semiconductor chip so that the sheet-like cheese melts, and is cured as it is, so that the corners of the semiconductor chip are exposed. Can be prevented.

Abstract

A method of coating a semiconductor chip for controlling a magnetic disc drive in which coating can be carried out without exposing the corner part of the semiconductor chip. The method is characterized in that a coating material where a coating layer of thermosetting resin is formed on one side of a base is mounted on the semiconductor chip while directing the coating layer toward the semiconductor chip side, the coating material is then hot pressed to soften the coating layer, the softened coating layer is held by surface tension on the surface of the base or between the fillet face of an underfill material and the surface of the base, and subsequently, the coating material is set by hot press while covering the side face of the semiconductor chip.

Description

磁気ディスク装置駆動制御用半導体チップのコーティング材および磁気ディ スク装置駆動制御用半導体チップのコーティング方法 技術分野 TECHNICAL FIELD The present invention relates to a coating material for a semiconductor chip for drive control of a magnetic disk device and a coating method for a semiconductor chip for drive control of a magnetic disk device.
本発明は、 磁気ディスク装置を駆動制御する半導体チップからの塵埃を封 止込めるための、 半導体チップの明コ一ティング材および半導体チップのコ一 ティング方法に関する。 田 背景技術  The present invention relates to a semiconductor chip bright coating material and a semiconductor chip coating method for enclosing dust from a semiconductor chip that drives and controls a magnetic disk drive. Field background technology
近年、 コンピュータの性能向上に伴い、 磁気ディスク装置の大容量化、 高 記憶密度化が強く望まれている。 このため、 媒体からの磁気ヘッドの浮上量 を小さくしたり、 磁気へッドの浮上面を超平滑化することが行われている。 一方では、 高速化のために、 磁気ヘッドを駆動制御する半導体チップを磁気 ヘッドの周辺に配置することが行われている。 しかし、 半導体チップは、 脆 ぃシリコンを素材としているために、 種々の原因で半導体チップから塵埃が 発生し、 この塵埃が磁気ヘッドと媒体との間に入り込み、 磁気記録媒体の摩 耗が起こり、 情報の破壊が生じるなど、 種々の弊害が発生する。  In recent years, as the performance of computers has been improved, there has been a strong demand for higher capacity and higher storage density of magnetic disk drives. For this reason, the flying height of the magnetic head from the medium has been reduced, and the flying surface of the magnetic head has been ultra-smoothed. On the other hand, for speeding up, a semiconductor chip for driving and controlling the magnetic head has been arranged around the magnetic head. However, since the semiconductor chip is made of brittle silicon, dust is generated from the semiconductor chip for various reasons, and the dust enters between the magnetic head and the medium, causing wear of the magnetic recording medium. Various adverse effects occur, such as destruction of information.
そのため、 塵埃を封止込めるために、 半導体チップをコーティング材で被 覆するようにしている。  For this reason, semiconductor chips are coated with a coating material in order to seal dust.
コーティング材で被覆するには種々の方法がある。  There are various methods for coating with a coating material.
図 2 2に示すのは、 半導体チップ 1 0をポッティング樹脂で被覆する方法 である。  FIG. 22 shows a method of coating the semiconductor chip 10 with a potting resin.
また、 図 2 3に示すのは、 半導体チップ 1 0上に、 マスク 1 1を用いてコ —ティング樹脂を印刷し、 このコーティング樹脂を熱硬化させたり、 紫外線 を照射して硬化させる方法である。  FIG. 23 shows a method of printing a coating resin on a semiconductor chip 10 by using a mask 11 and curing the coating resin by heat or by irradiating ultraviolet rays. .
しかし、 半導体チップ 1 0をポッティング樹脂で覆う方法は、 ポッティン グ樹脂が液状であることから、 図 2 2に示すように、 ポッティング樹脂 1 2 が表面張力により基板側へ引っ張られ、 半導体チップ 1 0の角部が露出し、 十分な被覆効果が得られないという課題がある。 もちろん、 十分な量のポッ ティング樹脂を用いれば、 半導体チップ 1 0の角部を露出させることなく被 覆することができるが、 コーティングエリアが増大し、 小型化の要請に反す る。 要するに、 少ない量のコーティング材で十分な被覆効果を得たいのであ る。 However, the method of covering the semiconductor chip 10 with potting resin is as follows. Since the potting resin is liquid, as shown in FIG. 22, the potting resin 12 is pulled toward the substrate by surface tension, and the corners of the semiconductor chip 10 are exposed, and a sufficient covering effect cannot be obtained. There is a problem that. Of course, if a sufficient amount of the potting resin is used, the corners of the semiconductor chip 10 can be covered without exposing them, but the coating area increases and it goes against the demand for miniaturization. In short, we want to obtain a sufficient coating effect with a small amount of coating material.
また、 上記の印刷方法によるときは、樹脂をスキージ 1 3で供給するため、 樹脂 1 4の粘度を高くする必要があるが、コ一ティングエリァが狭くなると、 樹脂が半導体チップ 1 0とマスク 1 1の間に十分充填されないおそれがある 発明の開示  In addition, when the above printing method is used, the resin is supplied by the squeegee 13, so that it is necessary to increase the viscosity of the resin 14. However, when the coating area becomes narrow, the resin becomes the semiconductor chip 10 and the mask 11. Disclosure of invention that may not be sufficiently filled during
そこで、 本発明は上記課題を解決すべくなされたものであり、 その目的と するところは、 半導体チップの角部を露出させることなくコーティングが行 える磁気ディスク装置駆動制御用半導体チップのコーティング材および磁気 ディスク装置駆動制御用半導体チップのコーティング方法を提供するにある: すなわち、 本発明に係る磁気ディスク装置駆動制御用半導体チップのコー ティング材は、 基材と、 この基材の片面側に形成された熱硬化性樹脂からな る第 1のコ一ティング層と、 該第 1のコーティング層上に形成され、 熱硬化 性樹脂樹脂であって、 前記第 1のコーティング層よりも、 軟化時の流れ性の 高い樹脂からなる第 2のコーティング層とからなることを特徴とする。  SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a magnetic disk drive control semiconductor coating material capable of performing coating without exposing the corners of the semiconductor chip. It is an object of the present invention to provide a method for coating a semiconductor chip for drive control of a magnetic disk device: a coating material for a semiconductor chip for drive control of a magnetic disk device according to the present invention is formed on a base material and on one side of the base material. A first coating layer made of a thermosetting resin, and a thermosetting resin resin formed on the first coating layer, wherein the flow at the time of softening is higher than that of the first coating layer. And a second coating layer made of a highly reactive resin.
また本発明に係る磁気ディスク装置駆動制御用半導体チップのコーティン グ方法は、 半導体チップを基板にフリップチップ接続する工程と、 基板と半 導体チップとの間にアンダーフィル材を充填する工程と、 基材の片面側に熱 硬化性樹脂からなるコーティング層が形成されたコ一ティング材を、 コーテ ィング層を半導体チップ側に向けて半導体チップ上に載せ、 コーティング材 を加圧、 加熱して、 前記コーティング層を軟化せしめると共に、 該軟化した コーティング層を、 前記基板面もしくは前記アンダーフィル材のフィレット 面と前記基材面との間で表面張力で保持し、 半導体チップの側面を覆った状 態で硬化させる加圧、 加熱工程とを含むことを特徴としている。 Further, a method of coating a semiconductor chip for drive control of a magnetic disk device according to the present invention includes a step of flip-chip connecting a semiconductor chip to a substrate; a step of filling an underfill material between the substrate and the semiconductor chip; A coating material in which a coating layer made of a thermosetting resin is formed on one side of the material is placed on a semiconductor chip with the coating layer facing the semiconductor chip side, and the coating material is pressed and heated. The coating layer is softened, and the softened coating layer is filled with the substrate surface or the fillet of the underfill material. A pressure and a heating step of holding the semiconductor chip at a surface tension between the surface and the substrate surface and curing the semiconductor chip while covering the side surface of the semiconductor chip.
これによれば、 軟化したコーティング層が、 基板面もしくはアンダーフィ ル材のフィレツ ト面と基材面との間で表面張力で保持され、 この半導体チッ プの側面を覆った状態でそのまま硬化されるので、 半導体チップの角部が露 出するのを防止できる。 図面の簡単な説明  According to this, the softened coating layer is held at the surface tension between the substrate surface or the fillet surface of the underfill material and the substrate surface, and is cured as it is while covering the side surfaces of the semiconductor chip. Therefore, it is possible to prevent the corners of the semiconductor chip from being exposed. BRIEF DESCRIPTION OF THE FIGURES
図 1はコーティング材の説明図であり、 図 2は図 1のコ一ティング材によ り半導体チップをコーティングした状態の説明図であり、 図 3は半導体チッ プに面取りをした状態の説明図であり、 図 4は半導体チップの端縁に段差部 を形成した状態の説明図であり、 図 5 Aおよび図 5 Bは F P Cシートに折り 曲げ片を形成して基材とした例を示す説明図であり、 図 6は基材の無いコー ティング材の説明図であり、 図 7は図 6のコ一ティング材により半導体チッ プをコ一ティングした状態の説明図であり、 図 8はマスクを用いてコーティ ング樹脂を注入する状態の説明図であり、 図 9は図 8のものにおいて光拡散 板を用いて紫外線を照射する状態の説明図であり、 図 1 0は図 8のものにお いてマスク孔内壁に光反射粒子を塗布して紫外線を照射する状態の説明図で あり、 図 1 1は図 8のものにおいて紫外線照射器により紫外線を照射する例 を示す説明図であり、 図 1 2および図 1 2 Bはコーティングエリア外周に紫 外線照射器を配置した例を示す説明図であり、 図 1 3は半導体チップを台形 状に形成した例を示す説明図であり、 図 1 4はアンダーフィル材とマスク下 面との間にエア一をブローする状態の説明図であり、 図 1 5はアンダーフィ ル材を研削して平坦にした例を示す説明図であり、 図 1 6はアンダーフィル 材にマスクを押し当てた状態を示す説明図であり、 図 1 7は半導体チップの 稜線部にキヤップを装着した状態の説明図であり、 図 1 8 Aおよび図 1 8 B は半導体チップの稜線部を面取りした状態を示す説明図であり、 図 1 9は半 導体チップの端縁部に段差部を形成した状態の説明図であり、 図 2 0は微粉 末層を形成した状態の説明図であり、 図 2 1は微粉末層に赤外線を照射する 状態の説明図であり、 図 2 2は従来のコーティング方法によって半導体チッ プの角部が露出した状態を示す説明図であり、 図 2 3はマスクを用いてコー ティング樹脂をスキージにより充填する方法を示す説明図である。 発明を実施するための最良の形態 1 is an explanatory view of a coating material, FIG. 2 is an explanatory view of a state in which a semiconductor chip is coated with the coating material of FIG. 1, and FIG. 3 is an explanatory view of a state in which a semiconductor chip is chamfered. Fig. 4 is an explanatory view of a state in which a step is formed at the edge of the semiconductor chip, and Figs. 5A and 5B are views showing an example in which a bent piece is formed on an FPC sheet to be used as a base material. FIG. 6 is an explanatory view of a coating material without a base material, FIG. 7 is an explanatory view of a state in which a semiconductor chip is coated with the coating material of FIG. 6, and FIG. 8 is a mask. FIG. 9 is an explanatory view of a state in which a coating resin is injected by using an ultraviolet ray, FIG. 9 is an explanatory view of a state in which ultraviolet light is irradiated by using a light diffusion plate in FIG. 8, and FIG. 10 is an explanatory view of FIG. Then, light reflecting particles are applied to the inner wall of the mask hole to irradiate ultraviolet rays. Fig. 11 is an explanatory view showing an example of irradiating ultraviolet rays by an ultraviolet irradiator in Fig. 8, and Figs. 12 and 12B show an ultraviolet irradiator arranged around the coating area. FIG. 13 is an explanatory view showing an example. FIG. 13 is an explanatory view showing an example in which a semiconductor chip is formed in a trapezoidal shape. FIG. 14 is a state in which air is blown between the underfill material and the lower surface of the mask. FIG. 15 is an explanatory view showing an example in which the underfill material is ground and flattened, and FIG. 16 is an explanatory view showing a state in which a mask is pressed against the underfill material. FIG. 17 is an explanatory view showing a state in which a cap is attached to the ridge of the semiconductor chip, FIGS. 18A and 18B are explanatory views showing a state in which the ridge of the semiconductor chip is chamfered, and FIG. FIG. 3 is an explanatory view of a state in which a step is formed at an edge of a semiconductor chip. Ri, Figure 2 0 fines Fig. 21 is an explanatory view of a state in which a back layer is formed. Fig. 21 is an explanatory view of a state in which a fine powder layer is irradiated with infrared rays. Fig. 22 is a state in which a corner of a semiconductor chip is exposed by a conventional coating method. FIG. 23 is an explanatory view showing a method of filling a coating resin with a squeegee using a mask. BEST MODE FOR CARRYING OUT THE INVENTION
以下本発明の好適な実施例を添付図面に基づいて詳細に説明する。  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
(第 1実施例）  (First embodiment)
図 1は、 コーティング材の説明図である。  FIG. 1 is an explanatory diagram of a coating material.
コーティング材 2 0は、 基材 2 1と、 この基材 2 1の片面側に形成された 熱硬化性樹脂からなる第 1のコ一ティング層 2 2と、 該第 1のコ一ティング 層 2 2上に形成され、 熱硬化性樹脂であって、 第 1のコーティング層 2 2よ りも、 軟化時の流れ性の高い樹脂からなる第 2のコーティング層 2 3とから なる。  The coating material 20 includes a substrate 21, a first coating layer 22 formed of a thermosetting resin formed on one side of the substrate 21, and the first coating layer 2. The first coating layer 22 is formed on the second coating layer 23 and is made of a resin having higher flowability at the time of softening than the first coating layer 22.
基材 2 1は、 例えばポリイミ ド樹脂からなり、 厚さは 5 0 m程度が好適 である。 基材 2 1の材質は必ずしも樹脂に限定されない。  The base material 21 is made of polyimide resin, for example, and preferably has a thickness of about 50 m. The material of the substrate 21 is not necessarily limited to resin.
第 1のコーティング層 2 2は、 熱硬化型のエポキシ樹脂、 バインダーとし てのアクリル樹脂の混合樹脂を用いることができる。 この混合樹脂にさらに 紫外線硬化型樹脂を混合してもよい。 しかし、 これらに限定されることはな い。  For the first coating layer 22, a mixed resin of a thermosetting epoxy resin and an acrylic resin as a binder can be used. An ultraviolet curable resin may be further mixed with this mixed resin. However, it is not limited to these.
第 2のコ一ティング層 2 3は、 熱硬化型のエポキシ樹脂、 例えばビスフエ ノール A型の熱硬化性のエポキシ樹脂と、 ジシクロペン夕ジェン等の樹脂の 混合体を用いることができる。  For the second coating layer 23, a mixture of a thermosetting epoxy resin, for example, a bisphenol A type thermosetting epoxy resin and a resin such as dicyclopentene can be used.
第 1のコーティング層 2 2と第 2のコーティング層 2 3とは、 配合樹脂の 配合率を調整して、 熱硬化させる際、 一旦軟化するときの流れ性が、 第 1の コーティング層 2 2よりも第 2のコーティング層 2 3の方が高くなるように 調整する。  The first coating layer 22 and the second coating layer 23 are different from the first coating layer 22 in that the flowability at the time of softening during thermosetting is adjusted by adjusting the mixing ratio of the compounded resin. Is also adjusted so that the second coating layer 23 is higher.
流れ性を例えば弾性率 （ヤング率） でみれば、 1 0 0 での弾性率が、 第 1 のコ一ティング層 2 2では 6 0 0〜 9 0 0 P a程度の、 固めで流れ性の低い ものが好適であり、 また第 2のコーティング層 2 3では 3 0〜 1 0 0 P a程 度の、 柔らかく流れ性のよいものが好適であった。 特に弾性率が、 第 1のコ —ティング層 2 2では 8 O O P a前後のものが、 第 2のコーティング層 2 3 では 4 0 P a前後のものが好適である。 For example, if the flow property is viewed in terms of the elastic modulus (Young's modulus), the elastic modulus at 100 is For the coating layer 22 of the present invention, a solid and low flow property of about 600 to 900 Pa is preferable, and for the second coating layer 23, about 30 to 100 Pa. Soft, good flowability was preferred. Particularly, the first coating layer 22 preferably has an elastic modulus of about 8 OOPa, and the second coating layer 23 has an elastic modulus of about 40 Pa.
次に半導体チップを上記コーティング材 2 0でコーティングする方法につ いて説明する。  Next, a method of coating a semiconductor chip with the coating material 20 will be described.
図 2に示すように、 まず半導体チップ 2 4を基板 2 5にフリップチップ接 続して搭載する。 基板 2 5は、 配線基板、 パッケージ、 F P C等で、 特に限 定はない。  As shown in FIG. 2, first, a semiconductor chip 24 is flip-chip connected to a substrate 25 and mounted. The substrate 25 is a wiring substrate, package, FPC, or the like, and is not particularly limited.
次に、 半導体チップ 2 4と基板 2 5との間にエポキシ樹脂等の流れ性のよ い封止樹脂 （アンダーフィル材 2 6 ) を充填し、 硬化させる。  Next, a space between the semiconductor chip 24 and the substrate 25 is filled with a sealing resin (underfill material 26) having good flowability, such as epoxy resin, and cured.
次に、 上記コーティング材 2 0を、 第 2のコーティング層 2 3を半導体チ ップ 2 4側に向けて半導体チップ 2 4上に載せ、 基材 2 1の上から加圧する と共に、 加熱してコーティング層を熱硬化させる。  Next, the coating material 20 is placed on the semiconductor chip 24 with the second coating layer 23 facing the semiconductor chip 24 side, and is pressed and heated from above the base material 21. The coating layer is thermally cured.
硬化条件は、 1 1 0 °Cで 3 0秒程度で硬化させた後、オーブン中で 1 5 0 °C、 3 0分程度アフターキュアする。  Curing conditions are: curing at 110 ° C. for about 30 seconds, and after-curing in an oven at 150 ° C. for about 30 minutes.
上記加熱工程の初期段階で、 第 1のコーティング層 2 2、 第 2のコ一ティ ング層 2 3は共に軟化し、基板 2 1上からの加圧により、 図 2に示すように、 半導体チップ 2 4の側方に押し出される。 そのとき、 流れ性のよい第 2のコ 一ティング層 2 3は、 半導体チップ 2 4の側面下部とアンダーフィル材 2 6 のフィ レット面 2 6 a (傾斜面） との間に流れ出す。 一方、 流れ性のあまり 高くない第 1のコ一ティング層 2 2は半導体チップ 2 4の側面上部と基材 2 1の面との間に流れ出す。  In the initial stage of the heating step, the first coating layer 22 and the second coating layer 23 are both softened and pressurized from above the substrate 21, as shown in FIG. It is pushed out to the side of 24. At this time, the second coating layer 23 with good flowability flows out between the lower side surface of the semiconductor chip 24 and the fillet surface 26 a (inclined surface) of the underfill material 26. On the other hand, the first coating layer 22 having not so high flowability flows out between the upper portion of the side surface of the semiconductor chip 24 and the surface of the base material 21.
そして両樹脂は、 フィレッ ト面 2 6 a、 半導体チップ 2 4の側面、 基材 2 1の下面に接触していて、 これら面との間の表面張力により、 フィレット面 2 6 aと基材面との間に保持される。  Both resins are in contact with the fillet surface 26a, the side surface of the semiconductor chip 24, and the lower surface of the substrate 21. The surface tension between these surfaces causes the fillet surface 26a and the substrate surface to contact each other. Held between.
そしてこの状態で熱硬化されるのである。 とりわけ、 粘性の高い第 1のコ 一ティング材 2 2は、 半導体チップ 2 4の側面を流れ落ちず、 基材 2 1と半 導体チップ 2 4の側面上部との間に保持され、 熱硬化されるから、 従来のよ うに角部が露出されるようなことはなく、 半導体チップ 2 4表面の塵埃を完 全に封止込める。 And it is thermoset in this state. In particular, the first viscous core The one-piece material 22 does not flow down the side surface of the semiconductor chip 24, is held between the base material 21 and the upper side of the semiconductor chip 24, and is heat-cured. The dust on the surface of the semiconductor chip 24 can be completely sealed without being exposed.
図 2からわかるように、 基材 2 1は半導体チップ 2 4よりも大きく、 半導 体チップの端縁から外方に突出させるようにすると、 より表面張力を作用さ せやすいので好適である。  As can be seen from FIG. 2, the base material 21 is larger than the semiconductor chip 24, and it is preferable to protrude outward from the edge of the semiconductor chip, because the surface tension is more easily exerted.
第 1のコーティング層 2 2と第 2のコーティング層 2 3の厚さは、 前記の ように 4 ： 1〜3 ： 1程度とするのが好適である。 これは流れ性の良い第 2 のコーティング層 2 3の量をあまり多くすると、 流れ落ちてしまい、 半導体 チップ 2 4の側面が露出するおそれがあるからである。  As described above, the thickness of the first coating layer 22 and the second coating layer 23 is preferably about 4: 1 to 3: 1. This is because if the amount of the second coating layer 23 having good flowability is too large, the second coating layer 23 flows down, and the side surfaces of the semiconductor chip 24 may be exposed.
なお、 この場合、 基板 3 1と半導体チップ 3 0との間にアンダーフィル材 をあらかじめ充填するこどなく、 半導体チップ 3 0に直接上記のようにして コーティング材 2 0をコ一ティングし、 このコーティングの際、 基板 3 1と 半導体チップ 3 0との間の空気を吸引具 （図示せず） 等により吸引、 排気し つつ、 流れ性のよい第 2のコ一ティング層 2 3をアンダーフィル材として充 填するようにすることもできる。 すなわち、 コーティング材とアンダーフィ ル材とを兼ねるのである。  In this case, the coating material 20 is coated directly on the semiconductor chip 30 as described above without filling the underfill material between the substrate 31 and the semiconductor chip 30 in advance. At the time of coating, the air between the substrate 31 and the semiconductor chip 30 is sucked and exhausted by a suction tool (not shown) or the like, and the second coating layer 23 with good flowability is filled with an underfill material. It can be made to be filled as. That is, it serves as both a coating material and an underfill material.
また、 上記では、 コーティング層を 2層構成としたが、 1層であってもよ レ^ この場合は、 コーティング層の材質として、 上記第 1のコーティング層 2 2と第 2のコ一ティング層 2 3との中間の流れ性の樹脂を選択することに なる。  Further, in the above description, the coating layer has a two-layer structure, but may be a single layer. In this case, the first coating layer 22 and the second coating layer are used as the material of the coating layer. A resin with a flowability in the middle of 23 will be selected.
また、 コーティング層に紫外線硬化型の樹脂を用い、 基材 2 1に透明材料 を用いて、 加圧しつつ紫外線を照射して硬化させるようにしてもよい。 図 3は、 半導体チップ 2 4の稜線部に面取り部 2 7を形成した例を示す。 このように稜線部を面取りすることによって、 コーナ一部の角度が大きくな るから、 上記のコーティング材 2 0 (コーティング層が 1層のものも含む） を用いることにより、 より一層角部の露出を防止することができる。 面取り は全ての稜線部に行ってもよいし、 一部の稜線部だけであってもよい。 Alternatively, an ultraviolet-curable resin may be used for the coating layer, and a transparent material may be used for the base material 21, and the coating may be cured by irradiating ultraviolet rays while applying pressure. FIG. 3 shows an example in which a chamfered portion 27 is formed on a ridge of a semiconductor chip 24. By chamfering the ridge line in this manner, the angle of a part of the corner becomes large. Therefore, by using the above-described coating material 20 (including one having a single coating layer), the corner can be further exposed. Can be prevented. chamfer May be performed on all ridges or only some ridges.
図 4は、 半導体チップ 2 4の稜線部に段差部 2 8を形成した例を示す。 こ れによっても、 上記のコーティング材 2 0 (コーティング層が 1層のものも 含む） を用いることによって、 より一層角部の露出を防止することができる。 段差部は全ての稜線部に形成してもよいし、 一部の稜線部だけに形成しても よい。  FIG. 4 shows an example in which a step 28 is formed on the ridge of the semiconductor chip 24. Also in this case, the use of the above-described coating material 20 (including one having a single coating layer) can further prevent the corners from being exposed. The step portion may be formed on all the ridge portions, or may be formed only on some ridge portions.
図 5 Aおよび図 5 Bはさらに他の実施例を示す。  5A and 5B show still another embodiment.
本実施例では、 半導体チップ 2 4をポリイミ ドフィルム等からなる F P C (フレキシブルプリントサーキット） シート 3 1上に搭載し、 この半導体チ ップ 2 4の近傍の F P Cシートに折り曲げ片 3 1 aを形成し、 この折り曲げ 片 3 1 aに上記のコーティング層 （ 1層、 2層を含む。 図示せず） を形成し ておいて、 折り曲げ片 3 1 aを半導体チップ 2 4上に折り曲げ、 加圧、 加熱 してコーティング層を熱硬化させるのである。 このようにすれば、 非常に簡 単な方法で、 半導体チップ 2 4の角部の露出を防止することができる。  In this embodiment, the semiconductor chip 24 is mounted on an FPC (flexible printed circuit) sheet 31 made of polyimide film or the like, and a bent piece 31 a is formed on the FPC sheet near the semiconductor chip 24. Then, the above-mentioned coating layer (including one and two layers, not shown) is formed on the bent piece 31a, and the bent piece 31a is bent on the semiconductor chip 24, pressurized, and pressed. Heating cures the coating layer. This makes it possible to prevent the corners of the semiconductor chip 24 from being exposed by a very simple method.
図 6、 図 7は他の実施例を示す。  6 and 7 show another embodiment.
本実施例では、基材 2 1を有しない、 2層のコ一ティング材 2 0を用いる。 すなわち、 コーティング材 2 0は、 上記と同様の第 1のコーティング層 2 2と第 2のコーティング層 2 3とを単に積層したものである。  In this embodiment, a two-layer coating material 20 having no base material 21 is used. That is, the coating material 20 is obtained by simply laminating the first coating layer 22 and the second coating layer 23 similar to the above.
このコーティング材 2 0を、 図 6に示すように、 基板 3 1上に実装した半 導体チップ 3 0上に第 2のコーティング層 2 3を半導体チップ側に向けて載 せ、 次に、 図 7に示すように、 加圧することなく、 1 5 0 °C程度の温度の熱 風をコーティング材 2 0にブローすることにより、 あたかもシ一卜状のチー ズがとろけるように、 コーティング材 2 0を軟化させて、 半導体チップ 3 0 の側面も覆わせ、 この状態で熱硬化させるのである。 第 1のコーティング層 2 2に、 軟化時の流れ性の低い樹脂を用いているので、 半導体チップ 3 0の 角部が露出するということはない。  As shown in FIG. 6, the coating material 20 is placed on the semiconductor chip 30 mounted on the substrate 31 with the second coating layer 23 facing the semiconductor chip side. As shown in the figure, by blowing hot air at a temperature of about 150 ° C onto the coating material 20 without applying pressure, the coating material 20 is melted as if the sheet-like cheese melts. It is softened to cover the side surfaces of the semiconductor chip 30 and is thermally cured in this state. Since the first coating layer 22 is made of a resin having low flowability at the time of softening, the corners of the semiconductor chip 30 are not exposed.
なお、 この場合、 基板 3 1と半導体チップ 3 0との間にアンダーフィル材 をあらかじめ充填することなく、 半導体チップ 3 0に直接上記のようにして コーティング材 2 0をコーティングし、 このコーティングの際、 基板 3 1と 半導体チップ 3 0との間の空気を吸引具 （図示せず） 等により吸引、 排気し つつ、 流れ性のよい第 2のコ一ティング層 2 3をアンダーフィル材として充 填するようにすることもできる。 すなわち、 コーティング工程とアンダーフ ィル材の充填工程とを兼ね、 またコーティング材とアンダーフィル材とを兼 ねるのである。 In this case, the semiconductor chip 30 is directly filled as described above without previously filling an underfill material between the substrate 31 and the semiconductor chip 30. The coating material 20 is coated. In this coating, the air between the substrate 31 and the semiconductor chip 30 is sucked and exhausted by a suction tool (not shown) or the like, and the second core having good flowability is drawn. The single layer 23 may be filled as an underfill material. That is, the coating step and the filling step of the underfill material are combined, and the coating step is also used as the underfill material.
図 8はさらに他の実施例を示す。  FIG. 8 shows still another embodiment.
本実施例では、 まず、 基板 3 1に実装された半導体チップ 3 0の側方をマ スク 3 5で覆い、 マスク 3 5の孔 3 6内に、 マスク孔 3 6内壁に表面張力に より這い上がり （濡れ上がり） を生じるだけの粘度の低いコーティング樹脂 3 7を注入して半導体チップ 3 0を覆う。 次いで、 注入したコーティング樹 脂 3 7を熱硬化もしくは紫外線硬化させるのである。  In the present embodiment, first, the side of the semiconductor chip 30 mounted on the substrate 31 is covered with a mask 35, and the inside of the hole 36 of the mask 35 is crawled by the surface tension on the inner wall of the mask hole 36. The semiconductor chip 30 is covered by injecting a coating resin 37 having a viscosity low enough to cause rise (wetting). Next, the injected coating resin 37 is heat-cured or ultraviolet-cured.
粘度の低いコ一ティング樹脂を注入するので、 コ一ティングエリァが狭い 場合であっても、 コーティング樹脂を確実に充填できる。 また、 そのまま硬 化させることにより、 コーティング樹脂 3 7が中央部より周辺部が高くなる 状態で硬化されるので、 半導体チップ 3 0の角部が露出するのを確実に防止 できる。 アンダーフィル材はあらかじめ別途充填しておいてもよいし、 コ一 ティング樹脂 3 7を充填して硬化させるようにすることもできる。  Since a low-viscosity coating resin is injected, the coating resin can be reliably filled even when the coating area is narrow. Further, by directly curing, the coating resin 37 is cured in a state where the peripheral portion is higher than the central portion, so that the corners of the semiconductor chip 30 can be reliably prevented from being exposed. The underfill material may be separately filled in advance, or the coating resin 37 may be filled and cured.
図 9は、 図 8において、 コーティング樹脂 3 7を紫外線硬化させる場合に おいて、 紫外線照射ランプ 3 9とコ一ティング樹脂 3 7との間に光拡散板 3 8を配置させた例を示す。 このようにすると、 紫外線が光拡散板 3 8により 拡散されて、 コーティング樹脂 3 7に均等に照射され、 マスク孔 3 6の狭い 個所にも紫外線が照射されることとなり、 未硬化部分の発生を防ぐことがで さる。  FIG. 9 shows an example in which the light diffusing plate 38 is arranged between the ultraviolet irradiation lamp 39 and the coating resin 37 when the coating resin 37 is cured by ultraviolet light in FIG. In this way, the ultraviolet light is diffused by the light diffusing plate 38 and is evenly applied to the coating resin 37, so that the narrow part of the mask hole 36 is also irradiated with the ultraviolet light. It can be prevented.
図 1 0は、 図 8において、 コ一ティング樹脂 3 7を紫外線硬化させる場合 において、 マスク孔 3 6の壁面や半導体チップ 3 0の側面に、 バインダーで 固めたガラス等の光反射粒子 4 0を塗布した例を示す。 このようにすると、 紫外線が光反射粒子により乱反射されて、 紫外線がマスク孔 3 6内深くまで 照射され、 未硬化部分の発生を防止することができる。 FIG. 10 shows that in FIG. 8, when the coating resin 37 is cured by ultraviolet rays, light reflecting particles 40 such as glass fixed with a binder are applied to the wall surfaces of the mask holes 36 and the side surfaces of the semiconductor chip 30. An example of application is shown. In this case, the ultraviolet rays are irregularly reflected by the light-reflecting particles, and the ultraviolet rays reach deep inside the mask hole 36. Irradiation can prevent the occurrence of uncured portions.
図 1 1は、 図 8において、 コーティング樹脂 3 7を紫外線硬化させる場合 において、 紫外線照射器 4 1をその先端がマスク孔 3 6の低部に位置するよ うに挿入し、 マスク孔 3 6低部の樹脂を硬化させた後、 照射器 4 1を引き上 げ、 全体に紫外線を照射してコーティング樹脂 3 7を硬化される例を示す。 これによつても未硬化部分の発生を防止できる。  FIG. 11 shows that in FIG. 8, when the coating resin 37 is to be cured with ultraviolet light, the ultraviolet irradiator 41 is inserted so that its tip is located at the lower part of the mask hole 36, and the lower part of the mask hole 36 is formed. After curing the resin, the irradiator 41 is pulled up, and the whole is irradiated with ultraviolet rays to cure the coating resin 37. This can also prevent the generation of uncured portions.
図 1 2 Aおよび図 1 2 Bは、 紫外線照射器 4 1をコーティングエリァ外周 に帯状に複数配置し、 紫外線を照射しながら、 コ一ティング樹脂を供給する ことにより、 エリァ外への樹脂のはみ出しを防止しつつ未硬化部分の発生を 防止する例を示す。  In FIGS. 12A and 12B, a plurality of ultraviolet irradiators 41 are arranged in a strip around the coating area, and the coating resin is supplied while irradiating the ultraviolet rays, so that the resin is discharged outside the area. An example of preventing uncured portions while preventing protrusion is shown below.
図 1 3は、 図 8において、 コーティング樹脂 3 7を紫外線硬化させる場合 において、 半導体チップ 3 0の形状を台形に形成することにより、 紫外線が マスク孔 3 6の底部にまで照射され、 コ一ティング樹脂 3 7の未硬化部分の 発生を防止する例を示す。  FIG. 13 shows that in FIG. 8, when the coating resin 37 is cured with ultraviolet light, the semiconductor chip 30 is formed into a trapezoidal shape so that the ultraviolet light is irradiated to the bottom of the mask hole 36 and coated. An example of preventing generation of an uncured portion of the resin 37 will be described.
図 1 4は、 図 8の場合において、 アンダーフィル材 2 6とマスク孔 3 6の 底部との隙間から樹脂が流出するのを防止するため、 側方から該隙間内にノ ズル 4 2からエア一を吹き込みつつコ一ティング樹脂 3 7を注入する例を示 す。  Fig. 14 shows the case of Fig. 8, in order to prevent the resin from flowing out from the gap between the underfill material 26 and the bottom of the mask hole 36, and from the nozzle 42 into the gap from the side. An example is shown in which the coating resin 37 is injected while blowing air.
図 1 5は、 アンダーフィル材 2 6の表面が平らになるようにあらかじめァ ンダ一フィル材 2 6を研削した後、 マスク 3 5を配置することで、 アンダー フィル材 2 6とマスク孔 3 6底部との間に隙間が生じるのを防止した例を示 す。 これにより、 コーティング樹脂 3 7が流出するのを防止できる。  Fig. 15 shows that the underfill material 26 and the mask hole 3 6 are prepared by grinding the filler material 26 beforehand so that the surface of the underfill material 26 becomes flat, and then placing the mask 35. An example is shown in which a gap is prevented from forming with the bottom. Thereby, it is possible to prevent the coating resin 37 from flowing out.
図 1 6は、 アンダーフィル材 2 6の熱硬化時に、 まだ未硬化状態のアンダ —フィル材 2 6にマスク 3 5を押し当て、 これにより、 アンダーフィル材 2 6とマスク孔 3 6底部との間に隙間が生じるのを防止する例を示す。 これに より、 コーティング樹脂 3 7の流出を防止できる。 なお、 アンダーフィル材 2 6の硬化時に同時にコーティング樹脂 3 7を注入し、 アンダーフィル材 2 6とコ一ティング樹脂 3 7とを同時に硬化させるようにしてもよい。 図 1 7は、 半導体チップ 3 0の上面の稜線部を覆うことのできるキャップ 4 5をあらかじめ半導体チップ 3 0に装着した後、 コーティング樹脂 4 3に より、 半導体チップ 3 0をコーティングする例を示す。 半導体チップ 3 0の 角部はキャップ 4 5に覆われるので露出することはない。 なお、 この場合の コーティング樹脂 3 7は、 従前の材料 （熱硬化性樹脂あるいは紫外線硬化性 樹脂） を用いることができる。 4 6はバンプである。 Fig. 16 shows that the underfill material 26 is thermally cured while the mask 35 is pressed against the still uncured underfill material 26, which results in a gap between the underfill material 26 and the bottom of the mask hole 36. An example in which a gap is prevented from occurring will be described. This can prevent the coating resin 37 from flowing out. The underfill material 26 and the coating resin 37 may be simultaneously cured by injecting the coating resin 37 simultaneously with the curing of the underfill material 26. FIG. 17 shows an example in which a semiconductor chip 30 is coated with a coating resin 43 after a cap 45 capable of covering the ridge portion of the upper surface of the semiconductor chip 30 is attached to the semiconductor chip 30 in advance. . The corners of the semiconductor chip 30 are not exposed because they are covered with the cap 45. In this case, as the coating resin 37, a conventional material (a thermosetting resin or an ultraviolet curable resin) can be used. 4 6 are bumps.
図 1 8 Aおよび図 1 8 Bは、 半導体チップ 3 0の稜線部に、 図 1 8 Bに示 すように面取り部 4 7を形成した例を示す。 このように面取り部 4 7を形成 することで、 半導体チップ 3 0の角部の角度が鈍角になるので、 コーティン グ樹脂 4 3で半導体チップ 3 0をコーティングした際、 角部が露出するのを 防止できる。 コーティング樹脂 4 3は、 通常の樹脂 （熱硬化性樹脂あるいは 紫外線硬化性樹脂） でもよいが、 前記第 1のコーティング層 2 2と第 2のコ 一ティング層 2 3との中間の流れ性を有する樹脂を用いると好適である。 図 1 9は、 半導体チップ 3 0の上面の稜線部に、 段差部 4 8を形成した例 を示す。 このように段差部 4 8を形成することで、 段差部 4 8が樹脂溜まり となるので、 コーティング樹脂 4 3で半導体チップ 3 0をコ一ティングした 際、 角部が露出するのを防止できる。 コーティング樹脂 4 3は、 通常の樹脂 (熱硬化性樹脂あるいは紫外線硬化性樹脂） でもよいが、 前記第 1のコーテ ィング層 2 2と第 2のコ一ティング層 2 3との中間の流れ性を有する樹脂を 用いると好適である。  FIGS. 18A and 18B show an example in which a chamfered portion 47 is formed on the ridge of the semiconductor chip 30 as shown in FIG. 18B. By forming the chamfered portion 47 in this way, the angle of the corner of the semiconductor chip 30 becomes obtuse, so that when the semiconductor chip 30 is coated with the coating resin 43, the corner is not exposed. Can be prevented. The coating resin 43 may be a normal resin (a thermosetting resin or an ultraviolet curable resin), but has a flowability intermediate between the first coating layer 22 and the second coating layer 23. It is preferable to use a resin. FIG. 19 shows an example in which a step portion 48 is formed on a ridge portion on the upper surface of the semiconductor chip 30. By forming the step portion 48 in this manner, the step portion 48 becomes a pool of resin, so that when the semiconductor chip 30 is coated with the coating resin 43, the corner portions can be prevented from being exposed. The coating resin 43 may be an ordinary resin (a thermosetting resin or an ultraviolet curable resin), but has a fluidity intermediate between the first coating layer 22 and the second coating layer 23. It is preferable to use a resin having the same.
図 2 0は、 半導体チップ 3 0の表面に、 バインダーに混合したエポキシ樹 脂等の樹脂微粉末を散布して 5〜1 0 程度の厚さの微粉末層 5 0を形成 した後、 この微粉末層 5 0上にコーティング樹脂 4 3を塗布し、 熱硬化もし くは紫外線硬化させた例を示す。 微粉末層 5 0を形成することで、 表面張力 の低下、 あるいは表面抵抗の増大により、 コーティング樹脂 4 3の流れ性を 低下させることができ、 半導体チップ 3 0の角部の露出を防止することがで きる。 コーティング樹脂 4 3は、 通常の樹脂 （熱硬化性樹脂あるいは紫外線 硬化性樹脂） でもよいが、 前記第 1のコーティング層 2 2と第 2のコーティ ング層 2 3との中間の流れ性を有する樹脂を用いると好適である。 FIG. 20 shows that a fine powder layer 50 having a thickness of about 5 to 10 is formed by spraying a fine resin powder such as an epoxy resin mixed with a binder on the surface of the semiconductor chip 30. An example is shown in which a coating resin 43 is applied on a powder layer 50 and cured by heat or ultraviolet light. By forming the fine powder layer 50, the flowability of the coating resin 43 can be reduced due to a decrease in surface tension or an increase in surface resistance, thereby preventing the corners of the semiconductor chip 30 from being exposed. I can do it. The coating resin 43 may be an ordinary resin (a thermosetting resin or an ultraviolet curable resin), but the first coating layer 22 and the second coating layer may be used. It is preferable to use a resin having an intermediate fluidity with that of the sealing layer 23.
図 2 1は、 半導体チップ 3 0の表面に、 バインダーに混合したエポキシ樹 脂等の樹脂微粉末を散布して 1 0〜 1 5 /i m程度の厚さの微粉末層 5 0を形 成した後、 赤外線照射ランプ 5 1により微粉末層 5 0を加熱し、 硬化させる 例を示す。 いわゆる、 焼きつけを行うものであり、 樹脂の流れは生じがたく、 半導体チップ 3 0の角部の露出を防止できる。 発明の効果  Figure 21 shows a fine powder layer 50 with a thickness of about 10 to 15 / im by spraying fine resin powder such as epoxy resin mixed with a binder on the surface of the semiconductor chip 30. Subsequently, an example in which the fine powder layer 50 is heated and cured by the infrared irradiation lamp 51 will be described. This is a so-called baking process, in which the flow of the resin hardly occurs and the corner portions of the semiconductor chip 30 can be prevented from being exposed. The invention's effect
以上のように、 本発明によれば、 軟化したコーティング層が、 基板面もし くはアンダーフィル材のフィレツト面と基材面との間で表面張力で保持され、 この半導体チップの側面を覆った状態で硬化されるので、 半導体チップの角 部が露出するのを防止できる。 あるいは、 本発明によれば、 軟化したコーテ イング材が、 シート状のチーズがとろけるように、 半導体チップの上面と側 面を覆い、 そのままの状態で硬化されるので、 半導体チップの角部が露出す るのを防止できる。  As described above, according to the present invention, the softened coating layer is held by the surface tension between the substrate surface or the fillet surface of the underfill material and the substrate surface, and covers the side surface of the semiconductor chip. Since it is cured in a state, it is possible to prevent the corners of the semiconductor chip from being exposed. Alternatively, according to the present invention, the softened coating material covers the upper and side surfaces of the semiconductor chip so that the sheet-like cheese melts, and is cured as it is, so that the corners of the semiconductor chip are exposed. Can be prevented.

Claims

請 求 の 範 囲 The scope of the claims
1 . 磁気ディスク装置駆動制御用半導体チップのコ一ティング材において、 基材と、 1. In a coating material for a semiconductor chip for drive control of a magnetic disk drive, a base material,
この基材の片面側に形成された熱硬化性樹脂からなる第 1のコーティング 層と、  A first coating layer made of a thermosetting resin formed on one side of the substrate,
該第 1のコーティング層上に形成され、 熱硬化性樹脂であって、 前記第 1 のコ一ティング層よりも、 軟化時の流れ性の高い樹脂からなる第 2のコーテ ィング層とからなることを特徴とする磁気ディスク装置駆動制御用半導体チ ップのコ一ティング材。  A second coating layer that is formed on the first coating layer and is made of a thermosetting resin, the resin having a higher flowability at the time of softening than the first coating layer; A coating material for a semiconductor chip for drive control of a magnetic disk drive, characterized by the following features.
2 . 前記第 1のコーティング層と前記第 2のコ一ティング層との厚さの比率 が、 4 ： ：!〜 3 ： 1であることを特徴とする請求項 1記載の磁気ディスク装 置駆動制御用半導体チップのコーティング材。 2. The magnetic disk drive according to claim 1, wherein the ratio of the thickness of the first coating layer to the thickness of the second coating layer is 4 ::! To 3: 1. Coating material for control semiconductor chip.
3 . 塵埃を封止込めるべく半導体チップをコ一ティング材で被覆する、 磁気 ディスク装置駆動制御用半導体チップのコ一ティング方法において、 半導体チップを基板にフリップチップ接続する工程と、 3. A method of coating a semiconductor chip for drive control of a magnetic disk drive, wherein the semiconductor chip is coated with a coating material to seal in dust, wherein a step of flip-chip connecting the semiconductor chip to a substrate;
基板と半導体チップとの間にアンダーフィル材を充填する工程と、 基材の片面側に熱硬化性樹脂からなるコ一ティング層が形成されたコ一テ ィング材を、 コーティング層を半導体チップ側に向けて半導体チップ上に載 せ、 コーティング材を加圧、 加熱して、 前記コーティング層を軟化せしめる と共に、 該軟化したコーティング層を、 前記基板面もしくは前記アンダーフ ィル材のフィレツ ト面と前記基材面との間で表面張力で保持し、 半導体チッ プの側面を覆った状態で硬化させる加圧、 加熱工程とを含むことを特徴とす る磁気ディスク装置駆動制御用半導体チップのコーティング方法。  A step of filling an underfill material between the substrate and the semiconductor chip; and a coating material having a thermosetting resin coating layer formed on one side of the base material. The coating material is placed on a semiconductor chip with pressure applied thereto and heated to soften the coating layer, and the softened coating layer is combined with the fillet surface of the substrate or the underfill material. A method for coating a semiconductor chip for drive control of a magnetic disk drive, comprising: a pressurizing step and a heating step of holding the semiconductor chip with a surface tension and curing the semiconductor chip while covering the side surface of the semiconductor chip. .
4 . 前記コーティング層が、 基材の片面側に形成された熱硬化性樹脂からな る第 1のコーティング層と、 該第 1のコーティング層上に形成され、 熱硬化 性樹脂であって、 前記第 1のコ一ティング層よりも、 軟化時の流れ性の高い 樹脂からなる第 2のコーティング層とからなる前記コ一ティング材を用いる ことを特徴とする請求項 3記載の磁気ディスク装置駆動制御用半導体チップ のコ一ティング方法。 4. The coating layer is made of a thermosetting resin formed on one side of the substrate. A first coating layer formed on the first coating layer, the second coating layer being made of a thermosetting resin, and having a higher flowability at the time of softening than the first coating layer. 4. The method for coating a semiconductor chip for drive control of a magnetic disk drive according to claim 3, wherein said coating material comprising a coating layer is used.
5 . 前記コーティング材の基材に、 半導体チップの端縁から外方に突出する 基材を用いることを特徴とする請求項 3記載の磁気ディスク装置駆動制御用 半導体チップのコ一ティング方法。 5. The method of claim 3, wherein a base material protruding outward from an edge of the semiconductor chip is used as the base material of the coating material.
6 . 前記コーティング材の基材に、 半導体チップの端縁から外方に突出する 基材を用いることを特徴とする請求項 4記載の磁気ディスク装置駆動制御用 半導体チップのコ一ティング方法。 6. The method of claim 4, wherein a base material protruding outward from an edge of the semiconductor chip is used as the base material of the coating material.
7 . 前記第 1のコーティング層と前記第 2のコ一ティング層との厚さの比率 が、 4 ： 1〜3 ： 1であるコーティング材を用いることを特徴とする請求項 4記載の磁気ディスク装置駆動制御用半導体チップのコーティング方法。 7. The magnetic disk according to claim 4, wherein a coating material having a thickness ratio of the first coating layer to the second coating layer of 4: 1 to 3: 1 is used. A method for coating a device driving control semiconductor chip.
8 . 前記基材に透明材料を用い、 前記第 1のコーティング層に紫外線硬化型 樹脂を用いたコーティング材を使用することを特徴とする請求項 4記載の磁 気ディスク装置駆動制御用半導体チップのコーティング方法。 8. The semiconductor chip for drive control of a magnetic disk device according to claim 4, wherein a transparent material is used for the base material, and a coating material using an ultraviolet curable resin is used for the first coating layer. Coating method.
9 . 前記基材に、 半導体装置を搭載する F P Cシートを折り曲げたものを使 用することを特徴とする請求項 3記載の磁気ディスク装置駆動制御用半導体 チップのコーティング方法。 9. The method for coating a semiconductor chip for drive control of a magnetic disk drive according to claim 3, wherein the base material is obtained by bending an FPC sheet on which a semiconductor device is mounted.
1 0 . 前記基材に、 半導体装置を搭載する F P Cシートを折り曲げたものを 使用することを特徴とする請求項 4記載の磁気ディスク装置駆動制御用半導 体チップのコーティング方法。 10. The magnetic disk drive control semiconductor according to claim 4, wherein the substrate is formed by bending an FPC sheet on which a semiconductor device is mounted. How to coat body chips.
1 1 . 前記加圧、 加熱工程が、 前記第 2のコーティング層を軟化させると共 に、 該軟化した第 2のコ一ティング層を前記アンダーフィル材として基板と 半導体チップとの間に充填させる前記充填工程を兼ねることを特徴とする請 求項 4記載の磁気ディスク装置駆動制御用半導体チップのコ一ティング方法 c 11. The pressurizing and heating steps soften the second coating layer and fill the softened second coating layer between the substrate and the semiconductor chip as the underfill material. Koh one coating method c of the semiconductor chip for a magnetic disk device drive control of the請Motomeko 4, wherein the serves as the filling process
1 2 . 稜線部を面取りした半導体チップをコーティングすることを特徴とす る請求項 3記載の磁気ディスク装置駆動制御用半導体チップのコーティング 方法。 12. The method for coating a semiconductor chip for drive control of a magnetic disk drive according to claim 3, wherein the semiconductor chip having a chamfered ridge is coated.
1 3 . 稜線部を面取りした半導体チップをコーティングすることを特徴とす る請求項 4記載の磁気ディスク装置駆動制御用半導体チップのコーティング 方法。 13. The method for coating a semiconductor chip for drive control of a magnetic disk drive according to claim 4, wherein the semiconductor chip having a chamfered ridge is coated.
1 4 . 稜線部に段差部を形成した半導体チップをコーティングすることを特 徴とする請求項 3記載の磁気ディスク装置駆動制御用半導体チップのコーテ ィング方法。 14. The method for coating a semiconductor chip for drive control of a magnetic disk drive according to claim 3, wherein a semiconductor chip having a step portion formed on a ridge is coated.
1 5 . 稜線部に段差部を形成した半導体チップをコーティングすることを特 徴とする請求項 4記載の磁気ディスク装置駆動制御用半導体チップのコーテ ィング方法。 15. The coating method for a semiconductor chip for drive control of a magnetic disk drive according to claim 4, wherein a semiconductor chip having a step portion formed on a ridge is coated.
1 6 . 塵埃を封止込めるべく半導体チップをコーティング材で被覆する、 磁 気ディスク装置駆動制御用半導体チップのコーティング方法において、 半導体チップを基板にフリップチップ接続する工程と、 16. A method of coating a semiconductor chip for drive control of a magnetic disk device, wherein the semiconductor chip is coated with a coating material to seal in dust, wherein a step of flip-chip connecting the semiconductor chip to a substrate;
基板と半導体チップとの間にアンダーフィル材を充填する工程と、 熱硬化性樹脂からなる第 1のコ一ティング層上に、 熱硬化性樹脂樹脂であ つて、 前記第 1のコ一ティング層よりも、 軟化時の流れ性の高い樹脂からな る第 2のコーティング層が積層されたコーティング材を、 第 2のコ一ティン グ層を半導体チップ側に向けて半導体チップ上に載せ、 コ一ティング材を加 熱して、 前記第 1および第 2のコ一ティング層を軟化せしめて半導体チップ の側面をも覆った状態で硬化させる加熱工程とを含むことを特徴とする磁気 ディスク装置駆動制御用半導体チップのコーティング方法。 A step of filling an underfill material between the substrate and the semiconductor chip; and forming a thermosetting resin resin on the first coating layer made of the thermosetting resin. Then, a coating material in which a second coating layer made of a resin having a higher flowability at the time of softening is laminated than the first coating layer is laminated, and the second coating layer is formed on the semiconductor chip side. And heating the coating material to soften the first and second coating layers and cure the first and second coating layers while also covering the side surfaces of the semiconductor chip. A method for coating a semiconductor chip for drive control of a magnetic disk device, comprising:
1 7 . 塵埃を封止込めるべく半導体チップをコーティング材で被覆する、 磁 気ディスク装置駆動制御用半導体チップのコ一ティング方法において、 基板に半導体チップを実装する工程と、 17. A method of coating a semiconductor chip for drive control of a magnetic disk drive, wherein the semiconductor chip is coated with a coating material to seal in dust, a step of mounting the semiconductor chip on a substrate,
該実装した基板の側方をマスクで覆う工程と、  A step of covering the sides of the mounted substrate with a mask,
該マスクの孔内に、 マスク孔内壁に表面張力により這い上がりを生じるだ けの粘度の低いコーティング樹脂を注入して半導体チップを覆う注入工程と， 注入したコーティング樹脂を熱硬化もしくは紫外線硬化させる硬化工程と を含むことを特徴とする磁気ディスク装置駆動制御用半導体チップのコーテ ィング方法。  An injection step of injecting a coating resin having a viscosity low enough to cause a rise in the inner wall of the mask hole due to surface tension into the hole of the mask to cover the semiconductor chip, and curing the injected coating resin by heat curing or ultraviolet curing A method of coating a semiconductor chip for drive control of a magnetic disk drive, comprising:
PCT/JP2001/005776 2001-07-03 2001-07-03 Coating material of semiconductor chip for controlling magnetic disc drive and method of coating semiconductor chip for controlling magnetic disc drive WO2003005436A1 (en)

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