WO2002100137A1 - Verfahren und einrichtung zur strukturierung von leiterplatten - Google Patents
Verfahren und einrichtung zur strukturierung von leiterplatten Download PDFInfo
- Publication number
- WO2002100137A1 WO2002100137A1 PCT/DE2002/001750 DE0201750W WO02100137A1 WO 2002100137 A1 WO2002100137 A1 WO 2002100137A1 DE 0201750 W DE0201750 W DE 0201750W WO 02100137 A1 WO02100137 A1 WO 02100137A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- laser
- wavelength
- conductor structures
- field size
- laser beam
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
- H05K2203/108—Using a plurality of lasers or laser light with a plurality of wavelengths
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Definitions
- the invention relates to a method and a device for patterning of printed circuit boards having coarse conductor structures and with at least one area with fine conductor ⁇ structures, deposited on an electrically insulating substrate, a metal layer and is exposed from this metal layer by partially etching the desired conductor pattern.
- EP 0 062 300 A2 already discloses a method for producing printed circuit boards, in which a metallic etch resist applied to the entire surface of a metal layer is selectively removed again in the areas not corresponding to the conductor structures by means of laser radiation and then the conductor structures are etched off in such a way exposed metal layer are formed.
- a method for producing printed circuit boards in which a metal layer and a metallic or organic etching resist layer are applied in succession to a substrate, whereupon this etching resist layer is removed by means of laser radiation in the areas immediately adjacent to the later conductor track pattern and the metal layer thus exposed is etched away in such a way that the conductor track pattern and island regions of the metal layer electrically isolated therefrom by etching trenches remain on the substrate.
- the structuring by means of laser radiation can be carried out quickly since the areas of the etching resist layer to be removed need only have a small width and the larger areas remain between two conductor tracks.
- WO 00/04750 Al is also a process for the manufacture ⁇ development of coarse conductor structures and fine conductor structures described, an etching resist is patterned by photolithography in which, in the region of the coarse conductor structures currency rend in the region of the fine conductor structures an etching resist using a Laser beam is structured.
- the etch resist layers structured in this way in different ways are then etched in a known manner.
- the aim of the present invention is to provide a method and a device with which printed circuit boards with coarse and fine conductor structures can be structured in the simplest and most economical manner. According to the invention, this goal is achieved with the following process steps:
- a metal layer is applied to an electrically insulating substrate, b) an etching resist layer is applied to the metal layer, c) by partially removing the etching resist layer (61) with a first laser beam (14) of a predetermined first wavelength and one through a first imaging unit
- Wavelength and a second processing field size (4) predetermined by a second imaging unit (23) the contours (63) of the fine conductor structures nailge ⁇ sets, wherein the second wavelength is less than the he ⁇ ste wavelength and / or the second field size (4) is smaller than the first field size (3), e) by etching the exposed metal areas (62,67), the coarse and the fine conductor structures (31,41) are generated simultaneously and momentarily ⁇ f) by removing the remaining resist layer to expose the surfaces of the conductor structures.
- the invention therefore relates to producing both coarse and fine conductor structures using the same method steps, namely by structuring an etching resist layer and subsequent etching, but by taking into account the choice of different lasers to take account of the different conductor structures and correspondingly different insulation distances, and thereby for the respective structure to achieve the optimal processing speed.
- the invention makes use of the knowledge that a laser beam with a short wavelength and a short focal length can produce fine structures precisely in a small processing field, but is too slow for the processing of wider structures and larger fields for economical operation, while a laser beam with a long wavelength and a setting for a large focal length can process wider structures in a large processing field at a considerably higher speed.
- the first laser has a wavelength between 1064 nm and 355 nm, preferably 1064 nm
- the second laser has a wavelength between 532 and 266 nm, preferably 532 or 355 nm, the wavelength of the first laser being in any case greater than that of the second laser.
- the beam of the first laser is focused over a larger focal length than the beam of the second laser, whereby the first laser covers a larger processing area than the second.
- a device for the structuring of the managerial plates with a size coarse conductor structures and with at least ei ⁇ nem area with fine conductor structures has the following shopping ⁇ male to: a) a receptacle for positioning a printed circuit board, b) a first laser having a deflecting optical system and a Abbil- unit with a first focal length that is above the
- PCB surface can be positioned such that it is able to irradiate a first processing field size
- a second laser with deflection optics and an imaging unit with a second focal length which can irradiate a second processing field size, the second laser having a greater wavelength than the first laser and / or the second focal length and the second field size are smaller than the first focal length and the first field size
- a control device to use the first laser to produce large fields of the circuit board with coarse conductor structures and smaller fields of the circuit board with the second laser to irradiate finer conductor structures.
- FIG. 1 shows the schematic arrangement of two lasers for the method according to the invention
- FIGS. 3 to 6 show a section of a printed circuit board - in a sectional view - in the individual process stages in the production of the coarse and fine conductor structures according to the invention
- Figure 7 is a plan view of the wiring pattern according Fi gur ⁇ 6,
- FIG. 8 shows a diagram to illustrate the isolation trenches that can be achieved with different lasers depending on different layer thicknesses and different field sizes between the conductor structures and the achievable processing speeds.
- FIG. 1 An arrangement is shown schematically in FIG. 1 as is suitable for carrying out the method according to the invention.
- Two lasers namely a first laser 11 and a second laser 21, are arranged above a printed circuit board 1, which lies in a processing area on a table 10 which can be moved in its plane in the x and y directions.
- the first laser 11 generates a first laser beam 14 via deflection optics 12 and a lens arrangement 13, which is focused on the surface of the printed circuit board 1 and can sweep over a first, relatively large processing field 3 due to a relatively large first focal length.
- the second laser 21 generates a second laser beam 24 via its deflecting optics 22 and the lens arrangement 23, which due to the smaller focal length 25 is able to sweep over a smaller processing field 4.
- Both lasers 11 and 21 have a different wavelength.
- the laser 11 is a neodymium YAG laser with a wavelength of 1024 nm
- the laser 21 can be a neodymium vanadate laser with a wavelength of 532 or 355 nm.
- Both the two lasers 11 and 21 and the table are controlled by a central control unit 9.
- FIG. 2 schematically shows a large machining field 3 with coarse conductor track structures 31 and a small machining field 4 with fine conductor structures 41 arranged within the machining field 3.
- both the coarse structures 31 and the fine structures 41 are created with the aid of the two lasers 11 and 21 method according to the invention obtained.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-7015842A KR20040014547A (ko) | 2001-06-06 | 2002-05-15 | 인쇄회로판을 구조화하기 위한 방법 및 장치 |
EP02740352A EP1393603A1 (de) | 2001-06-06 | 2002-05-15 | Verfahren und einrichtung zur strukturierung von leiterplatten |
JP2003501975A JP2004527923A (ja) | 2001-06-06 | 2002-05-15 | 導体路基板の構造化方法および構造化装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10127357.6 | 2001-06-06 | ||
DE10127357A DE10127357C1 (de) | 2001-06-06 | 2001-06-06 | Verfahren und Einrichtung zur Strukturierung von Leiterplatten |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002100137A1 true WO2002100137A1 (de) | 2002-12-12 |
Family
ID=7687318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/001750 WO2002100137A1 (de) | 2001-06-06 | 2002-05-15 | Verfahren und einrichtung zur strukturierung von leiterplatten |
Country Status (8)
Country | Link |
---|---|
US (1) | US6783688B2 (de) |
EP (1) | EP1393603A1 (de) |
JP (1) | JP2004527923A (de) |
KR (1) | KR20040014547A (de) |
CN (1) | CN1513285A (de) |
DE (1) | DE10127357C1 (de) |
TW (1) | TW520625B (de) |
WO (1) | WO2002100137A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW453139B (en) * | 1998-07-13 | 2001-09-01 | Siemens Ag | Method to produce circuit-plates with coarse conductive patterns and at least one region with fine conductive patterns |
JP4253280B2 (ja) * | 2003-12-05 | 2009-04-08 | 三井金属鉱業株式会社 | プリント配線基板の製造方法 |
TWI384925B (zh) * | 2009-03-17 | 2013-02-01 | Advanced Semiconductor Eng | 內埋式線路基板之結構及其製造方法 |
DE102010019406B4 (de) * | 2010-05-04 | 2012-06-21 | Lpkf Laser & Electronics Ag | Verfahren zum partiellen Lösen einer definierten Fläche einer leitfähigen Schicht |
CN106550545A (zh) * | 2016-12-08 | 2017-03-29 | 湖北第二师范学院 | 一种基于物联网的全自动pcb制板系统及方法 |
CN107846783B (zh) * | 2017-11-13 | 2020-05-12 | 上海安费诺永亿通讯电子有限公司 | 一种分布在绝缘体不同方位表面的金属线路制造方法 |
KR102147177B1 (ko) * | 2018-07-02 | 2020-08-25 | 유한회사 대구특수금속 | 레이저 식각을 이용한 투명기판 베이스 칼라 명판 제작방법 및 그 투명기판 베이스 칼라 명판 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4429522A1 (de) * | 1993-08-26 | 1995-03-02 | Matsushita Electric Works Ltd | Verfahren zur Herstellung von Leiterplatten |
GB2286787A (en) * | 1994-02-26 | 1995-08-30 | Oxford Lasers Ltd | Selective machining by dual wavelength laser |
DE19719700A1 (de) * | 1997-05-09 | 1998-11-12 | Siemens Ag | Verfahren zur Herstellung von Sacklöchern in einer Leiterplatte |
WO2000004750A1 (de) * | 1998-07-13 | 2000-01-27 | Siemens S.A. | Verfahren zur herstellung von leiterplatten mit groben leiterstrukturen und mindestens einem bereich mit feinen leiterstrukturen |
WO2001038036A1 (de) * | 1999-11-29 | 2001-05-31 | Siemens Production And Logistics Systems Ag | Verfahren und vorrichtung zum bearbeiten von substraten mittels laserstrahlen |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3113855A1 (de) * | 1981-04-06 | 1982-10-21 | Fritz Wittig Herstellung gedruckter Schaltungen, 8000 München | Verfahren zur herstellung von leiterplatten |
JPS60119790A (ja) * | 1983-12-01 | 1985-06-27 | 三菱電機株式会社 | ハイブリツドic基板の微細パタ−ン形成方法 |
JPH04168702A (ja) * | 1990-10-31 | 1992-06-16 | Kyocera Corp | 厚膜抵抗体の抵抗値調整方法 |
DE4131065A1 (de) * | 1991-08-27 | 1993-03-04 | Siemens Ag | Verfahren zur herstellung von leiterplatten |
US5364493A (en) * | 1993-05-06 | 1994-11-15 | Litel Instruments | Apparatus and process for the production of fine line metal traces |
US5397433A (en) * | 1993-08-20 | 1995-03-14 | Vlsi Technology, Inc. | Method and apparatus for patterning a metal layer |
US5989989A (en) * | 1996-05-31 | 1999-11-23 | Texas Instruments Incorporated | Die and cube reroute process |
US5895581A (en) * | 1997-04-03 | 1999-04-20 | J.G. Systems Inc. | Laser imaging of printed circuit patterns without using phototools |
DE10106399C1 (de) * | 2001-02-12 | 2002-09-05 | Siemens Ag | Verfahren zur Herstellung von Schaltungsträgern mit groben Leiterstrukturen und mindestens einem Bereich mit feinen Leiterstrukturen |
-
2001
- 2001-06-06 DE DE10127357A patent/DE10127357C1/de not_active Expired - Fee Related
-
2002
- 2002-02-22 US US10/079,896 patent/US6783688B2/en not_active Expired - Fee Related
- 2002-03-19 TW TW091105155A patent/TW520625B/zh active
- 2002-05-15 CN CNA028113888A patent/CN1513285A/zh active Pending
- 2002-05-15 WO PCT/DE2002/001750 patent/WO2002100137A1/de active Application Filing
- 2002-05-15 EP EP02740352A patent/EP1393603A1/de not_active Withdrawn
- 2002-05-15 JP JP2003501975A patent/JP2004527923A/ja not_active Withdrawn
- 2002-05-15 KR KR10-2003-7015842A patent/KR20040014547A/ko not_active Application Discontinuation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4429522A1 (de) * | 1993-08-26 | 1995-03-02 | Matsushita Electric Works Ltd | Verfahren zur Herstellung von Leiterplatten |
GB2286787A (en) * | 1994-02-26 | 1995-08-30 | Oxford Lasers Ltd | Selective machining by dual wavelength laser |
DE19719700A1 (de) * | 1997-05-09 | 1998-11-12 | Siemens Ag | Verfahren zur Herstellung von Sacklöchern in einer Leiterplatte |
WO2000004750A1 (de) * | 1998-07-13 | 2000-01-27 | Siemens S.A. | Verfahren zur herstellung von leiterplatten mit groben leiterstrukturen und mindestens einem bereich mit feinen leiterstrukturen |
WO2001038036A1 (de) * | 1999-11-29 | 2001-05-31 | Siemens Production And Logistics Systems Ag | Verfahren und vorrichtung zum bearbeiten von substraten mittels laserstrahlen |
Also Published As
Publication number | Publication date |
---|---|
US20030000916A1 (en) | 2003-01-02 |
KR20040014547A (ko) | 2004-02-14 |
JP2004527923A (ja) | 2004-09-09 |
EP1393603A1 (de) | 2004-03-03 |
TW520625B (en) | 2003-02-11 |
US6783688B2 (en) | 2004-08-31 |
DE10127357C1 (de) | 2002-09-26 |
CN1513285A (zh) | 2004-07-14 |
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