WO2001089077A2 - Schaltungsanordnung zur toleranzkorrektur in einem frequenzdemodulator - Google Patents
Schaltungsanordnung zur toleranzkorrektur in einem frequenzdemodulator Download PDFInfo
- Publication number
- WO2001089077A2 WO2001089077A2 PCT/DE2001/001704 DE0101704W WO0189077A2 WO 2001089077 A2 WO2001089077 A2 WO 2001089077A2 DE 0101704 W DE0101704 W DE 0101704W WO 0189077 A2 WO0189077 A2 WO 0189077A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- demodulator
- dem
- circuit arrangement
- frequency
- arrangement according
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/001—Details of arrangements applicable to more than one type of frequency demodulator
- H03D3/002—Modifications of demodulators to reduce interference by undesired signals
Definitions
- G ⁇ s G rö & 4-) 4-1 N 41 G 3 l 41 0 ⁇ ⁇ 41 JJ -H -H G 0 G
- G rö G cn rö ⁇ ⁇ Es IS ⁇ ⁇ ü s -H ⁇ 0 CQ CQ -H rH 4-> ⁇ -rH rH -H 0
- the invention is based on the principle of connecting a detector to the output of a demodulator, so that when a reference signal is applied to the input of the demodulator, which has an adjustable resistance or an adjustable capacitance, a signal is present at the output of the demodulator which, in addition to its dependency the input signal also depends on the resistance and the capacitance, of which at least one component is adjustable.
- the deviation of the output signal from a target output signal expected when a reference signal is applied can thus be detected in the detector, for example with a window discriminator.
- the adjustable resistance or the adjustable capacitance can be changed with regard to their resistance value or capacitance value.
- resistance or capacitance values can be changed until a deviation of the output signal of the demodulator from the desired signal is zero or minimal. It is thus possible to correct the tolerances of tolerant capacitors and resistors.
- Time constants and assigned characteristic frequencies such as center or limit frequencies enable a very precise correction of manufacturing-related tolerances.
- the corrections of the resistance values or capacitance values can also be used to correct other components without having to measure them separately. Because the tolerances of tn O tn omo tn rH H ro ro
- a frequency generator is connected to the input of the demodulator in order to generate a reference frequency.
- This frequency generator can generate the target center frequency of a quadricorrelator or another characteristic frequency in a demodulator and the demodulator
- the demodulator has a target center frequency which is equal to the reference frequency of the frequency generator.
- a target voltage can be supplied to the detector for comparison with the output voltage.
- This setpoint voltage can be generated externally, that is to say outside the detector, for example by using a reference voltage, or provided internally in the detector.
- the target voltage is 0 volts.
- the output voltage is 0
- Servo mode prepare a reference signal that can be fed to the polyphase filter at the input in such a way that a signal for the correct phase control of the downstream demodulator is present at the output of the polyphase filter.
- a switch can be provided, which can be arranged in the I or Q path.
- the polyphase filter is used to filter out image frequencies.
- the reference frequency for feeding to the demodulator input can be divided down from the reference oscillator frequency of the receiver, which is usually present anyway.
- the high-frequency receiver can have a reference oscillator, which is followed by a divider, which is connected to the demodulator input.
- FIG. 1 shows a basic circuit diagram of a circuit arrangement for tolerance correction
- FIG. 2 shows a basic circuit diagram of a circuit arrangement according to FIG. 1 when used in a high-frequency receiver
- FIG. 3 shows a further basic circuit diagram of a circuit arrangement according to FIG. 2,
- Figure 4 is a schematic diagram of a circuit arrangement according to Figure 2 when used in an RF receiver with I and Q paths. 1
- G 42 G ⁇ rö tn ⁇ CQ 4-> Ti ti J 1 rtj • 4H -H 4-> rö rö G 0
- Block BB can be supplied.
- a setting mode which can precede a useful mode or normal mode, there is a switchover between an intermediate frequency signal that can be supplied at the input and a reference signal by providing a changeover switch or by switching off the supply voltage of the upstream block front end FR or frequency generator REF.
- FIG. 2 shows that the described principle of the RC tolerance correction, with which both deviations of a resistance from a desired value and a capacitance from a desired value can be compensated, can be implemented in a high-frequency receiver with little effort and a small number of additional components.
- FIG. 3 shows an exemplary embodiment of the invention according to FIG. 2, in which the reference frequency F can be derived at a divider DIV which is connected to a reference oscillator XO.
- a reference oscillator frequency XF can be derived at the reference oscillator XO. If there is a low intermediate frequency, which can be, for example, one megahertz, the reference frequency F can thus be divided down from a system clock with the reference oscillator frequency XF.
- a switch SW is connected upstream of the demodulator DEM to switch between the reference frequency F and the useful signal on the intermediate frequency level IF.
- a channel filter KF is arranged between the front end FR and the changeover switch SW, which is used to filter out the mirror frequencies that usually occur in superheterodyne receivers. Deriving the reference frequency from a system cycle has the advantage that the modifications to a receiver circuit required for RC tolerance correction are small and easy to implement.
- the intermediate frequency level according to FIG. 4 is in two paths for the
- the divider DIV from Figure 3 is in Figure 4 at a switch SW in the I path between Front end FR and channel filter KF arranged.
- the arrangement of the switch SW on the input side of the channel filter KF is important here. This is because the channel filter KF, which is used in normal operation for filtering image frequencies, can also be used in phase adjustment to control the demodulator DEM with the reference frequency F in the correct phase.
- the channel filter KF can be a polyphase filter.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Superheterodyne Receivers (AREA)
- Networks Using Active Elements (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE50109162T DE50109162D1 (de) | 2000-05-16 | 2001-05-04 | Schaltungsanordnung zur toleranzkorrektur in einem frequenzdemodulator |
JP2001585390A JP2003533929A (ja) | 2000-05-16 | 2001-05-04 | 周波数復調器において許容誤差を修正するための回路構造 |
EP01947129A EP1285493B1 (de) | 2000-05-16 | 2001-05-04 | Schaltungsanordnung zur toleranzkorrektur in einem frequenzdemodulator |
US10/298,832 US6985029B2 (en) | 2000-05-16 | 2002-11-18 | Circuit configuration for tolerance correction in a frequency demodulator |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10023873 | 2000-05-16 | ||
DE10023873.4 | 2000-05-16 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/298,832 Continuation US6985029B2 (en) | 2000-05-16 | 2002-11-18 | Circuit configuration for tolerance correction in a frequency demodulator |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001089077A2 true WO2001089077A2 (de) | 2001-11-22 |
WO2001089077A3 WO2001089077A3 (de) | 2002-11-28 |
Family
ID=7642196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2001/001704 WO2001089077A2 (de) | 2000-05-16 | 2001-05-04 | Schaltungsanordnung zur toleranzkorrektur in einem frequenzdemodulator |
Country Status (5)
Country | Link |
---|---|
US (1) | US6985029B2 (de) |
EP (1) | EP1285493B1 (de) |
JP (1) | JP2003533929A (de) |
DE (1) | DE50109162D1 (de) |
WO (1) | WO2001089077A2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7995679B2 (en) * | 2004-04-27 | 2011-08-09 | Broadcom Corporation | Method and system for charge sensing with variable gain, offset compensation, and demodulation |
EP2239860B1 (de) * | 2009-04-07 | 2012-08-15 | The Swatch Group Research and Development Ltd. | SIGNALEMPFÄNGER MIT FSK-MODULATION GROßER SENSIBILITÄT MIT GERINGEM DURCHSATZ |
US8873615B2 (en) * | 2012-09-19 | 2014-10-28 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Method and controller for equalizing a received serial data stream |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2207284A1 (de) * | 1972-11-17 | 1974-06-14 | Siemens Ag | |
DE3613994A1 (de) * | 1986-04-25 | 1987-10-29 | Schrack Elektronik Ag | Schaltungsanordnung zum demodulieren frequenzmodulierter signale |
EP0255175A2 (de) * | 1986-08-01 | 1988-02-03 | Philips Electronics Uk Limited | Demodulierung eines winkelmodulierten Signals |
EP0574083A1 (de) * | 1992-06-12 | 1993-12-15 | Koninklijke Philips Electronics N.V. | FM-Quadratur-Demodulator |
EP0948128A1 (de) * | 1998-04-03 | 1999-10-06 | Motorola Semiconducteurs S.A. | Unterdrückung von Gleichspannungsverschiebungen in einem Quadratureempfänger |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2472302A1 (fr) | 1979-12-21 | 1981-06-26 | Thomson Csf | Circuit a asservissement de phase, et dispositif comportant un tel circuit notamment pour la television |
JP3413060B2 (ja) * | 1997-05-13 | 2003-06-03 | 松下電器産業株式会社 | 直接変換受信機 |
-
2001
- 2001-05-04 JP JP2001585390A patent/JP2003533929A/ja active Pending
- 2001-05-04 WO PCT/DE2001/001704 patent/WO2001089077A2/de active IP Right Grant
- 2001-05-04 EP EP01947129A patent/EP1285493B1/de not_active Expired - Lifetime
- 2001-05-04 DE DE50109162T patent/DE50109162D1/de not_active Expired - Lifetime
-
2002
- 2002-11-18 US US10/298,832 patent/US6985029B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2207284A1 (de) * | 1972-11-17 | 1974-06-14 | Siemens Ag | |
DE3613994A1 (de) * | 1986-04-25 | 1987-10-29 | Schrack Elektronik Ag | Schaltungsanordnung zum demodulieren frequenzmodulierter signale |
EP0255175A2 (de) * | 1986-08-01 | 1988-02-03 | Philips Electronics Uk Limited | Demodulierung eines winkelmodulierten Signals |
EP0574083A1 (de) * | 1992-06-12 | 1993-12-15 | Koninklijke Philips Electronics N.V. | FM-Quadratur-Demodulator |
EP0948128A1 (de) * | 1998-04-03 | 1999-10-06 | Motorola Semiconducteurs S.A. | Unterdrückung von Gleichspannungsverschiebungen in einem Quadratureempfänger |
Also Published As
Publication number | Publication date |
---|---|
EP1285493A2 (de) | 2003-02-26 |
WO2001089077A3 (de) | 2002-11-28 |
US20040018825A1 (en) | 2004-01-29 |
US6985029B2 (en) | 2006-01-10 |
DE50109162D1 (de) | 2006-05-04 |
JP2003533929A (ja) | 2003-11-11 |
EP1285493B1 (de) | 2006-03-08 |
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