Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3105—After-treatment
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
  • H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
  • H01L21/02351—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3105—After-treatment
  • H01L21/31058—After-treatment of organic layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
  • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
  • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
  • H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
  • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
  • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
  • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
  • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Definitions

• This invention relates generally to the fabrication of semiconductor devices and, more particularly, to methods for curing spin-on dielectric materials used in semiconductor devices
• Interlayer dielectrics utilized in multilevel interconnection in manufacturing of ultra-large scale integrated circuits have requirements to provide gap filing into high aspect ratio gaps (between metal conductors) and a high flatness of the topology (planarization)
• TEOS Tetraethylorthosilicate
• CVD chemical vapor deposition
• CMP chemical mechanical polishing
• spin-on-glass materials After a cure at this lower temperature, some spin-on-glass materials contain significant amounts of residual silanols and carbon, and can readily absorb water
• the dielectric properties (for example, dielectric constant) of a spin-on-glass film are influenced by the silanol and water content of the film
• a major disadvantage of thermal methods of curing spin on glass at high temperature is cracking of the spin-on-glass film Because the spin-on-glass is constrained in a horizontal plane (at the substrate interface), it can only shrink in the vertical direction This creates great stresses in the spin-on-glass film when it has been baked at very high temperature These stresses, and the subsequent cracking, have limited spin-on-glass applications despite their favorable attributes planarization and good gap filling ability Additionally, the etch rate of thermally cured spin-on-glass is poor compared to
• Interface states can be negatively charged and can affect the threshold voltage in MOS transistors. Electron beam irradiation can cause the creation of neutral electron traps in silicon dioxide films.
• Radiation induced neutral electron traps can enhance hot electron instabilities.
• hot electron emission from the silicon substrate into the silicon dioxide layer can occur. A portion of these electrons maybe trapped. This trapped charge causes undesirable effects such as threshold voltage shifts and transconductance degradation.
• the invention disclosed utilizes a large area electron beam to irradiate spin-on- glass or spin-on-polymer dielectric insulating materials in a soft vacuum environment in combination with infra-red lamps to indirectly heat the materials.
• Electron beam irradiation of spin-on dielectric materials provides dielectric films with similar or improved properties compared with the properties of the same materials that have been thermally cured.
• electron beam curing can provide cured material with lower dielectric constants than thermal curing.
• electron beam curing results in decreasing the etch rate in a buffered oxide etch solution and in modifying the rate of chemical mechanical polishing of the material as compared with thermal curing Further, process times for electron beam curing are shorter than process times of typical thermal cure processes.
• a method of modifying the properties of a layer of spin-on-glass or spin-on-polymer includes irradiating the layer with a large-area electron beam in a non-oxidizing environment while simultaneously applying heat to the layer until a sufficient electron dose has accumulated to provide a layer with a dielectric constant less than or about equal to the dielectric constant of a thermally cured layer of the same material
• a total dose of between 10 and 100,000 microCoulombs per square centimeter ( ⁇ C/cm 2 ) may be used
• a dose of between 100 and 10,000 ⁇ C/cm 2 is used, and most preferably a dose of between about 2,000 and 5,000 ⁇ C/cm is used
• the electron beam is delivered at an energy of between 0 1 and 100 keV, preferably at an energy between 0 5 and 20 keV, and most preferably at an energy between 1 and 10 keV
• the electron beam current ranges between 0.1 and 100 mA, more preferably between 1 and 30 m
• a method of fabricating an integrated circuit device includes patterning a metal film on a substrate, depositing a layer of a spin-on glass or spin-on-polymer material on the metal film, irradiating the layer as described above, patterning a via into the irradiating layer, and filling the via with metal The process may be repeated to produce multiple metal interconnect layers BRIEF DESCRIPTION OF THE DRAWINGS
• Figures 1 and 2 illustrate a cross-sectional view of the process of the invention showing the electron beam exposure apparatus, the substrate being cured and the vacuum chamber
• Figure 3 is a graph of post-cure shrinkage of Al edSignal Inc 312B and 512B methylsiloxane films after irradiation at 3,000, 5,000, and 7,000 ⁇ C/cm 2 at processing temperatures of 300 and 400°C
• Figure 4 is a graph of index of refraction of AlhedSignal Inc 312B and 512B methylsiloxane films after irradiation at 3,000, 5,000, and 7,000 ⁇ C/cm 2 at processing temperatures of 300 and 400°C
• index of refraction for uncured films denoted 0 ⁇ C/cm 2 at RT
• Figure 5 is a graph of dielectric constant of AlhedSignal Inc 312B and 512B methylsiloxane films after irradiation at 3,000, 5,000, and 7,000 ⁇ C/cm 2 at processing temperature of 300°C
• the dielect ⁇ c constant after thermal cure at 400°C is plotted at the dose labeled as "400"
• Electron beam irradiation is used to cure spin-on glass and spin-on polymer materials that form insulating dielectric layers in semiconductor devices
• the process conditions such as electron beam total dose and energy, temperature of the layer, and ambient atmosphere
• the properties of the cured dielectric layers can be modified
• electron beam curing provides films with dielect ⁇ c constants lower than those of the same material cured by conventional thermal processes
• Conventional thermal processes include processes commonly used in semiconductor fabrication such as subjecting spin- on layers to temperatures between about 350 and 500°C for time periods in excess of about 30 minutes
• Typical spin-on-glass materials include methylsiloxane, methylsilsesquioxane, phenylsiloxane, phenylsilsesquioxane, methylphenylsiloxane, methylphenylsilsesquioxane, and silicate polymers
• Spin-on-glass materials also include hydrogensiloxane polymers of the general formula (H 0 - ⁇
• Organic polymer dielectric materials often referred to as spin-on polymers, include, polyimides, polytetrafluoroethylene, parylenes, fluorinated and non fluorinated poly(arylene ethers), for example the poly(arylene ether) available under the tradename FLARETM from AlhedSignal Inc , and the polymeric material obtained from phenyl- ethynylated aromatic monomers and oligomers, provided by Dow Chemical Company under the tradename SiLKTM, among other materials
• FIGs 1 and 2 A substrate 27 is placed in a vacuum chamber 20 at a pressure of 15-40 millitorr and underneath an electron source at a distance from the source sufficient for the electrons to generate ions in their transit between the source and the substrate surface
• the electrons can be generated from any type of source that will work within a soft vacuum (15 - 40 millitorr) environment
• a source particularly well suited for this is described in US Patent No 5,003, 178, the disclosure of which is hereby incorporated into this specification by reference This is a large uniform and stable source that can operate in a soft vacuum environment
• the cathode 22 emits electrons and these are accelerated by the field between the cathode and anode 26
• the potential between these two electrodes is generated by the high voltage supply 29 applied to the cathode 22 and the bias voltage supply 30 applied to the anode 26.
• Dielectric layer 28 may be any of the spin-on- glass or spin-on-polymer materials described above.
• a sufficient electron energy is selected to fully penetrate the full thickness of dielectric layer 28. for example, an electron beam energy of 9 keV is used to penetrate a 6000 A thick film.
• Quartz lamps irradiate the bottom side of the substrate providing heating independent from the electron beam.
• a variable leak valve or mass flow controller, identified by reference 32, is utilized to leak in a suitable gas to maintain the soft vacuum environment.
• the lamps 36 (see Fig. 1) irradiate and heat the wafer or substrate thereby controlling its temperature. Since the wafer is in a vacuum environment and thermally isolated the wafer can be heated or cooled by radiation. If the lamps are extinguished the wafer will radiate away its heat to the surrounding surfaces and gently cool. In one embodiment of the invention the wafer is simultaneously heated by the infrared lamps and irradiated by the electron beam throughout the entire process.
• a solution containing a spin-on-glass or spin-on-polymer material is deposited on substrate 27 by conventional means such as spin-coating, or alternatively, spray-coating or dip-coating, to form dielectric layer 28.
• Integrated circuit devices typically include multiple metal layers and metal interconnect layers.
• Substrate 27 represents any layer or stack of layers on a multiple-metal layer device.
• the coated substrate is continuously irradiated with electrons until a sufficient dose has accumulated to cure the material and affect certain film properties such as refractive index, resistance to etchant chemicals, and dielectric constant
• a total dose of between 10 and 100,000 microCoulombs per square centimeter ( ⁇ C/cm 2 ) may be used
• a dose of between 100 and 10,000 ⁇ C/cm 2 is used, and most preferably a dose of between about 2,000 and 5,000 ⁇ C/cm 2 is used
• the electron beam is delivered at an energy of between 0 1 and 100 keV, preferably at an energy between 0 5 and 20 keV, and most preferably at an energy between 1 and 10 keV
• the electron beam current ranges between 0 1 and 100 mA, more preferably between 1 and 30 mA and most preferably between about 3 and about 20 mA
• the entire electron dose may be delivered at a single voltage Alternatively, particularly for films thicker than about 0 25 ⁇ m, the dose is divided into steps of
• the wafer is kept at a temperature between 10° and 1000°C
• the wafer temperature is between 30° and 500°C and most preferably between 200° and 400°C
• the infrared quartz lamps 36 are on continuously until the wafer temperature reaches the desired process temperature
• Typical background process gases in the soft vacuum environment include nitrogen, argon, oxygen, ammonia, forming gas, helium, methane, hydrogen, silane, and mixtures thereof
• a non-oxidizing processing atmosphere is used
• an oxidizing atmosphere would be appropriate
• the optimal choice of electron beam dose, energy, and current, processing temperature, and process gas depends on the composition of the spin-on-glass or spin-on-polymer material For a methylsiloxane spin-on-glass material, for example, it has been found that electron beam curing at a total dose of between
• Electron beam curing of spin-on-glass and spin-on-polymer materials is readily integrated into semiconductor fabrication processes
• a metal film or layer stack of metal films is deposited on a substrate
• the metal film stack is patterned using standard photolithographic and etch process steps
• a coating solution containing a spin-on-glass or spin-on-polymer dielectric material is deposited on the patterned stack
• the coated stack is processed using a large area electron beam source according to the methods of the present invention
• the dielectric material may be capped with a silicon dioxide layer for chemical mechanical polishing for global planarization
• the dielectric layer may be coated with a hard mask material to act as an etch stop or to protect the dielectric layer during chemical mechanical polishing
• electron beam irradiation could be used to modify the top layer of, for example, a methyl siloxane spin-on-glass
• vias are patterned into the dielectric layer using standard photolithographic and etch processes
• the vias are filled with metal to connect metal interconnect levels
• both vias and trenched are patterned into the dielectric material.
• the vias and trenches are filled with a barrier layer and then with metal
• the metal layer is planarized by chemical mechanical polishing. As many layers as desired are formed above the metal ayer by repeating the same sequence of steps
• a large area electron source irradiates the entire wafer in a soft vacuum (10 - 40 millitorr)
• the electrons traversing from the anode of the electron gun to the substrate ionize a portion of the gas molecules creating positive ions Any charge build up on the surface of the substrate is quickly neutralized by the positive ions in the vicinity of the wafer surface This allows the exposure of spin-on-glass insulating films without any requirement for a conductive coating to drain off charge.
• Subsurface charge dissipation (within the insulating or silicon dioxide layer) is achieved by electron beam induced conductivity
• the entire wafer is exposed simultaneously by high energy electron beam Therefore the entire irradiated surface is made conductive and able to dissipate the charge injected by the incident electrons to the surface where they are neutralized by positive ions
• the combination of large area electron beam irradiation and raising the temperature of the spin-on-glass increases the electron beam conductivity of the oxide layers which dissipate charge build up created by the impinging electron beam This allows the silicon dioxide to be crosslinked and cured without inducing any electron traps or positive charge build-up in the oxide layers This is a new and novel result
• the electron beam induced conductivity effect is dependent on substrate temperature (becoming more conductive with increasing temperature).
• the method taught in this invention typically utilizes substrate temperatures between 200 and 400° C. This process temperature increases the electron beam induced conductivity effect and therefore accentuates the charge dissipation from the bulk subsurface layers reducing or eliminating the formation of electron/hole traps.
• the infra-red lamps are not used to heat the water
• the electron beam is used to both irradiate and heat the wafer
• the wafer or substrate can be cooled via a cooled plate. This will keep the wafer or substrate close to ambient temperature and the spin-on-glass film can still be cured with only electron beam irradiation. This process could be used on devices that cannot tolerate even the 200 C temperature used in the embodiment described above.
• AlhedSignal Inc. (Morristown, NJ) was used for the electron beam irradiation.
• Film thickness was measured on a J A Woollam M-88 spectroscopic ellipsometer using a 21 point film thickness map
• post-bake that is pre-cure
• thickness was between 2900 A and 3000 A
• the post-bake thickness was between 4800 A and 5500
• Film shrinkage reported as the change in thickness after electron beam treatment, is plotted in Fig 3
• Film shrinkage varies between 27 and 31 % for electron beam processing at 300°C and between 28 and 32 % for electron beam processing at 400°C
• the shrinkage for films that were thermally cured at 400°C for one hour is about 10 %
• the index of refraction is shown graphically in Fig 4 , where the value after electron beam processing is compared with the post-bake value of about 1 43
• the index of refraction is very similar to that for thermally cured wafers of 1 51
• Dielectric constant after thermal cure and as a function of electron beam dose at 300°C is shown in Fig 5 As discussed above, the dielectric constant decreases from 3 1 after thermal cure to 2 8 at 3,000 ⁇ C/cm 2 and to 2 9 at 5,000 ⁇ C/cm 2 However, after processing at 7,000 ⁇ C/cm 2 , a dielectric constant of about 4 is obtained This observation is consistent with the interpretation that, at the highest dose investigated, the methylsiloxane film has been largely transformed to a silicon oxide-like material
• wet etch rate of 512B in a 50 1 water/hydrofluoric acid buffered oxide etch solution was measured The wet etch rate decreases with increasing dose level and processing temperature At 400°C, the wet etch rate is about 38 nm/min at a dose of 3,000 ⁇ C/cm 2 and about 25 nm/min at a dose of 5,000 ⁇ C/cm 2 , which is at least a factor of 10 slower than the typical wet etch rates of thermally cured 512B material
• Klebosol 1501-50 slurry Results for 512B at 300°C processing temperature are shown as a function of electron beam dose and for thermally cured material in Fig 6
• the removal rate drops from about 650 nm/min for a thermally cured material to about 350 nm/min at the highest dose investigated.
• the CMP removal rate for thermal silicon oxide under hese conditions is about 250 nm/min.
• the CMP results together with the dielectric constant, refractive index, and film shrinkage data support the suggestion above that electron beam curing at 7,000 ⁇ C/cm 2 transforms the methylsiloxane to a silicon oxide-like material.
• Films of the poly(arylene ether) spin-on-polymer material provided by AlhedSignal Inc. under the tradename FLARETM, were prepared by spin coating onto silicon wafers at 3000 rpm for 30 seconds, using a Dia-Nippon Screen spincoater, and baking for one minute each at 150°, 200°, and 250°C. Uniform dose (four-step) electron beam irradiation was performed as described in Example 1 according to the conditions given below in Table 2.
• the present invention represents a significant advance in the processing of spin-on-glass and spin-on-polymer materials
• the invention provides a method of curing spin-on-glass and spin-on polymer materials with electron beam irradiation that provides dielectric films with similar or improved properties compared with the properties of the same materials when subjected to thermal curing
• films with dielectric constants lower than the dielectric constants from thermally cured films have been obtained
• film properties can be modified by adjusting the electron beam dose
• This improved method can be performed more quickly than high temperature thermal curing and at lower temperatures
• electron beam damage to the sensitive oxides is minimized if not eliminated

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