WO2001037335A3 - Verpackung für einen halbleiterchip - Google Patents

Verpackung für einen halbleiterchip Download PDF

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Publication number
WO2001037335A3
WO2001037335A3 PCT/EP2000/011254 EP0011254W WO0137335A3 WO 2001037335 A3 WO2001037335 A3 WO 2001037335A3 EP 0011254 W EP0011254 W EP 0011254W WO 0137335 A3 WO0137335 A3 WO 0137335A3
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor chip
packaging
slot
frame
nubbins
Prior art date
Application number
PCT/EP2000/011254
Other languages
English (en)
French (fr)
Other versions
WO2001037335A2 (de
Inventor
Knut Kahlisch
Volker Strutz
Original Assignee
Infineon Technologies Ag
Knut Kahlisch
Volker Strutz
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Knut Kahlisch, Volker Strutz filed Critical Infineon Technologies Ag
Priority to US10/111,294 priority Critical patent/US6724076B1/en
Publication of WO2001037335A2 publication Critical patent/WO2001037335A2/de
Publication of WO2001037335A3 publication Critical patent/WO2001037335A3/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01068Erbium [Er]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Packaging Frangible Articles (AREA)
  • Wire Bonding (AREA)

Abstract

Die Erfindung betrifft eine Verpackung für einen Halbleiterchip (10), bei der auf der Trägerplatine (1) auf der Seite der Nubbins (8) ein den Slot (5) unmittelbar umgebende Rahmen (9) vorgesehen ist, der die gleiche Höhe aufweist, wie die Nubbins (8) und daß der Slot (5) und der diesen umgebende Rahmen (9) wenigstens teilweise mit einer Vergußmasse verfüllt ist, die bevorzugt an den thermischen Ausdehnungskoeffizienten des Halbleiterchips (10) angepaßt ist.
PCT/EP2000/011254 1999-11-15 2000-11-14 Verpackung für einen halbleiterchip WO2001037335A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/111,294 US6724076B1 (en) 1999-11-15 2000-11-14 Package for a semiconductor chip

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19954888A DE19954888C2 (de) 1999-11-15 1999-11-15 Verpackung für einen Halbleiterchip
DE19954888.9 1999-11-15

Publications (2)

Publication Number Publication Date
WO2001037335A2 WO2001037335A2 (de) 2001-05-25
WO2001037335A3 true WO2001037335A3 (de) 2001-12-13

Family

ID=7929086

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2000/011254 WO2001037335A2 (de) 1999-11-15 2000-11-14 Verpackung für einen halbleiterchip

Country Status (4)

Country Link
US (1) US6724076B1 (de)
DE (1) DE19954888C2 (de)
TW (1) TW508771B (de)
WO (1) WO2001037335A2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10127010B4 (de) * 2001-06-05 2009-01-22 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip auf einem spannungsreduzierten Substrat
DE10127009A1 (de) * 2001-06-05 2002-12-12 Infineon Technologies Ag Kunststoffgehäuse mit mehreren Halbleiterchips und einer Umverdrahtungsplatte sowie ein Verfahren zur Herstellung des Kunststoffgehäuses in einer Spritzgußform
DE10129387A1 (de) * 2001-06-20 2003-01-09 Infineon Technologies Ag Elektronisches Bauteil und Verfahren zu seiner Herstellung
US7485951B2 (en) * 2001-10-26 2009-02-03 Entorian Technologies, Lp Modularized die stacking system and method
US7656678B2 (en) 2001-10-26 2010-02-02 Entorian Technologies, Lp Stacked module systems
US20060255446A1 (en) 2001-10-26 2006-11-16 Staktek Group, L.P. Stacked modules and method
US7109588B2 (en) * 2002-04-04 2006-09-19 Micron Technology, Inc. Method and apparatus for attaching microelectronic substrates and support members
DE10238581B4 (de) * 2002-08-22 2008-11-27 Qimonda Ag Halbleiterbauelement
DE10254648A1 (de) * 2002-11-22 2004-06-09 Infineon Technologies Ag Trägerstruktur für einen Chip und Verfahren zum Herstellen derselben
DE10325029B4 (de) 2003-06-02 2005-06-23 Infineon Technologies Ag Substratbasiertes Chip-Package
DE10327515B4 (de) 2003-06-17 2009-07-30 Qimonda Ag Verfahren zum Herstellen eines substratbasierten IC-Packages
DE10347320A1 (de) * 2003-10-08 2005-05-19 Infineon Technologies Ag Anordnung eines auf einem Substrat aufbauenden Chip-Packages und Substrat zur Herstellung desselben
TWI241697B (en) * 2005-01-06 2005-10-11 Siliconware Precision Industries Co Ltd Semiconductor package and fabrication method thereof
DE102005003390B4 (de) * 2005-01-24 2007-09-13 Qimonda Ag Substrat für ein FBGA-Halbleiterbauelement
US8278751B2 (en) * 2005-02-08 2012-10-02 Micron Technology, Inc. Methods of adhering microfeature workpieces, including a chip, to a support member
US7033861B1 (en) * 2005-05-18 2006-04-25 Staktek Group L.P. Stacked module systems and method
US7417310B2 (en) * 2006-11-02 2008-08-26 Entorian Technologies, Lp Circuit module having force resistant construction
DE102006062473A1 (de) 2006-12-28 2008-07-03 Qimonda Ag Halbleiterbauelement mit auf einem Substrat montiertem Chip
US7749810B2 (en) * 2007-06-08 2010-07-06 Analog Devices, Inc. Method of packaging a microchip having a footprint that is larger than that of the integrated circuit
DE102014200126A1 (de) * 2014-01-08 2014-12-04 Robert Bosch Gmbh Bauteil mit einem Halbleiterbauelement auf einem Träger
DE102014008838B4 (de) * 2014-06-20 2021-09-30 Kunststoff-Zentrum In Leipzig Gemeinnützige Gmbh Spannungsreduzierendes flexibles Verbindungselement für ein Mikroelektroniksystem

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644445A (en) * 1982-12-27 1987-02-17 Seiko Epson Kabushiki Kaisha Resin mounting structure for an integrated circuit
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
DE9417734U1 (de) * 1994-11-08 1995-03-16 Zentr Mikroelekt Dresden Gmbh Halbleiteranordnung für Chip-Module
EP0810655A2 (de) * 1996-05-29 1997-12-03 Texas Instruments Incorporated Eine Packung für eine Halbleiteranordnung
WO1999007014A1 (en) * 1997-08-01 1999-02-11 Minnesota Mining And Manufacturing Company Interposer/adhesive composite
DE29902754U1 (de) * 1998-02-20 1999-05-06 Mikroelektronik Packaging Dres Häusung für ein Halbleiterchip
US5920118A (en) * 1996-12-18 1999-07-06 Hyundai Electronics Industries Co., Ltd. Chip-size package semiconductor
WO2000042648A1 (en) * 1999-01-11 2000-07-20 Micron Technology, Inc. Attaching a semiconductor to a substrate
US6126428A (en) * 1994-12-29 2000-10-03 Tessera, Inc. Vacuum dispense apparatus for dispensing an encapsulant

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1197569A (ja) 1997-09-16 1999-04-09 Nec Kofu Ltd 半導体パッケージ
JP2000156435A (ja) * 1998-06-22 2000-06-06 Fujitsu Ltd 半導体装置及びその製造方法
US6528408B2 (en) * 2001-05-21 2003-03-04 Micron Technology, Inc. Method for bumped die and wire bonded board-on-chip package
TW483134B (en) * 2001-06-13 2002-04-11 Walsin Advanced Electronics Micro BGA package

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644445A (en) * 1982-12-27 1987-02-17 Seiko Epson Kabushiki Kaisha Resin mounting structure for an integrated circuit
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
DE9417734U1 (de) * 1994-11-08 1995-03-16 Zentr Mikroelekt Dresden Gmbh Halbleiteranordnung für Chip-Module
US6126428A (en) * 1994-12-29 2000-10-03 Tessera, Inc. Vacuum dispense apparatus for dispensing an encapsulant
EP0810655A2 (de) * 1996-05-29 1997-12-03 Texas Instruments Incorporated Eine Packung für eine Halbleiteranordnung
US5920118A (en) * 1996-12-18 1999-07-06 Hyundai Electronics Industries Co., Ltd. Chip-size package semiconductor
WO1999007014A1 (en) * 1997-08-01 1999-02-11 Minnesota Mining And Manufacturing Company Interposer/adhesive composite
DE29902754U1 (de) * 1998-02-20 1999-05-06 Mikroelektronik Packaging Dres Häusung für ein Halbleiterchip
WO2000042648A1 (en) * 1999-01-11 2000-07-20 Micron Technology, Inc. Attaching a semiconductor to a substrate

Also Published As

Publication number Publication date
US6724076B1 (en) 2004-04-20
WO2001037335A2 (de) 2001-05-25
DE19954888A1 (de) 2001-05-23
TW508771B (en) 2002-11-01
DE19954888C2 (de) 2002-01-10

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