WO1999063582A3 - Verfahren zum herstellen von halbleiterbauelementen - Google Patents

Verfahren zum herstellen von halbleiterbauelementen Download PDF

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Publication number
WO1999063582A3
WO1999063582A3 PCT/DE1999/001556 DE9901556W WO9963582A3 WO 1999063582 A3 WO1999063582 A3 WO 1999063582A3 DE 9901556 W DE9901556 W DE 9901556W WO 9963582 A3 WO9963582 A3 WO 9963582A3
Authority
WO
WIPO (PCT)
Prior art keywords
epitaxial
semiconductor elements
producing semiconductor
windows
reactor
Prior art date
Application number
PCT/DE1999/001556
Other languages
English (en)
French (fr)
Other versions
WO1999063582A2 (de
Inventor
Volker Haerle
Original Assignee
Osram Opto Semiconductors Gmbh
Volker Haerle
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh, Volker Haerle filed Critical Osram Opto Semiconductors Gmbh
Priority to JP2000552709A priority Critical patent/JP3602443B2/ja
Priority to EP99936327A priority patent/EP1086488B1/de
Priority to DE59914127T priority patent/DE59914127D1/de
Publication of WO1999063582A2 publication Critical patent/WO1999063582A2/de
Publication of WO1999063582A3 publication Critical patent/WO1999063582A3/de
Priority to US09/722,461 priority patent/US6864112B1/en
Priority to US10/625,118 priority patent/US6838391B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching

Abstract

Verfahren zum Herstellen von Halbleiterbauelementen mittels Epitaxie, das folgende Verfahrensschritte aufweist: a) Aufbringen einer HF-löslichen Maskenschicht mit Epitaxiefenstern auf ein Epitaxiesubstrat, b) epitaktisches Abscheiden einer Halbleiter-Schicht oder -Schichtenfolge auf den von den Epitaxiefenstern freigehaltenen Bereichen des Epitaxiesubstrats in einem Epitaxiereaktor und c) Entfernen des Maskenmaterials mittels einer Fluorverbindung, die in den Epitaxiereaktor eingeleitet wird.
PCT/DE1999/001556 1998-05-29 1999-05-25 Verfahren zum herstellen von halbleiterbauelementen WO1999063582A2 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000552709A JP3602443B2 (ja) 1998-05-29 1999-05-25 半導体素子の製法
EP99936327A EP1086488B1 (de) 1998-05-29 1999-05-25 Verfahren zum herstellen von halbleiterbauelementen
DE59914127T DE59914127D1 (de) 1998-05-29 1999-05-25 Verfahren zum herstellen von halbleiterbauelementen
US09/722,461 US6864112B1 (en) 1998-05-29 2000-11-28 Method of production of a patterned semiconductor layer
US10/625,118 US6838391B2 (en) 1998-05-29 2003-07-22 Method of semiconductor processing including fluoride

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19824142A DE19824142A1 (de) 1998-05-29 1998-05-29 Verfahren zum Ätzen von flourwasserstofflöslichen Schichten
DE19824142.9 1998-05-29

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US09/722,461 Continuation US6864112B1 (en) 1998-05-29 2000-11-28 Method of production of a patterned semiconductor layer

Publications (2)

Publication Number Publication Date
WO1999063582A2 WO1999063582A2 (de) 1999-12-09
WO1999063582A3 true WO1999063582A3 (de) 2000-02-17

Family

ID=7869363

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1999/001556 WO1999063582A2 (de) 1998-05-29 1999-05-25 Verfahren zum herstellen von halbleiterbauelementen

Country Status (6)

Country Link
US (2) US6864112B1 (de)
EP (1) EP1086488B1 (de)
JP (1) JP3602443B2 (de)
CN (1) CN1155992C (de)
DE (2) DE19824142A1 (de)
WO (1) WO1999063582A2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004336040A (ja) * 2003-04-30 2004-11-25 Osram Opto Semiconductors Gmbh 複数の半導体チップの製造方法および電子半導体基体
KR100682879B1 (ko) * 2005-01-07 2007-02-15 삼성코닝 주식회사 결정 성장 방법
TWI326691B (en) * 2005-07-22 2010-07-01 Kraton Polymers Res Bv Sulfonated block copolymers, method for making same, and various uses for such block copolymers
US8012539B2 (en) 2008-05-09 2011-09-06 Kraton Polymers U.S. Llc Method for making sulfonated block copolymers, method for making membranes from such block copolymers and membrane structures
US8445631B2 (en) * 2009-10-13 2013-05-21 Kraton Polymers U.S. Llc Metal-neutralized sulfonated block copolymers, process for making them and their use
US8263713B2 (en) * 2009-10-13 2012-09-11 Kraton Polymers U.S. Llc Amine neutralized sulfonated block copolymers and method for making same
US9429366B2 (en) 2010-09-29 2016-08-30 Kraton Polymers U.S. Llc Energy recovery ventilation sulfonated block copolymer laminate membrane
US9394414B2 (en) 2010-09-29 2016-07-19 Kraton Polymers U.S. Llc Elastic, moisture-vapor permeable films, their preparation and their use
JP5802755B2 (ja) 2010-10-18 2015-11-04 クレイトン・ポリマーズ・ユー・エス・エル・エル・シー スルホン化ブロックコポリマー組成物の製造方法
US9861941B2 (en) 2011-07-12 2018-01-09 Kraton Polymers U.S. Llc Modified sulfonated block copolymers and the preparation thereof
US9678329B2 (en) 2011-12-22 2017-06-13 Qualcomm Inc. Angled facets for display devices

Citations (3)

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Publication number Priority date Publication date Assignee Title
US4614564A (en) * 1984-12-04 1986-09-30 The United States Of America As Represented By The United States Department Of Energy Process for selectively patterning epitaxial film growth on a semiconductor substrate
JPH0246407A (ja) * 1988-08-05 1990-02-15 Seiko Epson Corp 光導波路及びその製造方法
EP0681315A1 (de) * 1994-05-02 1995-11-08 Motorola, Inc. Selektives Herstellungsverfahren von Halbleitergebieten

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US4816098A (en) * 1987-07-16 1989-03-28 Texas Instruments Incorporated Apparatus for transferring workpieces
JPH01270287A (ja) 1988-04-21 1989-10-27 Nec Corp 半導体レーザーの製造方法
GB2228617A (en) * 1989-02-27 1990-08-29 Philips Electronic Associated A method of manufacturing a semiconductor device having a mesa structure
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US5268069A (en) * 1991-10-28 1993-12-07 International Business Machines Corporation Safe method for etching silicon dioxide
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US5282925A (en) 1992-11-09 1994-02-01 International Business Machines Corporation Device and method for accurate etching and removal of thin film
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US5418183A (en) * 1994-09-19 1995-05-23 At&T Corp. Method for a reflective digitally tunable laser
EP1271721A3 (de) * 1994-12-27 2010-05-26 Fujitsu Limited Optische Halbleitervorrichtung
JP3297291B2 (ja) * 1995-03-10 2002-07-02 株式会社東芝 半導体装置の製造方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4614564A (en) * 1984-12-04 1986-09-30 The United States Of America As Represented By The United States Department Of Energy Process for selectively patterning epitaxial film growth on a semiconductor substrate
JPH0246407A (ja) * 1988-08-05 1990-02-15 Seiko Epson Corp 光導波路及びその製造方法
EP0681315A1 (de) * 1994-05-02 1995-11-08 Motorola, Inc. Selektives Herstellungsverfahren von Halbleitergebieten

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HENLE B ET AL: "IN SITU SELECTIVE AREA ETCHING AND MOVPE REGROWTH OF GAINAS-INP ON INP SUBSTRATES", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS,US,NEW YORK, IEEE, vol. CONF. 4, pages 159-162, XP000341252, ISBN: 0-7803-0522-1 *
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Also Published As

Publication number Publication date
DE19824142A1 (de) 1999-12-09
JP3602443B2 (ja) 2004-12-15
US20040053513A1 (en) 2004-03-18
US6864112B1 (en) 2005-03-08
EP1086488B1 (de) 2007-01-03
WO1999063582A2 (de) 1999-12-09
CN1155992C (zh) 2004-06-30
US6838391B2 (en) 2005-01-04
EP1086488A2 (de) 2001-03-28
JP2002517899A (ja) 2002-06-18
DE59914127D1 (de) 2007-02-15
CN1303517A (zh) 2001-07-11

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