Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
  • H01L29/1608—Silicon carbide
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
  • H01L29/66007—Multistep manufacturing processes
  • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
  • H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
  • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
  • H01L29/861—Diodes
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10S438/00—Semiconductor device manufacturing: process
  • Y10S438/931—Silicon carbide semiconductor

Definitions

• the present invention relates to a pn-diode having on top of each other in the order mentioned the following layers of SiC: a highly-doped n-type substrate layer, a low-doped n- type drift layer and a doped p-type emitter layer, as well as a method for producing such a diode.
• SiC has some excellent physical properties, such as a high thermal stability, such that devices fabricated from SiC are able to operate at high temperatures, namely up to 1,000 K, a high thermal conductivity, so that SiC devices may be arranged at a high spatial density, and a high breakdown field being approximately ten times higher than for Si. These properties make SiC very suited as material for high power devices operating under conditions where high voltages may occur in the blocking state of the device. However, most dopants have a very low diffusivity in SiC, so that it will be desired to use the implantation technique for forming said p-type emitter layer in a pn-diode of SiC.
• the pn-junction of the diode will be located in a region of the device being damaged by said implantation unless dopants having a comparatively high diffusivity in SiC are used for said implantation, so that the pn-junction may be spatially separated from implantation damage.
• a location of the pn-junction in the damaged region would result in a higher leakage current and by that bad reverse characteristics of the diode.
• the object of the present invention is to provide a diode according to the introduction, which solves the problem discussed above by combining good reverse characteristics and good forward voltage drop, as well as a method for production thereof .
• the emitter layer comprises a first part being highly doped with first dopants having a low ionisation energy and a second part designed as a grid and having portions extending vertically from above and past the junction between the drift layer and the first part and being laterally separated from each other by drift layer regions for forming a pn- junction by said first part and the drift layer between adjacent such portions at a vertical distance from a lower end of said grid portions, and the doping concentrations of the drift layer and said grid portions, the depths of said grid portions with respect to the location of said pn-junction and the lateral distance between said grid portions are selected to allow a depletion of the drift layer in the blocking state form a continuous depleted region between the grid portions and thereby screening off the high electrical field at the pn-junction formed by said first emitter layer part and the drift layer, which by this will not be exposed to high electrical fields.
• the emitter layer of said two parts said first dopants having a low ionisation energy and by that a high emitter efficiency determine the forward conduction characteristics of the diode and result in a low forward voltage drop at high current densities, while said second part of the emitter layer constituted by said grid portions will pinch the volume between that portions and ensure that the electric field will be low at said pn-junction formed by said first emitter layer part and the drift layer, where the device is damaged by the implantation and by that decrease the leakage current remarkably.
• a diode will have excellent properties in the forward conducting state as well as in the blocking state thereof .
• said second part is doped with second dopants having a higher diffusivity in SiC than said first dopants of the first part.
• said second part is doped with dopants that may be implanted deeply into a SiC-layer without causing severe damage to said SiC-iayer. Also this embodiment makes it possible to keep the high electric fields away from regions damaged by implantation in the blocking state and obtain a low forward voltage drop at higher current densities in the forward state .
• the diode comprises trenches etched from above at least partially into said first part of the emitter layer, and said grid portions are formed in the bottom of said trenches. This makes it possible to obtain a large vertical distance between the pn-junction and the lower end of said emitter portions making it easier to keep the pn-junction in the blocking state of the device far away from said first emitter layer part.
• said first part of the emitter layer is doped with aluminium.
• Aluminium has a low ionisation energy and a high emitter efficiency also at high current densities making it well suited as dopant for said first part of the emitter layer.
• said second part of the emitter layer is doped with boron.
• Boron has a comparatively high diffusivity in SiC, which makes it well suited to be used for forming said grid portions by an annealing step after implantation, and it has a high ionisation energy resulting in a comparatively bad emitter efficiency, especially at higher current densities, making it badly suited as dopant for the entire emitter layer.
• the boron-doped grid portions act as additional emitter area until at higher current densities the emitter efficiency thereof starts to decrease, but the aluminium-doped emitter layer part is still active, maintaining a low forward voltage drop.
• a diode having such a structure may easily be produced by implantation followed by an annealing step thanks to the different diffusivities of aluminium and boron in SiC.
• the object of the invention is also obtained by providing a method for producing a pn-diode in SiC comprising the steps of:
• the doping concentrations of the drift layer and said grid portions, the depths of said grid portions with respect to the location of said pn-junction and the lateral distance between said grid portions being selected to allow a deple- tion of the drift layer in the blocking state form a continuous depleted region between the grid portions and thereby screening off the high electrical field at said pn- junction, which by this will not be exposed to high electrical fields.
• the method is characterized in that said first emitter layer part is in step 2) applied by implanting said dopants having a low ionisation energy into the drift layer grown in step 1) , and that in step 3) second dopants having a high diffu- sivity in SiC are introduced by implanting them into the drift layer grown in step 1) in regions laterally separated from each other, and that step 3) also comprises an annealing of the implanted regions at such a high temperature that said second dopants diffuse further into said drift layer than said first dopants for forming said second emitter layer portions at a vertical distance from said pn-junction.
• step 4) etching trenches from above into said drift layer at locations where said second emitter layer portions are to be formed before carrying out step 3) , and that ir. step 3) said second dopants are introduced into at least the bottom of said trench for forming said emitter layer portions forming the grid.
• Tronch is here to be interpreted broadly and may have an elongated extension as a line as well as a pocket extension like a dot.
• This etching step followed by introduction of said second dopants into the bottom of the trench makes it possible to obtain a large vertical distance between the lower end of the grid portions and said first emitter layer part.
• Figs. 1-3 illustrate some of the steps used in a method for producing a pn-diode of SiC according to a first preferred embodiment of the invention illustrated in Fig. 3,
• Fig. 4 schematically illustrates a diode according to a second preferred embodiment of the invention
• Fig. 5 is a very schematic view illustrating the upper part of the diode according to Fig. 3 in the blocking mode with a low blocking voltage applied thereon illustrating the depletion region separating the pn-junction from the first emitter layer part,
• Fig. 6 is a view corresponding to Fig. 5 of the diode having a high blocking voltage applied thereon, and
• Fig. 7 is a schematic, enlarged view of a part of a diode according to a third preferred embodiment of the invention.
• Fig. 1 It is illustrated in Fig. 1 how a highly doped n-type substrate layer 1 and a low doped n-type drift layer 2 has been epitaxially grown on top of each other, preferably by using the Chemical Vapour Deposition (CVD) technique.
• a contact layer 3 making a good ohmic contact to the substrate layer 1 has been applied to the latter.
• aluminium has been implanted into the drift layer 2 in two steps for producing a highly doped p++ layer 4 on top of a layer 5 of a little bit lower doping concentration obtained by using higher implantation energies.
• a mask not shown is after that patterned with openings in lines or dots or any other geometry, and boron ions are after that implanted into the layers 4 and 5 through these openings for forming laterally spaced regions 6 being doped by boron.
• An annealing step is after that carried out at a high tem- perature, in the order of 1, 300-1, 700°C, which makes the boron diffuse into the drift layer for forming grid portions 7 having the lower end thereof vertically well separated from the lower border 8 of the first emitter layer part formed by the aluminium-doped regions between said grid portions. It is emphasised that boron may be deeper implanted than aluminium from the beginning by using higher implantation energy. Said first emitter layer part having a highly doped contact sub-part 9 with a doping concentration in the range of 10 20 cm -3 making a good ohmic contact to a contact layer 10 and another sub-part 11 located thereunder having a doping concentration of about 10 19 cm" 3 .
• the thickness of the first emitter layer part formed by the sub-parts 9 and 10 may be in the range of 0,5-1 ⁇ m, whereas the grid portions 7 may have a depth of approximately 2 ⁇ m measured from the contact layer 10.
• the spacings between two adjacent grid portions may be in the order of 2-3 ⁇ m and the doping concentration in said grid portions 7 may typically be 5 x 10 17 - 5 x 10 18 cm "3 .
• a diode according to a second preferred embodiment of the invention being similar to that illustrated in Fig. 3 as to the function is illustrated in Fig. 4, and it only differs from that in Fig. 3 by the fact that said sub-part of the first emitter layer part making a good ohmic contact to the contact layer 10 is formed by a step of regrowth of an aluminium-doped layer by CVD after forming the second emitter layer part 11 and the grid portions 7 by implantation. Said contact layer 10 may also be left out.
• the regions 12 of the drift layer located between the grid portions 7 are depleted, so that the electric field will be kept low at the Al-pn- junction.
• the electric field will be high where the quality of the structure is high and low where the quality is lower resulting in low leakage currents in the blocking mode.
• the blocking voltage is low in Fig. 5, and it is illustrated how the p-doped grid portions act nearly like a homogeneous layer with increasing blocking voltage determining the reverse characteristics of the device.
• a trench 14 may be etched by an etching process, preferably a dry etch (RIE) , from above into said drift layer or more exactly at least partially into said first emitter layer part 15, at the location where said grid portions are to be created.
• These trenches may be lines or dots.
• the grid portions 7 are in this case created by implanting said second dopants, preferably boron, into the bottom of the trench and after that carrying out an annealing step for diffusion of the dopants further into the drift layer for obtaining a comparatively large vertical distance between the lower end 16 of the respective grid portion and the border 8 of said first emitter layer part located next thereto.
• the contact layer 10 may be applied in a conventional way.
• the method includes of course further steps, such as masking, patterning and demasking, not described here.
• Fig. 7 only shows a part of the diode, and also in this case grid portions 7 are arranged at lateral intervals.
• the number of layers mentioned in the claims is a minimum number, and it is within the scope of the invention to arrange further layers in the devices or dividing any layer into several layers by selective doping of different regions thereof.
• the drift layer may be composed by sublayers of different doping concentrations, such as particularly low doping concentrations close to the emitter layer regions for fascilitating the depletion of the drift layer there.
• Substrate layer is in this disclosure to be interpreted as the layer closest to the cathode of the layers mentioned and it has not to be a substrate layer in the strict sense of this word within this field, i.e. the layer from which the growth is started.
• the real substrate layer may be any of the layers and is mostly the thickest one, which may be the drift layer.
• the definition "epitaxially growing on top of each other ... substrate layer” in the claims and in the de- scription comprises also the case in which the epitaxial growth is started by growing on top of a substrate disc. However, the very substrate does not have to be grown epitaxially.
• first emitter layer part By epitaxial growth, preferably a re- growth after implanting the second dopants for forming the grid portions, but is also possible to first growth said first emitter layer part and then implant said second dopants or forming the grid portions.

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• 1997
  • 1997-05-09 SE SE9701724A patent/SE9701724D0/sv unknown
  • 1997-05-21 US US08/859,844 patent/US5902117A/en not_active Expired - Lifetime
• 1998
  • 1998-02-12 WO PCT/SE1998/000239 patent/WO1998052232A1/en not_active Application Discontinuation

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