WO1998048378A2 - Revetement pour cartes a puce - Google Patents

Revetement pour cartes a puce Download PDF

Info

Publication number
WO1998048378A2
WO1998048378A2 PCT/DE1998/001111 DE9801111W WO9848378A2 WO 1998048378 A2 WO1998048378 A2 WO 1998048378A2 DE 9801111 W DE9801111 W DE 9801111W WO 9848378 A2 WO9848378 A2 WO 9848378A2
Authority
WO
WIPO (PCT)
Prior art keywords
carrier
chip
connection
card insert
coil
Prior art date
Application number
PCT/DE1998/001111
Other languages
German (de)
English (en)
Other versions
WO1998048378A3 (fr
Inventor
Frank PÜSCHNER
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1998048378A2 publication Critical patent/WO1998048378A2/fr
Publication of WO1998048378A3 publication Critical patent/WO1998048378A3/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07752Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna using an interposer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/1075Shape details
    • H05K2201/10818Flat leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

Definitions

  • the invention relates to a card insert which has an antenna area.
  • contactless chip cards are also used as chip cards, which means card-like carrier material provided with a semiconductor chip.
  • the energy required to operate the semiconductor chip contained in the chip card is transmitted in the most general form by means of electromagnetic waves from a terminal to the chip card.
  • the data traffic between the terminal and the chip card also takes place in this way.
  • antennas are provided both in the terminal and on the chip card, which transmit and receive the electromagnetic waves.
  • the chip card must be accommodated as a transponder unit consisting of the semiconductor chip and the antenna unit connected to it. Since the manufacturer of the chip card is usually not the manufacturer of the actual semiconductor chip or the transponder unit at the same time, the transponder unit is arranged on a carrier element, which together form a so-called card inlay. This card inlay is integrated into the card by the card manufacturer in such a way that it is surrounded by the actual card parts.
  • a chip card is known from EP 0 481 776 A3, in which the card inlay consists of a film-like material on which a semiconductor chip is arranged and a line arrangement in the form of a coil surrounding the semiconductor chip is provided.
  • the coil is arranged in a spiral around the semiconductor chip.
  • This arrangement has the disadvantage that in the spiral coil arrangement around the semiconductor chip there is a coil end inside the spiral and thus easily accessible for connection to the semiconductor chip is that the second coil end is on the outer edge of the spiral, so that it is difficult to connect to the semiconductor chip. Such a connection can only be created by means of insulating bridges.
  • the coil is placed on the carrier material from a very thin wire and attached there using adhesive technology.
  • the carrier material consists of a copper-coated film and the coil arrangement is produced using etching technology.
  • the first method has the disadvantage that the laying and gluing is very expensive as a manufacturing process.
  • the second method again has the disadvantage that it is only an insignificant one for the antenna
  • a fraction of the actual surface of the substrate is required and the majority of the copper coating is thus generated as waste in the etching process.
  • the object of the invention is therefore to provide a card insert which is as simple to manufacture as possible, or to provide a method for producing such a card insert which can be carried out with as little effort as possible. This object is achieved with the in claim
  • FIG. 1 shows a detail from a top view of a card insert according to the invention
  • FIG. 2 shows the card insert shown in FIG. 1 in cross section along the line A-A
  • FIG. 1 shows a top view of a section of a card insert according to the invention. Regardless of the size of this card insert, it has a semiconductor chip
  • a line arrangement is provided, which in the exemplary embodiment provided is designed as a coil arrangement 10.
  • This coil arrangement 10 has coil connections 11 which are connected to chip carrier connections 8a, 8b.
  • the coil arrangement 10 is arranged on the upper side of the carrier, the chip carrier connections 8a, 8b are arranged on the opposite side of the carrier 1.
  • a with Chip carrier 3 connected to chip carrier connections 8a, 8b carries semiconductor chip 2, which is located in chip opening 7.
  • FIG. 2 the same arrangement is shown schematically in section along the line A-A in FIG. 1.
  • the semiconductor chip 2 can be seen in the chip opening 7, the semiconductor chip 2 being fastened on the chip carrier 3 by means of an adhesive 4.
  • bond wires 5 are provided, which connect contacts (not shown) on the semiconductor chip 1 to chip carrier connections 8a and 8b of the chip carrier 3. Finally, the semiconductor chip 2 including the bond wires 5 is surrounded by a cover 6.
  • chip carrier 3 carrying the semiconductor chip 2 is fastened to the underside of the carrier 1, chip carrier connections 8a and 8b reaching as far as contact openings 9 which are formed in the carrier 1.
  • the chip carrier connections 8a and 8b have an inverted Z-shape at their ends and each protrude into a contact opening 9 of the carrier 1.
  • the antenna coil 10 and coil connections 11 are formed on the upper side of the carrier 1.
  • the antenna coil 10 and the coil connections 11 are made of the same material and are formed on the surface of the carrier 1 by means of printing technology.
  • the contact openings 9 are also filled with this material and envelop the
  • Chip carrier connections 8a and 8b Since the material that forms both the antenna coil 10 and the coil connections 11 is a conductive material, an electrical contact is thus made to the chip carrier connections 8a and 8b, which are also electrically conductive via the bond wires to the contact surfaces (not shown) generate on the semiconductor chip 2.
  • the arrangement shown can be produced most simply by gluing the semiconductor chip onto the chip carrier 3.
  • the bond connection to the chip carrier connections 8a and 8b then takes place.
  • the chip and the bonding wires 5 are then enclosed with the cover 6. Then this arrangement is arranged from one side, namely the underside of the carrier 1, the semiconductor chip protruding into the chip opening 7 and the chip carrier connections 8a and 8b on the other their ends also protrude into corresponding contact openings 9 of the carrier.
  • the antenna coil with conductive material is printed, with coil antenna 11 being produced at the same time as the antenna coil 10 being printed, through which the contact openings 9 are filled.
  • the chip carrier connection 8 is bulged in the arrangement according to (C).
  • the underside of the contact opening 9 is completely covered in the direction of extension, but the bulging and protruding into the contact opening 9 largely ensure that the chip carrier 8 is surrounded by the material of the coil connection 11, which fills the contact opening 9.
  • Chip connections 18a and 18b are applied to the card insert, for example by means of hot stamping processes.
  • a Electrically conductive, mostly metallic, hot stamping foil is pressed onto the card insert 1 by means of a heated stamp, on which the chip connections 18a and 18d are applied.
  • the film is sheared off along embossed edges and adhesively connected to the card insert 1 by a heat-activatable adhesive.
  • the contact openings 9 in the card insert can be pierced by the tool in the same work step and, as in FIGS. 4 to 6, can also be designed as in FIG. 3.
  • the semiconductor chip 2 is attached to the card insert 1 by means of an adhesive 4.
  • the position of the semiconductor chip 2 relative to the chip connections 18a and 18b can be chosen almost arbitrarily, whereby a closely spaced arrangement is made possible in any case.
  • the semiconductor chip 2 is then electrically conductively connected to the chip connections 18a and 18b by means of wire bond connections. A conventional wire bonding process can be used.
  • the semiconductor chip 2 is inserted in a recess or recess 7 in the card insert 1, otherwise the arrangement shown in FIG. 5 essentially corresponds to the arrangement shown in FIG. 4.
  • the cover 6 shown in FIG. 5 can also be used in accordance with an arrangement which is shown in FIG. 4.
  • the advantage of the arrangement shown in FIG. 5 compared to the arrangement shown in FIG. 4 lies in a smaller overall thickness of the card insert connected to the carrier.
  • FIG. 6 shows a third modification of the second exemplary embodiment.
  • the semiconductor chip 2 is placed directly on the chip connections 18a and 18b, similar to a flip-chip technique.
  • the contacts are used to contact the contacts, not shown, on the Semiconductor chip 2 with the chip connections 18a and 18b connecting elements 15 used.
  • FIG. 6 could also be recessed overall in a recess, wherein the chip connections 18a and 18b can be stamped into such a recess by hot stamping.
  • connection between the coil 10 and the chip connections 18a and 18b takes place when the antenna coil 10 is formed by means of printing technology and the contact opening 9 is simultaneously filled with the coil connections 11. It follows that the chip connections are made before the antenna coil 10 is applied 18a and 18b must already have been applied.

Abstract

L'invention concerne un revêtement pour cartes à puce constitué d'un substrat (1) comportant une première surface et une deuxième surface situées l'une en regard de l'autre. Une puce semi-conductrice (2) est montée sur le substrat (1) au moyen d'un support de puce (3). Un réseau linéaire (10) est appliqué par gravure sur la face opposée, et une connexion (11) remplissant une fenêtre de contact (9) du substrat (1) établit simultanément un contact électroconducteur avec une connexion de support de puce (8).
PCT/DE1998/001111 1997-04-21 1998-04-21 Revetement pour cartes a puce WO1998048378A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19716673 1997-04-21
DE19716673.3 1997-04-21

Publications (2)

Publication Number Publication Date
WO1998048378A2 true WO1998048378A2 (fr) 1998-10-29
WO1998048378A3 WO1998048378A3 (fr) 1999-01-28

Family

ID=7827199

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1998/001111 WO1998048378A2 (fr) 1997-04-21 1998-04-21 Revetement pour cartes a puce

Country Status (1)

Country Link
WO (1) WO1998048378A2 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19916781A1 (de) * 1999-04-14 2000-10-26 Austria Card Gmbh Wien Dünn-Transponder-Chip-Karte und Herstellverfahren dazu
DE19947596A1 (de) * 1999-10-04 2001-04-12 Multitape Consulting Gmbh Chipkarte und Verfahren zum Herstellen einer Chipkarte sowie ein Halbzeug
WO2010058109A3 (fr) * 2008-11-24 2010-07-15 Rfideal Procede de fabrication d'objets portatifs sans contact avec pont dielectrique et objets portatifs
DE102020119688A1 (de) 2020-07-27 2022-01-27 Infineon Technologies Ag Halbleitervorrichtungen mit drahtlosen Sendern und/oder drahtlosen Empfängern

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5519201A (en) * 1994-04-29 1996-05-21 Us3, Inc. Electrical interconnection for structure including electronic and/or electromagnetic devices
EP0756244A2 (fr) * 1995-07-26 1997-01-29 Giesecke & Devrient GmbH Unité électronique et procédé de fabrication de cette unité

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5519201A (en) * 1994-04-29 1996-05-21 Us3, Inc. Electrical interconnection for structure including electronic and/or electromagnetic devices
EP0756244A2 (fr) * 1995-07-26 1997-01-29 Giesecke & Devrient GmbH Unité électronique et procédé de fabrication de cette unité

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19916781A1 (de) * 1999-04-14 2000-10-26 Austria Card Gmbh Wien Dünn-Transponder-Chip-Karte und Herstellverfahren dazu
DE19916781B4 (de) * 1999-04-14 2006-02-16 Austria Card Gmbh Kontaktlose Chip-Karte und Herstellverfahren dazu
DE19947596A1 (de) * 1999-10-04 2001-04-12 Multitape Consulting Gmbh Chipkarte und Verfahren zum Herstellen einer Chipkarte sowie ein Halbzeug
WO2010058109A3 (fr) * 2008-11-24 2010-07-15 Rfideal Procede de fabrication d'objets portatifs sans contact avec pont dielectrique et objets portatifs
US8723744B2 (en) 2008-11-24 2014-05-13 Rfideal Method for making contactless portable devices with dielectric bridge and portable devices
DE102020119688A1 (de) 2020-07-27 2022-01-27 Infineon Technologies Ag Halbleitervorrichtungen mit drahtlosen Sendern und/oder drahtlosen Empfängern

Also Published As

Publication number Publication date
WO1998048378A3 (fr) 1999-01-28

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