WO1998015956A1 - Generateur de signaux d'horloge et dispositif d'entrainement de disque - Google Patents
Generateur de signaux d'horloge et dispositif d'entrainement de disque Download PDFInfo
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- WO1998015956A1 WO1998015956A1 PCT/JP1997/003616 JP9703616W WO9815956A1 WO 1998015956 A1 WO1998015956 A1 WO 1998015956A1 JP 9703616 W JP9703616 W JP 9703616W WO 9815956 A1 WO9815956 A1 WO 9815956A1
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- phase comparison
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10037—A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
- G11B27/24—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by sensing features on the record carrier other than the transducing track ; sensing signals or marks recorded by another method than the main recording
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
- G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
- G11B27/30—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
- G11B27/3027—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/48—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
- G11B5/58—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B5/596—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
- G11B5/59605—Circuits
- G11B5/59616—Synchronisation; Clocking
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/48—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
- G11B5/58—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B5/596—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
- G11B5/59688—Servo signal format patterns or signal processing thereof, e.g. dual, tri, quad, burst signal patterns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
Definitions
- the present invention relates to a disk generating device and a disk generating device suitable for application to, for example, a sample servo type magnetic disk device.
- clock signals that provide timing information for detecting head position servo information from the magnetic disk surface are arranged discretely and at equal intervals on concentric recording tracks. It is generated based on the reproduced signal of the clock pattern in the servo area.
- FIG. 16A, FIG. 16B, and FIG. 16C show the operation principle of the phase comparator.
- FIG. 16A shows the case where the phase of the clock signal lags behind the clock pattern.
- FIG. 16B shows the case where the phase of the clock signal matches the phase of the clock signal.
- the figure shows a case where the phase of the clock signal is ahead of the clock pattern.
- the phase comparison output can be obtained using not only two sample values but also more sample values of the reproduced isolated waveform of the clock pattern.
- the maximum likelihood phase comparator that makes the coefficient almost equal to the sample value of the fractional waveform of the reproduced signal of the clock pattern and achieves the phase comparison accuracy close to the theoretical limit was proposed (Japanese Unexamined Patent Publication No. 8-6999). No. 668 publication). In a portion where the slope of the reproduced isolated waveform of the clock pattern is large, the level change of the sample value with respect to the phase change is large, so that the influence of noise is small and the phase shift can be detected efficiently.
- the differential waveform of the reproduced signal of the clock pattern has a large amplitude level at a portion where the reproduced isolated waveform has a large slope. Therefore, a high-precision phase comparison output can be obtained by making the weighting coefficient of the linear combination approximately equal to the sample value of the differential waveform of the reproduced signal of the cook pattern.
- the sample value of the reproduced isolated waveform of the clock pattern as shown in the first 7 Figure Z k - 8, when ⁇ ⁇ ⁇ , the Z k is used, the reproduction signal of the clock pattern, as shown in the first 8 Figure
- the sample values C 0, ⁇ , C 8 of the differentiated waveform are used as weighting factors.
- the inner product of the vector with (Z k- 8 , ⁇ ⁇ ⁇ , Z k) and the vector (C o, ⁇ ⁇ ⁇ , C 8 ) is calculated.
- a highly accurate phase comparison output can be obtained.
- the sample servo type magnetic disk device has, for example, 200 servo areas per one rotation of the disk.
- the servo sampling frequency can be increased, so that high-precision head positioning can be achieved, and a high storage density can be achieved by increasing the track density.
- the switching time from data recording to servo information reproduction is long during data recording, the useless area increases on the magnetic disk, the effective utilization rate of the medium surface is reduced, and a high storage capacity can be achieved.
- This switching time is the time required for the temperature change of the magnetic head due to the switching of the recording / reproducing operation, the internal state of the circuit such as the head amplifier being stabilized, and the DC level of the reproduced signal waveform being stabilized.
- An object of the present invention is to reduce the influence of the DC fluctuation of the phase comparison target signal on the phase comparison result. Disclosure of the invention
- a clock generation device includes: a clock signal generation unit that generates a clock signal; and a phase comparison target signal supplied at a predetermined timing and having a first period.
- Sampling means for sampling based on the clock signal for each second period shorter than the period, and outputting N (N is a natural number) sample values in the first period; and N sample values.
- An inner product calculating means for calculating an inner product of the signal vector and a coefficient vector having N weighting coefficients, and outputting a calculation result as a phase comparison signal; and a phase comparison target signal based on the phase comparison signal.
- Phase control means for controlling the clock signal generation means so that the phase of the clock signal coincides with the phase of the clock signal, and the sum of N weighting coefficients is substantially zero.
- a disk drive device is a disk drive device for driving a disk-shaped recording medium on which a reference pattern for clock generation is recorded at predetermined intervals, wherein a signal recorded on the disk-shaped recording medium is Access means for reproducing and outputting a reproduction signal; clock signal generation means for generating a clock signal; and reproducing the reproduction signal of the reference pattern included in the reproduction signal for each predetermined time and having a first period.
- a sampling means for sampling based on the clock signal every second period shorter than the first period, and outputting N (N is a natural number) sample values in the first period;
- An inner product that calculates the inner product of a signal vector consisting of sample values and a coefficient vector having N weighting coefficients, and outputs the calculation result as a phase comparison signal Calculation means, and phase control means for controlling the clock signal generation means based on the phase comparison signal so that the phase of the reproduction signal of the reference pattern and the phase of the clock signal are equal to each other.
- a phase comparison target signal is sampled based on a clock signal, a signal vector including N sample values is generated, and a coefficient having N weighting coefficients whose total sum with this signal vector is almost zero.
- the inner product with the vector is calculated to obtain a phase comparison signal.
- the clock signal phase generated by the clock signal generation means is synchronized with the phase of the phase comparison target signal with high accuracy regardless of the DC fluctuation of the phase comparison target signal.
- FIG. 1 is a diagram showing a schematic configuration of a magnetic disk according to the best mode of the present invention.
- FIG. 2A and FIG. 2B are diagrams showing the dipole obtained corresponding to the clock pattern.
- FIG. 3 is a block diagram showing a sample servo type magnetic disk drive as the best mode of the present invention.
- FIG. 4 is a diagram showing the relationship between the head shift amount and the reproduced signals of the first to fourth phase fine patterns.
- Fig. 5 shows the amount of head shift and the subtraction signal of the reproduced signal of the fine pattern of the first and third phases.
- FIG. 6 is a diagram showing the relationship between the two-phase and fourth-phase fine pattern reproduction signals and the subtraction signal ( FIG. 6 shows the positions of the fine pattern and the magnetoresistive head (MR head)).
- MR head magnetoresistive head
- Fig. 7 is a block diagram showing a clock generator included in the magnetic disk drive
- Fig. 8 is a block diagram showing a specific configuration of a coefficient generator.
- FIGS, second 9 M figure is a timing chart for explaining the operation of the click-locking generator.
- the first 0 figure data reproduction mode Figure a is c first 1 showing the waveform of a reproduced signal
- Fig. 12 shows the waveform of the reproduced signal in the data recording mode
- Fig. 13 shows the conventional and best modes used in a clock generator.
- FIG. 14 is a diagram showing a reproduced signal of a servo area used for simulation; Fig. 16A, Fig. 16B, and Fig. 16C show the effect of a DC component d superimposed on a reproduced signal on an error.
- Fig. 17 and Fig. 18 are views for explaining the phase comparator described in JP-A-8-69668.
- FIG. C is the best mode for carrying out the invention.
- FIG. 1 shows a sample servo type magnetic disk 11 in the best mode.
- a plurality of servo areas S A are formed at regular intervals by cutting the data area D AR.
- the servo area SAR is provided, for example, at 200 locations in one track.
- Data is recorded in the data area DAR in a unit called a sector of 5 12 bytes.
- the data of each sector is recorded with a sector ID (Sector Identity Code), an ECC (Error Correction Code) and the like.
- the sector ID includes a head number indicating one of a plurality of heads, a track number, a sector number, and information indicating that the sector is unusable due to a diff or the like.
- the servo area SAR is composed of an address area ADA, a clock area CKA, and a fine area FNA.
- the address pattern (track address code) 12 is recorded in the address area ADA.
- the headless pattern 12 is required in the track seek mode of moving the magnetic head to the target track among the magnetic head position servos.
- the address pattern 12 is composed of a gray code consisting of a pattern in which the track address is different in length and arrangement so as to be different for each track.
- a clock pattern 13 as a timing reference pattern for generating a clock signal is continuously recorded in the radial direction.
- the timing of the presence of the peak value gives clock information synchronized with the rotation of the magnetic disk 11 to the overnight system and the servo system.
- Fine pattern 14 is recorded in the fine area FNA.
- the fine pattern 14 is necessary in the tracking mode in which the head is accurately positioned at the center of the target track among the magnetic head position servos, and the relative position of the magnetic head to the track is required. It is a pattern showing a position.
- the fine pattern 14 is a fine pattern P of the first phase to the fourth phase which are sequentially shifted by 1 Z 2 track pitches in the radial direction of the disk, that is, shifted by 90 °.
- the radial width of / 2 , P1, P3 / 2 is made equal to the track pitch Tp. Also, the fine patterns of the first and third phases Po, P! The center of each of the two fine tracks P 1/2 and P s / 2 of the second and fourth phases is positioned at the center of the track. Have been.
- Synchronization with the clock pattern 13 is performed by the clock generator 46 shown in FIG. 3, but before the unique pattern detection signal UPD is supplied and synchronization is established, first the approximate existence of the clock pattern 13 I have to search for the location.
- a unique pattern 15 is recorded in the endless dress area ADA at a fixed cycle instead of the address pattern 12, for example, at intervals of about several 10 places in one round of the track.
- the unique pattern 15 is composed of a plurality of lines (patterns) that are continuous in the radial direction, and can be easily detected even before a clock signal in phase is generated.
- encoded data A bioration code that cannot appear in the series is used.
- a home index pattern 16 is recorded as a rotation origin, one per rotation, in the address area instead of the address pattern 12 described above. After the initial synchronization has been established, the home index pattern 16 is detected in order to know the position of the magnetic disk 11 in the rotational direction (the position where the magnetic head is accessing). The mode shifts to the recording / playback mode.
- the magnetic disk 11 includes a disk substrate 11a and a magnetic layer 11b.
- the servo information described above is recorded in the servo area SAR of the magnetic disk 11 by the following first and second methods.
- the first method is to remove a part of the magnetic layer of the flat substrate on which the magnetic layer is formed by a method such as etching according to the servo information, and to magnetize the remaining part in one direction by a magnetic head or the like. It is.
- a magnetic layer is formed on a substrate on which concavities and convexities are collectively formed in accordance with servo information, and the concave and convex portions are DC-magnetized in opposite directions.
- the section A—A ′ in FIG. 1 shows the magnetic disk 11 on which servo information is recorded by the first method.
- the arrow on the magnetic layer 11b in the servo region indicates the direction of magnetization.
- FIG. 2A shows a clock pattern 12 of the magnetic disk 11 on which servo information is recorded by the first method.
- FIG. 2B shows a clock pattern 12 of the magnetic disk 11 on which servo information is recorded by the second method. Note that arrows shown in the portion of the magnetic layer 11b in FIGS. 2A and 2B indicate the direction of magnetization.
- FIG. 3 shows a sample servo type magnetic disk drive 20 as the best mode.
- the magnetic disk drive 20 writes data to the data area DAR of the magnetic disk 11. It has an inductive head 21 A for writing data and a magneto-resistive effect (MR) head 21 B for reading data from its data area DAR and servo area SAR. ing.
- the heads 21 A and 2 IB are integrally formed as, for example, a composite head 21.
- the composite head 21 has a suspension (not shown) fixed to the other end of an arm (not shown) held at one end by a rotatable pivot (not shown). It is mounted on a flying slider (not shown) attached to the tip of the. The suspension is for applying a load to the flying slider. At one end of the arm, a voice coil motor (VCM) 22 is attached as a drive motor.
- VCM voice coil motor
- the flying slider is configured to fly with a constant flying height with respect to the surface of the magnetic disk 11 while the magnetic disk 11 is rotating at a constant speed.
- the magnetic disk device 20 includes an interface 23 for connecting to a host computer, a microprocessor (MPU) 24 for controlling the operation of the entire device, and an operation program for the microprocessor 24.
- ROM that stores instructions
- the magnetic disk device 20 includes a write data buffer 26 for temporarily storing write data WD sent from the host computer via the interface unit 23, and a buffer 26 for writing data to the magnetic disk. It has a write data processing circuit 27 that obtains recording data by applying error correction code addition processing, digital modulation processing, etc. to the write data WD read at a timing corresponding to the recording timing. are doing.
- a digital modulation method for example, MFM (Modified Frequency
- the magnetic disk drive 20 has a write compensation circuit 28 for performing write compensation on the recording data output from the data processing circuit 27, and an output data of the compensation circuit 28. It has a recording amplifier 29 that obtains a recording current signal and supplies it to the inductive head 21A.
- the compensation circuit 28 generates the magnetic field generated during high-density recording. The minute correction of the magnetization reversal during the light is performed in consideration of the peak shift of the read signal due to the polarization reversal interference.
- the magnetic disk drive 20 includes a reproducing amplifier 31 for amplifying a signal S MR reproduced from the magnetic disk 11 by the MR type head 21 B at the time of reading, and an output of the reproducing amplifier 31.
- a variable gain amplifier 32 that adjusts the signal level
- an analog-to-digital (AZD) converter 33 that converts the output signal of the variable gain amplifier 32 into a digital signal
- this AZD conversion vessel 3 3 c also has an equalizer 3 4 to the waveform equalizing process by FIR (Finite Impulse Response) filter or the like on the output signal of the magnetic disk unit 2 0, the equalizer 3 4
- a data detector 35 for detecting the reproduced data from the output signal of the first and a read for obtaining the read data RD by performing digital demodulation processing, error correction processing, etc.
- the data processing circuit 36 and the data output from the data processing circuit 36 A read data buffer 37 for temporarily storing the read data RD.
- the above-mentioned sector-one ID is also extracted from the read data. This sector ID is supplied to the microprocessor 24.
- the magnetic disk drive 20 is provided with a VCM driver 41 for driving the voice coil motor 22 and a head 21 A, 21 B for positioning the target track on the magnetic disk 11.
- VCM driver 4 1 Servo controller 4 2 that controls 1 and A / D converter 3 3 Detects signal amplitude from output signal of 3 and amplitude detector 4 3 that supplies gain control signal SGC to variable gain amplifier 3 2
- a servo information detector 44 for detecting servo information from the output signal of the A / D converter 33.
- the track address information T AD and the tracking information (fine position signal) T RA obtained by the servo information detector 44 are supplied to the servo controller 42.
- the servo controller 42 is provided with the target track address information A D0 from the microprocessor 24 at the time of writing or reading.
- the track address information TAD is detected based on the reproduced signal of the address pattern 12, and the tracking information TRA is detected based on the reproduced signal of the fine pattern 14.
- the tracking information TRA is formed, for example, as follows. That is, the output signal of the A / D converter 33 The amplitude of the reproduced signal of the fine pattern P 1/2, P 3/2, P 0, P 1 from the signal F 1/2 , F 3/2,
- F o, F are detected. And the amplitude F. From amplitude F! Is subtracted to obtain a subtraction signal (F.I Fi). Then, the tracking information TRA is formed by correcting the level of the subtraction signal (F.-F! And the sign of the sign.
- FIG. 4 shows that, as shown in FIG. 6, when the MR type head 21B moves in the radial direction of the magnetic disk 11, the fine pattern ⁇ , P1, P1 / 2, P than 3/2, respectively which reproduced the signal Fo, F 1, F 1/2, shows the F 3/2.
- Fig. 5 shows the subtraction signals (Fo-, (F1 / 2-F3 / 2).
- each signal in Figs. Fig. 6 shows a case where the width w of the MR type head 21B matches the track pitch Tp In Fig. 6, TRC indicates a track center.
- Subtraction signal (F. one F ⁇ is to. Mr Kaka relationship between positional displacement direction of the head 2 1 B to the positive or negative sign and the magnetic is that reversed every track, subtraction signal (F 1 / 2 - F 3/2) is also due to positive or negative sign is inverted every one track, the subtraction signal (F 1/2 - the use of F 3/2), the subtraction signal (F.- F positive and negative of The relationship between the sign and the displacement direction of the magnetic head 21 B can be corrected so as to be constant for each track.
- the magnetic disk drive 20 includes a unique pattern detector 45 for detecting the unique pattern 15, a clock generator 46 for generating a clock signal CLK synchronized with the rotation of the magnetic disk 11, and a servo It has a timing generator 47 for generating timing signals indicating various information point positions on the magnetic disk 11, such as timing signals used by the information detector 44.
- the clock generator 46 generates a clock signal CLK synchronized with the reproduced signal of the clock pattern 13.
- the clock generator 46 is supplied with the unique pattern detection signal UPD from the unique pattern detector 45, and a 1-bit signal indicating whether the microprocessor 24 is in the write or read mode.
- a cut mode signal R / W is supplied.
- the clock signal CLK generated by the clock generator 46 is supplied to an amplitude detector 43, a servo information detector 44, a timing generator 47, and the like.
- the timing generator 47 receives the home information shown in Fig. 1 from the servo information detector 44.
- the signal STP indicating the origin position obtained by detecting the index pattern 16 is supplied, and the clock signal CLK is supplied from the clock generator 46 as described above.
- the timing generator 47 the number of clocks from the origin position is counted, and various timing signals are generated based on the count value.
- FIG. 7 shows the configuration of the clock generator 46.
- the clock generator 46 is composed of a digital PLL (phase-locked loop) using a linear combination type phase comparator.
- the clock generator 46 includes a voltage controlled oscillator (VCO) 51 that outputs a clock signal CLK by receiving an output signal of a loop filter 54 described later as a control signal, and a clock pattern 13.
- VCO voltage controlled oscillator
- the phase comparator 52 compares the phase of the reproduced signal of the clock signal CLK with the phase of the clock signal CLK, and converts the phase comparison error signal f (0) output from the phase comparator 52 into an analog signal.
- a filter 54 is a filter 54.
- the clock signal CLK output from the voltage controlled oscillator 51 is supplied to the A / D converter 33 as a sampling clock and is also supplied to the phase comparator 52 as an operation clock.
- the phase comparator 52 outputs N (N is a natural number) sample values obtained by sampling the reproduced signal z (t) of the clock pattern 13 with the clock signal CLK, and outputs the values from a coefficient generator described later.
- a digital inner product calculator 61 that calculates the inner product of the arranged coefficient vectors), and the calculation result of the inner product of the signal vector and the coefficient vector in the calculator 61 is latched, and the phase comparison error signal is latched. It has a D flip-flop 62 that outputs as f (0) and a coefficient generator 63 that outputs N weighting coefficients.
- FIG. 8 shows a configuration of the coefficient generator 63.
- the coefficient generator 63 has a coefficient memory 63 a for storing the coefficient, and a lower 4-bit signal (a 0 , 0 a) of the 5-bit read address signal ADR supplied to the coefficient memory 63 a. ai, a 2 , a 3 ) And an address generator 63b.
- Address generator 6 3 b as the coefficient memory 6 3 a than N weight coefficients ci in synchronization with the reproduced signal of the click hole Kkupatan 1 3 is read, Thailand Mi emissions from the PLL controller 6 4 described below reset is Bok in grayed signal S TM, the lower 4 bits of the signal read Adoresu signal AD R in synchronization with the clock signal CLK (a 0, ai, a 2, as) sequentially generates.
- the arithmetic unit 61 includes a multiplier 71 for sequentially multiplying the N elements of the signal vector and the N weighting coefficients of the coefficient vector, and a multiplication result of the multiplier 71. It consists of one accumulator 72 that performs sequential addition.
- the accumulator 72 includes an adder 72a and an accumulation register 72b.
- the output side of the multiplier 71 is connected to one input side of the adder 72a, and the output side of the adder 72a is connected to the input side of the accumulation register 72b.
- the output side of b is connected to the other input side of the adder 72a.
- the phase comparator 52 supplies a timing signal STM indicating the start of outputting the N weighting coefficients to the coefficient generator 63, and the timing signal STM is supplied to the accumulation register 72b constituting the arithmetic unit 61.
- It has a PLL controller 64 that supplies the latch signal SLA to the D flip-flop 62 and supplies the latch signal SCL to the D flip-flop 62.
- the unique pattern detection signal UPD is supplied from the unique pattern detector 45 to the PLL controller 64. The contents of the unique pattern are described in, for example, Japanese Patent Application Laid-Open No. Hei 6-290545 (US Pat. No. 5,526,200).
- the above-described timing signal STM, clear signal SCL, and latch enable signal SLA are formed based on the detection time point of the unique pattern 15.
- the evening imaging signal STM is output after a predetermined time consisting of a predetermined number of clocks from the point of detection of the unique pattern 15 (FIGS. 9H and 9I).
- the phase of the clock signal CLK (FIG. 9M) coincides with the phase of the reproduced signal z (t) (FIG. 9A) of the clock pattern 13
- the first element forming the signal vector is supplied to the multiplier 71 of the arithmetic unit 61.
- the latchable signal SLA (FIG.
- the reproduced signal z (t) (FIG. 9A) of the clock pattern 13 is converted into a digital signal by the A / D converter 33, and then supplied to the phase comparator 52, where it is converted by the digital inner product calculator 61.
- the linear combination that is, the inner product of the above-mentioned signal vector and coefficient vector is calculated.
- a signal vector whose elements are N sample values z (i'Ts) (Fig. 9B) obtained by sampling the reproduced signal z (t) of the clock pattern 13 with the clock signal CLK.
- the inner product with a coefficient vector having N weighting coefficients C i (FIGS. 9C and 9K) output from the coefficient generator 63 is calculated.
- a phase comparison error signal f (0) (FIG. 9G) is output from the D flip-flop 62.
- the phase comparison error signal f (0) is converted into an analog signal by the D / A converter 53, and unnecessary noise and harmonic components are removed by the loop filter 54, and the time domain response characteristics and The frequency domain response characteristics are adjusted and supplied to the voltage control oscillator 51 as a control signal.
- the phase of the clock signal CLK output from the voltage controlled oscillator 51 is controlled, and a clock signal CLK synchronized with the reproduced signal z (t) of the clock pattern 13 is obtained.
- 9D shows the output signal Sa of the multiplier 71
- FIG. 9E shows the output signal Sb of the adder 72a
- FIG. 9F shows the output signal of the accumulation register 72b.
- FIG. 9J shows the read address signal ADR supplied to the coefficient generator 63a.
- N samples obtained by sampling the reproduction signal z (t) of the click pattern 13 with the clock signal CLK are used.
- a linear combination of the pull value z (i, Ts) and the N weighting coefficients Ci output from the coefficient generator 63 is calculated.
- T ( ⁇ ) ⁇ Z ('CM ⁇ ⁇ ⁇ (1) of i -Ts—
- ( t 1.
- ⁇ ( ⁇ ) [ ⁇ (5Ts-, ⁇ (4Ts—,..., z (i ⁇ Ts-, ⁇ , z, 4Ts, z (5Ts_ (9)] T
- FIG. 11 shows a reproduced signal waveform near this switching time. Immediately after the start of the reproducing operation, although a reproduced signal corresponding to the servo information is obtained, the DC level of the entire reproduced signal fluctuates, so-called baseline fluctuation occurs.
- the recording circuit that handles a relatively large current receives a weak voltage (for example, 700 V to 1 mV in peak-to-peak value). ) Occurs in the reproduction circuit that handles). Therefore, after switching between recording and playback, the interference causes a change in the DC level of the playback signal.
- the weighting coefficient ci a coefficient whose total sum is zero (DC free coefficient) c 2 i is used.
- Equation (8) shows the phase comparison error signal f (0) when the DC component d is superimposed on the reproduction signal of the clock pattern 13.
- the weighting coefficient cd is obtained by differentiating the reproduced signal s (t) of the clock pattern 13 without noise according to the equation (2), so that the weighting coefficient cd is originally not affected by the superimposed DC component. If the total number of coefficients N is infinite, then the sum ⁇ di must be zero. However, the total number N of coefficients is actually finite, and the coefficients corresponding to the bases are not used, so that the sum ⁇ di is not zero.
- the negative polarity coefficients are all included in the above 11 .
- the weighting coefficient c 2 i in the present embodiment since the sum ⁇ c 2 i of the 11 coefficients c 2 i described above is zero, the conventional weighting coefficient c 2 i The coefficient value is slightly offset to the positive side compared to c! i.
- the weighting coefficient c 2 i at the time of writing in the present embodiment is a value obtained by slightly offsetting the conventional weighting coefficient c to the plus side.
- the servo information reproduction operation can be started without waiting for the DC component of the reproduction signal to completely stabilize after the switching of the recording Z reproduction operation.
- the waste area for stabilizing the DC component can be significantly reduced. Therefore, effective use on the disk surface can be achieved, and the data recording capacity per disk surface can be increased.
- FIGS. 14 and 15 show the results of quantitatively confirming the effects of the present embodiment by simulation.
- FIG. 14 shows a reproduced signal z (t) of the servo area SAR used in the simulation. This involves superimposing a DC component d resulting from recording / reproduction switching on a dipulse reproduction signal s (t) obtained from a clock pattern (clock mark) consisting of one convex part, and further simulating an actual magnetic disk device. In this case, noise n (t) is also superimposed.
- the width (convex length) of the clock pattern 13 is 200 ns, and a Lorentz-type pulse having a half-width of 100 ns of two isolated reproduction waveforms for synthesizing the dipulse is used.
- the noise n (t) is assumed to be white Gaussian noise which is common in magnetic recording and reproducing systems, the average value is zero, and the standard deviation N rms is zero-zero of the above-mentioned isolated waveform.
- Figure 15 shows the effect of the superimposed DC component on the error.
- the average value E 1 (6) of the error changes in inverse proportion to the DC component, and is greatly affected by the DC component.
- the weighting coefficient c 2 i in the present embodiment is used, the DC component is not affected at all, and the average value of the error E 2 (6>) is always 0.
- the phase comparator 52 uses the weighting coefficient c 2 i in the present embodiment as the coefficient ci to obtain the reproduced signal z (t) of the clock pattern 13. Highly stable and highly accurate phase comparison can be performed with little influence of the DC component and DC fluctuation component superimposed on the signal. Accordingly, the operation of the magnetic disk drive 20 can be further stabilized, and at the same time, the gap between the data area DAR of the magnetic disk 11 and the servo area SAR can be narrowed, and the data area can be expanded. Therefore, high storage capacity can be achieved. Next, the operation of the magnetic disk device 20 shown in FIG. 3 will be described.
- the above-described operation for establishing the initial synchronization is performed.
- the signal reproduced by the MR head 21B from the magnetic disk 11 is supplied to the reproduction amplifier 31 and amplified.
- the clock generator 46 generates the clock signal CLK synchronized with the reproduction signal of the clock pattern 13 included in the reproduction signal of the servo area SAR of the magnetic disk 11 as described above.
- the write / read operation is performed.
- the microprocessor 24 uses the conversion table stored in the ROM 25 to convert the logical block number included in the command to the physical position of the magnetic disk 11. (Head number indicating one of multiple heads, track number, sector number). As a result, the target track address and the write start sector are recognized. Then, the microprocessor 24 sets the target track address (track number) information A D0 to the servo controller 42 to start the track seek operation.
- the track seek operation is performed as follows.
- the servo controller 42 compares the current track address of the heads 21A and 21B based on the track address information TAD obtained by the servo information detector 44 with the target track address, and The voice coil motor 22 is controlled via the VCM driver 41 so that the track address matches the target track address. After the track address of the current location matches the target track address, the servo controller 42 determines the heads 21 A and 21 B based on the fine position signal TRA obtained by the servo information detector 44 described above. The voice coil motor 22 is controlled via the VCM driver 41 so that is located at the center of the target track. The track seek force is completed when the heads 21A and 21B are positioned at the center of the target track.
- the microprocessor 24 accesses the write start sector by referring to the sector ID extracted by the read data processing circuit 36 and is transferred from the host computer to write.
- the reading of the write data WD temporarily stored in the write data buffer 26 is started.
- the light In the data processing circuit 27, the write data WD read from the write data buffer 26 is subjected to an error correction code addition process, a digital modulation process, and the like to form recording data. Is light-compensated by the light compensation circuit 28 and supplied to the recording amplifier 29.
- a recording current signal corresponding to the write data WD is output from the recording amplifier 29, and this recording current signal is supplied to the inductive head 21A.
- the write data WD transferred from the host computer is written to a predetermined sector of the magnetic disk 11 specified by the write command.
- the recording of the sector ID of the data area DAR of the magnetic disk 11 is performed at the time of formatting.
- the clock generator 46 obtains N sample values z obtained by sampling the reproduced signal z (t) of the clock pattern 13 as described above.
- the phase comparison result is obtained by calculating the inner product of the signal vector consisting of (i «Ts) and the coefficient vector in which N weighting coefficients ci are arranged so that the sum 2 c 2 i becomes zero.
- the effect of the DC fluctuation of the reproduced signal z (t) of the clock pattern 13 on the phase comparison result can be reduced, and the clock signal CL ⁇ synchronized with the reproduced signal z (t) of the clock pattern 13 with high accuracy can be obtained. It becomes possible.
- the microprocessor 24 uses the conversion table stored in the ROM 25 to input the logical block number included in the command to the magnetic disk 11. Convert to physical position (head number, track number, sector number). Thus, the target track address and the read start sector are recognized.
- the microprocessor 24 sets the target track address (track number) information AD0 to the servo controller 42, and starts the track seek operation.
- the track seek operation is performed in the same manner as at the time of writing.
- the MR head 21 B from the data area DAR of the magnetic disk 11
- the signal reproduced by the amplifier is supplied to the reproduction amplifier 31 and amplified, and then the level is adjusted by the variable gain amplifier 32 and digitized by the AZD converter 33.
- the output signal of the A / D converter 33 is subjected to waveform equalization processing by the equalizer 34, and the data detector 35 is subjected to reproduction data detection processing. Then, the reproduced data output from the data detector 35 is supplied to the read data processing circuit 36.
- the data processing circuit 36 read data is subjected to digital demodulation processing, error correction processing, and the like, and read data RD is obtained.
- the microprocessor 24 accesses the read start sector 1 with reference to the sector ID extracted by the read data processing circuit 36. Then, after accessing the read start sector one, the microprocessor 24 transfers the read data RD output from the read data processing circuit 36 to the host computer via the read data buffer 37. As a result, the read data RD is obtained from the predetermined sector 1 of the magnetic disk 11 designated by the read command, and the read data RD is transferred to the host computer.
- the operations of the magnetic head 21 and the head amplifier are kept switched to the reproducing operation, and the reproduced signal z (t) of the clock pattern 13 is stable without DC fluctuation. ing. Therefore, at the time of this read, as described above, in the clock generator 46, the coefficient cd equal to the sample value of the time-differential waveform of the reproduced signal s (t) of the clock pattern 13 containing no noise is used as the weighting coefficient ci. It is used so that a maximum likelihood phase comparison is performed. It is needless to say that the same weighting factor can be used in this read as in the write.
- the power required to obtain a linear combination of a plurality of sample values required for the phase comparison by a digital operation on the signal samples obtained by the AZD converter 33 is disclosed in As shown in Japanese Patent Publication No. 668, a linear combination is always calculated by an analog delay circuit and an operational amplifier, and the output is sampled and held at the time given by the sampling pulse generator to obtain a phase comparison output. Applicable to In this case, by adjusting the gain group of the operational amplifier for performing weighting so that the sum thereof becomes zero, the same operation and effect as in the above-described embodiment can be obtained.
- a phase comparator 52 is configured for a reproduced waveform of a clock pattern in which a plurality of convex portions are arbitrarily combined. You may. This is performed in order to further average the phase comparison errors caused by medium noise, head noise, and the like, and to further reduce the phase comparison output jitter. In this case, too, by adjusting the sum of the weighting coefficients of the linear combination to be zero, it is possible to generate a highly stable clock which is hardly affected by DC fluctuation after switching between recording and reproduction.
- the present invention is applicable not only to the dedicated clock pattern 13 but also to a case where a phase comparator is configured by regarding other application patterns in the servo area SAR as clock patterns, and a highly stable and highly accurate clock generation is performed. Can be done.
- a signal vector composed of N elements obtained by sampling a phase comparison target signal at a predetermined sampling time, and N signal vectors whose sum is almost zero
- the result of phase comparison is obtained by calculating the inner product with the coefficient vector in which the weighting coefficients of the phase comparison are arranged.
- the effect on the phase comparison result due to DC fluctuation of the phase comparison target signal can be reduced.
- a clock signal synchronized with the accuracy can be obtained.
- the reproducing operation of the servo information can be started without waiting for the complete stabilization of the DC component of the reproducing signal.
- the waste area for stabilizing the DC component can be greatly reduced. Therefore, effective use on the disk surface can be achieved, and the data recording capacity per disk surface can be increased.
- the clock generation device and the like according to the present invention are suitably applied to a sample servo magnetic disk device and the like.
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51249798A JP3823195B2 (ja) | 1996-10-08 | 1997-10-08 | クロック生成装置およびディスク駆動装置 |
US09/092,952 US6226139B1 (en) | 1996-10-08 | 1998-06-08 | Clock generator and disk drive |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26758996 | 1996-10-08 | ||
JP8/267589 | 1996-10-08 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/092,952 Continuation US6226139B1 (en) | 1996-10-08 | 1998-06-08 | Clock generator and disk drive |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1998015956A1 true WO1998015956A1 (fr) | 1998-04-16 |
Family
ID=17446864
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1997/003616 WO1998015956A1 (fr) | 1996-10-08 | 1997-10-08 | Generateur de signaux d'horloge et dispositif d'entrainement de disque |
Country Status (4)
Country | Link |
---|---|
US (1) | US6226139B1 (ja) |
JP (1) | JP3823195B2 (ja) |
CN (1) | CN1118817C (ja) |
WO (1) | WO1998015956A1 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU4394999A (en) * | 1998-06-30 | 2000-01-17 | Asahi Kasei Kogyo Kabushiki Kaisha | Pll circuit |
JP3966514B2 (ja) * | 2002-05-23 | 2007-08-29 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 記憶装置、および記憶装置を操作する方法 |
EP1365395B1 (en) * | 2002-05-23 | 2012-09-05 | International Business Machines Corporation | Storage device and method for operating a storage device |
CN100442379C (zh) * | 2004-06-17 | 2008-12-10 | 瑞昱半导体股份有限公司 | 检测光盘读取信号的同步信号的方法及其装置 |
CN100411046C (zh) * | 2004-06-23 | 2008-08-13 | 瑞昱半导体股份有限公司 | 用于光盘的同步信号检测方法及其装置 |
JP4339871B2 (ja) * | 2006-05-24 | 2009-10-07 | 富士通株式会社 | サーボ復調回路および方法 |
US8780476B2 (en) * | 2011-09-23 | 2014-07-15 | Lsi Corporation | Systems and methods for controlled wedge spacing in a storage device |
US8654464B2 (en) * | 2011-10-19 | 2014-02-18 | HGST Netherlands B.V. | Implementing magnetic defect classification using phase modulation |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0869668A (ja) * | 1994-08-31 | 1996-03-12 | Sony Corp | 外部クロック生成用位相比較器 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2574106B2 (ja) * | 1992-09-01 | 1997-01-22 | 富士通株式会社 | 磁気ディスク装置のクロック再生回路 |
DE69321066T2 (de) * | 1992-10-14 | 1999-03-18 | Sony Corp | Magnetplattengerät |
JP3355690B2 (ja) * | 1993-03-31 | 2002-12-09 | ソニー株式会社 | クロック再生装置 |
EP0652548B1 (en) * | 1993-05-18 | 2000-11-02 | Sony Corporation | Disk device |
JP3589361B2 (ja) * | 1995-03-31 | 2004-11-17 | ソニー株式会社 | デイスク装置 |
-
1997
- 1997-10-08 JP JP51249798A patent/JP3823195B2/ja not_active Expired - Lifetime
- 1997-10-08 WO PCT/JP1997/003616 patent/WO1998015956A1/ja active IP Right Grant
- 1997-10-08 CN CN97191401.XA patent/CN1118817C/zh not_active Expired - Fee Related
-
1998
- 1998-06-08 US US09/092,952 patent/US6226139B1/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0869668A (ja) * | 1994-08-31 | 1996-03-12 | Sony Corp | 外部クロック生成用位相比較器 |
Also Published As
Publication number | Publication date |
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JP3823195B2 (ja) | 2006-09-20 |
CN1205104A (zh) | 1999-01-13 |
US6226139B1 (en) | 2001-05-01 |
CN1118817C (zh) | 2003-08-20 |
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