WO1996004709A1

WO1996004709A1 - Oscillator

Info

Publication number: WO1996004709A1
Application number: PCT/JP1995/001525
Authority: WO
Inventors: Takeshi Ikeda; Tadataka Ohe; Tsutomu Nakanishi
Original assignee: Takeshi Ikeda; Tadataka Ohe; Tsutomu Nakanishi
Priority date: 1994-08-01
Filing date: 1995-08-01
Publication date: 1996-02-15
Also published as: AU3087295A

Abstract

An oscillator which is easily formed into an integrated circuit and stably operated and the oscillation frequency of which can be adjusted within a wide range. The oscillator has two phase shifting circuits (10C and 30C) and a feedback resistor (70). The phase shifting circuits (10C and 30C) each have an operational amplifier which receives signals through a resistor at an inverting input terminal, a series circuit comprising a capacitor across both ends of which the voltage of the input signal is applied and a variable resistor, and a resistor for feeding back the output of the operational amplifier to the inverting input terminals. The output of the phase shifting circuit (10C) is connected to the input of the phase shifting circuit (30C). The feedback resistor (70) feeds back the signal outputted from the phase shifting circuit (30C) to the input side of the phase shifting circuit (10C).

Description

Description Oscillator Technical field

The present invention relates to an oscillator which can be easily formed as an integrated circuit and whose oscillation frequency can be largely adjusted.

Background art

Conventionally, various oscillation circuits using an active element and a reactance element as a sine wave oscillator have been proposed and put into practical use. For example, as a sine wave oscillator, there are conventionally known a wire bridge type oscillator shown in FIG. 49 and a bridge T type oscillator shown in FIG. 50.

In the Wien-bridge type oscillator shown in Fig. 49, in order to change the frequency, the resistance value of the variable resistor Rs forming a series circuit with the capacitor C and the variable resistance Rp forming the parallel circuit with the capacitor C are changed. The resistance must be changed in conjunction with the resistance, but if an error occurs in the resistance of each of the variable resistors Rs and Rp, the voltage input to the amplifier A will increase or decrease. Oscillation output fluctuates. When the oscillation output decreases, oscillation stops, and when the oscillation output increases, significant distortion occurs in the oscillation output.

Normally, it is difficult to stabilize the output fluctuation of a sine-wave oscillator so as to reduce it, and the stabilization means adds nonlinearity to the amplitude characteristics of the amplifier, that is, the amplitude varies depending on the output level. Characteristic will be added.

Adding such characteristics is not preferable because it degrades the linearity of the amplifier and degrades the distortion factor of the output waveform.

In addition, it is particularly difficult to change the resistance ratio of the variable resistor Rs and the variable resistor Rp while keeping the resistance constant, in a case where the circuit is integrated and the variable resistance is changed by an external voltage control method.

Not only Wien-Bridge type oscillators, but also bridge T-type oscillators shown in Fig. 50 The same can be said for a phase shift type oscillator.

Furthermore, it is difficult to form a variable frequency oscillator that can greatly adjust the oscillation frequency using an integrated circuit.

Therefore, the present invention has been conceived to solve such a problem. Disclosure of the invention

The oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input radiator to which an AC signal is input via the first resistor; and an inverting input terminal and an output terminal of the differential input amplifier. And a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, and a connection between the third resistor and the capacitor. Section is connected to the non-inverting input terminal of the differential input amplifier,

Outputs at the subsequent stage of the two vertically connected phase shift circuits are fed back to the input side at the previous stage, and a sine wave oscillation output is extracted from one of the two phase shift circuits.

Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input through the first resistor; and an inverting input terminal and an output terminal of the differential input amplifier. A second resistor connected between the first resistor and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, and a connection part of the third resistor and the capacitor. Are connected to the non-inverting input terminal of the differential input amplifier, and

A non-inverting circuit that outputs the input AC signal without changing the phase,

The two phase-shift circuits and the non-inverting circuit are vertically connected, and the output of the last stage among the plurality of vertically connected circuits is fed back to the input side of the first stage, A sine wave oscillation output is extracted from any of the plurality of circuits. Also, the oscillator of the present invention One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit including a third resistor and an inductor connected to the other end of the first resistor, and a connection portion of the third resistor and the inductor. It has two phase shift circuits connected to the non-inverting input terminal of the differential input amplifier,

The output of the latter stage of the two vertically connected phase shift circuits is fed back to the input side of the former stage, and a sine wave oscillation output is taken out from one of the two phase shift circuits.

Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier A second resistor connected to the other end of the first resistor, and a series circuit including a third resistor and an ingector connected to the other end of the first resistor. Two phase shifters connected to the non-inverting input terminal of the differential input amplifier,

The two phase-shift circuits and the non-inverting circuit are vertically connected, and the output of the last stage in the plurality of connected circuits is fed back to the input side of the first stage. A sine wave oscillation output is extracted from any of the plurality of circuits. Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier A second resistor connected to the other end of the first resistor, and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, and a connection part of the third resistor and the capacitor. A first phase shift circuit connected to a non-inverting input terminal of the differential input amplifier,

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor; and an inverting input terminal and an output of the differential input amplifier A second resistor connected between the third resistor and the inductor, and a series circuit including a third resistor and an inductor connected to the other end of the first resistor. A second phase shift circuit having a connection connected to a non-inverting input terminal of the differential input amplifier;

The output of the first and second phase-shift circuits connected in cascade is fed back to the input side of the previous stage, and a sine wave is output from one of the first and second phase-shift circuits. The oscillation output is taken out.

Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit comprising a third resistor and a capacitor connected to the other end of the first resistor, wherein a connection portion of the third resistor and the capacitor is connected to the second resistor. A first phase shift circuit connected to the non-inverting input terminal of the differential input amplifier;

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit including a third resistor and an inductor connected to the other end of the first resistor, and a connection portion of the third resistor and the inductor. A second phase shift circuit connected to the non-inverting input terminal of the differential input amplifier;

The first and second phase shift circuits and the non-inverting circuit are vertically connected, and the output of the last stage among the plurality of vertically connected circuits is fed back to the input side of the first stage. At the same time, a sine wave oscillation output is taken from any of these circuits.

In each of the above-mentioned oscillators, the phase shift amount becomes 0 ° due to the total of the two phase shift circuits or the total of the two phase shift circuits and the non-inverting circuit, and the width of each circuit is adjusted. By setting the loop gain to 1 or more, sine wave oscillation is performed. Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit comprising a third resistor and a capacitor connected to the other end of the first resistor, wherein a connection portion of the third resistor and the capacitor is connected to the second resistor. Two phase shifters connected to the non-inverting input terminal of the differential input amplifier,

A phase inversion circuit that inverts the phase of the input AC signal and outputs the inverted signal;

And vertically connecting each of the two phase shift circuits and the phase inverting circuit, returning the output of the last stage of the plurality of cascade-connected circuits to the input side of the first stage, A sine wave oscillation output is extracted from any of the plurality of circuits. Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier A second resistor connected to the first resistor, and a series circuit including a third resistor and an inductor connected to the other end of the first resistor, and a connection portion of the third resistor and the inductor. Two phase shifting circuits connected to the non-inverting input terminal of the differential input amplifier;

And vertically connecting each of the two phase shift circuits and the phase inverting circuit, and returning the output of the last stage among the plurality of vertically connected circuits to the input side of the first stage. A sine wave oscillation output is extracted from any of the plurality of circuits. Also, the oscillator of the present invention

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor; and a counter input terminal and an output terminal of the differential input amplifier. A second resistor connected between the third resistor and the capacitor, and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor. A first phase shift circuit having a portion connected to a non-inverting input terminal of the differential input amplifier; One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit including a third resistor and an inductor connected to the other end of the first resistor, and a connection portion of the third resistor and the inductor. A second phase shift circuit connected to the non-inverting input terminal of the differential input amplifier;

The first and second phase shift circuits and the phase inversion circuit are vertically connected, and the output of the last stage among the plurality of vertically connected circuits is fed back to the input side of the first stage. At the same time, a sine wave oscillation output is taken from any of these circuits.

In each of the oscillators described above, the total phase shift amount is 0 ° due to the entire two phase shift circuits and the phase inverting circuit, and the sine is adjusted by adjusting the amplification of each circuit to make the loop gain 1 or more. Wave oscillation is performed. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a circuit diagram showing a first embodiment of the oscillator of the present invention,

FIG. 2 is a circuit diagram showing the configuration of the preceding phase shift circuit shown in FIG. 1,

FIG. 3 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit shown in FIG. 2 and a voltage appearing on a capacitor or the like;

FIG. 4 is a circuit diagram showing the configuration of the subsequent phase shift circuit shown in FIG. 1,

FIG. 5 is a vector diagram showing the relationship between the input and output voltages of the phase shift circuit shown in FIG.

FIG. 6 is a circuit diagram showing the oscillator of the present invention using a transfer function K1, FIG. 7 is a circuit diagram obtained by converting the circuit shown in FIG. 6 by Miller's theorem, and FIG. Circuit diagram showing a partial modification of the oscillator shown in the figure,

FIG. 9 is a circuit diagram showing a second embodiment of the oscillator of the present invention,

FIG. 10 is a circuit diagram showing the configuration of the phase shift circuit of the preceding stage shown in FIG. 9,

Fig. 11 shows the phase shift circuit shown in Fig. 10 Vector diagram showing the relationship with pressure,

FIG. 12 is a circuit diagram showing the configuration of the subsequent phase shift circuit shown in FIG.

FIG. 13 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit shown in FIG. 12 and the voltage appearing in an inductor and the like.

FIG. 14 is a circuit diagram showing a partially modified example of the oscillator shown in FIG. 9,

FIG. 15 is a circuit diagram showing a third embodiment of the oscillator of the present invention,

FIG. 16 is a circuit diagram showing a fourth embodiment of the oscillator of the present invention,

FIG. 17 is a circuit diagram showing a fifth embodiment of the oscillator of the present invention,

FIG. 18 is a circuit diagram showing a sixth embodiment of the oscillator of the present invention,

FIG. 19 is a circuit diagram showing a seventh embodiment of the oscillator of the present invention,

FIG. 20 is a circuit diagram showing an eighth embodiment of the oscillator of the present invention,

FIG. 21 is a circuit diagram showing a ninth embodiment of the oscillator of the present invention,

FIG. 22 is a circuit diagram showing a tenth embodiment of the oscillator of the present invention,

-Figure 23 shows the connection between the phase shift circuit and the non-inverting circuit,

FIG. 24 is a diagram showing a connection form between a phase shift circuit and a phase inversion circuit,

FIG. 25 is a circuit diagram showing a configuration of a phase shift circuit in which the variable resistor of the CR circuit in the phase shift circuit is replaced with FET.

FIG. 26 is a circuit diagram showing a configuration of a phase shift circuit in which the variable resistor of the LR circuit in the phase shift circuit is replaced with FET.

FIG. 27 is a circuit diagram showing a configuration of a phase shift circuit in which a capacitor of a CR circuit in the phase shift circuit is replaced with a variable capacitance diode.

FIG. 28 is a circuit diagram showing a configuration of a phase shift circuit in which the inductor of the LR circuit in the phase shift circuit is replaced with a variable inductor.

FIG. 29 is a plan structural view of the variable inkuta shown in FIG. 28,

FIG. 30 is a detailed structural view of the variable inkuta shown in FIG. 29,

FIG. 31 is an enlarged sectional view taken along the line A—A of FIG. 30,

FIG. 32 is a plan view showing a modification of the variable inductor shown in FIG. 29, FIG. 33 is a plan view showing another modification of the variable inductor shown in FIG. FIG. 4 is a plan view showing another modification ^ of the variable inductor shown in FIG. 29; FIG. 35 is a plan view showing another example of the variable inductor shown in FIG. 28. FIG. 36 is a detailed view of the variable inductor shown in FIG.

FIG. 37 is an enlarged sectional view taken along the line BB of FIG. 36,

FIG. 38 is a circuit diagram showing a configuration of a capacitance conversion circuit used in the oscillator of the present invention. FIG. 39 is a diagram showing the capacitance conversion circuit shown in FIG. 38 using a transfer function K4. circuit diagram,

FIG. 40 is a circuit diagram obtained by converting the circuit shown in FIG. 39 by Miller's theorem, FIG. 41 is a simplified circuit diagram of the capacitance conversion circuit shown in FIG. 38,

FIG. 42 is a circuit diagram showing a configuration of a capacitance conversion circuit using an emitter follower circuit in the first stage,

FIG. 43 is a circuit diagram showing a configuration of a capacitance conversion circuit using a source follower circuit in the first stage,

FIG. 44 is a circuit diagram showing a configuration of an inductance conversion circuit used in the oscillator of the present invention;

FIG. 45 is a circuit diagram showing a configuration of an inductance conversion circuit in which the entire amplifier including the two operational amplifiers included in FIG. 44 is replaced by an emitter follower circuit;

FIG. 46 is a circuit diagram showing a configuration in which the inductance conversion circuit of FIG. 45 is realized by a source follower circuit;

FIG. 47 is a circuit diagram showing another example of the inductance conversion circuit.

Fig. 48 is a circuit diagram that extracts the parts necessary for the operation of the phase shift circuit of the present invention in the operational amplifier.

FIG. 49 is a circuit diagram showing a conventional sine wave oscillator,

FIG. 50 is a circuit diagram showing a conventional sine wave oscillator. BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment)

FIG. 1 is a circuit diagram showing a configuration of an oscillator according to a first embodiment.1 Each of oscillators 1 shifts a phase of an input signal by a predetermined amount to obtain a total of 0 ° at a predetermined frequency at a predetermined frequency. Two phase shift circuits 10 C and 30 C that perform phase shift A feedback resistor 70 feeds back the output of the path 30 C to the input side of the preceding phase shift circuit IOC. This feedback resistor 70 has a finite resistance value from 0 Ω.

FIG. 2 shows a configuration extracted from the phase shift circuit 10C in the preceding stage shown in FIG. The front-stage phase shift circuit 10C shown in FIG. 1 includes an operational amplifier (operation amplifier) 12, which is a type of differential input amplifier, and an operational amplifier 12 which shifts the phase of a signal input to an input terminal 22 by a predetermined amount. The capacitor 14 and the variable resistor 16 input to the non-inverting input terminal of the operational amplifier 12, the resistor 18 inserted between the input terminal 22 and the inverting input terminal of the operational amplifier 12, and the output terminal 24 of the operational amplifier 12 and the inverting input terminal. It consists of a resistor 20 inserted between them.

In this specification, it is assumed that the operational amplifier 12 and the like operate ideally, and a description will be added for each case where deviation from the ideal becomes a problem when actually designing a circuit.

In the phase shift circuit 10C having such a configuration, when a predetermined AC signal is input to the input terminal 22, the voltage VR1 appearing at both ends of the variable resistor 16 is applied to the non-inverting input terminal of the operational amplifier 12. You.

Also, since there is no potential difference between the two inputs (inverting input terminal and non-inverting input terminal) of the operational amplifier 12 shown in FIG. 2, the potential of the inverting input terminal of the operational amplifier 12, the capacity of the capacitor 14 and the variable resistor 16 It becomes equal to the potential of the connection point. Therefore, the same voltage VC1 appears at both ends of the resistor 18 as the voltage VC1 appearing at both ends of the capacitor 14.

Here, when the resistance values of the resistor 18 and the resistor 20 are equal, the same current flows through the two resistors 18 and 20, so that the voltage VC1 appears at both ends of the resistor 20. The voltage VC1 appearing at each end of these two resistors 18 and 20 has the same direction in terms of the vector. Considering the inverting input terminal (voltage VR1) of the operational amplifier 12, The vector voltage of the voltage VC1 across the resistor 18 is the input voltage Ei, and the vector voltage of the voltage VC1 of the resistor 20 is the output voltage Eo.

FIG. 3 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit 10C and a voltage appearing on a capacitor or the like.

As shown in this vector diagram, the voltage V R1 appearing at both ends of the variable resistor 16 and the voltage V C1 appearing at both ends of the capacitor 14 are 90 ° out of phase with each other. The sum of the input voltages becomes the input voltage Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes, the voltage VR1 across the variable resistor 16 and the voltage VC1 across the capacitor 14 change along the circumference of the semicircle shown in FIG. I do.

The output voltage Eo is the result of the vector subtraction of the voltage VC1 from the voltage VR1. Considering the voltage VR1 applied to the non-inverting input terminal, the input voltage Ei and the output voltage Eo differ only in the direction in which the voltage VC1 is synthesized, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be represented by an isosceles triangle with the input voltage Ei and the output voltage Eo as hypotenuses and the base at twice the voltage VC1, and the amplitude of the output signal is It can be seen that the phase shift amount is represented by 01 shown in FIG. 3 regardless of the amplitude of the input signal.

Also, as is apparent from FIG. 3, since the voltage VR1 and the voltage VC1 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VR1 is theoretically 90 as it changes to ∞. To 0 °. The phase shift amount 01 of the entire phase shift circuit 10C is twice that, and changes from 180 ° to 0 ° according to the frequency.

Next, the relationship between the input and output voltages described above is quantitatively verified.

When the input voltage E i is applied to the input terminal 22, the current flowing from the input terminal 22 to the output terminal 24 through the resistors 18 and 20 through the resistors 18 and 20 is equal to that of the resistors 18 and 20. Assuming that the value is r, the voltage between both ends of the resistors 18 and 20 is 1 · r.

By the way, as described above, since there must be no potential difference between the two inputs of the operational amplifier 12 shown in FIG. Between Eo and

VRl = Eo- (-I T)

= Eo + Ir

.-. Eo = VRl-I-r-(1)

Also, in order to prevent a potential difference between the two inputs of the operational amplifier 12, the value obtained by adding the voltage VC1 across the capacitor 14 and the voltage across the resistor 18—Ir must be 0. VC1 + (-I -r) = 0

.-. VC1 = I -r… From equations (1) and (2),

Eo = VRl-VCl · '· (3)

The voltage Ei applied to the input terminal 22 is the sum of the voltages VR1 and VC1 across the variable resistor 16 and the capacitor 14.Therefore, between these voltages,

Ei = VRl + VCl '(4) From equations (3) and (4),

Eo VR1- VC1

Ei VR1 + VC1

CR s-1 1 1 Ts

Ei = E: • (5) ~ CRs + 1 1 + T s

Becomes Here, C represents the capacitance of the capacitor 14, R represents the resistance of the variable resistor 16, and the time constant of the CR circuit composed of the capacitor 14 and the variable resistor 16 is T (= CR).

Substituting s = jω in equation (5) and transforming,

_Γ 1-j ωΤ ^

Εο = r— ^ ~ = r Ε

1 + j ωΤ

(1 j ωΤ) ²

Ei

1+ (ωΤ) ²

1 one (ωΤ) ² — j · 2ωΤ

E • (6)

1 + (ωΤ) ²

Becomes When the absolute value of the output voltage Εο is obtained from equation (6),

V (1 + (ωΤ) ² } ² +4 (ωΤ)

Eol = Ε

Two

= Ei… (?). That is, equation (7) indicates that the phase shift circuit 10C of this embodiment has a constant amplitude of the output signal equal to the amplitude of the input signal no matter how the phase between the input and output rotates. ing.

Further, the phase shift amount 01 of the output voltage Eo with respect to the input voltage Ei is obtained from the equation (6).

01 = t an ' ¹ {,

(ωΤ) ^ζ — 1

Becomes From equation (8), for example, the phase shift amount 01 at a frequency where ω is approximately 1ZT (= 1 / (CR)) is approximately 90 °, and only the phase can be approximately reduced without attenuating the amplitude of the input signal. Can be shifted 90 °. Moreover, by varying the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount 01 becomes substantially 90 ° can be changed.

FIG. 4 shows a configuration extracted from the phase shift circuit 30C at the subsequent stage shown in FIG. The phase shift circuit 30C at the subsequent stage shown in the figure is configured to shift the phase of the signal input to the input terminal 42 by a predetermined amount to the operational amplifier 32 which is a type of A variable resistor 36 and a capacitor 34 to be input, a resistor 38 inserted between the input terminal 42 and the inverting input terminal of the operational amplifier 32, and a resistor 40 inserted between the output terminal 44 of the operational amplifier 32 and the inverting input terminal. It is composed of

In the phase shift circuit 30C having such a configuration, when a predetermined AC signal is input to the input terminal 42, the voltage VC2 appearing across the capacitor 34 is applied to the non-inverting input terminal of the operational amplifier 32.

Also, since there is no potential difference between the two inputs (inverting input terminal and non-inverting input terminal) of the operational amplifier 32 shown in FIG. 4, the potential of the inverting input terminal of the operational amplifier 32 and the connection of the variable resistor 36 and the capacitor 34 It is equal to the potential at point 铳. Therefore, the same voltage VR2 appears at both ends of the resistor 38 as the voltage VR2 appearing at both ends of the variable resistor 36.

Here, when the resistances of the resistor 38 and the resistor 40 are equal, the same current flows through the two resistors 38 and 40, so that the voltage VR2 appears at both ends of the resistor 40. Moreover, the voltage VR2 appearing at each end of these two resistors 38 and 40 is vector-wise pointing in the same direction. Considering the inverting input terminal (voltage VC2) of the operational amplifier 32 as a reference, the vector sum of the voltage VR2 across the resistor 38 is the input voltage Ei, and the voltage R2 across the resistor 40 is the sum. The output voltage Eo is the result of the torque subtraction.

FIG. 5 is a vector diagram showing a relationship between an input / output voltage of the subsequent phase shift circuit 30C and a voltage appearing on a capacitor or the like.

As shown in the figure, the voltage VC2 appearing at both ends of the capacitor 34 and the voltage VR2 appearing at both ends of the variable resistor 36 are 90 ° out of phase with each other. i. Therefore, when the amplitude of the input signal is constant and only the frequency changes, the voltage V C2 across the capacitor 34 and the voltage V R2 across the variable resistor 36 change along the circumference of the semicircle shown in FIG. I do.

As described above, the output voltage Eo is obtained by vectorically subtracting the voltage VR2 from the voltage VC2. Considering the voltage VC2 applied to the non-inverting input terminal as a reference, the input voltage Ei and the output voltage Eo differ only in the direction in which the voltage VR2 is synthesized, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be represented by an isosceles triangle with the input voltage Ei and the output voltage Eo as hypotenuses and the base at twice the voltage VR2, and the amplitude of the output signal varies with the frequency. Regardless of the amplitude of the input signal, it is understood that the phase shift amount is represented by 02 shown in FIG.

Also, as is clear from FIG. 5, since the voltage VC2 and the voltage VR2 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VC2 is theoretically It changes from ^0β to 90 ° as it changes to ∞. The shift amount 02 of the entire phase shift circuit 30C is twice that, and changes from 0 ° to 180 ° according to the frequency.

As in the case of the preceding phase shift circuit 10C, when the voltage E i is applied to the input terminal 42, the current flowing from the input terminal 42 to the output terminal 44 through the resistors 38 and 40 is expressed as I and

Assuming that the resistance values of the resistor 38 and the resistor 40 are equal and the value is r, the voltage between both ends of the resistors 38 and 40 is 1 · r.

Since there must be no potential difference between the two inputs of the operational amplifier 32 shown in FIG. 4, the voltage VC2 across the capacitor 34 applied to the non-inverting input terminal of the operational amplifier 32 and the output Between the voltage Eo

VC2 = Eo- (-I -r)

= Eo + Ir

.-. Eo =-1 · r + VC2…

There is a relationship.

In addition, in order to prevent a potential difference between the two inputs of the operational amplifier 32, the value obtained by adding the voltage VR2 across the variable resistor 36 and the voltage Ir across the resistor 38 must be 0.

VR2 + (-I T) = 0

.VR2 = I-r ~ (10) From equations (9) and (10),

Eo = -VR2 + VC2

=-(VR2-VC2)-(Π).

The sum of the voltages VC2 and VR2 at both ends of the capacitor 34 and the variable resistor 36 is the voltage Ei applied to the input terminal 42.

Ei = VR2 + VC2-(12) From equations (11) and (12),-

Eo VR2-VC2

Ei VR2 VC2

_ VR2-VC2… R— C s _p .

• ^{Εθ =} VR2 + VC2 ^{El =} "~~ Γ ^El

^{R +} C

CRs— 1 p. 1— Ts 〜

= CRT ^{TEL =} TT ^EL- ⁽¹³⁾ . Here, C represents the capacitance of the capacitor 34, and R represents the resistance value of the variable resistor 36, and the time constant of the CR circuit composed of the capacitor 34 and the variable resistor 36 is calculated as follows: T (= CR) in the same manner as above.

Substituting s = jω in equation (13), Eo = — -—— ~ — Ει

1 + J ωΤ

(1—j wT) ²

― 1+ (ωΤ) ^{2 1}

1 one (ωΤ) ² — · 2ωΤ. ....

=., ₍ τ, ₂ Ει 〜 (14)

1 + (ωΤ) ^ζ

Becomes

Equations (13) and (14) described above differ only in sign from Equations (5) and (6) shown for the previous phase shift circuit 10C. Therefore, for the absolute value of the output voltage Εο, equation (7) can be applied as it is, and no matter how the phase between the input and output rotates, the amplitude of the output signal is It should be equal to the amplitude of

Further, when the phase shift amount 02 of the output voltage Εο with respect to the input voltage Ei is obtained from Expression (14),

2ωΤ

ø 1 = t an ', 2-1 • (15) From equation (15), for example, the phase shift amount 02 at a frequency where ω is approximately 1ZT (= 1 / (CR)) is approximately 90 °, and only the phase can be approximately reduced without attenuating the amplitude of the input signal. 90. Can be shifted. Moreover, by varying the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount 02 becomes substantially 90 ° can be changed.

Thus, the phase is shifted by a predetermined amount in each of the two phase shift circuits 10C and 30C. In addition, as shown in FIGS. 3 and 5, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10C and 30C is in the opposite direction, and the two phase shift circuits at a predetermined frequency. A signal with a phase shift of 0 ° is output by the entire 10C and 30C.

The output of the subsequent phase shift circuit 30C is returned to the input side of the previous phase shift circuit 10C via the feedback resistor 70, and the returned signal is input to the input terminal (No. 2 Input to the input terminal 22) shown in the figure. In the oscillator 1 of this embodiment, such a feedback loop is formed, and by setting the loop gain to 1 or more, Sinusoidal oscillation is performed at such a frequency that the phase shift amount becomes 0 ° when making a round of the closed loop.

FIG. 6 is a circuit diagram in which the entirety of the two phase shift circuits 10 C and 30 C having the above-described configuration is replaced with a circuit having a transfer function K1, and a circuit having a transfer function K1 and a resistance value R0 A closed loop is formed by the feedback resistor 70 of FIG. FIG. 7 is a circuit diagram obtained by converting the circuit shown in FIG. 6 by Miller's theorem. As shown in FIG. 7, when the feedback resistor 70 having the resistance value R0 is converted into the input shunt resistor, the resistance value Rs Is

Can be represented by

In this equation, if K 1 is larger than 1, the input shunt resistance Rs becomes negative.

If an ideal phase-shift circuit with a transfer function K1 (all-pass * network) satisfies the condition that the phase shift is 0 ° at any finite frequency, selective As a result, a negative resistance is realized, and oscillation is possible. Actually, the input shunt resistor is in the form of being connected in parallel with the input impedance of the phase shift circuit, and the combination of these must be a negative resistance.The resistance value R0 of the force feedback resistor 70 must be set low. Since it is extremely easy to set the input impedance of the phase shift circuit to a high level in design, it is theoretically possible to ignore the effect of the input impedance of the phase shift circuit.

By the way, as is clear from equation (5), the transfer function K2 of the preceding phase shift circuit 10C is

^Κ2 = ΤΪΤ77 ·)

As is apparent from equation (13), the transfer function Κ3 of the subsequent phase shift circuit 30 C is

Κ3 =-(18)

1 tens T ₂ s

It is. However, the time constant of each CR circuit in the phase shift circuits 10C and 30C was assumed to be different, and they were set to Τ, Τ ₂ respectively.

Therefore, the overall transfer function K 1 of the platform connecting the phase shift circuits 10 C and 30 C is Kl = K2xK3

1 -T, s 1 T ₂ s

l + T, T ₂ s ^2- (T ₁ + T ₂ ) s

•• (19) l + T, T ₂ s ² + (T, + T ₂ ) s

Becomes Where s = jw, s ₂ = — ω ² , A = l + T

After all,

A- B s

Κ1 =

A + Β s

^{- A 2 - 2 AB s +} B 2 s 2

― A ² -B ² s ²

_{_ (1 + T, T 2} s 2) 2 - 2 (1 + T, T 2 s 2) (T, + T 2) s + (T, + T 2) 2 s 2

― (1 + T, T ₂ s ² )-(T, + T ₂ ) ² s ²

_{_ (1 -Τ, Τ 2 ω} 2) 2 - 2 j (1 -Τ, Τ 2 ω 2) (Τ 1 + Τ 2) ω- (Τ 1 + Τ 2) 2 ω 2 -. (1 + Τ , Τ ₂ ω ² ) ² + (Τ, + Τ ₂ ) ² ω ²

Becomes In this equation (20), the imaginary term on the right side of equation (20) must be 0 in order for the phase difference between the input and output of the entire two-stage phase shifters 10C and 30C to be 0 °. Therefore, the following equation holds.

(1 -Τ, Τ ₂ ω ² ) (Τ,-(-Τ ₂ ) ω = 0-(21) Therefore, 1

Since the phase difference input signal is a field stage of DC is 180 ° when the eventually other conditions (1-tau, T ₂ omega ² = 0) satisfying 0 = 1 ^ (Ding Ding ₂₎ The phase difference is 0 when. Becomes At this frequency, the input shunt resistance Rs becomes a negative resistance, and simultaneously satisfies the oscillation voltage condition and the frequency condition.

In this way, by combining the two phase shift circuits 10C and 30C, the phase shift amount of a signal that goes around the closed loop can be made 0 ° at a certain frequency, and the loop gain at this time becomes 1 With the above setting, the sine wave oscillation is maintained. The frequency at which the phase shift amount is 0 ° depends on the variable resistance in each of the phase shift circuits 10C and 30C. Since it can be changed by changing the resistance value of 16 or 36, a variable frequency oscillator can be easily realized.

Since the actual operational amplifiers 12 and 32 deviate from the ideal, even if the resistors 18 and 20 or the resistors 38 and 40 are set to the same resistance value, the signal amplitude is slightly attenuated. Therefore, in order to set the gain of the entire closed loop to be 1 or more, the resistance value of the resistor 20 is larger than the resistance value of the resistor 18 or the resistance value of the resistor 40 is larger than the resistance value of the resistor 38. There is a need.

Also, the oscillator 1 of this embodiment is configured by combining an operational amplifier, a capacitor, or a resistor, and any of the constituent elements can be formed on a semiconductor substrate. It is easy to form an integrated circuit by forming the whole on a semiconductor substrate.

In the oscillator 1 of the first embodiment described above, the phase shift circuit 10C is arranged in the preceding stage and the phase shift circuit 30C is arranged in the subsequent stage, respectively. Since the shift amount only needs to be 0 °, the phase shift circuit 30C may be arranged at the front stage and the phase shift circuit 10C may be arranged at the rear stage, and the oscillator may be configured.

Further, the oscillator 1 of the first embodiment described above has a phase shift amount of 0 ° due to the entire two phase shift circuits 10 C and 30 C to perform a predetermined oscillating operation. A non-inverting circuit that does not shift may be added.

FIG. 8 is a circuit diagram showing a configuration of an oscillator 1A in which a non-inverting circuit 50 is added to the oscillator 1 shown in FIG. The non-inverting circuit 50 includes an operational amplifier 52 having an inverting input terminal grounded via a resistor 54 and a resistor 56 connected between the inverting input terminal and the output terminal. It functions as a buffer having a predetermined amplification determined by the resistance ratio of the two resistors 54 and 56. The non-inverting circuit 50 having such a configuration outputs the input signal without changing the phase, and it is easy to set the loop gain of the oscillator 1 A to 1 or more by adjusting the amplification degree. Becomes (Second embodiment)

FIG. 9 is a circuit diagram showing a configuration of an oscillator according to a second embodiment to which the present invention is applied. Each of the oscillators 2 shifts the phase of an input signal by a predetermined amount so that the oscillator 2 operates at a predetermined frequency. It consists of two phase shift circuits 10L and 30L that perform a total phase shift of 0 °, and a return resistor 70 that returns the output of the subsequent phase shift circuit 30L to the input side of the previous phase shift circuit 10L. Have been.

FIG. 10 is a diagram extracted from the configuration of the preceding-stage phase shift circuit 10L shown in FIG. 9, and the former-stage phase shift circuit 10L is an operational amplifier (operational amplifier) which is a type of differential input amplifier. 12, a variable resistor 16 and an inductor 17 for shifting the phase of the signal input to the input terminal 22 by a predetermined amount and inputting them to the non-inverting input terminal of the operational amplifier 12, and the inverting input terminal of the input terminal 22 and the operational amplifier 12. And a resistor 20 inserted between the output terminal 24 of the operational amplifier 12 and the inverting input terminal. In the phase shift circuit 10 L having such a configuration, when a predetermined AC signal is input to the input terminal 22, the voltage V L1 appearing at both ends of the intagter 17 is applied to the non-inverting input terminal of the operational amplifier 12. You.

Also, since there is no potential difference between the two inputs (inverting input terminal and non-inverting input terminal) of the operational amplifier 12 shown in FIG. 10, the potential of the inverting input terminal of the operational amplifier 12, the variable resistor 16 and the inductor 17 Is equal to the potential at the contact point of Therefore, the same voltage VR3 that appears at both ends of the resistor 18 appears at both ends of the variable resistor 16.

Here, when the resistance 18 and the resistance 20 have the same resistance value, the same current flows through these two resistances 18 and 20, so that the voltage VR3 appears at both ends of the resistance 20. Moreover, the voltage VR3 appearing at both ends of these two resistors 18 and 20 has the same direction in vector, and considering the inverting input terminal (voltage VL1) of the operational amplifier 12, the resistance 18 The output voltage Eo is the input voltage Ei obtained by adding the voltage VR3 between both ends in a vector manner to the input voltage Ei, and the output voltage Eo is obtained by subtracting the voltage VR3 of the resistor 20 in a vector manner.

FIG. 11 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit 10 L and the voltage appearing at the ingector and the like. As shown in this vector diagram, the voltage V appearing at both ends of the And the voltage VR3 appearing at both ends of the variable resistor 16 is 90 ° out of phase with each other, and the sum of these vectors is the input voltage Ei. According to When the amplitude of the input signal is constant and only the frequency changes, the voltage VL1 across the inductor 17 and the voltage VR3 across the variable resistor 16 change along the circumference of the semicircle shown in FIG. I do.

The output voltage Eo is the result of the vector subtraction of the voltage VR3 from the voltage VL1. Considering the voltage VL1 applied to the non-inverting input terminal, the input voltage Ei and the output voltage Eo differ only in the direction in which the voltage VR3 is synthesized, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be represented by an isosceles triangle with the input voltage E i and the output voltage E 0 as the hypotenuse and the base as twice the voltage V R3, and the amplitude of the output signal Is the same as the amplitude of the input signal regardless of the frequency, and it can be seen that the amount of phase shift is represented by 03 shown in FIG.

Also, as is clear from FIG. 11, since the voltage VL1 and the voltage VR3 intersect at right angles on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VU is It changes from 90 ° to 0 ° as it changes from ∞ to ∞. Then, the phase shift amount 03 of the entire phase shift circuit 10 L is twice as large as that, and from 180 ° to 0 depending on the frequency. It changes up to.

When the input voltage E i is applied to the input terminal 22, the current flowing from the input terminal 22 to the output terminal 24 through the resistors 18 and 20 through I is I, and the resistance values of the resistors 18 and 20 are equal. If r is r, the voltage across each of the resistors 18 and 20 is 1 I · r.

By the way, as described above, since there must be no potential difference between the two inputs of the operational amplifier 12 shown in FIG. 10, the voltage VL1 across the inductor 17 applied to the non-inverting input terminal of the operational amplifier 12 and the output Between the voltage Eo

VLl = Eo- (-I T)

= E o + Ir

. ·. Eo =-u r + V L1…

There is a relationship.

Also, in order to prevent a potential difference between the two inputs of the operational amplifier 12, the value obtained by adding the voltage VR3 across the variable resistor 16 and the voltage Ir across the resistor 18 must be 0. VR3 + (-I -r) = 0

.VR3 = I-r-(23). From equations (22) and (23),

Eo = -VR3 + VLl

= 1 (VR3-VL1)-(24).

Also, since the voltage Ei applied to the input terminal 22 is the sum of the voltages VL1 and VR3 across the inductor 17 and the variable resistor 16, the voltage between these voltages is:

Ei = VR3 + VLl-(25) From equations (24) and (25),

Eo VR3-VL1

Ei VR3 + VL1… R- c VR3-VL1 L s „

^{Eo =} vmvu ^{El =} -"Γ ^E:

^{R +} L7

Ei-(26)

1 + T s. Here, L represents the inductance of the inductor 17, R represents the resistance of the variable resistor 16, and the time constant of the LR circuit composed of the inductor Π and the variable resistor 16 is calculated using the phase shift circuit 10C shown in Fig. 2. T (= L / R) as in.

The calculation result of equation (26) is the same as the calculation result of equation (5) shown in the first embodiment, and the phase shift circuit 10L of this embodiment has the structure shown in FIG. It can be seen that the input / output voltage has the same relationship as the phase circuit 10C. Therefore, in the phase shift circuit 10L, the amplitude of the output signal is constant regardless of the phase between the input and output signals, and the phase shift amount 03 of the output voltage Eo with respect to the input voltage is as described above (8 ) Is applied as it is. For example, the phase shift amount at a frequency where ω is approximately 1ZT (= R / L) is approximately 90 °. Moreover, by varying the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount becomes almost 90 ° is changed. Can be made.

FIG. 12 is a diagram extracted from the configuration of the phase shift circuit 30 L of the subsequent stage shown in FIG. 9, and the phase shift circuit 30 L of the latter stage is composed of an operational amplifier 32, which is a kind of differential input amplifier, and an operational amplifier 32. , The phase of the signal input to the input terminal 42 is shifted by a predetermined amount, and the inductor 37 and the variable resistor 36 input to the non-inverting input terminal of the operational amplifier 32 and the input terminal 42 and the inverting input terminal of the operational amplifier 32. It is composed of a resistor 38 inserted and a resistor 40 inserted between the output terminal 44 of the operational amplifier 32 and the inverting input terminal.

In the phase shift circuit 30L having such a configuration, when a predetermined AC signal is input to the input terminal 42, the voltage V R4 appearing at both ends of the variable resistor 36 is applied to the non-inverting input terminal of the operational amplifier 32. Is done.

Also, since there is no potential difference between the two inputs (inverting input terminal and non-inverting input terminal) of the operational amplifier 32 shown in FIG. 12, the potential of the inverting input terminal of the operational amplifier 32, the inductor 37 and the variable resistor It becomes equal to the potential of the connection point of 36. Therefore, at both ends of the resistor 38, the same voltage V L2 appears at both ends of the inductor 37.

Here, if the resistances of the resistor 38 and the resistor 40 are equal, the same current flows through the two resistors 38 and 40, so that the voltage V L2 appears at both ends of the resistor 40. Moreover, the voltage V L2 appearing at each end of these two resistors 38 and 40 is vector-wise oriented in the same direction. Considering the inverting input terminal (voltage VR4) of the operational amplifier 32, The sum of the voltage V L2 at both ends of the resistor 38 in a vector manner is the input voltage E i, and the sum of the voltage L 2 across the resistor 40 in a vector manner is the output voltage E o.

FIG. 13 is a vector diagram showing a relationship between an input / output voltage of the subsequent phase shift circuit 30L and a voltage appearing in an inductor or the like.

As shown in this vector diagram, the voltage V R4 appearing at both ends of the variable resistor 36 and the voltage V L2 appearing at both ends of the inductor 37 are 90 ° out of phase with each other. The result is the input voltage E i. Therefore, the input signal amplitude is constant and only the frequency is changed. The voltage V R4 across the variable resistor 36 and the voltage V V across the variable resistor 37 along the circumference of the semicircle shown in FIG. L2 changes.

As described above, the output voltage Eo is obtained by vectorically subtracting the voltage VL2 from the voltage VR4. Considering the voltage V R4 applied to the non-inverting input terminal, The output voltage Eo and the output voltage Eo differ only in the direction in which the voltage VL2 is synthesized, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be represented by an isosceles triangle with the input voltage Ei and the output voltage Eo as hypotenuses and the base at twice the voltage VL2, and the amplitude of the output signal is related to the frequency. It can be seen that the amplitude is the same as the amplitude of the input signal, and the phase shift amount is represented by 04 shown in FIG.

Further, as is apparent from FIG. 13, since the voltage VR4 and the voltage VL2 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VR4 is theoretically It changes from 0 ° to 90 ° as it changes to. Then, the shift amount 04 of the entire phase shift circuit 30L is twice that, and changes from 0 ° to 180 ° according to the frequency.

As in the case of the preceding phase shift circuit 10L, when the voltage E i is applied to the input terminal 42, the current flowing from the input terminal 42 to the output terminal 44 through the resistors 38 and 40 is I, the resistance 38 and the resistance Assuming that the resistance values of the resistors 40 are equal and the value is “, the voltage at both ends of the resistors 38 and 40 is 1 Ir.

Since there must be no potential difference between the two inputs of the operational amplifier 32 shown in FIG. 12, the voltage between the voltage VR4 across the variable resistor 36 applied to the non-inverting input terminal of the operational amplifier 32 and the output voltage Eo is ,

VR4 = Eo- (-1 -r)

= Eo + Ir

.Eo = VR4- I-r (27)

There is a relationship.

Also, in order for a potential difference not to occur between the two inputs of the operational amplifier 32, the value obtained by adding the voltage VL2 across the inductor 37 and the voltage Ir across the resistor 38 must be 0.

VL2 + (-1 -r) = 0

.VL2 = l * r…

Becomes From equations (27) and (28),

Eo = VR4—VL2 (29) Becomes

The voltage Ei applied to the input terminal 42 is the sum of the voltages VR4 and VL2 at both ends of the variable resistor 36 and the inductor 37.

Ei = VR4 + VL2-There is a relation of (30). From equations (29) and (30),

Eo VR4-VL2

Ei VR4 + VL2

„VR4-VL2 R-L s…

• ^{ΕΘ =} VR4 + VL2 ^{EL =} RI ^EL

1 s

^R Ei = Ei ... (31)

"1 + Ts

1 ⁺ R ^S

Becomes Here, L represents the inductance of the inductor 37, and R represents the resistance value of the variable resistor 36, and the time constant of the LR circuit composed of the intagta 37 and the variable resistor 36 is calculated in the same manner as in the preceding phase shift circuit 10L. T (= L / R).

The calculation result of the equation (31) is the same as the calculation result of the equation (13) shown in the first embodiment. The phase shift circuit 30 L of this embodiment is different from the phase shift circuit of the first embodiment. It can be seen that there is the same input-output voltage relationship as 30C. Therefore, no matter how the phase of the input / output signal rotates, the amplitude of the output signal of the phase shift circuit 30L is constant.

For the phase shift amount 4 of the output voltage Eo with respect to the input voltage, 02 expressed in the above equation (15) is applied as it is. For example, the phase shift amount at a frequency such that ω becomes approximately 1ZT (= R / L) is obtained. The amount will be almost 90 °. Moreover, by varying the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount becomes approximately 90 ° can be changed.

Thus, the phase is shifted by a predetermined amount in each of the two phase shift circuits 10L and 30L. Moreover, as shown in FIGS. 11 and 13, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10L and 30L is in the opposite direction, and the two phase shift circuits 10L and 30L at a predetermined frequency. As a result, a signal with a phase shift of 0 ° is output. The output of the subsequent phase shift circuit 30 L is fed back to the input side of the previous phase shift circuit 10 L via the return resistor 70, and this feedback signal is input to the input terminal ( It is input to the input terminal 22) shown in FIG. In the oscillator 2 of this embodiment, such a return loop is formed, and by setting the loop gain to 1 or more, a sine wave is generated at a frequency such that the phase shift amount becomes 0 ° when the loop goes through the closed loop. Wave oscillation occurs.

By the way, the oscillator 2 of the second embodiment including the above-described two phase shift circuits 10L and 30L can be replaced by a circuit having a transfer function K1, as in the case of the first embodiment. This can be represented by the circuit diagram shown in FIG. Therefore, by performing conversion using the Miller's theorem, the circuit can be represented by the circuit diagram shown in FIG. 7, and the input shunt resistance Rs of the circuit after the conversion can be represented by equation (16).

Further, as is apparent from the equations (26) and (31), the transfer functions of the two phase shift circuits 10L and 30L of this embodiment are respectively equivalent to the two phase shift circuits 10C of the first embodiment. , And 30C, and the transfer function K1 of the whole stage where the two phase shift circuits 10L and 30L are connected can be applied as it is to the equation (19). Therefore, the phase difference between the entire input and output connected to the two phase shift circuits 10L and 30L is 0 ° at wl / TCT! Tz), which satisfies the oscillation voltage condition and the frequency condition at the same time. Become.

In this way, by combining the phase shift circuits 10L and 30L, the phase shift amount of a signal that makes a round of the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time is set to 1 or more. As a result, sine wave oscillation is maintained. Also, the frequency at which the phase shift amount becomes 0 ° can be changed by changing the resistance value of the variable resistor 16 or 36 in each of the phase shift circuits 10L and 30L. Can be realized. In addition, the oscillation frequency ω of the oscillator 2 of this embodiment becomes 1 ZT−RZL when the time constants of the LR circuits in the two phase shift circuits 10 L and 30 L are the same, for example, By changing R, it can be greatly changed.

Further, the inductors 17 and 37 can be formed on a semiconductor substrate by forming a spiral conductor by a photolithography method or the like. The use of the oscillators 17 and 37 makes it easy to form the entire oscillator 2 together with other components (such as an operational amplifier and a resistor) on a semiconductor substrate to form an integrated circuit. When the oscillator 2 is formed as above, it is easy to increase the frequency ω (= R / L) by reducing the inductance of the inductors 17 and 37, which is suitable for increasing the oscillation frequency.

In the oscillator 2 according to the second embodiment described above, the phase shift circuit 10L is arranged in the preceding stage and the phase shift circuit 30L is arranged in the subsequent stage, respectively. Since the amount only needs to be 0 °, the oscillator may be configured such that the phase shift circuit 30L is arranged at the front stage and the phase shift circuit 10L is arranged at the rear stage, with the order before and after these being interchanged.

In the oscillator 2 of the second embodiment described above, the phase shift amount is set to 0 ° by the entirety of the two phase shift circuits 10L and 30L to perform a predetermined oscillation operation. As shown in FIG. 14, a non-inverting circuit 50 that does not shift the phase may be added to configure the oscillator 2A.

(Third embodiment)

FIG. 15 is a circuit diagram showing the configuration of the oscillator according to the third embodiment. In each of the oscillators 3, the phase of the input signal is shifted by a predetermined amount so that the oscillator 3 has a total of 0 at a predetermined frequency. ° phase shift circuits 10 C and 30 L for performing a phase shift of 90 °, and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 30 L to the input side of the preceding phase shift circuit 10 C. .

As described in the first and second embodiments described above, the phase is determined by each of the two phase shift circuits 10C and 30L included in the oscillator 3 of the third embodiment. The amount is shifted. Moreover, as shown in FIGS. 3 and 13, the relative phase relationship between the input and output voltages at each phase shift circuit and each of 10 C and 30 L is opposite, and two phase shifts at a certain frequency. A signal having a phase shift amount of 0 ° is output by the entire circuit 10C and 30L.

The output of the subsequent phase shift circuit 30 L is returned to the input side of the previous phase shift circuit 10 C via the return resistor 70, and the returned signal is input to the phase shift circuit 10 C. Terminal (No. 2 Input to the input terminal 22) shown in the figure. In the oscillator 3 of this embodiment, such a feedback loop is formed, and by setting the loop gain to 1 or more, the amount of phase shift is 0 when the loop goes through the closed loop. Sine wave oscillation is performed at a frequency such that

By the way, the oscillator 3 of the third embodiment including the above-described two phase shift circuits 10 C and 30 L can be replaced by a circuit having a transfer function K 1 as in the case of the first embodiment. It can be represented by the circuit diagram shown in FIG. Therefore, the conversion by the Miller's theorem can be represented by the circuit diagram shown in FIG. 7, and the input shunt resistance Rs of the circuit after the conversion can be represented by equation (16).

Also, as is apparent from the equation (31), the transfer function of the phase shift circuit 30L at the subsequent stage of this embodiment is the same as each transfer function of the phase shift circuit 30C at the latter stage of the first embodiment. As the overall transfer function K1 of the platform connecting the two phase shift circuits 10C and 30L, the one shown in equation (19) can be applied as it is. Therefore, between the entire input and output connecting the two phase shift circuits 10C and 30L,

As a result, the oscillation voltage condition and the frequency condition are satisfied at the same time.

In this way, by combining the two phase shift circuits 10C and 30L, the amount of phase shift of the signal that makes a round of the closed loop is zero at a certain frequency. By setting the loop gain at this time to 1 or more, sine wave oscillation is maintained. Further, the frequency at which the phase shift amount becomes 0 ° can be changed by changing the resistance value of the variable resistor 16 or 36 in each of the phase shift circuits 10 C and 30 L. Can be realized.

Further, as described in the second embodiment, the inductor 37 can be formed on the semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using such an inductor 37, it is easy to form an integrated circuit by forming the entire oscillator 3 on a semiconductor substrate together with other components (such as an operational amplifier and a resistor).

The time constant T of the CR circuit of the preceding phase shift circuit 10C is CR, and the time constant T of the LR circuit of the subsequent phase shift circuit 30L is LZR. And the denominator, for example, to form the entire oscillator 3 on a semiconductor substrate In the case where the variable resistors 16 and 36 are formed by FETs in particular, it is possible to suppress the fluctuation of the oscillation frequency due to the temperature change of the resistance value of each variable resistor, so-called temperature compensation.

'Ru.

In the oscillator 3 of this embodiment, the phase shift circuit 10C is arranged in the preceding stage, and the phase shift circuit 30L is arranged in the subsequent stage. For this reason, the oscillator may be configured by exchanging the order before and after, by arranging the phase shift circuit 30L in the preceding stage and the phase shifting circuit 10C in the subsequent stage. Further, as shown in FIG. 8 or FIG. 14, a non-inverting circuit 50 that outputs the input signal without shifting the phase may be connected to the output side of the phase shift circuit 30L.

(Fourth embodiment)

FIG. 16 is a circuit diagram showing a configuration of an oscillator according to a fourth embodiment. Each of the oscillators 4 shifts the phase of an input signal by a predetermined amount to obtain a total of 0 ° at a predetermined frequency. It is composed of two phase shift circuits 10 L and 30 C that perform the phase shift of the phase shift circuit, and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 30 C to the input side of the previous phase shift circuit 10 L. I have.

As described in the first and second embodiments described above, the phase is shifted by a predetermined amount by each of the two phase shift circuits 10 L and 30 C included in the oscillator 4 of the fourth embodiment. . As shown in FIG. 11 and FIG. 5, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10L and 30C is opposite, and two phase shifts at a certain frequency. A signal having a phase shift amount of 0 ° is output by the entire circuits 10L and 30C.

The output of the subsequent phase shift circuit 30 C is returned to the input side of the previous phase shift circuit 10 L via the feedback resistor 70, and this feedback signal is input to the input terminal of the phase shift circuit 10 L. (Input terminal 22 shown in FIG. 10). In the oscillator 4 of the present embodiment, such a feedback loop is formed, and by setting the loop gain to 1 or more, the sine wave at a frequency such that the phase shift amount becomes 0 ° when making a round of the closed loop. Oscillation is performed.

By the way, the oscillator of the fourth embodiment including the two phase shift circuits 10 L and 30 C described above 4 can be represented by a circuit diagram shown in FIG. 6 when the whole is replaced with a circuit having a transfer function Kl, similarly to the platform of the first embodiment. Therefore, the conversion by the Miller's theorem can be represented by the circuit diagram shown in FIG. 7, and the input shunt resistance Rs of the circuit after the conversion can be represented by equation (16).

Further, as is apparent from the equation (26), the transfer function of the preceding-stage phase shift circuit 10L of this embodiment is the same as each transfer function of the preceding-stage phase shift circuit 10C of the first embodiment. The total transfer function Kl of the platform connected with one of the phase shift circuits 10L and 30C can be applied as is as shown in equation (19). Therefore, when ω = 1 Ζ · ^ (Τ, Τ ₂ ), the phase difference between the entire input and output connected to the two phase shift circuits 10L and 30C is 0 °, and the oscillation voltage condition and frequency The conditions will be met at the same time.

In this way, by combining the two phase shift circuits 10 L and 30 C, the phase shift amount of a signal that goes around the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time can be reduced. Sine wave oscillation is maintained by setting it to 1 or more. In addition, the frequency at which the phase shift amount is 0 ° can be changed by changing the resistance value of the variable resistor 16 in each phase shift circuit 10L and 30C. Oscillator can be realized.

As described in the second embodiment, the inductor 17 can be formed on a semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using the inductor 17, it is easy to form an integrated circuit by forming the entire oscillator 4 on a semiconductor substrate together with other components (such as an operational amplifier and a resistor).

In addition, the time constant T of the LR circuit of the preceding phase shift circuit 10 L is L ZR, and the time constant T of the CR circuit of the succeeding phase shift circuit 30 C is CR. For example, if the oscillator 4 is formed entirely on a semiconductor substrate and the variable resistors 16 and 36 are formed by FETs, the oscillation frequency of the resistance value of each variable resistor with respect to a temperature change is changed. It is possible to suppress fluctuations, so-called temperature capture.

In the oscillator 4 of this embodiment, the phase shift circuit 10L is provided in the preceding stage, and the phase shift circuit 30C is provided in the subsequent stage. Therefore, the phase shift circuit 30C may be arranged at the front stage and the phase shift circuit 10L may be arranged at the subsequent stage to form an oscillator. Further, as shown in FIG. 8 or FIG. 14, a non-inverting circuit 50 for outputting the phase of the input signal without shifting the phase may be connected to the output side of the phase shift circuit 30C.

(Fifth embodiment)

The oscillator of each of the above-described embodiments is configured by combining two phase shift circuits in which the relative phase relationship between the input and output signals is opposite, as shown in FIGS. 3 and 5. An oscillator may be configured by combining two phase shift circuits having the same phase relationship.

FIG. 17 is a circuit diagram showing the configuration of the oscillator according to the fifth embodiment. The oscillator 5 includes two phase shift circuits 10 C whose configuration is shown in FIG. It comprises a phase inversion circuit 80 for further inverting the phase of the output signal of the first stage, and a return resistor 70 for returning the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 10C.

The phase inversion circuit 80 is connected between an inverting input terminal via a resistor 84 and an inverting input terminal of a non-inverting input terminal of the operational amplifier 82 and a non-inverting input terminal of the operational amplifier 82. And a resistor 86 connected to the resistor 86. When an AC signal is input to the inverting input terminal of the operational amplifier 82 via the resistor 84, an inverted signal having an inverted phase is output from the output terminal of the operational amplifier 82. Is obtained from the output terminal 92 of the oscillator 5 shown in FIG. Further, the phase inversion circuit 80 has a predetermined amplitude determined by the resistance ratio of the two resistors 84 and 86. As described in the first embodiment, each of the two phase shift circuits 10 has a phase shift amount of 180 0 as the frequency ω of the input signal changes from 0 to ∞. ° to 0 ^β . For example, assuming that the time constants of the CR circuits in the two phase shift circuits 10C are the same, and this is Τ, at a frequency of ω = 1 / Τ, the phase in each of the two phase shift circuits 10C The shift amount is 90 °. Therefore, the phase is shifted by 180 ° by the entire two phase shift circuits 10C, and the phase is inverted by the phase inverting circuit 80 provided at the subsequent stage. A signal in which the phase shift amount becomes 0 ° in one cycle is output from the phase inversion circuit 80 _c By feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit IOC via the feedback resistor 70, a sine wave oscillation having a frequency ω is performed.

The transfer function K21 of each of the two phase shift circuits 10C is expressed as follows: When the time constant of the CR circuit in each phase shift circuit 10C is Τ, を in Equation (17) is replaced by Τ,

Κ21 = (32)

1 + 1 s

Becomes Therefore, the overall transfer function K11 when the two phase shift circuits 10C and the phase inversion circuit 80 are cascaded is

Kll = K21xK2lx (-1)

(1-Ts) ²

(1 + Ts) ²

1+ (T s) ² — 2Ts

■ (33)

1+ (Ts) ² + 2T s

Becomes The (33) right side of the equation is equal T of the transfer function K1 shown in the first embodiment (19), and T ₂ to are replaced with T. That is, equation (33) is equal to the overall transfer function when the two phase shift circuits 10 C and 30 C shown in the first embodiment are connected. It can be seen that the configuration in which the two phase shift circuits 10C and the phase inversion circuit 80 are connected is equivalent to the configuration of the oscillator 1 shown in FIG. 1 in the first embodiment.

Therefore, in the oscillator 5 of the fifth embodiment, the loop gain is set to 1 or more by setting the amplification degree of the phase inversion circuit 80 or the amplification degree of the two phase shift circuits 10C to an appropriate value and setting the loop gain to 1 or more. Then, a sine wave oscillation is held at a frequency such that the phase shift amount becomes 0 °.

Also, by varying the resistance value R of the variable resistor 16 in each phase shift circuit 10C, the amount of phase shift in each phase shift circuit 10C can be changed, so that the phase inversion circuit 80 and the two phase shift circuits 10C can be changed. The frequency at which the phase shift amount becomes 0 ° in total can be changed as a whole, and the variable frequency oscillator 5 can be easily realized.

Further, the oscillator 5 of this embodiment is formed by combining an operational amplifier, a capacitor, or a resistor, and any of the components can be formed on a semiconductor substrate. Therefore, it is easy to form the entire oscillator 5 capable of adjusting the oscillation frequency on a semiconductor substrate to form an integrated circuit.

(Sixth embodiment)

FIG. 18 is a circuit diagram illustrating a configuration of an oscillator according to a sixth embodiment. The oscillator 6 includes two phase shift circuits 30C illustrated in FIG. 4 and output signals of a subsequent phase shift circuit 30C. And a feedback resistor 70 that feeds back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 30C.

As described in the fifth embodiment, the phase inversion circuit 80 inverts the phase of the input signal, and simultaneously with this phase inversion, a signal obtained by amplifying the input signal with a predetermined amplification factor Is output.

By the way, as described in the first embodiment, each of the two phase shift circuits 30 changes the phase shift amount from 0 ° to 180 ° as the frequency ω of the input signal changes from 0 to ∞. To change. For example, assuming that the time constants of the CR circuits in the two phase shift circuits 30C are the same, and let this be Τ, at the frequency ω = 1ΖΤ, the amount of phase shift in each of the two phase shift circuits 30C Becomes 90 °. Therefore, the phase is shifted by 180 ° by the whole of the two phase shift circuits 30C, and the phase is inverted by the phase inversion circuit 80 provided at the subsequent stage. A signal having a phase shift of 0 ° is output from the phase inversion circuit 80. By feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 30C via the feedback resistor 70, a sine wave oscillation having the frequency ω is performed.

Each transfer function K31 of two phase shifting circuits 30C, when the constant is T when the CR circuits in the respective phase shifting circuits 30C, by replacing T with T ₂ in (18),

1 -Τ c

Κ31 = _Ύ — (34)

10 T s

Becomes Therefore, the overall transfer function K12 of the stage connecting the two phase shift circuits 30C and the phase inversion circuit 80 is K12 = 3lxK31x (-1)

(1-Ts) ²

(1 + Ts) ²

1 + (T s) ² — 2Ts

■ (35)

1+ (T s) ² + 2Ts

As a result, in the first embodiment, a calculation result equal to that obtained by replacing T and T ₂ of the transfer function Kl shown in Expression (19) with T is obtained.

That is, the configuration in which the two phase shift circuits 30C and the phase inversion circuit 80 are connected in this embodiment is different from the configuration in which the two phase shift circuits 10C and 30C are connected in the first embodiment, and the configuration in which the two phase shift circuits 10C and 30C are connected in the fifth embodiment. It can be said that this is equivalent to a configuration in which one phase shift circuit 10C and a phase inversion circuit 80 are connected.

Therefore, in the oscillator 6 according to the sixth embodiment, the loop gain is set to 1 or more by setting the amplification degree of the phase inversion circuit 80 or the amplification degree of the two phase shift circuits 30C to an appropriate value, and thereby making one round Then, the sinusoidal wave oscillation is maintained at a frequency such that the phase shift amount becomes 0 °.

Also, by varying the resistance value R of the variable resistor 36 in each phase shift circuit 30C, the amount of phase shift in each phase shift circuit 30C can be changed, so that the phase inversion circuit 80 and the two phase shift circuits 30C entirety by the amount of phase shift can Rukoto changing the frequency to be 0 ^beta total, it is possible to easily realize the oscillator 6 frequency-variable.

Further, the oscillator 6 of this embodiment is configured by combining an operational amplifier, a capacitor, or a resistor, and any of the constituent elements can be formed on a semiconductor substrate. It is also easy to form an integrated circuit by forming the entire structure on a semiconductor substrate.

(Seventh embodiment)

FIG. 19 is a circuit diagram showing the configuration of the oscillator according to the seventh embodiment. The oscillator 7 has two phase shift circuits 10L whose configuration is shown in FIG. 10 and output signals of the subsequent phase shift circuit 10L. A phase inversion circuit 80 for further inverting the phase of the signal, and a return resistor 70 for feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 10L. As described in the above-described second embodiment, each of the two phase shift circuits 10L has a phase shift amount from 180 ° to 0 ° as the frequency ω of the input signal changes from 0 to ∞. Change. For example, assuming that the time constants of the LR circuits in the two phase shift circuits 10 L are the same, and let Τ be the phase at each of the two phase shift circuits 10 L at the frequency ω = 1 ΖΤ The shift amount is 90 °. Accordingly, the phase is shifted by 180 ° by the entire two phase shift circuits 10L, and the phase is inverted by the phase inverting circuit 80 provided at the subsequent stage. Thus, a signal having a phase shift amount of 0 ° is output from the phase inversion circuit 80. By returning the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 10L via the feedback resistor 70, a sine wave oscillation having a frequency ω is performed.

Further, as described in the second embodiment, each of the two phase shift circuits 10 L has the same input-output voltage relationship as the phase shift circuit 10 C whose configuration is shown in FIG. The transfer function can be represented by K21 shown in equation (32). Therefore, the entire transfer function of the stage where the two phase shift circuits 10 L and the phase inversion circuit 80 are connected can also be expressed by K 11 expressed by the equation (33). As described above, the calculation result of the transfer function K11 shown in the equation (33) is obtained by converting Τ and の₂ of the transfer function K1 shown in the equation (19) in the first embodiment into Τ. Equivalent to replaced.

That is, it can be said that the configuration in which the two phase shift circuits 10 L and the phase inversion circuit 80 are connected in this embodiment is equivalent to the configuration in which the two phase shift circuits 10 C and 30 C are connected in the first embodiment. .

Therefore, in the oscillator 7 according to the seventh embodiment, by setting the width of the phase inverting circuit 80 or the width of the two phase shift circuits 10L to an appropriate value and setting the loop gain to 1 or more, one cycle is performed. Then, the sinusoidal wave oscillation is maintained at a frequency such that the phase shift amount becomes 0- °.

Also, by varying the resistance value R of the variable resistor 16 in each phase shift circuit 10L, the amount of phase shift in each phase shift circuit 10L can be changed. With the entire circuit 80, the frequency at which the phase shift amount becomes 0 ° can be changed by the total, so that the variable frequency oscillator 7 can be easily realized.

Further, as described in the second embodiment, the inductor 17 is formed by a photo engraving method or the like. Force that can be formed on a semiconductor substrate by forming a spiral-shaped conductor The use of such an inductor 17 allows the oscillator 7 to work together with the other components (observer and resistor). It is easy to form the entire circuit on a semiconductor substrate to form an integrated circuit. In particular, when the oscillator 7 is formed as an integrated circuit, it is easy to increase the frequency ω (= R / L) by reducing the inductance of the inductor 17, which is suitable for increasing the oscillation frequency. .

(Eighth embodiment)

FIG. 20 is a circuit diagram showing the configuration of the oscillator according to the eighth embodiment. The oscillator 8 has two phase shift circuits 30L whose configuration is shown in FIG. 12 and the output of the subsequent phase shift circuit 30L. It comprises a phase inversion circuit 80 for further inverting the phase of the signal, and a feedback resistor 70 for feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 30L.

By the way, as described in the above-described second embodiment, each of the two phase shift circuits 30L changes the phase shift amount from 0 ° to 180 ° as the frequency ω of the input signal changes from 0 to ∞. Change. For example, assuming that the time constants of the LR circuits in the two phase shift circuits 30L are the same, and letting this be 、, at the frequency of ω = 1ΖΤ, the amount of phase shift in each of the two phase shift circuits 30L Becomes 90 °. Therefore, the phase is 180 due to the entire two phase shift circuits 30L. Since the phase is shifted and the phase is inverted by a phase inversion circuit 80 provided in the subsequent stage, a signal in which the phase makes a round and the phase shift amount becomes 0 ° as a whole is output from the phase inversion circuit 80. By feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 30L via the feedback resistor 70, a sine wave oscillation having a frequency ω is performed.

Further, as described in the second embodiment, each of the two phase shift circuits 30L has the same input-output voltage relationship as the phase shift circuit 30C shown in FIG. The function can be represented by K31 shown in equation (34). Therefore, the entire transfer function of the stage where the two phase shift circuits 30 L and the phase inversion circuit 80 are connected can also be represented by K12 expressed by the equation (35). As described above, (35) calculation result of the transfer function K12 shown in expression obtained by replacing the transfer function K1 shown in the first embodiment (19) T, and the T ₂ to T be equivalent to. That is, it can be said that the configuration in which the two phase shift circuits 30 L and the phase inversion circuit 80 are connected in this embodiment is equivalent to the configuration in which the two phase shift circuits 10 C and 30 C are connected in the first embodiment. .

Therefore, in the oscillator 8 of the eighth embodiment, by setting the amplification of the phase inversion circuit 80 or the amplification of the two phase shift circuits 30 L to an appropriate value and setting the loop gain to 1 or more, Sinusoidal wave oscillation is sustained at a frequency such that the phase shift becomes 0 ° after one round.

Also, by varying the resistance value R of the variable resistor 36 in each phase shift circuit 30L, the amount of phase shift in each phase shift circuit 30L can be changed, so that the phase inversion circuit 80 and two phase shift circuits The frequency at which the phase shift amount becomes 0 ° in total can be changed by the entire 30 L, and the variable frequency oscillator 8 can be easily realized.

In addition, as described in the second embodiment, the inctor 37 can be formed on a semiconductor substrate by forming a spiral-shaped conductor by photolithography or the like. By using such an inductor 37, it is easy to form the entire oscillator 8 together with the other components (the operational amplifier and the resistor) on a semiconductor substrate to form an integrated circuit. In particular, when the oscillator 8 is formed as an integrated circuit, it is easy to reduce the inductance of the inductor 37 to increase the frequency ω (= R / L), which is suitable for increasing the oscillation frequency. .

(Ninth embodiment)

FIG. 21 is a circuit diagram showing a configuration of an oscillator according to a ninth embodiment, in which an oscillator 9A includes phase shift circuits 10C and 10L having the configuration shown in FIG. 2 or FIG. It is composed of a phase inversion circuit 80 for further inverting the phase of the output signal of the subsequent phase shift circuit 10 L, and a feedback resistor 70 for feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 10 C. ing.

As described in the first embodiment or the second embodiment, each of the phase shift circuits 10 C and 10 L shifts the phase as the frequency ω of the input signal changes from 0 to ∞. The amount varies from 180 ° to 0 °. For example, assuming that the time constant of the CR circuit in the phase shift circuit 10 C is the same as the time constant of the LR circuit in the phase shift circuit 10 L, Assuming that this is T, the phase shift amount in each of the phase shift circuits 10C and 10L is 90 ° at the frequency of ω = 1 ノ. Therefore, the phase is shifted 180 ° by the entire two phase shift circuits 10C and 10L, and the phase is inverted by the phase inversion circuit 80 provided at the subsequent stage. A signal having a shift amount of 0 ° is output from the phase inversion circuit 80. By feeding back the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 10C via the return resistor 70, a sine wave oscillation having a frequency ω is performed.

Also, by varying the resistance value R of the variable resistor 16 in each of the phase shift circuits 10C and 10L, the amount of phase shift in each of the phase shift circuits 10C and 10L can be changed. The frequency at which the total phase shift amount becomes 0 ° can be changed by the entirety of the two phase shift circuits 10C and 10L, and the variable frequency oscillator 9A can be easily realized.

Further, in the oscillator 9A of this embodiment, the inductor 17 has a force that can be formed on the semiconductor substrate by forming a spiral conductor by photolithography or the like. The use of 17 makes it easy to form an integrated circuit by forming the entire oscillator 9A on a semiconductor substrate together with other components (such as an operational amplifier and a resistor).

The time constant T of the CR circuit of the preceding phase shift circuit 10C is CR, and the time constant T of the LR circuit of the succeeding phase shift circuit 10L is LZR. For example, if the entire oscillator 9 A is formed on a semiconductor substrate and two variable resistors 16 are formed by FETs, the fluctuation of the oscillation frequency due to the temperature change of the resistance value of each variable resistor is suppressed. So-called temperature compensation becomes possible.

In the above-described oscillator 9A of the ninth embodiment, the phase shift circuit 10C is arranged in the preceding stage and the phase shift circuit 10L is arranged in the subsequent stage. Since the angle only needs to be 180 °, the oscillator may be configured by exchanging the order before and after, by arranging the phase shift circuit 10L at the front stage and the phase shift circuit 10C at the rear stage. (Tenth embodiment)

FIG. 22 is a circuit diagram showing a configuration of an oscillator according to a tenth embodiment. An oscillator 9B includes phase shift circuits 30L and 30C having the configuration shown in FIG. 12 or FIG. It is composed of a phase inversion circuit 80 for further inverting the phase of the output signal of 30C, and a return resistor 70 for returning the output of the phase inversion circuit 80 to the input side of the preceding phase shift circuit 30L.

As described in the above-described second embodiment or the first embodiment, each of the phase shift circuits 30L and 30C has a phase shift amount of 0 as the frequency ω of the input signal changes from 0 to ∞. It changes from ° to 180 °. For example, assuming that the time constant of the LR circuit in the phase shift circuit 30L is the same as the time constant of the CR circuit in the phase shift circuit 30C. And the phase shift amount at each of 30C is 90 °. Therefore, the phase is shifted by 18 (Γ) by the entire two phase shift circuits 30L and 30C, and the phase is inverted by the phase inversion circuit 80 provided at the subsequent stage. A signal having a phase shift amount of 0 ° is output from the phase inverting circuit 80. The output of the phase inverting circuit 80 is fed back to the input side of the preceding phase shift circuit 30L via the feedback resistor 70, so that the frequency is increased. A sine wave oscillation having ω is performed.

Also, by varying the resistance value R of the variable resistor 36 in each of the phase shift circuits 30L and 30C, the amount of phase shift in each of the phase shift circuits 30L and 30C can be changed. The frequency at which the phase shift amount becomes 0 ° in total can be changed by 30C and the entirety of the phase inverting circuit 80, and the variable frequency oscillator 9B can be easily realized.

In addition, in the oscillator 9B of this embodiment, the inctor 37 can be formed on a semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using this, it is easy to form an integrated circuit by forming the entire oscillator 9B on a semiconductor substrate together with other components (such as an operational amplifier and a resistor).

The time constant T of the LR circuit of the preceding phase shift circuit 30L is LZR, and the time constant of the CR circuit of the subsequent phase shift circuit 30C is CR. For example, when the oscillator 9B is formed entirely on a semiconductor substrate and two variable resistors 36 are formed by FETs, the oscillation frequency for the temperature change of the resistance value of each variable resistor Thus, so-called temperature compensation can be suppressed.

In the above-described oscillator 9B of the tenth embodiment, the phase shift circuit 30L is arranged in the preceding stage and the phase shift circuit 30C is arranged in the subsequent stage. Since the shift amount only needs to be 180 °, the oscillator may be configured such that the phase shift circuit 30C is arranged in the front stage and the phase shift circuit 30L is arranged in the subsequent stage by exchanging these before and after. Good.

(Other modes for carrying out the invention)

By the way, the oscillator of each of the above-described embodiments is configured by two phase shift circuits or two phase shift circuits and a non-inverting circuit or a phase inverting circuit. A predetermined oscillation operation is performed by setting the total phase shift amount to 0 ° at a predetermined frequency. Therefore, focusing only on the amount of phase shift, there is a certain degree of freedom in the order in which a plurality of circuits are connected, and the connection order can be determined as necessary.

FIG. 23 is a diagram showing a connection state of a case where an oscillator is configured by combining two phase shift circuits and a non-inverting circuit. In these figures, the feedback impedance element 70a most commonly uses a feedback resistor 70 as shown in FIG. However, the return impedance element 70a may be formed by a capacitor or an inctor, or may be formed by combining a resistance and a capacitor or an inductor.

FIG. 23 (A) shows a configuration in which a non-inverting circuit 50 is arranged at the subsequent stage of the two phase shift circuits, and the oscillator 1A shown in FIG. 8 and the oscillator shown in FIG. It corresponds to oscillator 2A. As described above, in the case where the non-inverting circuit 50 is disposed at the subsequent stage, a large output current can be taken out by providing the non-inverting circuit 50 with an output buffer function.

FIG. 23 (B) shows a configuration in which a non-inverting circuit 50 is arranged between two phase shift circuits. As described above, when the non-inverting circuit 50 is disposed in the middle, mutual interference between the preceding phase shift circuit and the subsequent phase shift circuit can be completely prevented.

As shown in FIG. 23 (C), a configuration in which the non-inverting circuit 50 is arranged at the preceding stage of the two phase shifting circuits is shown. The effect of the return impedance element 70a on the circuit can be minimized.

Similarly, FIG. 24 is a diagram showing a connection state in a case where an oscillator is configured by combining two phase shift circuits and a phase inversion circuit. As described with reference to FIG. 23, the return impedance element 70a most commonly uses the feedback resistor 70. However, the return impedance element 70a may be formed by a capacitor or an inductor, or may be formed by combining a resistor and a capacitor or an inccutor.

FIG. 24 (A) shows a configuration in which a phase inverting circuit 80 is arranged after the two phase shifting circuits, and the oscillator 5 shown in FIG. 17 and the oscillator 5 shown in FIG. It corresponds to oscillator 6 and so on. As described above, when the phase inversion circuit 80 is disposed at the subsequent stage, a large output current can be obtained by providing the phase inversion circuit 80 with an output buffer function.

As shown in FIG. 24 (B), a configuration in which the phase inverting circuit 80 is arranged between the two phase shifting circuits is shown. Mutual interference between the phase circuits can be completely prevented.

As shown in FIG. 24 (C), a configuration in which the phase inverting circuit 80 is placed in front of the two phase shift circuits is shown. The influence of the feedback impedance element 70a on the phase shift circuit can be minimized. Further, the phase shift circuit shown in each of the above embodiments includes the variable resistor 16 or 36. Specifically, these variable resistors 16 and 36 can be realized using a mounting type or MOS type FET.

FIG. 25 is a diagram showing the composition of the phase shift circuit when the variable resistors 16 or 36 in the two types of phase shift circuits 10 C or 30 C having CR circuits are replaced with FETs. FIG. 25 (A) shows a configuration in which the variable resistor 16 is replaced with an FET in the phase shift circuit 10C. Fig. 25 (B) shows that variable resistor 36 is connected to FE in phase shift circuit 30C. The replaced configuration is shown.

Similarly, FIG. 26 is a diagram showing the configuration of a phase shift circuit in which the variable resistor 16 or 36 in the two types of phase shift circuits 10L or 30L having an LR circuit is replaced with an FET. FIG. 26 (A) shows a configuration in which the variable resistor 16 is replaced with an FET in the phase shift circuit 10L. FIG. 26 (B) shows a configuration in which the variable resistor 36 is replaced with a FET in the phase shift circuit 30L.

Thus, if the channel formed between the source and drain of the FET is used as a resistor and used instead of the variable resistor 16 or 36, the gate voltage is variably controlled and this channel resistance is controlled within a certain range. The amount of phase shift in each phase shift circuit can be changed arbitrarily. Therefore, since the frequency at which the phase shift amount of the signal that makes a round in each oscillator becomes 0 ° can be changed, the oscillation frequency can be arbitrarily changed.

In each of the phase shift circuits shown in FIG. 25 or FIG. 26, the variable resistor is constituted by one FET, that is, a p-channel or n-channel FET, but the p-channel FET and the n-channel FET are connected. One variable resistor may be configured by connecting in parallel. The magnitude of the gate voltage may be changed in a case where the resistance value is varied. In this way, by combining two FETs to form a variable resistor, the non-linear region of the FETs can be improved, and the distortion of the oscillation output can be reduced.

In addition, the phase shift circuit 10C or 30C shown in each of the above-described embodiments changes the phase shift amount by changing the resistance value of the variable resistor 16 or 36 connected in series with the capacitor 14 or 34. Although the entire oscillation frequency is changed by the above, the entire oscillation frequency may be changed by forming the capacitors 14 and 34 by variable capacitance elements and changing the capacitance.

FIG. 27 is a diagram showing a configuration of a phase shift circuit of a base in which the capacitor 14 or 34 in the phase shift circuit 10C or 30C shown in each embodiment is replaced with a variable capacitance diode. FIG. 27 (A) shows a configuration in which the variable resistor 16 is replaced with a fixed resistor and the capacitor 14 is replaced with a variable capacitance diode in one of the phase shift circuits 10C shown in FIG. 1 and the like. Figure 27 (B) shows the other In the phase shift circuit 30C, a configuration is shown in which the variable resistor 36 is replaced with a fixed resistor and the capacitor 34 is replaced with a variable capacitance diode.

In FIGS. 27 (A) and (B), the capacitor connected in series with the variable capacitance diode blocks its direct current when applying a reverse bias voltage between the anode and cathode of the variable capacitance diode. The impedance is extremely small at the operating frequency, that is, it has a large capacitance. Since the potential at both ends of the capacitor shown in Figs. 27 (A) and (B) is constant when viewed from the DC component, a reverse bias voltage larger than the amplitude of the AC component must be applied between the anode and cathode. Thus, each variable capacitance diode can function as a variable capacitance capacitor.

In this way, the capacitor 14 or 34 is composed of a variable capacitance diode, and the magnitude of the reverse bias voltage applied between the anode and the cathode is variably controlled so that the capacitance of the variable capacitance diode is within a certain range. The phase shift amount in each phase shift circuit can be changed arbitrarily. Therefore, it is possible to change the frequency at which the phase shift amount of the signal that makes a round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator.

By the way, in FIGS. 27 (A) and (B) described above, a variable capacitance diode was used as the variable capacitance element, but the source and the drain were connected to a fixed potential in a DC manner, and a variable voltage was applied to the gate. FETs may be used. As described above, since the potentials at both ends of the variable capacitance diodes shown in FIGS. 27 (A) and (B) are fixed in a DC manner, these variable capacitance diodes need only be replaced with the FETs described above. By changing the voltage applied to the gate, the gate capacitance, that is, the capacitance of the FET can be changed.

Although only the capacitance of the variable capacitance diode is varied in FIGS. 27 (A) and (B), the resistance of the variable resistor 16 or 36 may be varied at the same time. FIG. 27 (C) shows a configuration in which the variable resistor 16 is used and the capacitor 14 is replaced with a variable capacitance diode in one of the phase shift circuits 10C shown in FIG. 1 and the like. FIG. 2D shows a configuration in which a variable resistor 36 is used and the capacitor 34 is replaced with a variable capacitance diode in the other phase shift circuit 30 C shown in FIG. 1 and the like. Have been. In these, it is natural that the variable capacitance diode may be replaced with a variable gate capacitance FET.

It goes without saying that the variable resistors shown in FIGS. 27 (C) and (D) can be formed by utilizing the channel resistance of FET as shown in FIG. In particular, when a p-channel FET and an n-channel FET are connected in parallel to form a single variable resistor, the nonlinear region of the FET can be improved, so that distortion of the oscillation signal is reduced. can do.

As described above, even when the phase shift circuit is configured by combining the variable resistor and the variable capacitance element, each phase shift is performed by arbitrarily changing the resistance value of the variable resistance and the capacitance of the variable capacitance element within a certain range. The amount of phase shift in the circuit can be changed. Therefore, the frequency at which the phase shift amount of the signal that goes round in each oscillator becomes 0 ° can be changed, and the oscillation frequency can be arbitrarily changed.

Similarly, the phase shift circuit 10 L or 30 L shown in each of the above-described embodiments is configured such that the phase shift amount is obtained by changing the resistance value of the variable resistor 16 or 36 connected in series with the inductor 17. Inktors 17 and 37 may be formed by a variable inductor, and the overall oscillation frequency may be changed by changing the inductance.

FIG. 28 is a diagram showing a configuration of a phase shift circuit when the inductor 17 or 37 in the phase shift circuit 10 L or 30 L shown in each embodiment is replaced with a variable inductor.

Fig. 28 (A) shows a configuration in which the variable resistor 16 is replaced with a fixed resistor and the inductor 17 is replaced with a variable inductor 17a in one of the phase shift circuits 10L shown in Fig. 9 and the like. Have been. FIG. 28 (B) shows a configuration in which the variable resistor 36 is replaced with a fixed resistor and the inductor 37 is replaced with a variable inductor 37a in the other phase shift circuit 30L shown in FIG. 9 and the like. I have.

As described above, the inductor 17 or 37 is replaced with the variable inctor 17a or 37a, and the inductance of the inductor 17 or 37 can be changed arbitrarily within a certain range to change the amount of phase shift in each phase shift circuit. . Therefore, the phase shift amount of the signal that goes round in each oscillator is 0. The oscillation frequency can be changed The wave number can be changed arbitrarily.

By the way, in FIGS. 28 (A) and (B) described above, only the inductance of the variable inductor 17a or 37a is changed, but the resistance of the variable resistor 16 or 36 may be changed at the same time. . FIG. 28 (C) shows a configuration in which the variable resistor 16 is used and the inductor 17 is replaced by the variable inductor 17a in the phase shift circuit 10L shown in FIG. 9 and the like. FIG. 28 (D) shows a configuration in which, in the phase shift circuit 30L shown in FIG. 9 and the like, a variable resistor 36 is used and the ingktor 37 is replaced with a variable inductor 37a.

It goes without saying that the variable resistors shown in FIGS. 28 (C) and (D) can be formed by utilizing the channel resistance of FET as shown in FIG. In particular, when a p-channel FET and an n-channel FET are connected in parallel to form a single variable resistor, the nonlinear region of the FET can be improved, thus reducing oscillation signal distortion. can do.

As described above, even when the phase shift circuit is configured by combining the variable resistor and the variable inductor, the resistance value of the variable resistor and the inductance of the variable inductor are arbitrarily changed within a certain range, and the phase shift circuit in each phase shift circuit is changed. The amount of phase shift can be changed. Therefore, the phase shift amount of the signal that makes a round in each oscillator is 0. The oscillation frequency can be arbitrarily changed.

In addition, as described above, in addition to a platform using a variable resistor, a variable capacitor, or a variable inductor, a plurality of resistors, capacitors, or inductors having different element constants are provided, and by switching the switches, these plural One or more of the elements may be selected. In this case, the element constants can be switched discontinuously depending on the number of elements connected by switch switching and the connection method (series connection, parallel connection or a combination of these).

For example, instead of a variable resistor, prepare a plurality of resistors in a series of 2 n, such as R, 2 R, 4 R,…. By connecting in series, switching of resistance values at equal intervals can be easily realized with fewer elements. Similarly, instead of capacitors, prepare multiple capacitors of a series of 2 n, such as C, 2 C, 4 C,… By selecting a desired number and connecting them in parallel, it is possible to easily realize the switching of the capacitance at equal intervals with a smaller number of elements.

FIG. 29 is a diagram showing a specific example of the variable inductor 17a shown in FIG. 28, and schematically shows a planar structure formed on a semiconductor substrate. Note that the structure of the variable inductor 17a shown in the figure can be applied to the variable inductor 37a as it is.

The variable inductor 17a shown in FIG. 29 includes a spiral inductor conductor 112 formed on a semiconductor substrate 110, a control conductor 114 formed around the outer periphery of the spiral inductor conductor 112, and these inductor conductors 112 and An insulating magnetic body 118 is formed so as to cover both the control conductors 114.

The above-described control conductor 114 is connected to a variable voltage power supply 116 for applying a variable bias voltage to both ends of the control conductor 114, and variably controls the DC bias voltage applied by the variable voltage power supply 116. The bias current flowing through the control conductor 114 can be changed.

The semiconductor substrate 110 is, for example, an n-type silicon substrate (n-Si substrate) or another semiconductor material (for example, an amorphous material such as germanium or amorphous silicon). Further, the inductor conductor 112 is formed of a metal thin film such as aluminum or gold, or a semiconductor material such as polysilicon in a spiral shape.

In addition to the variable inductor 17a, other components for the oscillator shown in FIG. 9 and the like are formed on the semiconductor substrate 110 shown in FIG. 29.

FIG. 30 is a diagram showing in more detail the shapes of the inductor conductor 112 and the control conductor 114 of the variable inductor 17a shown in FIG. 29, and the inner conductor 112 located on the inner peripheral side is It is formed in a spiral shape with a predetermined number of turns (for example, about 4 turns), and two terminal electrodes 122 and 124 are connected to both ends. Similarly, the control conductor 114 located on the outer peripheral side is formed in a spiral shape having a predetermined number of turns (for example, about two turns), and two control electrodes 126 and 128 are connected to both ends. FIG. 31 is an enlarged cross-sectional view taken along line AA of FIG. 30. As shown in the cross section of the insulating magnetic body 118 including the inductor conductor 112 and the control conductor 114, FIG. Inductor conductor 112 and control conductor 1 via insulating magnetic film 118a on the surface 14 are formed, and the surface thereof is coated with an insulating magnetic film 118b. The two magnetic films 118a and 118b form the insulating magnetic material 118 shown in FIG.

For example, as the magnetic films 118a and 118b, various magnetic films such as gamma-fluorite-barium-fluorite can be used. Various materials and methods for forming these magnetic films are conceivable. For example, a method of forming a magnetic film by vacuum-depositing FeO or the like, a method using other molecular beam epitaxy (MBE method), and the like. ), A method of forming a magnetic film using a chemical vapor deposition method (CVD method), a sputtering method, or the like.

Note that the insulating film 130 is formed of a non-magnetic material, and covers the space between each of the inductor conductor 112 and the control conductor 114. By eliminating the magnetic films 118a and 118b between the orbital portions in this way, it is possible to minimize the leakage magnetic flux generated between the orbital portions. The variable inductor 17a having a large inductance can be realized by effectively utilizing the above.

As described above, the variable inductor 17a shown in FIG. 29 and the like is formed so that the insulating magnetic body 118 (magnetic film 118a, 118b) is formed so as to cover the ink conductor 112 and the control conductor 114. By variably controlling the DC bias current flowing through the control conductor 114, the saturation magnetization characteristics of the inductor conductor 112 having the above-described insulative magnetic body 118 as a magnetic path change, and the inductor conductor 112 has The inductance changes.

Therefore, the inductance itself of the inductor conductor 112 can be directly changed, and furthermore, the inductor conductor 112 can be formed on the semiconductor substrate 110 by using a thin film forming technique or a semiconductor K fabrication technique, thereby facilitating the manufacturing. Further, since other components of the oscillator can be formed on the semiconductor substrate 110, it is suitable for a base on which the entire oscillator of each embodiment is integrally formed by integration.

Note that the variable inductor 17a shown in FIG. 29 and the like, as shown in FIG. 32 or FIG. 33, alternately circulates the ink conductor 112 and the control conductor 114, or And the control conductor 114 may be overlapped. Regardless of the type, the DC bias current flowing through the control conductor 114 is changed. The saturation magnetization characteristics of the insulating magnetic body 118 can be changed, and the inductance of the inductor conductor 112 can be changed within a certain range.

Also, the variable inductor 17a shown in FIG. 29 and the like has been described by taking as an example the case where the inductor conductor 112 and the like are formed on the semiconductor substrate 110, but the variable inductor 17a is formed on various insulating or conductive substrates such as ceramics. It may be formed.

Further, although an insulating material is used as the magnetic films 118a and 118b, a conductive material such as metal powder (MP) may be used. However, if such a conductive magnetic film is used in place of the above-mentioned insulating magnetic film 118a or the like, each orbital portion of the inductor conductor 112 or the like is short-circuited and does not function as an inductor conductor. It is necessary to electrically insulate the inductor conductor from the conductive magnetic film. As the insulating method, there are a method of forming an insulating oxide film by oxidizing the inductor conductor 112 and the like, and a method of forming a silicon oxide film or a nitride film by a chemical vapor deposition method or the like.

In particular, conductive materials such as metal powder have an advantage of being able to secure a large inductance since they have higher magnetic permeability than insulating materials such as gamma-flight.

In the variable inductor 17a shown in FIG. 29 and the like, the entirety of both the ink conductor 112 and the control conductor 114 is covered with the insulating magnetic material 118. May be formed.

FIG. 34 is a diagram showing a variable inductor in which an insulating magnetic body 118 is partially formed. The insulating magnetic body 118 is formed so as to cover a part of the inductor conductor 112 and a part of the control conductor 114. A magnetic path is formed by the insulative magnetic body 118 formed partially. As described above, when the insulative magnetic material (or conductive magnetic material) 118 serving as a magnetic path is partially formed, the magnetic path is narrowed, so that the magnetic flux generated by the ingta conductor 112 and the control conductor 114 is reduced. Is likely to be saturated. Therefore, the magnetic flux saturates even on a stage where a small bias current flows through the control conductor 114, and the inductance of the inductor conductor 112 can be changed by variably controlling the small bias current. For this reason, the control system can be simplified. In addition, the variable inctor 17a shown in FIG. 29 and the like is formed by concentrically winding an inductor conductor 112 and a control conductor 114, and these conductors are formed at adjacent positions on the surface of the semiconductor substrate 110. Then, a magnetic path may be provided between them by a magnetic path formed of an insulating or conductive magnetic material.

FIG. 35 is a plan view schematically showing a variable inductor 17b when an inductor conductor and a control conductor are arranged side by side, and the variable inductor 17b is formed on the semiconductor substrate 110. Spiral conductor 112a, a spiral control conductor 114a formed adjacent to the inductor conductor 112a, and a spiral conductor 112a and a control conductor 114a. It is composed of an insulative magnetic material (or a conductive magnetic material) 119 formed so as to have a center.

As with the variable inductor 17a shown in FIG. 29 and the like, a variable voltage power supply 116 is connected to both ends of the control conductor 114a in order to apply a variable bias voltage. By controlling the applied bias voltage variably, a predetermined bias current flowing through the control conductor 114a can be changed. FIG. 36 is a diagram showing in more detail the shapes of the inductor conductor 112a and the control conductor 114a of the variable inductor 17b shown in FIG. 35. It is formed in a spiral shape having a number of turns (for example, about 4 turns), and two terminal electrodes 122 and 124 are connected to both ends thereof. Similarly, the control conductor 114a disposed in contact with the inductor conductor 112a is formed in a spiral shape having a predetermined number of turns (for example, about two turns), and two control electrodes 126 are provided at both ends. 128 are connected.

FIG. 37 is an enlarged cross-sectional view taken along the line BB of FIG. 36. As shown in FIG. 37, the cross section of the insulated magnetic body 119 including the inductor conductor 112a and the control conductor 114a is shown in FIG. An insulating magnetic film 119a and an insulating non-magnetic film 132 are formed on the surface of the substrate 110, and the inductor conductor 112a and the control conductor 114a are formed on the surface thereof. An insulating magnetic film 119b is further formed on the surface so as to penetrate through the respective central portions of the inductor conductor 112a and the control conductor la. The two magnetic films 119a and 119b form an annular magnetic body 119 that serves as a common magnetic path for the conductor 112a and the control conductor 114a. The insulating non-magnetic film 132 shown in FIG. 37 has substantially the same thickness as the magnetic film 119a, and further has an inductor conductor 112a and a control conductor 114a on their surfaces. Are formed at substantially the same height. Therefore, when a slight step may be generated between the inductor conductor 112a and the control conductor 114a, the inductor conductor 112a and the control conductor 114a are directly formed on the semiconductor substrate 110 without forming the nonmagnetic film 132. A portion of 114a may be formed.

An insulating film 130 is formed between the orbiting portions of the inductor conductor 112a and the control conductor 114a on the surface of the magnetic film 119a, similarly to the variable inductor 17a shown in FIG. 29 and the like. I have. By partially filling the insulating film 130 and eliminating the magnetic films 119a and 119b between the orbital portions, it is possible to minimize the leakage magnetic flux generated between the orbital portions. Therefore, most of the magnetic flux generated by the inductor conductor 112a crosses the control conductor 114a through the magnetic films 119a and 119b. Therefore, by reducing the leakage magnetic flux, a large inductance can be obtained by effectively utilizing the magnetic flux generated by the inductor conductor 112a.

As described above, the above-described variable inctor 17b has the annular insulating magnetic material 119 (magnetic film 119a, 119b) formed so as to pass through the center of each spiral of the inductor conductor 112a and the control conductor 114a. ing. Therefore, by variably controlling the DC bias current flowing through the control conductor 114a, the saturation magnetization characteristics of the above-described inductor 112a having the magnetic body 119 as a magnetic path change, and the inductor conductor 112a becomes The resulting inductance also changes.

When the oscillator 1 or the like of each of the above embodiments is formed on a semiconductor substrate, it is not possible to set a very large capacitance as the capacitor 14 or 34 in the phase shift circuits 10C and 30C. Therefore, if the small capacitance of the capacitor actually formed on the semiconductor substrate can be apparently increased by devising the circuit, if the time constant T is set to a large value to reduce the oscillation frequency, The capital is good.

FIG. 38 is a diagram showing a modified example in which the capacitors 14 or 34 used in the phase shift circuits 10C and 30C shown in FIG. It functions as a capacitance conversion circuit that makes the capacitance of the capacitor formed on it look larger. Note that the entire circuit shown in Fig. 38 Or corresponding to capacitors 14 or 34 contained in 30C.

The capacitance conversion circuit 14a shown in FIG. 38 is composed of a capacitor 210 having a predetermined capacitance C0, two operational amplifiers 212 and 214, and four resistors 216, 218, 220 and 222. It is configured.

In the operational amplifier 212 of the first stage, a resistor 218 (this resistance is R 18) is connected between the output terminal and the inverting input terminal, and the inverting input terminal is connected to the resistor 216 (this resistor 碴). To R 16).

The voltage between the voltage E 1 applied to the non-inverting input terminal of the operational amplifier 212 of the first stage and the voltage E 2 appearing at the output terminal is

E 2 = (1 +} · Ε 1 — (36) The first-stage operational amplifier 212 mainly functions as a buffer that performs impedance conversion, and has a gain of 1 A field of unity gain is R lSZ RWO, that is, R 16 is set to infinity (the resistor 216 may be removed) or R 18 may be set to 0 Ω (a direct connection is required).

The operational amplifier 214 in the second stage has a resistor 222 (this resistor とする is R22) connected between the output terminal and the inverting input terminal, and has an inverting input terminal and the output terminal of the operational amplifier 212 described above. A resistor 220 (this resistance value is R20) is connected between this and the non-inverting input terminal is grounded.

Assuming that the voltage appearing at the output terminal of the second-stage operational amplifier 214 is E3, the voltage between this voltage E3 and the voltage E2 appearing at the output terminal of the first-stage operational amplifier 212 is

_E3 =-If E 2-(37) Thus, the second-stage operational amplifier 214 functions as a skin amplifier, and the first-stage operational amplifier 212 is used to set the input side of the operational amplifier to high impedance.

As described above, the capacitor 210 having a predetermined capacitance is provided between the non-inverting input terminal of the first-stage operational amplifier 212 and the output terminal of the second-stage operational amplifier 214. Connected. In the capacitance conversion circuit 14a shown in FIG. 38, assuming that the transfer function of the entire circuit except for the capacitor 210 is K4, the capacitance conversion circuit 14a can be represented by a circuit diagram shown in FIG. FIG. 40 is a circuit diagram obtained by converting this by Miller's theorem.

Using the impedance Z0 shown in FIG. 39 to represent the impedance Z1 shown in FIG.

^{Ζ1 =} Τ¾Γ- ⁽³⁸⁾ . Here, in the case of the capacitance conversion circuit 14a shown in FIG. 38, the impedance Z0 = 1 (jwCO), and this is substituted into the equation (38) to obtain

1

zi = ^{j wC0}

1 -K4

■ (39) j ω ((1 -K4) C0)

C = (l -K4) C0… (). Equation (40) indicates that the capacitance CO of the capacitor 210 in the capacitance conversion circuit 14a has apparently increased by (1−K4) times.

Therefore, when the gain K4 is negative, (1-1 K4) is always larger than 1, so that the electrostatic capacitance CO can be changed to the larger one.

By the way, the gain of the amplifier in the capacitance conversion circuit a shown in FIG. 38, that is, the gain K4 of the amplifier composed of the whole of the operational amplifiers 212 and 214 is given by the following equation (36) and (37). ⁽¹⁺ fi ^ f "

Becomes By substituting equation (41) into equation (40),

Becomes Therefore, by setting the resistance values of the four resistors 216, 218, 220, 222 to predetermined values, the apparent capacitance C between the two terminals 224, 226 can be increased. Can be.

Also, when the gain of the amplifier by the first-stage operational amplifier 212 is 1, that is, when R 16 is set to infinity (the resistor 216 is removed) or R 18 is set to 0 Ω as described above, R When 18 R 16 = 0, the above equation (42) is simplified,

R22

C = (1 + ——) C 0 (43)

R20

Becomes

FIG. 41 is a diagram showing a configuration of the capacitance conversion circuit 14b in which the resistor 216 connected to the inverting input terminal of the first operational amplifier 212 shown in FIG. 38 is removed. In this table, the capacitance C appearing between the terminals 224 and 226 is expressed by the equation (43), so by simply changing the ratio between R22 and R20, C0 is changed to the larger t. be able to.

Thus, the above-described capacitance conversion circuit 14a or 14b changes the resistance ratio R22ZR20 of the resistance 220 and the resistance 222 or the resistance ratio R18 of the resistance 216 and the resistance 218 R16. Thus, the capacitance C 0 of the capacitor 210 actually formed on the semiconductor substrate can be converted to an apparently larger one. Therefore, when forming the whole of the oscillator 1 shown in FIG. 1 and the like on the semiconductor substrate, the capacitor 210 having a small capacitance CO is formed on the semiconductor substrate and the It can be converted to a large capacitance C by the circuit shown in Fig. 41 or Fig. 41, which is convenient for integration.

In addition, at least one of the resistors 216, 218, 220, and 222 (at least one of the resistors 220 and 222 is the capacitance conversion circuit 14b shown in FIG. 41) is formed by a variable resistor. Specifically, by forming a variable resistor by connecting a mounting type or MOS type FET or a p-channel FET and a π-channel FET in parallel, the capacitance can be easily changed. A capacitance conversion circuit can be formed. Therefore, by using this capacitance conversion circuit instead of the variable capacitance diode shown in FIG. 27, the amount of phase shift can be arbitrarily changed within a certain range. For this reason, the frequency at which the phase shift amount of the signal that makes a round in the oscillator becomes 0 ° can be changed, and the oscillation frequency of the oscillator of each embodiment can be arbitrarily changed. As described above, the first-stage operational amplifier 212 has a high input impedance. The operational amplifier 212 may be replaced by an emitter follower circuit or a source follower circuit.

FIG. 42 is a diagram showing a configuration of a capacitance conversion circuit 14c using an emitter follower circuit in the first stage. The capacitance conversion circuit 14c shown in FIG. 14 has a configuration in which the first-stage operational amplifier 212 and the two resistors 216 and 218 shown in FIG. 38 are replaced with an emitter follower circuit 228 composed of a bipolar transistor and a resistor. ing.

FIG. 43 is a diagram showing a configuration of a capacitance conversion circuit 14d using a source follower circuit in the first stage. The capacitance conversion circuit 14d shown in the figure has a configuration in which the first-stage operational amplifier 212 and the two resistors 216 and 218 shown in FIG. 38 are replaced with a source-hollow circuit 230 composed of a FET and a resistor. ing.

Further, each of the above-mentioned capacitance conversion circuits 14 c and 14 d changes the apparent capacitance between the terminals 224 and 226 by changing the resistance ratio of the resistors 220 and 222 connected to the operational amplifier 214. The point that C can be changed arbitrarily is the same as the capacitance conversion circuit 14a shown in FIG. 38 and the like. Therefore, by replacing at least one of the resistors 220 and 222 with a mounting type or MOS type FET, or a variable resistor in which a p-channel FET and an n-channel FET are connected in parallel, the capacitance can be changed. A circuit can be configured, and by using this capacitance conversion circuit instead of the variable capacitance diode shown in FIG. 27, the phase shift amount can be arbitrarily changed within a certain range. For this reason, the frequency at which the phase shift amount of the signal that goes around in each oscillator becomes 0 ° can be changed, and the oscillation frequency of the oscillator in each embodiment can be arbitrarily changed.

By the way, in FIGS. 38 to 43 described above, by combining an amplifier having a predetermined gain and a capacitor, the apparent capacitance is actually reduced by the capacitance of the capacitor element. Although the description has been given of the case where the field is made larger, it is also possible to use an inductor instead of the capacitor and increase the apparent inductance of the inductor.

That is, as described above, when the impedance Z1 shown in FIG. 40 is represented using the impedance Z0 shown in FIG. 39, the equation (38) is obtained. Here, the impedance Z 0 = jw LO is present in the field of the inductor having the inductance L0. Substituting this into equation (38) gives

j w LO

Z l =

K4

= ^ · Τ ^ ΰ- ⁽⁾

Becomes Equation (45) shows that the inductance of the inductor element has apparently increased by one factor (1-K4), and when the gain K4 is set between 0 and 1, It can be seen that the conductance becomes larger.

FIG. 44 is a diagram showing a modified example in which the inductors 17 or 37 used in the phase shift circuits 10 L and 30 L shown in FIG. It functions as an inductance conversion circuit that makes the inductance of the inductor element (inductor conductor) formed on the substrate appear large. The entire circuit shown in FIG. 44 corresponds to the inductor 17 or 37 included in the phase shift circuits 10 L and 30 L.

The inductance conversion circuit 17c shown in FIG. 44 includes an inductor 260 having a predetermined inductance L 0, two operational amplifiers 262 and 264, and two resistors 266 and 268.

The first-stage operational amplifier 262 is a non-inverting amplifier with a gain of 1 whose output terminal is connected to the inverting input terminal, and mainly functions as a buffer that performs impedance conversion. Similarly, the output terminal of the second-stage operational amplifier 264 is connected to the inverting input terminal, and functions as a non-inverting amplifier having a gain of 1. Further, a voltage dividing circuit including resistors 266 and 268 is inserted between these two non-inverting amplifiers. -In this way, by inserting the voltage divider between them, the gain of the whole amplifier including two non-inverting amplifiers can be set freely between 0 and 1.

In the inductance conversion circuit 17c shown in FIG. 44, assuming that the transfer function of the whole ϊδ (amplifier) except for the intagter 260 is Κ4, the gain Κ4 is a voltage dividing circuit composed of the resistors 266 and 268. The resistance value is determined by R 66, Assuming R68,

Becomes By substituting this gain Κ4 into Eq. (45) and calculating the apparent inductance L,

L0

L =

Becomes Therefore, _c can be by increasing the resistance ratio R68ZR 66 of resistors 266 and 268 increase the Indakutansu L apparent between the two terminals 254, 256 for example, in the field stand R68 = R66, (47 From equation (3), the inductance L can be made twice as large as L 0.

As described above, the inductance conversion circuit 17c described above changes the voltage division ratio of the voltage division circuit inserted between the two non-inverting amplifiers to reduce the inductance L0 of the inductor 260 actually connected. It can be increased in appearance. Therefore, when forming the whole of the oscillator 2 and the like shown in FIG. 9 on a semiconductor substrate, an inductor 260 having a small inductance L0 is formed on the semiconductor substrate by a spiral conductor or the like. In this case, the inductance can be converted to a large inductance L by the inductance conversion circuit shown in FIG. 44, which is convenient for integration. In particular, if a large inductance can be secured in this way, it becomes easy to lower the oscillation frequency of the oscillator 2 and the like shown in FIG. 9 to a relatively low frequency range. In addition, the integration makes it possible to reduce the mounting area of the entire oscillator and reduce material costs.

It should be noted that, in addition to a stage where the voltage dividing ratio of the voltage dividing circuit is fixed by the resistors 266 and 268, at least one of the two resistors 266 and 268 is formed by a variable resistor, and specifically, a mounting type or MOS This voltage division ratio may be continuously changed by connecting a parallel type FET or a p-channel FET and an n-channel FET to form a variable resistor. This stage includes amplifiers including the operational amplifiers 262 and 264 shown in Fig. 44. The overall gain changes, and the inductance L between terminals 254 and 256 also changes continuously. Therefore, by using the inductance conversion circuit 17c in place of the variable inductance 17a or 37a shown in FIG. 28, the phase shift amount in each phase shift circuit can be arbitrarily changed within a certain range. be able to. Therefore, the frequency at which the phase shift amount of the circulating signal becomes 0 ° in the oscillator can be changed, and the oscillation frequency of the oscillator can be arbitrarily changed.

In the inductance conversion circuit 17c shown in FIG. 44, since the gain of the whole amplifier including the two operational amplifiers 262 and 264 is set to 1 or less, the whole circuit is replaced with an emitter follower circuit or a source follower circuit. It may be.

FIG. 45 is a diagram showing a configuration of an inductance conversion circuit in which the entire amplifier including the operational amplifiers 262 and 264 is replaced by an emitter follower circuit. The inductance conversion circuit 17d shown in FIG. 3A is composed of a bipolar transistor 278 having two resistors 274 and 276 connected to an emitter, a voltage dividing point by the two resistors 274 and 276, and a base of the transistor 278. And a capacitor 280 for blocking DC current. The impedance of the capacitor 280 inserted at one end of the inductor 260 is set to be extremely small at the operating frequency, that is, large, so as not to affect the frequency characteristics.

The gain of the emitter follower circuit described above is mainly determined by the resistance ratio of the two resistors 274 and 276, and the gain is always one port. Therefore, as can be seen from Equation (45), the gain of the inductor It is possible to increase apparently the inductance L0 of. Since only one emitter hollow circuit is used, the circuit configuration can be simplified and the operating frequency of the bun can be set high.

FIG. 45 (B) is a diagram showing a modified example thereof, which is different in that the two resistors 274 and 276 in FIG. By using the variable resistor 282 in this way, the gain can be arbitrarily and continuously changed, and the apparent inductance L can also be arbitrarily and continuously changed. By using this inductance conversion circuit 17e instead of the variable inductor 17a shown in FIG. 28, the phase shift amount in each phase shift circuit can be arbitrarily changed within a certain range. . For this reason, the phase shift amount of the signal that makes a round in the oscillator is The frequency of 0 ° can be changed, and the oscillation frequency of the above-described oscillator can be arbitrarily changed.

The inductance conversion circuit 17e shown in FIG. 45 (B) replaces the two resistors 274 and 276 in FIG. 45 (A) with one variable resistor 282. At least one of the 276 may be constituted by a variable resistor.

FIG. 46 shows a circuit in which each of the inductance conversion circuits 17 d and 17 e shown in FIGS. 45 (A) and (B) is realized by a source follower circuit, and the bipolar transistor 278 is replaced by FET284. It is a thing. FIG. 46 (A) corresponds to FIG. 45 (A), and FIG. 46 (B) corresponds to FIG. 45 (B).

FIG. 47 is a diagram showing a modified example of the inductance conversion circuit 17c shown in FIG. The inductance conversion circuit 17f shown in FIG. 47 includes an npn-type bipolar transistor 286 and a resistor 290 connected to its emitter, a pnp-type bipolar transistor 288 and a resistor 292 connected to its emitter, Ingotta 260 having L 0.

A first emitter follower circuit is formed by the one transistor 286 and the resistor 290 described above, and a second emitter follower circuit is formed by the other transistor 288 and the resistor 292, and they are vertically connected. In addition, since the npn-type transistor 286 and the pnp-type transistor 288 are used, the base potential of the transistor 286 at one end of the inductor 260 and the emitter S position of the transistor 288 can be set to be almost the same. This eliminates the need for a DC blocking capacitor.

Note that various modifications are possible in each of the embodiments described above.

For example, the oscillator 1 and the like in each of the above-described embodiments include two phase shift circuits, but when the oscillation frequency is varied, the CR circuit or the LR circuit included in both phase shift circuits is used. In addition to a stage for changing at least one element constant of a resistor and a capacitor or an inductor constituting a resistor, at least one element constant of a resistor and a capacitor or an inductor constituting a CR circuit or an LR circuit included in one phase shift circuit A platform that can change is conceivable. Alternatively, an oscillator having a fixed oscillation frequency may be configured by replacing the variable resistors 16 and 36 in each phase shift circuit shown in FIG. 1 and the like with a resistor having a fixed resistance value. In each of the above-described embodiments, a highly stable circuit can be configured by configuring the phase shift circuits 10 C, 10 L, 30 C, and 30 L using an operational amplifier. In such a case, the offset voltage and the voltage gain are not required to be so high, so a differential input amplifier having a predetermined amplification should be used instead of the operation in each phase shift circuit. You may do so.

FIG. 48 is a circuit diagram in which components necessary for the operation of the phase shift circuit of each embodiment are extracted from the configuration of the operational amplifier, and the whole operates as a differential input amplifier having a predetermined amplification factor. The differential input amplifier shown in the figure has a differential input stage 100 composed of FETs, a constant current circuit 102 for supplying a constant current to the differential input stage 100, and a predetermined bias voltage for the constant current circuit 102. , And an output amplifier 106 connected to the differential input stage 100. As shown in the figure, the multistage amplifier circuit for gaining the voltage gain included in the actual operational amplifier is omitted, so that the configuration of the differential input amplifier can be simplified and the bandwidth can be widened. As described above, the upper limit of the operating frequency can be increased by simplifying the circuit, and accordingly, the upper limit of the oscillation frequency of the oscillator 1 or the like configured using the differential input amplifier is increased accordingly. be able to.

Further, the oscillator of each of the above-described embodiments may be configured such that one of the two phase shift circuits constituting the oscillator or the two phase shift circuits and the non-inverting circuit 50 Although the sine wave signal is extracted from one of the circuits, the sine wave signal may be extracted from two or three circuits constituting the oscillator. In particular, when the time constants of the two phase shift circuits constituting the oscillator are set to be the same, the phase shift amount in each phase shift circuit is 90. Therefore, the phases are 90 each other. A shifted two-phase output can be obtained. Further, from the circuits before and after the phase inversion circuit 80, two-phase outputs whose phases are inverted can be taken out. Industrial applicability

As is clear from the description based on the best mode for carrying out the present invention, according to the oscillator of the present invention, each of the constituent elements can be formed by a manufacturing method of a condensing circuit. The whole is compactly formed as an integrated circuit on a semiconductor wafer It can be made at low cost by mass production.

In particular, the channel between the source and drain of the FET is used as a variable resistor that constitutes the CR circuit or LR circuit of each phase shift circuit, and the control voltage applied to the gate of this FET is changed to change the resistance of the channel. With such a configuration, it is possible to avoid the influence of the inductance of the wiring to which the control voltage is applied divided by the capacitance, and to obtain an oscillator having ideal characteristics almost as designed.

Also, if the capacitor that forms the CR circuit in the phase shift circuit is formed by a capacitance conversion circuit, or the inductor that forms the LR circuit in the phase shift circuit is formed by an inductance conversion circuit, the capacitance and the inductance can be reduced. Can be easily increased, so that the oscillation frequency can be reduced and the mounting area of the entire oscillator can be reduced.

Furthermore, in an oscillator using LC resonance, the oscillation frequency ω is 1 Z TLC, so if the capacitance C or the inductance L is changed to adjust the oscillation frequency, the oscillation frequency will change However, according to the oscillator of the present invention, it is possible to change in proportion to the resistance value of the resistors included in the two phase shift circuits, and it is possible to greatly adjust the oscillation frequency. Become.

Claims

The scope of the claims

1. a differential input amplifier to which one end of a first resistor is connected to an inverting input terminal, and an alternating signal is input through the first resistor; and an inverting input terminal of the differential input amplifier and an output A second resistor connected between the second resistor and a terminal; and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor. Two phase shift circuits each having a connection part of the resistor connected to a non-inverting input terminal of the differential input amplifier,

The output of the subsequent stage of the two cascade-connected phase shift circuits is returned to the input side of the preceding stage, and the sine wave oscillation output is taken out from one of L and shift of the two phase shift circuits. Oscillator.

2. The oscillator according to claim 1, wherein a two-phase output is extracted from the two phase shift circuits.

3. The oscillator according to claim 1, wherein the connection of the third resistor and the capacitor constituting the series circuit is reversed in the two phase shift circuits.

2. The oscillator according to claim 1, wherein the differential input amplifier is an operational amplifier.

5. The method according to claim 1, wherein the third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing a resistance value of the variable resistor. The oscillator as described.

6. The oscillator according to claim 5, wherein the variable resistor is formed by an FET channel, and the oscillation frequency is changed by changing the gate voltage to change the channel resistance.

7. The variable resistor is formed by connecting a p-channel FET and an n-channel FET in parallel, and changing the oscillation voltage by changing the gate voltage of each FET and changing the channel resistance. The invention described in claim 5

8. The capacitor included in at least one of the two phase shift circuits is formed by a variable capacitance element, and the oscillation frequency is changed by changing the capacitance. 2. The oscillator according to claim 1, wherein:

9. The capacitor included in at least one of the two phase shift circuits is converted into a capacitance conversion comprising an amplifier having a negative gain, and a capacitor element connected in parallel between the input and output of the amplifier. The oscillator according to claim 1, wherein the oscillator is formed by a circuit.

10. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and an inverting input terminal of the differential input amplifier. A second resistor connected between the first resistor and the output terminal; and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor. Two phase shifting circuits connecting the capacitor connection to the non-inverting input terminal of the differential input amplifier;

And vertically connecting each of the two phase shift circuits and the non-inverting circuit, returning the output of the last stage among the plurality of vertically connected circuits to the input side of the first stage, An oscillator characterized by extracting a sine wave oscillation output from any of the plurality of circuits.

11. The oscillator according to claim 10, wherein a two-phase output is extracted from the two phase shift circuits and the non-inverting circuit.

12. The method according to claim 10, wherein the connection of the third resistor and the capacitor constituting the series circuit is reversed in the two phase shift circuits. Departure feafeo

13. The oscillator according to claim 10, wherein the differential input amplifier is an operational amplifier.

1. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. 2. The oscillator according to claim 1.

15. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and a non-input terminal and an output of the differential input amplifier. A second resistor connected between the first resistor and the other end of the first resistor; A series circuit comprising a third resistor and an inductor, and two phase shift circuits each having a connection between the third resistor and the inductor connected to a non-inverting input terminal of the differential input amplifier.

An oscillator characterized in that an output at a subsequent stage of the two cascade-connected phase shift circuits is fed back to a human side at a previous stage, and a sine wave oscillation output is taken out from one of the two phase shift circuits.

16. The oscillator according to claim 15, wherein a two-phase output is extracted from the two phase shift circuits.

17. The ircsio according to claim 15, wherein the way of connecting the third resistor and the intagter constituting the series circuit is reversed in the two phase shift circuits.

18. The oscillator according to claim 15, wherein the differential input amplifier is an operational amplifier.

1 9. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. The oscillator according to 5.

20. The oscillator according to claim 19, wherein the variable resistor is formed by an FET channel, and changing the oscillation frequency by changing the gate voltage to change the channel resistance.

2 1. The variable resistor is formed by connecting a p-channel FET and an n-channel FET in parallel, and the oscillation frequency is changed by changing the gate voltage of each FET and changing the channel resistance. The oscillator according to claim 19, characterized in that:

22. The oscillator according to claim 15, wherein the oscillation frequency is changed by changing the inductance of the inductor included in at least one of the two phase shift circuits.

2 3. The inductor is formed on a semiconductor substrate, has two spiral electrodes magnetically coupled to each other via a magnetic material, and has a magnitude of a DC bias current flowing through one of the electrodes. Change the inductance of the other electrode The oscillator according to claim 22, wherein said oscillator is varied.

2 4. The inductor included in at least one of the two phase shift circuits is constituted by an amplifier having a gain set between 0 and 1, and an inductor element connected in parallel between the input and output of the amplifier. 16. The oscillator according to claim 15, wherein the oscillator is formed by a conductance conversion circuit.

2 5. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor; an inverting input terminal and an output terminal of the differential input amplifier And a series circuit including a third resistor and an inductor connected to the other end of the first resistor, and a second resistor connected between the third resistor and the inductor. Two phase shifting circuits having a connection connected to the non-inverting input terminal of the differential input amplifier;

Cascading each of the two phase-shift circuits and the non-inverting circuit, returning the output of the last stage of the plurality of cascaded circuits to the input side of the first stage, An oscillator that extracts a sine wave oscillation output from one of a plurality of circuits.

26. The oscillator according to claim 25, wherein a two-phase output is extracted from the two phase shift circuits and the non-inverting circuit.

27. The oscillation SBO according to claim 25, wherein the connection of the third resistor and the inductor forming the series circuit is reversed in the two phase shift circuits.

28. The oscillator according to claim 25, wherein said differential input amplifier is an operational amplifier.

2 9. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. The oscillator according to 5.

30. A differential input amplifier to which one end of a first resistor is connected to an inverting input terminal, and to which an AC signal is input via the first resistor; an inverting input terminal and an output terminal of the differential input amplifier And a second resistor connected to the other end of the first resistor. A first phase shift circuit including a series circuit including a third resistor and a capacitor, wherein a connection portion of the third resistor and the capacitor is connected to a non-inverting input terminal of the differential input amplifier;

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit comprising a third resistor and an inductor connected to the other end of the first resistor, wherein a connection portion of the third resistor and the inductor is connected to the second resistor. A second phase shift circuit connected to the non-inverting input terminal of the differential input amplifier;

The first and second phase shift circuits connected in cascade are fed back to the input side of the previous stage, and the output of the first and second phase shift circuits is shifted from either t or the deviation of the first and second phase shift circuits. An oscillator for extracting a sine wave oscillation output.

31. The oscillator according to claim 30, wherein a two-phase output is extracted from the two phase shift circuits.

3 2. The method of connecting the reactance element comprising the inductor and the third resistor in the capacitor t constituting the series circuit is reversed in the two phase shift circuits. The oscillator according to range 30.

33. The oscillator according to claim 30, wherein the differential input amplifier is an operational amplifier.

3 4. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. The oscillator according to 0.

3 5. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor; an inverting input terminal and an output terminal of the differential input amplifier And a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, wherein the third resistor and the capacitor A first phase shift circuit connected to a non-inverting input terminal of the differential input amplifier,

One end of a first resistor is connected to the inverting input terminal, and AC is supplied through the first resistor. A differential input amplifier to which a signal is input, a second resistor connected between an inverting input terminal and an output terminal of the differential input amplifier, and a second resistor connected to the other end of the first resistor. A second phase shift circuit including a series circuit including a third resistor and an inductor, wherein the third resistor and a connection portion of the inductor are connected to a non-inverting input terminal of the differential input amplifier;

The first and second phase shift circuits and the non-inverting circuit are connected in cascade, and the output of the last stage among the plurality of cascade-connected circuits is returned to the input side of the first stage. An oscillator for extracting a sine wave oscillation output from any of the plurality of circuits.

36. The oscillator according to claim 35, wherein a two-phase output is extracted from the two phase shift circuits and the non-inverting circuit.

3. The method of connecting the reactance element comprising the capacitor or the inductor constituting the series circuit and the third resistor in the two phase shift circuits in the opposite manner. The oscillator according to 5.

3 8. The oscillator according to claim 35, wherein the differential input amplifier is an operational amplifier.

3 9. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. The oscillator according to 5.

40. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and an inverting input terminal and an output of the differential input amplifier A second resistor connected between the second resistor and a terminal; and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor. Two phase shifting circuits connecting the capacitor connection to the non-inverting input terminal of the differential input amplifier;

Each of the two phase shift circuits and the phase inversion circuit are vertically connected, and the output of the last stage among the plurality of vertically connected circuits is fed back to the input side of the first stage. An oscillator for extracting a sine wave oscillation output from any of the plurality of circuits.

41. The oscillator according to claim 40, wherein a two-phase output is taken out from said two phase shift circuits and said phase inversion circuit.

42. The method according to claim 40, wherein the third resistor and the capacitor constituting the series circuit are connected in the same manner in the two phase shift circuits.

43. The oscillator according to claim 40, wherein said differential input amplifier is an operational amplifier.

4. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. The oscillator according to 0.

45. The oscillator according to claim 44, wherein the variable resistor is formed by an FET channel, and the oscillation frequency is changed by changing the gate voltage to change the channel resistance.

6. The variable resistor is formed by connecting a p-channel FET and an n-channel FET in parallel, and the oscillation frequency can be changed by changing the gate voltage of each FET and changing the channel resistance. 54. The oscillator according to claim 44, wherein:

4 7. The oscillation frequency is changed by forming the capacitor included in at least one of the two phase shift circuits by a variable capacitance element and changing the static capacitance. The oscillator according to 0.

4 8. The capacitor included in at least one of the two phase shift circuits is converted into a capacitance by an amplifier having a negative 碴 gain, and a capacitor connected in parallel between the input and output of the amplifier. 41. The oscillator according to claim 40, wherein the oscillator is formed by a circuit.

4 9. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, an inverting input terminal and an output terminal of the differential input amplifier And a second resistor connected between the first resistor and the other end of the first resistor. And a series circuit comprising a third resistor and an inductor, wherein two phase shift circuits are provided, wherein a connection between the third resistor and the inductor is connected to a non-inverting input terminal of the differential input amplifier.

The two phase shifting circuits and the phase inverting circuits are connected in cascade, and the output of the last stage among the plurality of cascaded circuits is fed back to the input side of the first stage. An oscillator characterized in that a sine wave oscillation output is obtained from any one of the above circuits.

50. The oscillator according to claim 49, wherein a two-phase output is taken out from said two phase shift circuits and said phase inversion circuit.

51. The oscillator according to claim 49, wherein the connection manner of the third resistor and the inductor constituting the series circuit is the same in the two phase shift circuits.

5 2. The oscillator according to claim 49, wherein said differential input amplifier is an operational amplifier.

5 3. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. 9. The oscillator according to 9.

54. The oscillator according to claim 53, wherein the variable resistor is formed by an FET channel, and the oscillation frequency is changed by changing the gate resistance by changing the gate voltage.

5 5. The variable resistor is formed by connecting a p-channel FET and an n-channel FET in parallel, and the oscillation frequency is changed by changing the gate voltage of each FET and changing the channel resistance. The oscillator according to claim 53, characterized in that:

56. The oscillator according to claim 49, wherein the oscillation frequency is changed by changing the inductance of the inductor included in at least one of the two phase shift circuits.

5 7. The above-mentioned inkuta is formed on a semiconductor substrate. A coil having two spirally-shaped electrodes magnetically coupled to each other, and by changing the magnitude of a DC bias current flowing through one of the electrodes, the inductance of the other electrode is changed. The oscillator according to range 56.

5 8. The inductor included in at least one of the two phase shift circuits is composed of an amplifier having a gain set between 0 and 1, and an inductor element connected in parallel between the input and output of the amplifier. 48. The oscillator according to claim 49, wherein the oscillator is formed by a conductance conversion circuit.

5 9. One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, an inverting input terminal and an output terminal of the differential input amplifier And a series circuit comprising a third resistor and a capacitor connected to the other end of the first resistor, and a second resistor connected to the other end of the first resistor. A first phase shift circuit having a contact connected to a non-inverting input terminal of the differential input amplifier;

One end of a first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and between the inverting input terminal and the output terminal of the differential input amplifier And a series circuit including a third resistor and an inductor connected to the other end of the first resistor, the third resistor and a connection portion of the inductor A second phase shift circuit connecting the differential input terminal and the non-inverting input terminal of the radiator;

Each of the first and second phase shift circuits and the phase inversion circuit are cascaded, and the output of the last stage among the plurality of cascade-connected circuits is fed back to the input side of the first stage. An oscillator which extracts a sine wave oscillation output from any of the plurality of circuits.

60. The oscillator according to claim 59, wherein a two-phase output is extracted from the two phase shift circuits and the phase inversion circuit.

6 1. The method of connecting the reactance element formed of the capacitor or the intagta which forms the series circuit and the third resistor is the same in the two phase shift circuits. The oscillator according to claim 59.

6 2. The oscillator according to claim 59, wherein said differential input amplifier is an operational amplifier.

6 3. The third resistor included in at least one of the two phase shift circuits is a variable resistor, and the oscillation frequency is changed by changing the resistance value of the variable resistor. 9. The oscillator according to 9.

6 4. The oscillator according to any one of claims 1 to 63, wherein the oscillator is formed as a semiconductor integrated circuit.