JPH08195625A - Oscillator - Google Patents

Abstract

PURPOSE: To provide an oscillator which can greatly be adjusted in oscillation frequency and stably operates. CONSTITUTION: This oscillator is constituted of two phase shifting circuits 10C and 30L consisting of operational amplifiers 12 and 32 which input signals at their inverted input terminals through resistances 18 and 38, a series circuit of a capacitor 14 and a variable resistance 16 across which the voltage of the input voltage is applied and a series circuit of an inductor 37 and a variable resistance 36, and resistances 20 and 40 which feed the outputs of the operational amplifies 12 and 32 back to the inverted input terminals, and a feedback resistance 70 which feeds the output signal of the rear stage phase shifting circuit 30L back to the input side of the front-stage phase shifting circuit 10C. The time constant of the series circuit of the capacitor 14 and resistances 16 or the series circuit of the inductor 37 and resistance 36 in the phase shifting circuits 10C or 37L is varied to adjust the oscillation frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator whose oscillation frequency can be adjusted significantly.

[0002]

2. Description of the Related Art Various oscillating circuits using an active element and a reactance element have been proposed and put into practical use as a sine wave oscillator.

[0003]

As a sine wave oscillator,
The Wien bridge type oscillator shown in FIG. 43 and the bridge T type oscillator shown in FIG. 44 are conventionally known.

As is apparent from FIG. 43, in the Wien bridge type oscillator, the resistance value of the variable resistor Rs in the series circuit composed of the capacitor C and the variable resistor Rs for changing the frequency, the capacitor C and the variable resistor Rp. It is necessary to change the resistance value of the variable resistance Rp of the parallel circuit consisting of the following, but if an error occurs in the resistance value of the variable resistance Rs of the series circuit and the resistance value of the variable resistance Rp of the parallel circuit, the amplifier Since the voltage input to A increases or decreases, the oscillation output fluctuates as a result. When the oscillation output becomes small, the oscillation stops, and when it becomes large, the oscillation output is significantly distorted.

Generally, it is difficult to stabilize the output of the sine wave oscillator so as to reduce the fluctuation, and the stabilizing means adds nonlinearity to the amplitude characteristic of the amplifier, that is, the amplification degree depends on the magnitude of the output. A characteristic that changes is added.

Since the addition of such characteristics deteriorates the linearity of the amplifier, it deteriorates the distortion factor of the output waveform, and the stability of the output voltage and the distortion coefficient are in the opposite ratio. Have a relationship.

Changing the ratio of the resistance Rs of the series circuit to the variable resistance Rp of the parallel circuit at a constant value is particularly effective when the circuit is integrated and the variable resistance is changed by a voltage control method from the outside. Have difficulty.

The same can be said not only for the Wien bridge type oscillator, but also for the bridge T type oscillator and the phase shift type oscillator shown in FIG.

Further, it is also difficult to form a variable frequency oscillator whose oscillation frequency can be adjusted significantly by an integrated circuit.

Therefore, the present invention was devised to solve such a problem.

[0011]

In order to solve the above-mentioned problems, an oscillator according to the present invention has an inverting input terminal to which one end of a first resistor is connected, and an AC signal is supplied via the first resistor. And a second differential input amplifier connected between the inverting input terminal and the output terminal of the differential input amplifier.
And a series circuit composed of a third resistor and a capacitor connected to the other end of the first resistor, the connecting portion of the third resistor and the capacitor being a non-inversion of the differential input amplifier. A first phase shift circuit connected to an input terminal; a differential input amplifier having an inverting input terminal to which one end of a first resistor is connected and an AC signal being input via the first resistor; A second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier; and a series circuit including a third resistor and an inductor connected to the other end of the first resistor, A second phase shift circuit in which a connection portion of the third resistor and the inductor is connected to a non-inverting input terminal of the differential input amplifier, and the first and second phase shift circuits are connected in cascade. , These cascaded 2
The output of the latter stage of the two phase shift circuits is fed back to the input side of the former stage, and the sine wave oscillation output is taken out from either of the first and second phase shift circuits.

Further, the oscillator of the present invention includes a differential input amplifier to which one end of a first resistor is connected to an inverting input terminal, and an AC signal is input through the first resistor; A second resistor connected between the inverting input terminal and the output terminal of the input amplifier; and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, A first phase shifter circuit in which a connecting portion of the resistor 3 and the capacitor is connected to a non-inverting input terminal of the differential input amplifier, and one end of the first resistor is connected to the inverting input terminal, Differential input amplifier to which an AC signal is input via the resistor, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and the other end of the first resistor. A series consisting of a third resistor and an inductor connected to And a second phase shifter circuit including a path connected to the non-inverting input terminal of the differential input amplifier, and a connection part of the third resistor and the inductor, and an output without changing the phase of the input AC signal. And a non-inverting circuit that
Each of the first and second phase shift circuits and the non-inverting circuit is connected in cascade, and the output of the final stage of the plurality of circuits connected in cascade is fed back to the input side of the first stage, It is characterized in that a sine wave oscillation output is taken out from any one of the circuits.

In the oscillator of the present invention, one end of the first resistor is connected to the inverting input terminal, and a differential input amplifier to which an AC signal is input via the first resistor, and the differential input amplifier A second resistor connected between the inverting input terminal and the output terminal of the input amplifier; and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, A first phase shifter circuit in which a connecting portion of the resistor 3 and the capacitor is connected to a non-inverting input terminal of the differential input amplifier, and one end of the first resistor is connected to the inverting input terminal, Differential input amplifier to which an AC signal is input via the resistor, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and the other end of the first resistor. A series consisting of a third resistor and an inductor connected to A second phase-shifting circuit including a path connected to the non-inverting input terminal of the differential input amplifier, and a connection portion of the third resistor and the inductor, and a phase of an input AC signal is inverted and output. A phase inversion circuit for connecting the first and second phase shift circuits and the phase inversion circuit in cascade, and outputting the output of the final stage of the plurality of circuits connected in cascade to the input of the first stage. It is characterized in that the sine wave oscillation output is taken out from any of the plurality of circuits while being fed back to the side.

The oscillator of the present invention further includes an operational amplifier, a time constant circuit consisting of one of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a signal generated in the time constant circuit. A circuit for inputting to the non-inverting input terminal of the operational amplifier, and an input resistor connected to the inverting input terminal of the operational amplifier, to which an input signal is applied, and connected between the output terminal and the inverting input terminal of the operational amplifier. A phase shift circuit of the first stage having a feedback resistance, an operational amplifier, a time constant circuit consisting of the other of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a time constant circuit generated in the time constant circuit. A circuit for inputting a signal to the non-inverting input terminal of the operational amplifier;
The input AC signal is connected to the inverting input terminal of the operational amplifier and has an input resistance to which an input signal is applied and a feedback resistance connected between the output terminal and the inverting input terminal of the operational amplifier. A second-stage phase shift circuit that shifts the phase in the opposite direction to the first-stage phase shift circuit, and a feedback that returns the output of the second-stage phase shift circuit to the input of the first-stage phase shift circuit. And a side impedance element.

The oscillator of the present invention further includes an operational amplifier, a time constant circuit composed of one of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a signal generated in the time constant circuit. A circuit for inputting to the non-inverting input terminal of the operational amplifier, and an input resistor connected to the inverting input terminal of the operational amplifier, to which an input signal is applied, and connected between the output terminal and the inverting input terminal of the operational amplifier. A phase shift circuit of the first stage having a feedback resistance, an operational amplifier, a time constant circuit consisting of the other of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a time constant circuit generated in the time constant circuit. A circuit for inputting a signal to the non-inverting input terminal of the operational amplifier;
The input AC signal is connected to the inverting input terminal of the operational amplifier and has an input resistance to which an input signal is applied and a feedback resistance connected between the output terminal and the inverting input terminal of the operational amplifier. A second-stage phase shift circuit that shifts the phase in the same direction as the second-stage phase shift circuit, and a phase inversion circuit that inverts the phase of the output of the first-stage phase shift circuit of the second-stage phase shift circuits. And a feedback impedance element forming a closed circuit including the first and second phase shift circuits and the phase inverting circuit.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An oscillator according to an embodiment of the present invention will be specifically described below with reference to the drawings.

The oscillator of the following embodiments is characterized in that the AC signal is shifted so that the phase shift circuit in the preceding stage for shifting the phase of the AC signal and the phase relationship between the phase shift circuit in the preceding stage and the input / output voltage are opposite to each other. A closed circuit is formed by the subsequent phase shift circuit, the gain of the closed circuit is set to be larger than 1, and the oscillation operation is performed at a frequency at which the total phase difference of the closed circuit becomes 0 °.

Alternatively, the oscillator of the following embodiments is characterized in that a phase shift circuit in the preceding stage for shifting the phase of an AC signal is used,
Closed circuit by a phase shift circuit in the latter stage that shifts the AC signal so that the phase relationship between the phase shift circuit in the preceding stage and the input / output voltage is the same, and a phase inversion circuit that inverts the phase of the output of the phase shift circuit in the latter stage Is set, the gain of the closed circuit is set to be larger than 1, and the oscillation operation is performed at a frequency at which the total sum of the phase differences of the closed circuit becomes 0 °.

(First Embodiment) FIG. 1 is a circuit diagram showing a structure of an oscillator according to a first embodiment of the present invention. Each of the oscillators 1 shown in the figure shifts the phase of the input signal by a predetermined amount, so that a total of 0 is obtained at a predetermined frequency.
Two phase shift circuits 10C and 30L for phase shift of °
And a feedback resistor 70 for feeding back the output of the phase shift circuit 30L in the subsequent stage to the input side of the phase shift circuit 10C in the previous stage. The feedback resistor 70 has a finite resistance value from 0Ω.

FIG. 2 shows a phase shift circuit 10C in the preceding stage shown in FIG.
The configuration of is extracted and shown. The phase shift circuit 10C in the preceding stage shown in the figure is an operational amplifier (operational amplifier) 12 which is a kind of differential input amplifier, and a non-inverting input of the operational amplifier 12 by shifting a phase of a signal input to the input end 22 by a predetermined amount. Capacitor 14 and variable resistor 16 input to the terminal and the input end
The resistor 18 is inserted between 22 and the inverting input terminal of the operational amplifier 12, and the resistor 20 is inserted between the output terminal 24 of the operational amplifier 12 and the inverting input terminal.

In this specification, the operational amplifier 12 and the like are assumed to operate ideally, and a description will be added each time a deviation from the ideal becomes a problem when actually designing a circuit.

In the phase shift circuit 10C having such a configuration, when a predetermined AC signal is input to the input end 22, the voltage VR1 appearing across the variable resistor 16 is applied to the non-inverting input terminal of the operational amplifier 12. To be done.

Since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 12 shown in FIG. 2, the potential of the inverting input terminal of the operational amplifier 12, the capacitor 14 and the variable resistor 16 are different. Is equal to the potential at the connection point.
Therefore, the same voltage VC1 that appears across the capacitor 14 appears across the resistor 18.

Here, when the resistance values of the resistor 18 and the resistor 20 are equal, the same current flows through these two resistors 18 and 20, so that the voltage VC1 also appears at both ends of the resistor 20. Moreover,
The voltage VC1 appearing across each of these two resistors 18 and 20 has the same vector direction, and considering the inverting input terminal (voltage VR1) of the operational amplifier 12 as a reference, the voltage VC1 across the resistor 18 is Input voltage Ei is the vector addition
Then, the voltage VC1 of the resistor 20 is vector-subtracted to obtain the output voltage Eo.

FIG. 3 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit 10C and the voltage appearing at the capacitor or the like.

As shown in the figure, the voltage VR1 appearing across the variable resistor 16 and the voltage VC1 appearing across the capacitor 14 are 90 ° out of phase with each other, and the vector addition of these is the input voltage. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
Along the circumference of the semi-circle shown in FIG.
R1 and the voltage VC1 across the capacitor 14 change.

The output voltage Eo is obtained by subtracting the voltage VC1 from the voltage VR1 in vector. Considering the voltage VR1 applied to the non-inverting input terminal as a reference, the input voltage Ei
The output voltage Eo differs from the output voltage Eo only in the direction in which the voltage VC1 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the input voltage Ei and the output voltage Eo as hypotenuses and the base being twice the voltage VC1, and the amplitude of the output signal is related to the frequency. It can be seen that the amplitude is the same as that of the input signal and the phase shift amount is represented by φ1 shown in FIG.

As is clear from FIG. 3, the voltage VR1
And the voltage VC1 intersect at a right angle on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VR1 changes from 90 ° to 0 ° as the frequency ω changes from 0 to ∞. The phase shift amount φ1 of the entire phase shift circuit 10C is twice that and changes from 180 ° to 0 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

When an input voltage Ei is applied to the input end 22, the current flowing through the resistors 18 and 20 from the input end 22 to the output end 24 is I, and the resistance values of the resistors 18 and 20 are equal to each other. Is r, the voltage across the resistors 18 and 20 is −
I · r.

By the way, as described above, since no potential difference should occur between the two inputs of the operational amplifier 12 shown in FIG. 2, the voltage VR1 across the variable resistor 16 applied to the non-inverting input terminal of the operational amplifier 12 and the output. The relationship between the voltage Eo and VR1 = Eo-(-I * r) = Eo + I * r Eo = VR1-I * r (1).

In order to prevent a potential difference between the two inputs of the operational amplifier 12, the voltage VC1 across the capacitor 14 and the resistance
Since the value obtained by adding the both-end voltage −I · r of 18 must be 0, VC1 + (− I · r) = 0 ∴VC1 = I · r (2) From the expressions (1) and (2), Eo = VR1−VC1 (3)

Further, the sum of the voltages VR1 and VC1 across the variable resistor 16 and the capacitor 14 is the voltage Ei applied to the input end 22, so that between these voltages, Ei = VR1 + VC1. There is a relationship of 4). From equation (3) and equation (4),

(Equation 5) Becomes Here, C is the capacitance of the capacitor 14, R is the resistance value of the variable resistor 16, and the time constant of the CR circuit is T (= C
R).

Substituting s = jω in the equation (5) and transforming it,

(Equation 6) Becomes When the absolute value of the output voltage Eo is calculated from the equation (6),

(Equation 7) Becomes That is, the equation (7) is the phase shift circuit 10 of this embodiment.
C represents that the amplitude of the output signal is equal to the amplitude of the input signal and is constant no matter how the phase between the input and the output is rotated.

From the equation (6), the input voltage E of the output voltage Eo is
When the phase shift amount φ1 for i is calculated,

(Equation 8) Becomes From this equation (8), for example, ω is approximately 1 / T (= 1
The phase shift amount φ1 at a frequency such that / (CR)) is approximately 90 °, and only the phase can be shifted by approximately 90 ° without attenuating the amplitude of the input signal. Moreover, by changing the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount φ1 becomes approximately 90 ° can be changed.

FIG. 4 shows the phase shift circuit 30L at the rear stage shown in FIG.
The configuration of is extracted and shown. The phase shift circuit 30L at the subsequent stage shown in the figure shifts the phase of the signal input to the input terminal 42 by a predetermined amount and inputs it to the non-inverting input terminal of the operational amplifier 32, which is a kind of differential input amplifier. Inductor 37 and variable resistor 36, input 42 and operational amplifier
The resistor 38 is inserted between the inverting input terminal 32 and the inverting input terminal, and the resistor 40 is inserted between the output terminal 44 of the operational amplifier 32 and the inverting input terminal.

In the phase shift circuit 30L having such a configuration, when a predetermined AC signal is input to the input end 42, the voltage VR2 appearing across the variable resistor 36 is applied to the non-inverting input terminal of the operational amplifier 32. To be done.

Further, since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 32 shown in FIG. 4, the potential of the inverting input terminal of the operational amplifier 32, the inductor 37 and the variable resistor 36. Is equal to the potential at the connection point.
Therefore, the same voltage VL1 that appears across the inductor 37 appears across the resistor 38.

Here, when the resistance values of the resistor 38 and the resistor 40 are the same, the same current flows through these two resistors 38 and 40, so that the voltage VL1 also appears across the resistor 40. Moreover,
The voltage VL1 appearing at both ends of these two resistors 38 and 40 is oriented in the same vector direction. Considering the inverting input terminal (voltage VR2) of the operational amplifier 32 as a reference, the voltage VL1 at both ends of the resistor 38 becomes a vector. Input voltage Ei
Further, the output voltage Eo is obtained by vector-wise subtracting the voltage L1 across the resistor 40.

FIG. 5 is a vector diagram showing the relationship between the input / output voltage of the subsequent phase shift circuit 30L and the voltage appearing in the inductor or the like.

As shown in the figure, the voltage VR2 appearing across the variable resistor 36 and the voltage VL1 appearing across the inductor 37 are 90 ° out of phase with each other, and the vector addition of these results in the input voltage. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
Along the circumference of the semi-circle shown in FIG.
R2 and the voltage VL1 across the inductor 37 change.

Further, as described above, from the voltage VR2 to the voltage V
The output voltage Eo is obtained by subtracting L1 in vector.
Considering the voltage VR2 applied to the non-inverting input terminal as a reference, the input voltage Ei and the output voltage Eo are different only in the direction in which the voltage VL1 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the hypotenuses of the input voltage Ei and the output voltage Eo and the bottom of twice the voltage VL1, and the amplitude of the output signal is related to the frequency. Not the same as the amplitude of the input signal,
It can be seen that the phase shift amount is represented by φ2 shown in FIG.

As is clear from FIG. 5, the voltage VR2
And the voltage VL1 intersect at a right angle on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VR2 changes from 0 ° to 90 ° as the frequency ω changes from 0 to ∞. The shift amount φ2 of the entire phase shift circuit 30L is 2
It is doubled and varies from 0 ° to 180 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

As in the case of the phase shift circuit 10C in the preceding stage, when the voltage Ei is applied to the input end 42, the current flowing from the input end 42 to the output end 44 through the resistors 38 and 40 is I, the resistance 38.
And the resistance of the resistor 40 are equal, and let that value be r,
The voltage across each of 38 and 40 is -Ir.

Since there must be no potential difference between the two inputs of the operational amplifier 32 shown in FIG. 4, a voltage VR2 across the variable resistor 36 applied to the non-inverting input terminal of the operational amplifier 32 and the output voltage Eo are applied. Has a relationship of VR2 = Eo − (− I · r) = Eo + I · r∴Eo = VR2−I · r (9).

In order to prevent a potential difference between the two inputs of the operational amplifier 32, the voltage VL1 across the inductor 37 and the resistance
Since the value obtained by adding the voltage −I · r across both ends of 38 must be 0, VL1 + (− I · r) = 0 ∴VL1 = I · r (10) From equations (9) and (10), Eo = VR1-VL1 (11)

Further, the sum of the voltages VR2 and VL1 across the variable resistor 36 and the inductor 37 is the voltage Ei applied to the input terminal 42, so that between these voltages, Ei = VR1 + VL1. There is a relationship of 12). From equation (11) and equation (12),

(Equation 13) Becomes Here, in order to simplify the explanation, the time constant of the LR circuit in the phase shift circuit 30L is set to T, similarly to the time constant of the CR circuit in the phase shift circuit 10C.

Substituting s = jω in the equation (13) and transforming it,

[Equation 14] Becomes

The equations (13) and (14) are different from the equations (5) and (6) shown in the preceding phase shift circuit 10C only in reference numerals. Therefore, the absolute value of the output voltage Eo is (7)
The formula can be applied as it is, and the phase shift circuit 30L at the subsequent stage
It can be seen that, no matter how the phase between the input and the output rotates, the amplitude of the output signal is equal to the amplitude of the input signal and is constant.

Further, when the phase shift amount φ2 of the output voltage Eo with respect to the input voltage Ei is calculated from the equation (14),

(Equation 15) Becomes From this equation (15), for example, ω is approximately 1 / T (= R
/ L), the phase shift amount φ2 at a frequency is about 90 °, and only the phase can be shifted by about 90 ° without attenuating the amplitude of the input signal. Moreover, by changing the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount φ2 becomes approximately 90 ° can be changed.

In this way, the two phase shift circuits 10C and 30
The phase is shifted by a predetermined amount in each of L. Moreover, as shown in FIGS. 3 and 5, the phase shift circuits 10C and 30
The relative phase relationships of the input and output voltages at L are in opposite directions, and the two phase shift circuits 10C and 30L at a certain frequency
, The signal whose phase shift amount is 0 ° is output.

Further, the output of the phase shift circuit 30L at the subsequent stage is fed back to the input side of the phase shift circuit 10C at the previous stage via the feedback resistor 70, and when the loop gain is set to be larger than 1, one cycle is completed. Further, sine wave oscillation is performed at a frequency such that the phase shift amount is 0 °.

FIG. 6 is a system diagram in which the entire two phase shift circuits 10C and 30L having the above-mentioned configuration are replaced with a circuit having a transfer function K1. A circuit having the transfer function K1 and a feedback resistor having a resistance value R0 are used. 70 and 70 form a closed loop. FIG. 7 is a system diagram in which the system shown in FIG. 6 is converted by the Miller's theorem. When the feedback resistor 70 having a resistance value R0 is converted into an input shunt resistance as shown in FIG.

[Equation 16] Can be represented by

In this equation, considering that K1 is larger than 1, it can be seen that the input shunt resistance Rs becomes a negative resistance.

Assuming that the ideal phase shift circuit (all-pass network) having the transfer function K1 satisfies the condition that the phase shift amount is 0 ° at an arbitrary finite frequency, it is selective at this frequency. A negative resistance will be realized and oscillation will be possible. Actually, the input shunt resistance is in the form of being connected in parallel with the input impedance of the phase shift circuit, and it is necessary that a composite of these is a negative resistance, but the resistance value R0 of the feedback resistance 70 is set low, Since it is extremely easy to set the input impedance of the phase shift circuit to be high, it is theoretically possible to ignore the influence of the input impedance of the phase shift circuit.

By the way, as is apparent from the equation (5), the transfer function K2 of the phase shift circuit 10C at the preceding stage is

[Equation 17] As is clear from the equation (13), the phase shift circuit 30
The transfer function K3 of L is

(Equation 18) Is. However, assuming that the time constant of the CR circuit in the phase shift circuit 10C and the time constant of the LR circuit in the phase shift circuit 30L are different, they are set to T ₁ and T ₂ , respectively.

Therefore, when the phase shift circuits 10C and 30L are cascade-connected in two stages, the overall transfer function K1 is

[Formula 19] Becomes Here, in order to simplify the calculation, s = jω,
s ² = −ω ² , A = 1 + T ₁ · T ₂ · s ² = 1−T ₁ · T ₂ ·
If ω ² and B = T ₁ + T ₂ are set,

(Equation 20) Becomes In this equation (20), the phase shift circuits 10C and 30L are
In order for the phase difference between the input and output of all the stages connected to become 0 °,
Since the imaginary term on the right side of equation (20) must be 0, the following equation holds. (1-T ₁ · T ₂ · ω ² ) (T ₁ + T ₂ ) ω = 0 (21) Therefore, 1−T ₁ · T ₂ · ω ² = 0 or ω = 0. Here, when ω = 0, the input signal is DC and the phase difference is 180 °, so that the other condition (1
Ω = 1 / √ (T ₁ · T ₂ ) satisfying −T ₁ · T ₂ · ω ² = 0)
At this time, the phase difference becomes 0 °. At this frequency, the input shunt resistance Rs becomes a negative resistance and simultaneously satisfies the oscillation voltage condition and the frequency condition.

When the operational amplifiers 12 and 32 operate ideally, the gain of the phase shift circuit 10C becomes 1 when the resistance values of the resistors 18 and 20 are equal, and the resistance values of the resistors 38 and 40 are respectively. When is equal to each other, the gain of the phase shift circuit 30L becomes 1. However, in reality, there is a deviation from the ideal, and the gain in each phase shift circuit is 1 or less.
By setting the resistance value of the resistor 20 in C to be larger than the resistance value of the resistor 18, or by setting the resistance value of the resistor 40 in the subsequent phase shift circuit 30L to be larger than the resistance value of the resistor 38, It is necessary to set the loop gain of 1 larger than 1.

In this way, by combining the two phase shift circuits 10C and 30L, the phase shift amount of the signal that goes through the closed loop can be made 0 ° at a certain frequency, and the loop gain at this time is larger than 1. By doing so, the sine wave oscillation is sustained. Also, the phase shift amount is 0
The frequency that becomes ° is the variable resistance in each phase shift circuit 10C, 30L.
Since it can be changed by changing the resistance value of 16 or 36, a frequency variable oscillator can be easily realized.

In the oscillator 1 of this embodiment, the inductor 37 can be formed on the semiconductor substrate by forming a spiral conductor by photolithography or the like. Since it can be formed on a semiconductor substrate together with other components (operational amplifiers and resistors) by using, the whole oscillator 1 whose oscillation frequency can be adjusted is formed on a semiconductor substrate to form an integrated circuit. Is also easy.

The time constant T of the CR circuit of the preceding phase shift circuit 10C is CR, and the time constant T of the LR circuit of the subsequent phase shift circuit 30L is L / R.
Is divided into a denominator and a numerator, so that, for example, the entire oscillator 1 is formed on a semiconductor substrate and each variable resistor 16, 36 is F
When it is formed by ET, it is possible to perform so-called temperature compensation, which suppresses the fluctuation of the oscillation frequency due to the temperature change of the resistance value. Regarding the point where this temperature compensation is possible,
The same applies to the oscillators of the respective embodiments shown below.

In the oscillator 1 of the first embodiment described above, the phase shift circuit 10C is arranged in the front stage and the phase shift circuit 30L is arranged in the rear stage. Therefore, the phase shift circuit 30L in the front stage and the phase shift circuit in the rear stage can be replaced by replacing the front and rear of these.
The oscillators may be configured by arranging 10C respectively.

The oscillator 1 of the first embodiment described above is
The phase shift amount becomes 0 ° by the whole of the two phase shift circuits 10C and 30L, and a predetermined oscillation operation is performed.
You may make it add the non-inverting circuit which does not shift a phase.

FIG. 8 is a diagram showing the configuration of an oscillator 1a in which a non-inverting circuit 50 is added to the oscillator 1 shown in FIG. The non-inverting circuit 50 includes an operational amplifier 52 having an inverting input terminal grounded via a resistor 54 and a resistor 56 connected between the inverting input terminal and the output terminal. It functions as a buffer having a predetermined amplification degree determined by the resistance ratio of the resistors 54 and 56. The non-inverting circuit 50 having such a configuration outputs without changing the phase of the input signal, and it is easy to adjust the amplification degree and set the loop gain to 1 or more. By adjusting the gain, a predetermined oscillation operation is performed at the frequency at which the phase shift amount by the two phase shift circuits 10C and 30L becomes 0 °.

(Second Embodiment) FIG. 9 is a circuit diagram showing a structure of an oscillator according to a second embodiment of the present invention. The oscillator 1b shown in the figure is similar to the oscillator 1 of the first embodiment,
Two phase shift circuits 10L and 30C each performing a total phase shift of 0 ° at a predetermined frequency by shifting the phase of the input signal by a predetermined amount, and a phase shift circuit 30 at the subsequent stage.
A feedback resistor 70 for feeding back the output of C to the input side of the preceding phase shift circuit 10L is included.

FIG. 10 shows the phase shift circuit 10 of the preceding stage shown in FIG.
The configuration of L is extracted and shown. The phase shift circuit 10L at the preceding stage shown in the figure shifts the phase of the signal input to the input terminal 22 by a predetermined amount and inputs it to the non-inverting input terminal of the operational amplifier 12 which is a kind of differential input amplifier. The variable resistor 16 and the inductor 17, the resistor 18 inserted between the input end 22 and the inverting input terminal of the operational amplifier 12, and the resistor 20 inserted between the output end 24 of the operational amplifier 12 and the inverting input terminal. It is configured to include.

In the phase shift circuit 10L having such a configuration, when a predetermined AC signal is input to the input end 22, the voltage VL2 appearing across the inductor 17 is applied to the non-inverting input terminal of the operational amplifier 12. It

Further, since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 12 shown in FIG. 10, the potential of the inverting input terminal of the operational amplifier 12, the variable resistor 16 and the inductor 17 are provided. Is equal to the potential at the connection point. Therefore, the same voltage VR3 that appears across the variable resistor 16 appears across the resistor 18.

Here, when the resistance values of the resistor 18 and the resistor 20 are equal, the same current flows through these two resistors 18 and 20, so that the voltage VR3 also appears across the resistor 20. Moreover,
The voltages VR3 appearing at both ends of these two resistors 18 and 20 have the same vector direction, and considering the inverting input terminal (voltage VL2) of the operational amplifier 12 as a reference, the voltage VR3 at both ends of the resistor 18 is Input voltage Ei is the vector addition
Then, the voltage VR3 of the resistor 20 is subtracted in vector form to become the output voltage Eo.

FIG. 11 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit 10L and the voltage appearing in the inductor or the like.

As shown in the figure, the voltage VL2 appearing across the inductor 17 and the voltage VR3 appearing across the variable resistor 16 are 90 ° out of phase with each other. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
The voltage VL2 across the inductor 17 and the voltage VR3 across the variable resistor 16 change along the circumference of the semicircle shown in FIG.

The output voltage Eo is obtained by subtracting the voltage VR3 from the voltage VL2 in vector. Considering the voltage VL2 applied to the non-inverting input terminal as a reference, the input voltage Ei
The output voltage Eo differs from the output voltage Eo only in the direction in which the voltage VR3 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the hypotenuses of the input voltage Ei and the output voltage Eo and the base of twice the voltage VR3, and the amplitude of the output signal is related to the frequency. It can be seen that the amplitude is the same as the input signal and the phase shift amount is represented by φ3 shown in FIG.

As is clear from FIG. 11, the voltage V
Since L2 and voltage VR3 intersect at right angles on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VL2 is that the frequency ω is 0.
It changes from 90 ° to 0 ° as it changes from to ∞. The phase shift amount φ3 of the entire phase shift circuit 10L is twice that, and changes from 180 ° to 0 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

When the input voltage Ei is applied to the input end 22, the current flowing through the resistors 18 and 20 from the input end 22 to the output end 24 is I, and the resistance values of the resistors 18 and 20 are equal to each other. Is r, the voltage across the resistors 18 and 20 is −
I · r.

By the way, as described above, since there should be no potential difference between the two inputs of the operational amplifier 12 shown in FIG. 10, the voltage VL2 across the inductor 17 applied to the non-inverting input terminal of the operational amplifier 12 and the output voltage. There is a relationship of VL2 = Eo − (− I · r) = Eo + I · r ∴Eo = −I · r + VL2 (22) with Eo.

In order to prevent a potential difference between the two inputs of the operational amplifier 12, the voltage VR3 across the variable resistor 16 and the resistor 18 are applied.
Since the value obtained by adding the voltage −I · r across both ends must be 0, VR3 + (− I · r) = 0∴VR3 = I · r (23) From equations (22) and (23), Eo = -VR3 + VL2 =-(VR3-VL2) (24).

Further, the sum of the voltages VL2 and VR3 across the inductor 17 and the variable resistor 16 is the voltage Ei applied to the input end 22, so that Ei = VR3 + VL2 ... ( 25). From equation (24) and equation (25),

(Equation 26) Becomes Where L is the inductance of inductor 17,
R represents the resistance value of the variable resistor 16 and is the LR in the phase shift circuit 10L.
Two phase shift circuits whose circuit time constants are shown in the first embodiment 10
The same T as each time constant of the CR circuit or the LR circuit in C and 30L is set.

The equation (26) is the same as the equation (5) shown in the first embodiment, and the phase shift circuit 10L of this embodiment has the same input / output voltage as the phase shift circuit 10C of the first embodiment. It is understood that they have a relationship of. Therefore, in the phase shift circuit 10L, the amplitude of the output signal becomes constant no matter how the phase between the input and output rotates.

Further, as the phase shift amount φ3 of the output voltage Eo with respect to the input voltage, φ1 represented by the above equation (8) is applied as it is, and for example, ω becomes approximately 1 / T (= R / L). The amount of phase shift at the frequency is approximately 90 °. Moreover, by changing the resistance value R of the variable resistor 16, it is possible to change the frequency ω at which the phase shift amount becomes approximately 90 °.

FIG. 12 shows the phase shift circuit 30 at the rear stage shown in FIG.
The configuration of C is extracted and shown. The phase shift circuit 30C in the latter stage shown in the figure shifts the phase of the signal input to the input terminal 42 by a predetermined amount and inputs it to the non-inverting input terminal of the operational amplifier 32, which is a kind of differential input amplifier. The variable resistor 36 and the capacitor 34, the resistor 38 inserted between the input end 42 and the inverting input terminal of the operational amplifier 32, and the resistor 40 inserted between the output end 44 of the operational amplifier 32 and the inverting input terminal. It is configured to include.

In the phase shift circuit 30C having such a configuration, when a predetermined AC signal is input to the input end 42, the voltage VC2 appearing across the capacitor 34 is applied to the non-inverting input terminal of the operational amplifier 32. It

Since there is no potential difference between the two inputs (the inverting input terminal and the non-inverting input terminal) of the operational amplifier 32 shown in FIG. 12, the potential of the inverting input terminal of the operational amplifier 32, the variable resistor 36 and the capacitor 34. Is equal to the potential at the connection point. Therefore, the same voltage VR4 as the voltage VR4 appearing across the variable resistor 36 appears across the resistor 38.

Here, when the resistance values of the resistor 38 and the resistor 40 are the same, the same current flows through these two resistors 38 and 40, so that the voltage VR4 also appears at both ends of the resistor 40. Moreover,
The voltages VR4 appearing at both ends of these two resistors 38 and 40 are vectorally oriented in the same direction. Considering the inverting input terminal (voltage VC2) of the operational amplifier 32 as a reference, the voltage VR4 at both ends of the resistor 38 becomes a vector. Input voltage Ei
Further, the output voltage Eo is obtained by vector-wise subtracting the voltage R4 across the resistor 40.

FIG. 13 is a vector diagram showing the relationship between the input / output voltage of the subsequent phase shift circuit 30C and the voltage appearing at the capacitor or the like.

As shown in the figure, the voltage VC2 appearing across the capacitor 34 and the voltage VR4 appearing across the variable resistor 36 are 90 ° out of phase with each other. It becomes Ei. Therefore, when the amplitude of the input signal is constant and only the frequency changes,
The voltage VC2 across the capacitor 34 and the voltage VR4 across the variable resistor 36 change along the circumference of the semicircle shown in FIG.

As described above, the voltage VC2 to the voltage V
The output voltage Eo is obtained by subtracting R4 in vector.
Considering the voltage VC2 applied to the non-inverting input terminal as a reference, the input voltage Ei and the output voltage Eo are different only in the direction in which the voltage VR4 is combined, and their absolute values are equal. Therefore, the relationship between the magnitude and the phase of the input / output voltage can be expressed by an isosceles triangle having the input voltage Ei and the output voltage Eo as hypotenuses and the base twice the voltage VR4, and the amplitude of the output signal is related to frequency. Not the same as the amplitude of the input signal,
It can be seen that the phase shift amount is represented by φ4 shown in FIG.

As is clear from FIG. 13, the voltage V
Since C2 and voltage VR4 intersect at a right angle on the circumference, theoretically, the phase difference between the input voltage Ei and the voltage VC2 is that the frequency ω is 0.
It changes from 0 ° to 90 ° as it changes from 1 to ∞. The shift amount φ4 of the entire phase shift circuit 30C is 2
It is doubled and varies from 0 ° to 180 ° depending on the frequency.

Next, the relationship between the input and output voltages described above will be verified quantitatively.

As in the case of the phase shift circuit 10L at the previous stage, when the voltage Ei is applied to the input end 42, the current flowing through the resistors 38, 40 from the input end 42 to the output end 44 is I, the resistance 38.
And the resistance of the resistor 40 are equal, and let that value be r,
The voltage across each of 38 and 40 is -Ir.

Since no potential difference should occur between the two inputs of the operational amplifier 32 shown in FIG. 12, the voltage VC2 across the capacitor 34 applied to the non-inverting input terminal of the operational amplifier 32 and the output voltage Eo are not present. , VC2 = Eo − (− I · r) = Eo + I · r ∴Eo = −I · r + VC2 (27).

In order to prevent a potential difference between the two inputs of the operational amplifier 32, the voltage VR4 across the variable resistor 36 and the resistor 38 are required.
Since the value obtained by adding the voltage −I · r across both ends must be 0, VR4 + (− I · r) = 0∴VR4 = I · r (28) From equations (27) and (28), Eo = -VR4 + VC2 =-(VR4-VC2) (29).

Further, the sum of the voltages VC2 and VR4 across the capacitor 34 and the variable resistor 36 is the voltage Ei applied to the input terminal 42, so that between these voltages, Ei = VR4 + VC2. 30). From equations (29) and (30),

[Equation 31] Becomes Here, C represents the electrostatic capacity of the capacitor 34, R represents the resistance value of the variable resistor 36, and the time constant of the CR circuit in the phase shift circuit 30C is T, as in the case of the preceding phase shift circuit 10L.

This equation (31) is the same as the equation (13) shown in the first embodiment, and the phase shift circuit 30C of this embodiment has the same input / output voltage as the phase shift circuit 30L of the first embodiment. It is understood that they have a relationship of. Therefore, in the phase shift circuit 30C, the amplitude of the output signal becomes constant no matter how the phase between the input and the output rotates.

Further, as the phase shift amount φ4 of the output voltage Eo with respect to the input voltage, φ2 represented by the above equation (15) is applied as it is, and for example, ω is approximately 1 / T (= 1 / (CR)).
The amount of phase shift at the frequency
Becomes Moreover, by changing the resistance value R of the variable resistor 16, it is possible to change the frequency ω at which the phase shift amount becomes approximately 90 °.

In this way, the two phase shift circuits 10L and 30
The phase is shifted by a predetermined amount in each of C. Moreover, as shown in FIG. 11 and FIG.
The relative phase relationships of the input and output voltages at L and 30C are in opposite directions, and two phase shift circuits 10
A signal whose phase shift amount is 0 ° is output by the entire L and 30C.

The output of the subsequent phase shift circuit 30C is fed back to the input side of the previous phase shift circuit 10L via the feedback resistor 70, and when the loop gain is set to a value larger than 1, it makes one cycle. Further, sine wave oscillation is performed at a frequency such that the phase shift amount is 0 °.

By the way, the above-mentioned two phase shift circuits 10L,
The oscillator 1b of the second embodiment including 30C can be represented by the system diagram shown in FIG. 6 by replacing the whole with a circuit having a transfer function K1 as in the case of the first embodiment. Therefore, it can be expressed by the system diagram shown in FIG. 7 by converting by the Miller's theorem, and the input shunt resistance Rs of the system after conversion can be expressed by the equation (16).

As is clear from the equations (26) and (31), the transfer functions of the two phase shift circuits 10L and 30C of this embodiment are the same as those of the two phase shift circuits 10C and 10C of the first embodiment. It is the same as each transfer function of 30L, and the overall transfer function K1 when the non-inverting circuit 50 is connected to the latter stage of the two phase shift circuits 10L and 30C is
The one shown in the equation (20) can be applied as it is.
Therefore, the phase difference becomes 0 ° when ω = 1 / √ (T ₁ · T ₂ ), between the entire input / output in which the two phase shift circuits 10L and 30C are connected, and the oscillation voltage condition and the frequency condition are satisfied. Will be satisfied at the same time.

As described above, by combining the two phase shift circuits 10L and 30C, the phase shift amount of the signal that goes through the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time becomes 1 or more. By setting, sine wave oscillation is maintained. Also, the phase shift amount is 0
The frequency that becomes ° is the variable resistance in each phase shift circuit 10L, 30C.
Since it can be changed by changing the resistance value of 16 or 36, a frequency variable oscillator can be easily realized.

In addition, as in the first embodiment, the inductor 17
Can be formed on the semiconductor substrate by forming a spiral conductor by a photolithography method or the like, but by using such an inductor 17, together with other components (operational amplifier and resistor). Oscillator 1
It is also easy to form the whole of b on a semiconductor substrate to form an integrated circuit.

In the oscillator 1b of the second embodiment described above, the phase shift circuit 10L and the phase shift circuit 30C are arranged in the front and rear stages, respectively. Therefore, the phase shift circuit 30C can be switched to the front stage and the phase shift circuit can be switched to the rear stage.
The oscillators may be configured by disposing 10 L respectively.

Also, the oscillator 1b of the second embodiment described above.
The two phase shift circuits 10L and 30C together have a phase shift amount of 0 ° to perform a predetermined oscillation operation, and a non-inverting circuit that does not shift the phase may be added.

FIG. 14 is a diagram showing the configuration of an oscillator 1c in which a non-inverting circuit 50 is added to the oscillator 1b shown in FIG.
This non-inverting circuit 50 is the one shown in FIG. 8, and has an operational amplifier 52 in which an inverting input terminal is grounded via a resistor 54 and a resistor 56 is connected between the inverting input terminal and the output terminal. It is configured to include, and functions as a buffer having a predetermined amplification degree determined by the resistance ratio of the two resistors 54 and 56. By using the non-inverting circuit 50 having such a configuration, it is easy to adjust the amplification degree and set the loop gain to 1 or more. By adjusting the loop gain in this way, two shifts can be performed. Phase circuit 10L,
A predetermined oscillating operation is performed at a frequency at which the phase shift amount due to 30C becomes 0 °.

(Third Embodiment) The oscillators 1 and 1a of the first embodiment described above are constructed by combining two phase shift circuits in which the relative phase relationship between the input and the output is opposite. The oscillator may be configured by combining two phase shift circuits having the same phase relationship.

One phase shift circuit 10C included in the oscillator 1 shown in FIG. 1 and the phase shift circuit 10 included in the oscillator 1b shown in FIG.
The relationship expressed by the equation (5) or (26) is established between the respective input and output voltages of L. In the following, the phase shift circuit 10C or 10L having the configuration shown in FIG.
For convenience, description will be given by using the fractional sign in the equation (5) as a "-type phase shift circuit".

Further, the phase shift circuit 30L included in the oscillator 1 shown in FIG. 1 and the phase shift circuit 30 included in the oscillator 1b shown in FIG.
The relationship expressed by equation (13) or equation (31) is established between the respective input and output voltages of C. In the following, the phase shift circuit 30C or 30L having the configuration shown in FIG.
"+ Type phase shift circuit" for convenience, using the sign of the fraction in equation (3)
Will be described.

When the phase shift circuits are classified into two types for convenience, the oscillators 1 and 1a of the first embodiment and the oscillators 1b and 1c of the second embodiment have two phase shifters of different types. By combining the circuits, the oscillation operation is performed at the frequency at which the total phase shift amount is 0 °.

By the way, when attention is paid to the relationship between the entire input and output when a phase inverting circuit for inverting the phase of a signal is connected to the subsequent stage of one − type phase shift circuit 10C (or 10L), (5) In the equation, the sign "-" of the fraction may be inverted to "+", and the configuration in which the phase inversion circuit is connected to the subsequent stage of one-type phase shift circuit 10C is equivalent to one + type phase shift circuit. You can say that. Similarly, one + type phase shift circuit
Focusing on the relationship between the entire input and output when a phase inversion circuit that inverts the phase of the signal is connected in the subsequent stage of 30L (or 30C), the sign "+" of the fraction is inverted in Eq. It may be set to "-", and it can be said that the configuration in which the phase inversion circuit is connected to the subsequent stage of one + type phase shift circuit is equivalent to one-type phase shift circuit.

Therefore, instead of combining two phase shift circuits of different types to form an oscillator as shown in the first and second embodiments, two phase shift circuits of the same type and a phase inversion circuit are combined. An oscillator can be configured.

FIG. 15 is a diagram showing the structure of the oscillator of the third embodiment. The oscillator 1d shown in the figure is composed of two negative type phase shift circuits 10C and 10L shown in FIG. 2 or 10, a phase inverting circuit 80 for further inverting the phase of the output signal of the subsequent phase shift circuit 10L, and a phase A feedback resistor 70 for feeding back the output of the inverting circuit 80 to the input side of the preceding phase shift circuit 10C is included.

The phase inverting circuit 80 includes an operational amplifier 82 in which an input signal is input to the inverting input terminal via a resistor 84 and a non-inverting input terminal is grounded, and an operational amplifier 82 having an inverting input terminal and an output terminal. And a resistor 86 connected to. When an AC signal is input to the inverting input terminal of the operational amplifier 82 via the resistor 84, a reverse-phase signal whose phase is inverted is output from the output terminal of the operational amplifier 82, and this reverse-phase signal is shown in FIG. Output terminal 92 of oscillator 1d
Taken from. Further, the phase inverting circuit 80 has a predetermined amplification degree determined by the resistance ratio of the two resistors 84 and 86.

By using the phase inverting circuit 80 having such a configuration, it becomes easy to invert the phase of the input signal and adjust the amplification degree to set the loop gain of the oscillator 1d to 1 or more.

By the way, as described in the above-mentioned first and second embodiments, the two-type phase shift circuits 10C and 10L.
In each of the above, the phase shift amount changes from 180 ° to 0 ° as the frequency ω of the input signal changes from 0 to ∞. For example, assuming that the time constant of the CR circuit in the phase shift circuit 10C is the same as the time constant of the LR circuit in the phase shift circuit 10L, and letting that value be T, it is 2 at the frequency of ω = 1 / T.
The amount of phase shift in each of the phase shift circuits 10C and 10L is 90 °. Therefore, the two phase shift circuits 10C,
The phase is shifted by 180 ° by the entire 10 L, and the phase is inverted by the phase inversion circuit 80 connected in the subsequent stage. As a whole, the phase inversion circuit 80 outputs a signal in which the phase goes around and the phase shift amount becomes 0 °. Is output. The output of the phase inversion circuit 80 is fed through the feedback resistor 70 to the phase shift circuit 10 of the previous stage.
By feeding back to the input side of C, sine wave oscillation having the frequency ω is performed.

When the transfer function K21 of each of the two phase shift circuits 10C and 10L is T when the time constant of the CR circuit in the phase shift circuit 10C and the time constant of the LR circuit in the phase shift circuit 10L are both set to (17) Replace T ₁ with T in the formula,

[Equation 32] Becomes Therefore, these two phase shift circuits 10C and 10L
Is connected in series and the phase inversion circuit 80 is connected in the subsequent stage, the overall transfer function K11 is

[Expression 33] Becomes The right side of the equation (33) is (19) in the first embodiment.
It is equal to the transfer function K1 shown in the equation with T ₁ and T ₂ replaced by T. That is, the expression (33) is equal to the entire transfer function when the two phase shift circuits 10C and 30L shown in the first embodiment are connected, and in this embodiment, two phase shift circuits 10C of the same type are used. It can be seen that the configuration in which 10 L and 10 L and the phase inversion circuit 80 are connected is equivalent to the configuration shown in FIG. 1 in the first embodiment.

Therefore, in the oscillator 1d of the third embodiment, by setting the amplification factor of the phase inverting circuit 80 to an appropriate value and setting the loop gain to 1 or more, the phase shift amount becomes 0 ° when the circuit makes one cycle. The sine wave oscillation is sustained at such a frequency.

In addition, the variable resistance in each phase shift circuit 10C, 10L
Since the amount of phase shift in each phase shift circuit can be changed by changing the resistance value R of 16, the total phase shift amount of the two phase shift circuits 10C and 10L is 18
The frequency of 0 ° can be changed, and the frequency variable oscillator 1d can be easily realized.

In addition, as in the first embodiment and the like, the inductor
17 can be formed on the semiconductor substrate by forming a spiral conductor by a photolithography method or the like, but by using such an inductor 17, other components (operational amplifier, resistor) In addition, since it can be formed on the semiconductor substrate, it is easy to form the entire oscillator 1d on the semiconductor substrate to form an integrated circuit.

In the oscillator 1d of this embodiment, the phase shift circuit 10C is arranged in the front stage and the phase shift circuit 10L is arranged in the rear stage. However, the phase shift amount between the input and output signals cannot be 0 ° due to the whole of them. Therefore, the oscillator may be configured by arranging the front and the rear of these and arranging the phase shift circuit 10L in the front stage and the phase shift circuit 10C in the rear stage, respectively.

(Fourth Embodiment) In the oscillator 1d of the third embodiment described above, the case where two − type phase shift circuits are connected has been described. However, by connecting two + type phase shift circuits, May be configured.

FIG. 16 is a diagram showing the structure of the oscillator of the fourth embodiment. The oscillator 1e shown in the figure is composed of two + type phase shift circuits 30L and 30C shown in FIG. 4 or 12, a phase inversion circuit 80 that further inverts the phase of the output signal of the phase shift circuit 30C in the subsequent stage, and a phase The output of the inverting circuit 80 is applied to the phase shift circuit 30 of the previous stage.
A feedback resistor 70 for feeding back to the input side of L is included.

The phase inversion circuit 80 is the same as that shown in FIG. 15 in the third embodiment, and further inverts the phase of the signal output from the subsequent phase shift circuit 30C to output it from the output terminal 92 of the oscillator 1e. Output.

As described in the first and second embodiments described above, each of the + type two phase shift circuits 30L and 30C has a phase shift as the frequency ω of the input signal changes from 0 to ∞. The shift amount changes from 0 ° to 180 °.
For example, the time constant of the LR circuit in the phase shift circuit 30L and the phase shift circuit
Assuming that the time constants of the CR circuits in 30C are the same, and letting that value be T, the phase shift amount in each of the two phase shift circuits 30L and 30C is 90 ° at the frequency of ω = 1 / T.
Becomes Therefore, the phase is shifted by 180 ° by the whole of the two phase shift circuits 30L and 30C, and the phase is inverted by the phase inverting circuit 80 connected in the subsequent stage. As a whole, the phase makes one round and the phase shift amount is 0 °. The signal that becomes is output from the phase inversion circuit 80. The output of the phase inversion circuit 80 is fed back to the input side of the phase shift circuit 30L at the previous stage via the feedback resistor 70, so that sine wave oscillation having the frequency ω is performed.

Transfer function K31 of the two phase shift circuits 30L and 30C
Is the time constant of the LR circuit in the phase shift circuit 30L and the phase shift circuit 30C.
If the time constant of the CR circuit inside is T, replace T ₂ with T in equation (18),

(Equation 34) Becomes This transfer function K31 is the phase shift circuit 10 shown in the equation (32).
The sign "-" of the transfer function K21 of C and 10L is replaced with "+", and the whole of the case where two phase shift circuits 30L and 30C are connected in cascade and further the phase inversion circuit 80 is connected to the subsequent stage. The transfer function K12 of

[Equation 35] Therefore, it becomes the same as the transfer function K11 shown in the equation (33) in the third embodiment.

That is, the configuration in which two phase shift circuits 30L and 30C of the same type are connected to the phase inversion circuit 80 in this embodiment is two phase shift circuits of different types in the first and second embodiments. It can be said that this is equivalent to the configuration in which the phase shift circuit 10 is connected, or the configuration in which the two − type phase shift circuits 10C and 10L and the phase inversion circuit 80 are connected in the third embodiment.

Therefore, in the oscillator 1e of the fourth embodiment, by setting the amplification factor of the phase inverting circuit 80 to an appropriate value and setting the loop gain to 1 or more, the phase shift amount becomes 0 ° when the circuit makes one cycle. The sine wave oscillation is sustained at such a frequency.

The variable resistor 36 in the phase shift circuits 30L and 30C is also used.
Since the phase shift amount in each phase shift circuit can be changed by changing the resistance value R of, the total phase shift amount is 180 by the total of the two phase shift circuits 30L and 30C.
It is possible to change the frequency at which the angle becomes 0, and it is possible to easily realize the variable frequency oscillator 1e.

In addition, as in the first embodiment and the like, the inductor
The 37 can be formed on the semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using such an inductor 37, other components (operational amplifiers and resistors) can be formed. Since it can be formed on the semiconductor substrate at the same time, it is easy to form the entire oscillator 1e on the semiconductor substrate to form an integrated circuit.

In the oscillator 1e of this embodiment, the phase shift circuit 30L is arranged in the front stage and the phase shift circuit 30C is arranged in the rear stage, but the phase shift amount between the input and output signals cannot be 0 ° by the whole of them. Therefore, the oscillator may be configured by arranging the front and the rear of these and arranging the phase shift circuit 30C in the front stage and the phase shift circuit 30L in the rear stage.

(Other Embodiments) By the way, the oscillator of each of the above-mentioned embodiments is constituted by two phase shift circuits or two phase shift circuits and a non-inverting circuit or a phase inverting circuit, and a plurality of connected plural circuits are connected. A predetermined oscillation operation is performed by setting the total amount of phase shift to 0 ° at a predetermined frequency by the whole circuit. Therefore, focusing only on the amount of phase shift, there is some degree of freedom in the order in which the phase shift circuit and the non-inverting circuit or the phase-shift inverting circuit are connected, and the connection order can be determined as necessary. it can.

FIG. 17 is a diagram showing a connection state when an oscillator is formed by combining two phase shift circuits and a non-inverting circuit. In these figures, the feedback impedance element 70a most commonly uses a feedback resistor 70 as shown in FIG. However, the feedback impedance element 70a may be formed by a capacitor or an inductor, or may be formed by combining a resistor, a capacitor or an inductor.

FIG. 17A shows a configuration in which a non-inverting circuit 50 is arranged at the subsequent stage of two phase shift circuits and corresponds to the oscillator 1a shown in FIG. 8 or the oscillator 1c shown in FIG. ing. As described above, when the non-inverting circuit 50 is arranged in the subsequent stage, a large output current can be taken out by giving the non-inverting circuit 50 a function of an output buffer.

FIG. 17B shows two phase shift circuits 10C and 30L.
The configuration in which the non-inverting circuit 50 is arranged between the two phase shift circuits 10L and 30C is shown. In this way, when the non-inverting circuit 50 is arranged in the middle, mutual interference between the phase shift circuit at the front stage and the phase shift circuit at the rear stage can be completely prevented.

FIG. 17C shows two phase shift circuits 10C and 30L.
The configuration is shown in which the non-inverting circuit 50 is arranged in the preceding stage or in the preceding stage of the two phase shift circuits 10L and 30C. As described above, when the non-inverting circuit 50 is arranged in the preceding stage, the influence of the feedback impedance element 70a on the preceding phase shift circuit can be minimized.

Similarly, FIG. 18 is a diagram showing a connection state when an oscillator is constructed by combining two phase shift circuits and a phase inversion circuit. As described with reference to FIG. 17, the feedback impedance element 70a is
Most commonly, a feedback resistor 70 is used. However, the feedback impedance element 70a may be formed by a capacitor or an inductor, or may be formed by combining a resistor, a capacitor or an inductor.

FIG. 18A shows a configuration in which a phase inversion circuit 80 is arranged in the latter stage of two phase shift circuits and corresponds to the oscillator 1d shown in FIG. 15 or the oscillator 1e shown in FIG. ing. As described above, when the phase inverting circuit 80 is arranged in the subsequent stage, a large output current can be taken out by giving the phase inverting circuit 80 a function as an output buffer.

FIG. 18B shows two phase shift circuits 10C and 10L.
A configuration in which the phase inversion circuit 80 is arranged between the two phase shift circuits 30L and 30C is shown. in this way,
When the phase inversion circuit 80 is arranged in the middle, mutual interference between the two phase shift circuits can be completely prevented.

FIG. 18C shows two phase shift circuits 10C and 10L.
The configuration is shown in which the phase inversion circuit 80 is arranged in the preceding stage or in the preceding stage of the two phase shift circuits 30L and 30C. As described above, when the phase inversion circuit 80 is arranged in the preceding stage, the influence of the feedback impedance element 70a on the preceding phase shift circuit can be minimized.

The phase shift circuit shown in each of the above-described embodiments includes the variable resistor 16 or 36. These variable resistors 16 and 36 are specifically junction type or MO type.
It can be realized by using an S-type FET.

In FIG. 19, the variable resistor 16 or 36 in the two types of phase shift circuits 10C or 30C having a CR circuit is FE.
It is a figure which shows the structure of the phase shift circuit when it replaces with T.
In the same figure (A), the variable resistor 16 is FE in the phase shift circuit 10C.
The configuration replaced with T is shown. FIG. 1B shows a configuration in which the variable resistor 36 is replaced with an FET in the phase shift circuit 30C.

Similarly, FIG. 20 shows a variable resistor 16 or 36 in two types of phase shift circuits 10L or 30L having an LR circuit.
It is a figure which shows the structure of the phase shift circuit when replacing with FET. In the same figure (A), in the phase shift circuit 10L, the variable resistor 16
A configuration in which is replaced with an FET is shown. FIG. 2B shows a configuration in which the variable resistor 36 in the phase shift circuit 30L is replaced with an FET.

As described above, the channel formed between the source and drain of the FET is used as a resistor to make the variable resistance variable.
When used in place of 16 or 36, the gate voltage can be variably controlled to arbitrarily change the channel resistance within a certain range to change the amount of phase shift in each phase shift circuit. Therefore, in each oscillator, the frequency at which the amount of phase shift of the signal that goes around once becomes 0 ° can be changed, so that the oscillation frequency of the oscillator can be arbitrarily changed.

In each of the phase shift circuits shown in FIG. 19 or 20, the variable resistor is composed of one FET, that is, a p-channel or n-channel FET.
The channel FET and the n-channel FET may be connected in parallel to form one variable resistor, and gate voltages of equal magnitude but different polarities may be applied between the gate of each FET and the substrate. When changing the resistance value, the magnitude of the gate voltage may be changed. in this way,
By forming a variable resistance by combining two FETs, the non-linear region of the FETs can be improved, and therefore distortion of the sine wave oscillation output can be reduced.

In the phase shift circuit 10C or 30C shown in each of the above-mentioned embodiments, the resistance value of the variable resistor 16 or 36 connected in series with the capacitor 14 or 34 is changed to change the amount of phase shift. Although the overall oscillation frequency is changed by means of, the capacitors 14, 34 may be formed of variable capacitance elements, and the overall oscillation frequency may be changed by changing the capacitance thereof.

FIG. 21 is a diagram showing the structure of the phase shift circuit in the case where the capacitor 14 or 34 in the phase shift circuit 10C or 30C shown in each embodiment is replaced with a variable capacitance diode. FIG. 1A shows the phase shift circuit 10 shown in FIG.
In C, a configuration is shown in which the variable resistor 16 is replaced with a fixed resistor and the capacitor 14 is replaced with a variable capacitance diode. 9B shows a configuration in which the variable resistor 36 is replaced with a fixed resistor and the capacitor 34 is replaced with a variable capacitance diode in the phase shift circuit 30C shown in FIG. 9 and the like.

21 (A) and (B), the capacitor connected in series to the variable capacitance diode blocks its direct current when a reverse bias voltage is applied between the anode and cathode of the variable capacitance diode. The impedance is extremely small at the operating frequency, that is, it has a large capacitance. In addition, since the potentials at both ends of the capacitor shown in FIGS. 21A and 21B are constant when the DC component is seen, by applying a reverse bias voltage larger than the amplitude of the AC component between the anode and the cathode, Each variable capacitance diode can function as a variable capacitance capacitor.

As described above, the capacitor 14 or 34 is composed of the variable capacitance diode, and the magnitude of the reverse bias voltage applied between the anode and the cathode thereof is variably controlled so that the capacitance of the variable capacitance diode falls within a certain range. The amount of phase shift in each phase shift circuit can be changed by changing the value arbitrarily. Therefore, it is possible to change the frequency at which the amount of phase shift of the signal that goes round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator.

By the way, although the variable capacitance diode is used as the variable capacitance element in FIGS. 21A and 21B described above, the FET in which the source and the drain are connected to a fixed potential in a direct current and the variable voltage is applied to the gate is used. May be used. As described above, since the potentials at both ends of the variable capacitance diodes shown in FIGS. 21A and 21B are fixed in terms of direct current, these variable capacitance diodes are connected to the FE described above.
It is only necessary to replace it with T, and the gate capacitance, that is, the electrostatic capacitance of the FET can be changed by changing the voltage applied to the gate.

Further, in FIGS. 21A and 21B described above, only the capacitance of the variable capacitance diode is changed, but the resistance value of the variable resistor 16 or 36 may be changed at the same time. FIG. 21C shows a configuration in which the variable resistor 16 is used and the capacitor 14 is replaced with a variable capacitance diode in the phase shift circuit 10C shown in FIG. 1 and the like. Same figure
9D shows a configuration in which the variable resistor 36 is used and the capacitor 34 is replaced with a variable capacitance diode in the phase shift circuit 30C shown in FIG. 9 and the like. It goes without saying that the variable capacitance diode may be replaced with an FET having a variable gate capacitance.

Needless to say, the variable resistance shown in FIGS. 21C and 21D can be formed by utilizing the channel resistance of the FET as shown in FIG. In particular,
When a p-channel FET and an n-channel FET are connected in parallel to form one variable resistor and gate voltages of equal magnitude and different polarities are applied between the base and substrate of each FET, Since the nonlinear region can be improved, distortion of the sine wave oscillation output can be reduced.

As described above, even when the variable resistance and the variable capacitance element are combined to form the phase shift circuit, the resistance value of the variable resistance and the capacitance of the variable capacitance element can be arbitrarily changed within a certain range. The amount of phase shift in each phase shift circuit can be changed. Therefore, it is possible to change the frequency at which the amount of phase shift of the signal that goes round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator.

Similarly, the phase shift circuit 10L or 30L shown in each of the above-described embodiments is the inductor 17 or 37.
The overall oscillation frequency was changed by changing the resistance value of the variable resistance 16 or 36 connected in series with the variable resistance 16 or 36. It is also possible to change the whole oscillation frequency by changing.

FIG. 22 is a diagram showing the structure of the phase shift circuit when the inductor 17 or 37 in the phase shift circuit 10L or 30L shown in each embodiment is replaced with a variable inductor.

FIG. 16A shows the phase shift circuit 10 shown in FIG.
In L, a configuration is shown in which the variable resistor 16 is replaced with a fixed resistor and the inductor 17 is replaced with a variable inductor 17a. FIG. 1B shows a configuration in which the variable resistor 36 is replaced with a fixed resistor and the inductor 37 is replaced with a variable inductor 37a in the phase shift circuit 30L shown in FIG.

As described above, the inductor 17 or 37 can be replaced with the variable inductor 17a or 37a, and the inductance of the variable inductor 17a or 37a can be arbitrarily changed within a certain range to change the phase shift amount in each phase shift circuit.
Therefore, it is possible to change the frequency at which the amount of phase shift of the signal that goes round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency.

22A and 22B described above, only the inductance of the variable inductor 17a or 37a is changed, but the resistance value of the variable resistor 16 or 36 may be changed at the same time. FIG. 22C shows a configuration in which the variable resistor 16 is used and the inductor 17 is replaced with a variable inductor 17a in the phase shift circuit 10L shown in FIG. 9 and the like. FIG. 3D shows a configuration in which the variable resistor 36 is used and the inductor 37 is replaced with a variable inductor 37a in the phase shift circuit 30L shown in FIG.

Needless to say, the variable resistance shown in FIGS. 22C and 22D can be formed by utilizing the channel resistance of the FET as shown in FIG. In particular,
When a p-channel FET and an n-channel FET are connected in parallel to form one variable resistor and gate voltages of equal magnitude and different polarities are applied between the base and substrate of each FET, Since the nonlinear region can be improved, distortion of the sine wave oscillation output can be reduced.

As described above, even when the variable resistance and the variable inductor are combined to form the phase shift circuit, the resistance value of the variable resistor and the inductance of the variable inductor are arbitrarily changed within a certain range. The amount of phase shift at can be changed. Therefore, it is possible to change the frequency at which the amount of phase shift of the signal that goes round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency.

Besides using the variable resistance, variable capacitance element or variable inductor as described above, a plurality of resistors, capacitors or inductors having different element constants are prepared and the switch is switched to
One or a plurality of these elements may be selected. In this case, the element constants can be discontinuously switched by the number of elements to be connected and the connection method (serial connection, parallel connection, or a combination thereof) by switching the switches.

For example, instead of the variable resistance, the resistance value is R,
By preparing a plurality of 2n-th power series resistors such as 2R, 4R, ... And selecting one or an arbitrary plurality of resistors and connecting them in series, it is possible to reduce the switching of resistance values at even intervals. Can be easily realized with. Similarly,
In place of the capacitors, a plurality of n-th power series capacitors having capacitances of C, 2C, 4C, ... Are prepared, and one or arbitrary plural capacitors are selected and connected in parallel. Switching of the electrostatic capacitance of the interval can be easily realized with a smaller number of elements.

FIG. 23 shows the variable inductor shown in FIG.
It is a figure which shows the specific example of 17a, and the outline of the planar structure formed on the semiconductor substrate is shown. The structure of the variable inductor 17a shown in FIG.
It can also be applied to a.

The variable inductor 17a shown in the figure is a spiral inductor conductor 112 formed on a semiconductor substrate 110.
And a control conductor 11 formed so as to circulate the outer periphery thereof.
4 and an insulating magnetic body 118 formed so as to cover both the inductor conductor 112 and the control conductor 114.

The control conductor 114 described above is the control conductor 114.
A variable voltage power supply 116 is connected to both ends of the variable voltage power supply 116 to change the bias current flowing through the control conductor 114 by variably controlling the DC bias voltage applied by the variable voltage power supply 116. be able to.

As the semiconductor substrate 110, for example, an n-type silicon substrate (n-Si substrate) or another semiconductor material (for example, amorphous material such as germanium or amorphous silicon) is used. The inductor conductor 112 is formed by spirally forming a metal thin film such as aluminum or gold or a semiconductor material such as polysilicon.

The semiconductor substrate 110 shown in FIG. 23 is formed with other components of the oscillator shown in FIG. 9 and the like in addition to the variable inductor 17a.

FIG. 24 shows the variable inductor shown in FIG.
It is a figure which shows the shape of the inductor conductor 112 and the control conductor 114 of 17a in more detail.

As shown in the figure, the inductor conductor 112 located on the inner peripheral side has a predetermined number of turns (for example, about 4 turns).
Is formed in a spiral shape, and two terminal electrodes 122 and 124 are connected to both ends thereof. Similarly, the control conductor 114 located on the outer peripheral side is formed in a spiral shape with a predetermined number of turns (for example, about 2 turns), and the control conductor 114 has two ends at both ends.
Two control electrodes 126 and 128 are connected.

FIG. 25 is an enlarged sectional view taken along the line AA of FIG. 24, and shows a cross section of the insulating magnetic body 118 including the inductor conductor 112 and the control conductor 114.

As shown in the figure, the inductor conductor 112 and the control conductor 114 are formed on the surface of the semiconductor substrate 110 via the insulating magnetic material film 118a, and the insulating magnetic material film 118b is further formed on the surface thereof. Is coated. The insulating magnetic material 118 shown in FIG. 23 is formed by these two magnetic material films 118a and 118b.

For example, as the magnetic films 118a and 118b,
Various magnetic films such as gamma-ferrite and barium-ferrite can be used. Various kinds of materials and forming methods of these magnetic films can be considered. For example, a method of forming a magnetic film by vacuum vapor deposition of FeO or the like, other molecular beam epitaxy method (MBE method), chemical vapor deposition, etc. There is a method of forming a magnetic film by using a phase growth method (CVD method), a sputtering method or the like.

The insulating film 130 is made of a non-magnetic material, and covers the winding portions of the inductor conductor 112 and the control conductor 114. By eliminating the magnetic films 118a and 118b between the winding portions in this way, the leakage magnetic flux generated between the winding portions can be minimized, so that the magnetic flux generated by the inductor conductor 112 can be effectively used. As a result, the variable inductor 17a having a large inductance can be realized.

As described above, in the variable inductor 17a shown in FIG. 23 and the like, the insulating magnetic material 118 (magnetic material films 118a and 118b) is formed so as to cover the inductor conductor 112 and the control conductor 114, By controlling the DC bias current flowing through the control conductor 114 variably, the above-mentioned insulating magnetic material is used.
The saturation magnetization characteristic of the inductor conductor 112 having the magnetic path 118 changes, and the inductance of the inductor conductor 112 changes.

Therefore, the inductance itself of the inductor conductor 112 can be directly changed, and the inductor conductor 112 can be formed on the semiconductor substrate 110 by using the thin film forming technique or the semiconductor manufacturing technique, which facilitates the production.
Further, since it is possible to form other components such as the oscillator 1 on the semiconductor substrate 110, it is suitable when the whole oscillator of each embodiment is integrally formed by integration.

The variable inductor 17 shown in FIG.
As shown in FIG. 26 or FIG. 27, a may be formed by alternately winding the inductor conductor 112 and the control conductor 114, or may be formed by stacking the inductor conductor 112 and the control conductor 114. In either case, the control conductor 11
The saturation magnetization characteristic of the insulating magnetic body 118 can be changed by changing the DC bias current flowing through the inductor 4, and the inductance of the inductor conductor 112 can be changed within a certain range.

The variable inductor 17 shown in FIG.
Although a has been described by taking the case where the inductor conductor 112 and the like are formed on the semiconductor substrate 110 as an example, it may be formed on various insulating or conductive substrates such as ceramics.

Although the insulating material is used for the magnetic films 118a and 118b, a conductive material such as metal powder (MP) may be used. However, if such a conductive magnetic film is used by replacing it with the above-mentioned insulating magnetic film 118a or the like, each winding portion of the inductor conductor 112 or the like is short-circuited and does not function as an inductor conductor.
It is necessary to electrically insulate each inductor conductor from the conductive magnetic film. As this insulating method, a method of forming an insulating oxide film by oxidizing the inductor conductor 112 or the like,
There is a method of forming a silicon oxide film or a nitride film by a chemical vapor deposition method or the like.

In particular, a conductive material such as metal powder has a large magnetic permeability as compared with an insulating material such as gamma-ferrite, and therefore has an advantage that a large inductance can be secured.

In addition, the variable inductor 17 shown in FIG.
In the case of a, the whole of both the inductor conductor 112 and the control conductor 114 is covered with the insulating magnetic material 118, but only part of them may be covered to form the magnetic path.

FIG. 28 is a diagram showing a variable inductor in which the insulating magnetic material 118 is partially formed. As shown in the figure, the insulating magnetic material 118 is used as the inductor conductor 112 and the control conductor.
It is formed so as to cover a part of 114, and a magnetic path is formed by this partially formed insulating magnetic body 118. In this way, when the insulating magnetic body (or the conductive magnetic body may be used) 118 that serves as a magnetic path is partially formed, the magnetic flux is generated by the inductor conductor 112 and the control conductor 114 due to the narrowed magnetic path. It becomes easy to saturate. Therefore, even when a small bias current is passed through the control conductor 114, the magnetic flux is saturated, and the inductance of the inductor conductor 112 can be changed by variably controlling the small bias current. Therefore, the structure of the control system can be simplified.

The variable inductor 17 shown in FIG.
The conductor a is formed by concentrically winding the inductor conductor 112 and the control conductor 114. These conductors are formed at adjacent positions on the surface of the semiconductor substrate 110, and an insulating or conductive magnetic material is formed between them. You may magnetically couple by the magnetic path formed of the body.

FIG. 29 is a variable inductor in which an inductor conductor and a control conductor are formed adjacent to each other.
It is a top view which shows the outline of 17b.

The variable inductor 17b shown in the figure is a spiral inductor conductor 112 formed on a semiconductor substrate 110.
a, a spiral-shaped control conductor 114a formed at a position adjacent to the inductor conductor 112a, and an insulating magnetic body (or conductive material) formed so as to cover each spiral center of the inductor conductor 112a and the control conductor 114a. Magnetic material) 119
It is comprised including.

Similar to the variable inductor 17a shown in FIG. 23, the control conductor 114a is connected to a variable voltage power supply 116 for applying a variable bias voltage across the control conductor 114a. By variably controlling the applied bias voltage, it is possible to change a predetermined bias current flowing through the control conductor 114a.

FIG. 30 shows the variable inductor shown in FIG.
It is the figure which showed in more detail the shape of the inductor conductor 112a and the control conductor 114a of 17b.

As shown in the figure, the inductor conductor 112a
Is formed in a spiral shape with a predetermined number of turns (for example, about 4 turns), and two terminal electrodes 122 and 124 are provided at both ends thereof.
Is connected. Similarly, the control conductor 114a arranged adjacent to the inductor conductor 112a is formed in a spiral shape with a predetermined number of turns (for example, about 2 turns),
Two control electrodes 126 and 128 are connected to both ends thereof.

FIG. 31 is an enlarged sectional view taken along the line BB of FIG. 30, showing a cross section of the insulating magnetic body 119 including the inductor conductor 112a and the control conductor 114a.

As shown in the figure, an insulating magnetic film 119a and an insulating non-magnetic film 132 are formed on the surface of the semiconductor substrate 110, and the inductor conductor 112a and the control conductor 114a are formed on the surface thereof. Has been formed. Then, an insulating magnetic film 119 is further formed on the surface of the inductor conductor 112a and the control conductor 114a so as to penetrate the central portions thereof.
b is formed by coating. These two magnetic films 119
inductor conductor 112a and control conductor 11 by a and 119b.
An annular magnetic body 119 is formed which serves as a common magnetic path for 4a.

The insulating non-magnetic film shown in FIG.
Reference numeral 132 has a thickness substantially the same as that of the magnetic film 119a, and is for forming the inductor conductor 112a and the control conductor 114a at substantially the same height on their surfaces. Therefore, if a slight step may occur in the inductor conductor 112a and the control conductor 114a, one of the inductor conductor 112a and the control conductor 114a may be directly formed on the semiconductor substrate 110 without forming the nonmagnetic film 132. You may make it form a part.

Further, between the inductor conductor 112a and the control conductor 114a on the surface of the magnetic film 119a,
Similar to the variable inductor 17a shown in FIG.
0 is formed. By partially filling the insulating film 130 and excluding the magnetic films 119a and 119b between the winding portions in this manner, the leakage flux generated between the winding portions can be minimized. Most of the magnetic flux generated by 112a is magnetic film 119a, 119a.
It comes to intersect with the control conductor 114a through b. Therefore, by reducing the leakage magnetic flux, a large inductance can be obtained by effectively utilizing the magnetic flux generated by the inductor conductor 112a.

As described above, the variable inductor 17b described above is used.
Is an annular insulating magnetic material 119 (magnetic material film 119) so as to pass through the spiral centers of the inductor conductor 112a and the control conductor 114a.
a, 119b) are formed. Therefore, by variably controlling the DC bias current flowing through the control conductor 114a, the saturation magnetization characteristic of the inductor conductor 112a having the magnetic body 119 as a magnetic path changes, and the inductor conductor 112a
The inductance of the element also changes.

When the oscillator 1 of each of the above-described embodiments is formed on a semiconductor substrate, it is not possible to set a very large capacitance as the capacitor 14 or 34 in the phase shift circuits 10C and 30C. Therefore, if the small capacitance of the capacitor actually formed on the semiconductor substrate can be apparently increased by devising the circuit, the time constant T is set to a large value to reduce the oscillation frequency. It is convenient for you.

FIG. 32 shows the phase shift circuit 10C shown in FIG.
It is a figure which shows the modification which comprised the capacitor 14 or 34 used for 30C not by a single element but by a circuit, and as an electrostatic capacitance conversion circuit which makes the electrostatic capacitance of the capacitor actually formed on a semiconductor substrate look large. Function. The entire circuit shown in FIG. 32 is the phase shift circuit 10C or 30.
It corresponds to the capacitor 14 or 34 included in C.

The capacitance conversion circuit 14a shown in FIG. 32 includes a capacitor 210 having a predetermined capacitance C0, two operational amplifiers 212 and 214, and four resistors 216, 218, 220 and 222. Has been done.

In the operational amplifier 212 in the first stage, a resistor 218 (whose resistance value is R18) is connected between the output terminal and the inverting input terminal, and the inverting input terminal is a resistor.
It is grounded through 216 (this resistance is R16).

Between the voltage E1 applied to the non-inverting input terminal of the first stage operational amplifier 212 and the voltage E2 appearing at the output terminal,

[Equation 36] There is a relationship. The first-stage operational amplifier 212 mainly functions as a buffer that performs impedance conversion, and the gain may be 1. R18 when the gain is 1
When / R16 = 0, that is, R16 is set to infinity (removing the resistor 216), or R18 is set to 0Ω (direct connection).

Further, the operational amplifier 214 of the second stage has a resistor 222 (this resistance value is set to R22 between the output terminal and the inverting input terminal).
And a resistor 220 (whose resistance value is R20) is connected between the inverting input terminal and the output terminal of the operational amplifier 212 described above, and the non-inverting input terminal is grounded. There is.

When the voltage appearing at the output terminal of the second stage operational amplifier 214 is E3, the voltage E3 appearing between this voltage E3 and the voltage E2 appearing at the output terminal of the first stage operational amplifier 212 is:

(37) There is a relationship. In this way, the second-stage operational amplifier 214 functions as an inverting amplifier, and the first-stage operational amplifier 212 is set in order to set its input side to high impedance.
Is used.

The non-inverting input terminal of the first-stage operational amplifier 212 and the second-stage operational amplifier 2 which are connected as described above are connected.
As described above, the capacitor 210 having a predetermined electrostatic capacity is connected between the 14 output terminals.

In the capacitance conversion circuit 14a shown in FIG. 32, if the transfer function of the entire circuit except the capacitor 210 is K4, the capacitance conversion circuit 14a can be represented by the system diagram shown in FIG. FIG. 34 is a system diagram in which this is converted by the Miller's theorem.

If the impedance Z0 shown in FIG. 33 is used to represent the impedance Z1 shown in FIG.

(38) Becomes Here, the capacitance conversion circuit 14a shown in FIG.
In the case of, the impedance Z0 = 1 / (jωC0), and by substituting this into the equation (38),

[Formula 39] C = (1-K4) C0 (40) In this equation (40), the capacitance C0 of the capacitor 210 in the capacitance conversion circuit 14a is apparently (1-
K4) shows that it has doubled.

Therefore, when the gain K4 is negative, (1-K4) is always larger than 1, so that the electrostatic capacitance C0 can be changed to the larger one.

By the way, the gain of the amplifier in the capacitance conversion circuit 14a shown in FIG. 32, that is, the operational amplifier 212.
The gain K4 of the amplifier constructed by the whole of
From formula and (37),

[Formula 41] Becomes Substituting equation (41) into equation (40),

(Equation 42) Becomes Therefore, by setting the resistance value of the four resistors 216, 218, 220, 222 to a predetermined value, the two terminals 22
The apparent capacitance C between 4 and 226 can be increased.

When the gain of the amplifier by the first stage operational amplifier 212 is 1, that is, when R16 is set to infinity (resistor 216 is removed) or R18 is set to 0Ω as described above, R18 / R16 If = 0, then (4
Equation 2 is simplified to

[Equation 43] Becomes

FIG. 35 is a diagram showing the configuration of the capacitance conversion circuit 14b in which the resistor 216 connected to the inverting input terminal of the first operational amplifier 212 shown in FIG. 32 is removed. In this case, since the electrostatic capacitance C appearing between the terminals 224 and 226 is expressed by the equation (43), C0 can be changed to a larger value by changing the ratio of R22 and R20.

As described above, the capacitance conversion circuit 14 described above is used.
a or 14b is a resistance ratio of the resistance 220 and the resistance 222 R22 /
By changing R20 or the resistance ratio R18 / R16 of the resistor 216 and the resistor 218, the electrostatic capacitance C0 of the capacitor 210 actually formed on the semiconductor substrate can be converted to an apparently larger one. Therefore, when the entire oscillator 1 or the like shown in FIG. 1 or the like is formed on a semiconductor substrate, a capacitor 210 having a small capacitance C0 is formed on the semiconductor substrate, and the capacitor 210 shown in FIG. The circuit shown in FIG. 35 can be converted into a large capacitance C, which is convenient for integration.

Also, at least one of the resistors 216, 218, 220, 222 (at least one of the resistors 220, 222 in the case of the capacitance conversion circuit 14b shown in FIG. 35) is formed by a variable resistor. Therefore, specifically, the junction type or MOS type F
By connecting the ET or p-channel FET and the n-channel FET in parallel to form a variable resistance, it is possible to easily form a capacitor having a variable capacitance.
Therefore, by using this capacitance conversion circuit instead of the variable capacitance diode shown in FIG. 21, the phase shift amount can be arbitrarily changed within a certain range.
Therefore, it is possible to change the frequency at which the phase shift amount of the signal that makes one round in the oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator of each embodiment.

Since the first stage operational amplifier 212 is used as a buffer for increasing the input impedance as described above, the operational amplifier 212 may be replaced with an emitter follower circuit or a source follower circuit.

FIG. 36 is a diagram showing the configuration of the electrostatic capacity conversion circuit 14c using the emitter follower circuit in the first stage. The capacitance conversion circuit 14c shown in the figure includes an emitter follower circuit 22 including a first-stage operational amplifier 212 and two resistors 216 and 218 shown in FIG.
It has a configuration replaced with 8.

FIG. 37 is a diagram showing the configuration of the capacitance conversion circuit 14d using the source follower circuit in the first stage. The capacitance conversion circuit 14d shown in the figure has a configuration in which the first-stage operational amplifier 212 and the two resistors 216 and 218 shown in FIG. 32 are replaced with a source follower circuit 230 including an FET and a resistor.

Also, the capacitance conversion circuits 14c and 14 described above are used.
Each of d is a resistor 2 connected to the operational amplifier 214.
The point that the apparent electrostatic capacitance C between the terminals 224 and 226 can be arbitrarily changed by changing the resistance ratio of 20, 222 is the same as the electrostatic capacitance conversion circuit 14a shown in FIG. 32 and the like. . Therefore, at least one of the resistors 220 and 222 is
By replacing the junction-type or MOS-type FET or the variable resistance in which the p-channel FET and the n-channel FET are connected in parallel, a variable capacitance capacitor can be constructed. By using it instead of the variable capacitance diode shown in, the phase shift amount can be arbitrarily changed within a certain range.
Therefore, it is possible to change the frequency at which the amount of phase shift of the signal that makes one round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator of each embodiment.

By the way, in FIGS. 32 to 37 described above,
The case where the apparent capacitance is made larger than the capacitance actually possessed by the capacitor element by combining the amplifier having the predetermined gain and the capacitor has been described, but an inductor is used instead of the capacitor, and this inductor is It is also possible to increase the apparent inductance.

That is, when the impedance Z0 shown in FIG. 33 is used to express the impedance Z1 shown in FIG. 34 as described above, the expression (38) is obtained. Here, in the case of the inductor having the inductance L0, the impedance Z0 = jωL0, which is substituted into the equation (38),

[Equation 44]

[Equation 45] Becomes This equation (45) shows that the inductance actually possessed by the inductor element is apparently 1 / (1-K4) times, and apparently when the gain K4 is set between 0 and 1. It can be seen that the inductance of is increased.

FIG. 38 shows the phase shift circuit 10L shown in FIG.
It is a figure which shows the modification which comprised the inductor 17 or 37 used for 30L not by a single element but by a circuit, and the inductance conversion circuit which makes the inductance of an inductor element (inductor conductor) actually formed on a semiconductor substrate look large. Function as. Note that the entire circuit shown in FIG. 38 is an inductor included in the phase shift circuits 10L and 30L.
It corresponds to 17 or 37.

The inductance conversion circuit 17c shown in FIG.
Is an inductor 260 having a predetermined inductance L0
And two operational amplifiers 262 and 264 and two resistors 266 and 268
It is comprised including.

The operational amplifier 262 of the first stage is a non-inverting amplifier with a gain of 1 whose output terminal is connected to the inverting input terminal, and mainly functions as a buffer for impedance conversion. Similarly, the output terminal of the second-stage operational amplifier 264 is connected to the inverting input terminal, and functions as a non-inverting amplifier having a gain of 1. Further, a voltage dividing circuit by resistors 266 and 268 is inserted between these two non-inverting amplifiers.

By thus inserting the voltage dividing circuit, the gain of the entire amplifier including the two non-inverting amplifiers can be freely set between 0 and 1.

The inductance conversion circuit 17 shown in FIG.
In c, when the transfer function of the entire circuit (amplifier) excluding the inductor 260 is K4, this gain K4 is expressed by resistors 266 and 268.
Determined by the voltage division ratio of the voltage dividing circuit
If the respective resistance values are R66 and R68,

[Equation 46] Becomes Substituting this gain K4 into equation (45) and calculating the apparent inductance L,

[Equation 47] Becomes Therefore, the resistance ratio of resistors 266 and 268 is R68 / R66.
By increasing, the apparent inductance L between the two terminals 254 and 256 can be increased. For example, when R68 = R66, the inductance L can be doubled from L0 from the equation (47).

In this way, the above-described inductance conversion circuit 17c changes the voltage division ratio of the voltage dividing circuit inserted between the two non-inverting amplifiers to make the inductance L0 of the inductor 260 actually connected to appear. Can be made bigger. Therefore, when the entire oscillator 1 shown in FIG. 1 and the like is formed on a semiconductor substrate, an inductor 260 having a small inductance L0 is formed on the semiconductor substrate by a spiral conductor or the like. The inductance conversion circuit shown in FIG. 38 can convert to a large inductance L, which is convenient for integration. In particular, if a large inductance can be secured in this way, it becomes easy to reduce the oscillation frequency of the oscillator 1 shown in FIG. 1 to a relatively low frequency range. In addition, by integrating,
It is possible to reduce the mounting area of the entire oscillator and reduce the material cost.

Incidentally, in addition to the case where the voltage division ratio of the voltage dividing circuit by the resistors 266 and 268 is fixed, at least one of these two resistors 266 and 268 is formed by a variable resistor. Type FET or p-channel FET and n-channel FET are connected in parallel to form a variable resistance, and this voltage division ratio may be continuously changed. In this case, the operational amplifier 26 shown in FIG.
The gain of the entire amplifier including 2,264 changes,
The inductance L between the terminals 254 and 256 also changes continuously. Therefore, by using the inductance conversion circuit 17c instead of the variable inductor 17a shown in FIG. 22 or the like, the phase shift amount in each phase shift circuit can be arbitrarily changed within a certain range. Therefore, it is possible to change the frequency at which the phase shift amount of the signal that makes one round in the oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator described above.

Further, in the inductance conversion circuit 17c shown in FIG. 38, since the gain of the entire amplifier including the two operational amplifiers 262 and 264 is set to 1 or less, the whole is replaced with the emitter follower circuit or the source follower circuit. Good.

FIG. 39 is a diagram showing the structure of an inductance conversion circuit in which the entire amplifier including operational amplifiers 262 and 264 is replaced with an emitter follower circuit. The inductance conversion circuit 17d shown in FIG.
A bipolar transistor 278 to which 4 and 276 are connected, a voltage dividing point by these two resistors 274 and 276, and a transistor 278.
It is configured to include an inductor 260 connected to the base of the capacitor and a capacitor 280 for blocking a direct current.
Inductor 260 Capacitor 280 inserted on one end side
Has an extremely small impedance at the operating frequency, that is, a large capacitance so as not to affect the frequency characteristics.

The gain of the above-described emitter follower circuit is determined mainly by the resistance ratio of the two resistors 274 and 276, and the gain is always less than 1. Therefore, as can be seen from the equation (45), the inductor is actually used. Inductance L0 of 260
It can be made larger in appearance. Moreover, since only one emitter follower circuit is used, the circuit configuration can be simplified and the maximum operating frequency can be set high.

FIG. 39 (B) is a diagram showing a modification thereof,
The difference is that the two resistors 274 and 276 in FIG. 9A are replaced with a variable resistor 282. By using the variable resistor 282 in this way, the gain can be changed arbitrarily and continuously, so that the apparent inductance L can also be changed arbitrarily and continuously, and the inductance conversion circuit 17e can be changed. The variable inductor 17 shown in FIG.
By using it instead of a, the phase shift amount in each phase shift circuit can be arbitrarily changed within a certain range. Therefore, it is possible to change the frequency at which the phase shift amount of the signal that makes one round in the oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator described above.

In the inductance conversion circuit 17e shown in FIG. 39 (B), the two resistors 274 and 276 in FIG. 39 (A) are replaced by one variable resistor 282.
At least one of 74 and 276 may be configured by a variable resistor.

FIG. 40 is a circuit in which each of the inductance conversion circuits 17d and 17e shown in FIGS. 39A and 39B is realized by a source follower circuit, and the bipolar transistor 278 is replaced with a FET 284. 40A corresponds to FIG. 39A, and FIG. 40B corresponds to FIG. 39B.

FIG. 41 is a diagram showing a modification of the inductance conversion circuit 17c shown in FIG. The inductance conversion circuit 17f shown in FIG. 41 includes an npn-type bipolar transistor 286 and a resistor 290 connected to its emitter.
A pnp-type bipolar transistor 288, a resistor 292 connected to the emitter thereof, and an inductor 260 having an inductance L0.

The one transistor 286 and the resistor 290 described above
Form a first emitter follower circuit, and the other transistor 288 and the resistor 292 form a second emitter follower circuit, which are connected in cascade. Moreover,
npn-type transistor 286 and pnp-type transistor 2
Since the 88 is used, the base potential of the transistor 286, which is one end of the inductor 260, and the emitter potential of the transistor 288 can be set to be substantially the same, and a DC current blocking capacitor is not required.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention.

For example, the oscillator 1 and the like of the above-described embodiments include two phase shift circuits, but when the oscillation frequency is variable, the CR circuit or LR circuit included in both phase shift circuits is used. In addition to the case of changing at least one element constant of the resistance and the capacitor or the inductor which configures, the case of changing at least one element constant of the resistor, the capacitor and the inductor which configure the CR circuit or the LR circuit included in one phase shift circuit, Conceivable. Alternatively, the variable resistors 16 and 36 in each phase shift circuit shown in FIG. 1 and the like may be replaced with resistors having a fixed resistance value to form an oscillator having a fixed oscillation frequency.

Further, in the above-described embodiment, a circuit with high stability can be constructed by constructing the phase shift circuits 10C, 10L, 30C, 30L using operational amplifiers. Since high performance offset voltage and voltage gain are not required when using, a differential input amplifier having a predetermined amplification degree may be used instead of the operational amplifier in each phase shift circuit. .

FIG. 42 is a circuit diagram in which a part necessary for the operation of the phase shift circuit of each embodiment is extracted from the configuration of the operational amplifier, and the whole operates as a differential input amplifier having a predetermined amplification degree. The differential input amplifier shown in the figure has a differential input stage 100 composed of FETs, a constant current circuit 102 for supplying a constant current to the differential input stage 100, and a predetermined bias voltage for the constant current circuit 102. Bias circuit 104 and differential input stage 100
And an output amplifier 106 connected to. As shown in the figure, the offset adjusting circuit and the like included in the actual operational amplifier can be omitted to simplify the configuration of the differential input amplifier. By thus simplifying the circuit, the upper limit of the operating frequency can be increased, and accordingly, the upper limit of the operating frequency of the oscillator 1 and the like configured using this differential input amplifier can be increased. it can.

In addition, the oscillator of each of the above-described embodiments is provided by one of the two phase shift circuits constituting the oscillator, or by the two phase shift circuits and the non-inverting circuit 50 or the phase inverting circuit 80. Although the sine wave signal is taken out from one circuit, the sine wave signal may be taken out from two circuits or three circuits forming the oscillator. In particular, when the time constants of the two phase shift circuits forming the oscillator are set to be the same, the phase shift amount in each phase shift circuit becomes 90 °, so two-phase outputs whose phases are shifted by 90 ° are generated. You can take it out. Also, two-phase outputs whose phases are mutually inverted can be taken out from the phase inversion circuit 80 and the phase shift circuit in the preceding stage.

[0234]

As is clear from the description based on each of the above embodiments, when the oscillation frequency is high, each element constituting the oscillator of the present invention can be formed by the integrated circuit manufacturing method. The oscillator can be miniaturized as an integrated circuit on a semiconductor wafer, and can be manufactured inexpensively by mass production. Further, the inductance of the inductor in each phase shift circuit can be converted to a larger one by using the inductance conversion circuit or the capacitance of the capacitor by using the capacitance conversion circuit, and the oscillation frequency is lowered. You can also

In particular, the channel between the source and drain of the FET is used as the variable resistance of the CR circuit or the LR circuit in each phase shift circuit, and the control voltage applied to the gate of this FET is changed to change the resistance of the channel. With this configuration, it is possible to avoid the influence of the inductance and the capacitance of the wiring that applies the control voltage, and it is possible to obtain an oscillator having ideal characteristics almost as designed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing the configuration of an oscillator according to a first embodiment of the invention,

FIG. 2 is a diagram showing an extracted configuration of a phase shift circuit in the preceding stage shown in FIG.

FIG. 3 is a vector diagram showing the relationship between the input / output voltage of the preceding phase shift circuit and the voltage appearing at a capacitor or the like;

FIG. 4 is a diagram showing an extracted configuration of a phase shift circuit at a subsequent stage shown in FIG.

FIG. 5 is a vector diagram showing a relationship between an input / output voltage of a subsequent phase shift circuit and a voltage appearing in an inductor,

FIG. 6 is a system diagram in which the entire two phase shift circuits are replaced with a circuit having a transfer function K1.

FIG. 7 is a system diagram obtained by converting the system shown in FIG. 6 by Miller's theorem,

FIG. 8 is a diagram showing a modification of the oscillator of the first embodiment,

FIG. 9 is a circuit diagram showing the configuration of an oscillator according to a second embodiment of the invention.

FIG. 10 is a diagram showing an extracted configuration of the phase shift circuit at the preceding stage shown in FIG. 9;

FIG. 11 is a vector diagram showing the relationship between the input / output voltage of the preceding phase shift circuit and the voltage appearing in the inductor,

12 is a diagram showing an extracted configuration of a phase shift circuit at a subsequent stage shown in FIG. 9,

FIG. 13 is a vector diagram showing the relationship between the input / output voltage of the subsequent phase shift circuit and the voltage appearing at a capacitor or the like;

FIG. 14 is a diagram showing a modification of the oscillator of the second embodiment,

FIG. 15 is a circuit diagram showing a configuration of an oscillator according to a third embodiment,

FIG. 16 is a circuit diagram showing a configuration of an oscillator according to a fourth embodiment,

FIG. 17 is a diagram showing a connection form of a phase shift circuit and a non-inverting circuit;

FIG. 18 is a diagram showing a connection form of a phase shift circuit and a phase inversion circuit;

FIG. 19 is a diagram showing a configuration of a phase shift circuit in which a variable resistance of the phase shift circuit is replaced with an FET,

FIG. 20 is a diagram showing a configuration of a phase shift circuit in which a variable resistance of the phase shift circuit is replaced with an FET,

FIG. 21 is a diagram showing a configuration of a phase shift circuit in which a capacitor of the phase shift circuit is replaced with a variable capacitance diode;

FIG. 22 is a diagram showing a configuration of a phase shift circuit in which the inductor of the phase shift circuit is replaced with a variable inductor;

FIG. 23 is a diagram showing an example of a variable inductor;

24 is a diagram showing in more detail the shapes of the inductor conductor and the control conductor of the variable inductor shown in FIG. 23;

25 is an enlarged sectional view taken along the line AA of FIG.

26 is a diagram showing a modification of the variable inductor shown in FIG. 23,

27 is a diagram showing a modification of the variable inductor shown in FIG. 23,

28 is a diagram showing a modification of the variable inductor shown in FIG. 23,

FIG. 29 is a view showing another example of the variable inductor,

30 is a diagram showing in more detail the shapes of the inductor conductor and the control conductor of the variable inductor shown in FIG. 29;

31 is an enlarged cross-sectional view taken along the line BB of FIG. 30,

FIG. 32 is a diagram showing a configuration of a capacitance conversion circuit that apparently increases the capacitance actually possessed by a capacitor;

33 is a diagram showing the circuit shown in FIG. 32 using a transfer function,

34 is a diagram in which the configuration shown in FIG. 33 is converted by the Miller's theorem,

35 is a diagram showing a configuration of a capacitance conversion circuit obtained by simplifying the circuit of FIG. 32;

FIG. 36 is a diagram showing a configuration of a capacitance conversion circuit using an emitter follower circuit in the first stage,

FIG. 37 is a diagram showing a configuration of a capacitance conversion circuit using a source follower circuit in the first stage,

FIG. 38 is a diagram showing the configuration of an inductance conversion circuit that apparently increases the inductance that the inductor actually has;

39 is a diagram showing the configuration of an inductance conversion circuit in which the entire amplifier including the two operational amplifiers included in FIG. 38 is replaced with an emitter follower circuit;

40 is a diagram showing a configuration in which the circuit of FIG. 39 is realized by a source follower circuit,

FIG. 41 is a view showing a modified example of the inductance conversion circuit,

FIG. 42 is a circuit diagram in which a portion necessary for the operation of the phase shift circuit of the present invention is extracted from the configuration of the operational amplifier,

FIG. 43 is a circuit diagram showing an example of a conventional sine wave oscillator,

FIG. 44 is a circuit diagram showing an example of a conventional sine wave oscillator.

[Explanation of symbols]

 1 Oscillator 10C, 30L Phase shift circuit 12, 32 Operational amplifier 14 Capacitor 16, 36 Variable resistance 37 Inductor 18, 20, 38, 40 Resistance 50 Non-inverting circuit 70 Feedback resistance 92 Output terminal

Claims (29)

[Claims] 1. A differential input amplifier to which one end of a first resistor is connected to an inverting input terminal and an AC signal is input via the first resistor, and an inverting input terminal of the differential input amplifier. A second resistor connected between the second resistor and the output terminal, and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, the third resistor and the capacitor. A first phase shifter circuit in which the connection part of is connected to the non-inverting input terminal of the differential input amplifier and one end of a first resistor is connected to the inverting input terminal, and an alternating current is supplied via the first resistor. A differential input amplifier to which a signal is input, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and a third resistor connected to the other end of the first resistor. And a series circuit composed of a resistor and an inductor of Includes anti and a second phase shift circuit connection portion of the inductor is connected to the non-inverting input terminal of said differential input amplifier, and connected in cascade said first and second phase shift circuit,
The output of the latter stage of the two phase shift circuits connected in cascade is fed back to the input side of the former stage, and the sine wave oscillation output is taken out from either of the first and second phase shift circuits. Oscillator. 2. The oscillator according to claim 1, wherein two-phase outputs are taken out from the two phase shift circuits. 3. A differential input amplifier to which one end of a first resistor is connected to an inverting input terminal and an AC signal is input via the first resistor, and an inverting input terminal of the differential input amplifier. A second resistor connected between the second resistor and the output terminal, and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, the third resistor and the capacitor. A first phase shifter circuit in which the connection part of is connected to the non-inverting input terminal of the differential input amplifier and one end of a first resistor is connected to the inverting input terminal, and an alternating current is supplied via the first resistor. A differential input amplifier to which a signal is input, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and a third resistor connected to the other end of the first resistor. And a series circuit composed of a resistor and an inductor of A second phase-shifting circuit in which a connecting portion of the resistance and the inductor is connected to a non-inverting input terminal of the differential input amplifier; and a non-inverting circuit that outputs the input AC signal without changing the phase, Each of the first and second phase shift circuits and the non-inverting circuit is cascade-connected, and the output of the final stage of the plurality of cascade-connected circuits is fed back to the input side of the first stage, An oscillator characterized by taking out a sine wave oscillation output from one of the circuits. 4. The oscillator according to claim 3, wherein two-phase outputs are taken out from the two phase shift circuits and the non-inverting circuit. 5. The method according to claim 1, wherein the reactance element formed of the capacitor or the inductor forming the series circuit and the third resistor are connected in a different manner in the two phase shift circuits. An oscillator characterized in that 6. A differential input amplifier to which one end of a first resistor is connected to an inverting input terminal and an AC signal is input via the first resistor, and an inverting input terminal of the differential input amplifier. A second resistor connected between the second resistor and the output terminal, and a series circuit including a third resistor and a capacitor connected to the other end of the first resistor, the third resistor and the capacitor. A first phase shifter circuit in which the connection part of is connected to the non-inverting input terminal of the differential input amplifier and one end of a first resistor is connected to the inverting input terminal, and an alternating current is supplied via the first resistor. A differential input amplifier to which a signal is input, a second resistor connected between the inverting input terminal and the output terminal of the differential input amplifier, and a third resistor connected to the other end of the first resistor. And a series circuit composed of a resistor and an inductor of A second phase-shifting circuit in which a connection part of the resistance and the inductor is connected to a non-inverting input terminal of the differential input amplifier; and a phase inverting circuit that inverts and outputs the phase of the input AC signal, Each of the first and second phase shift circuits and the phase inversion circuit is connected in cascade, and the output of the final stage of the plurality of circuits connected in cascade is fed back to the input side of the first stage, An oscillator characterized by taking out a sine wave oscillation output from one of the circuits. 7. The oscillator according to claim 6, wherein a two-phase output is taken out from the two phase shift circuits and the phase inverting circuit. 8. The method according to claim 6 or 7, wherein the reactance element formed of the capacitor or the inductor forming the series circuit and the third resistor are connected in the same manner in the two phase shift circuits. An oscillator characterized by. 9. The oscillator according to claim 1, wherein the differential input amplifier is an operational amplifier. 10. The oscillation frequency according to claim 1, wherein the third resistor included in at least one of the two phase shift circuits is formed by a variable resistor and the resistance value is changed. Oscillator characterized by changing. 11. The oscillator according to claim 10, wherein the variable resistance is formed by a channel of an FET, and a gate voltage is changed to change a channel resistance. 12. The channel according to claim 10, wherein the variable resistor is formed by connecting a p-channel type FET and an n-channel type FET in parallel, and changing the magnitude of the gate voltage of each FET having a different polarity. An oscillator characterized by changing resistance. 13. The oscillating frequency according to claim 1, wherein the capacitor included in one of the two phase shift circuits is formed of a variable capacitance element, and the capacitance is changed to change the oscillation frequency. An oscillator characterized in that. 14. The oscillator according to claim 13, wherein the variable capacitance element is formed of a variable capacitance diode whose reverse bias voltage can be changed or an FET whose gate capacitance can be changed by changing the gate voltage. 15. The oscillator according to claim 1, wherein an oscillation frequency is changed by changing an inductance of the inductor included in one of the two phase shift circuits. 16. The inductor according to claim 15, wherein the inductor is formed on the substrate in a substantially planar spiral shape, and the inductor is formed on the substrate substantially concentrically with the inductor conductor. A inductor for changing a direct-current bias current flowing through the control conductor by including a control conductor through which a predetermined direct-current bias current flows, and a magnetic body formed so as to cover the inductor conductor and the control conductor. An oscillator characterized by changing the inductance appearing at both ends of a conductor. 17. The inductor of the synthesizing means according to claim 15, wherein the inductor conductor is formed in a spiral shape in a substantially flat shape on a substrate, and is substantially flat at a position on the substrate adjacent to the inductor conductor. A control conductor, which is formed in a spiral shape and in which a predetermined DC bias current flows, and a magnetic body formed in an annular shape so as to penetrate through the spiral centers of the inductor conductor and the control conductor, An oscillator comprising: a DC bias current flowing through the control conductor to change an inductance appearing at both ends of the inductor conductor. 18. The method according to claim 1, wherein a plurality of resistors having a fixed resistance value are provided as the third resistors included in at least one of the two phase shift circuits, and are switched by switching. An oscillator characterized in that the oscillation frequency is changed by selectively connecting. 19. The capacitor according to claim 1, wherein the capacitors included in one of the two phase shift circuits include a plurality of capacitors having a fixed capacitance.
By selectively connecting by switching the switch,
An oscillator characterized by changing an oscillation frequency. 20. The inductor according to claim 1, wherein the inductor included in one of the two phase shift circuits has a plurality of inductors having a fixed inductance, and is selectively connected by switching a switch. An oscillator characterized by changing the oscillation frequency. 21. The capacitor according to claim 1, wherein the capacitor included in one of the two phase shift circuits is connected in parallel between an amplifier having a negative gain and an input / output of the amplifier. An oscillator characterized in that the capacitance seen from the input side of the amplifier is made larger than the capacitance actually possessed by the capacitor element by substituting the capacitor element. 22. The oscillator according to claim 21, wherein the oscillation frequency is changed by changing the gain of the amplifier to change the electrostatic capacitance viewed from the input side of the amplifier. 23. The inductor according to claim 1, wherein the inductor included in one of the two phase shift circuits has a gain set between 0 and 1 and an input / output of the amplifier. An oscillator characterized in that the inductance seen from the input side of the amplifier is made larger than the inductance actually possessed by the inductor element by replacing with an inductor element connected in parallel. 24. The oscillator according to claim 23, wherein the oscillation frequency is changed by changing the gain of the amplifier to change the inductance viewed from the input side of the amplifier. 25. An operational amplifier, a time constant circuit consisting of one of a resistor and a capacitor or an inductor to which an input AC signal is applied, and a signal generated in the time constant circuit, the non-inverting input of the operational amplifier. 1 having a circuit for inputting to a terminal, an input resistance connected to an inverting input terminal of the operational amplifier, to which an input signal is applied, and a feedback resistance connected between an output terminal and an inverting input terminal of the operational amplifier The phase-shift circuit of the stage, an operational amplifier, a time constant circuit composed of the other of the resistor and the capacitor or the inductor to which the input AC signal is applied, and the signal generated in the time constant circuit. A circuit for inputting to the non-inverting input terminal, an input resistance connected to the inverting input terminal of the operational amplifier, to which an input signal is applied, and the operational amplifier A second-stage phase shift circuit, which has a feedback resistor connected between the input terminal and the inverting input terminal, and shifts the input AC signal in a direction opposite to that of the first-stage phase shift circuit. An impedance element on the feedback side for returning the output of the phase shift circuit of the second stage to the input of the phase shift circuit of the first stage. 26. An operational amplifier, a time constant circuit composed of one of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a signal generated in the time constant circuit, the non-inverting input of the operational amplifier. 1 having a circuit for inputting to a terminal, an input resistance connected to an inverting input terminal of the operational amplifier, to which an input signal is applied, and a feedback resistance connected between an output terminal and an inverting input terminal of the operational amplifier The phase-shift circuit of the stage, an operational amplifier, a time constant circuit composed of the other of a resistor and a capacitor or an inductor to which the input AC signal is applied, and a signal generated in the time constant circuit, A circuit for inputting to the non-inverting input terminal, an input resistance connected to the inverting input terminal of the operational amplifier, to which an input signal is applied, and the operational amplifier A second-stage phase shift circuit, which has a feedback resistor connected between the input terminal and the inverting input terminal, and which shifts the input AC signal in the same direction as the second-stage phase shift circuit, A phase inverting circuit that inverts the phase of the output of one phase shifting circuit of the two-stage phase shifting circuit, and a closed circuit including the first and second phase shifting circuits and the phase inverting circuit. An impedance element formed on the feedback side, and an oscillator. 27. The oscillation frequency according to claim 25, wherein the resistance of the time constant circuit of the first-stage phase shift circuit and / or the resistance of the time constant circuit of the second-stage phase shift circuit is changed. An oscillator characterized by being adjusted. 28. The oscillator according to claim 25 or 26, wherein a resistor for adjusting an oscillation frequency is formed by a channel of an FET. 29. The oscillator according to claim 1, which is formed as a semiconductor integrated circuit.