WO1995034951A1

WO1995034951A1 - Oscillator

Info

Publication number: WO1995034951A1
Application number: PCT/JP1995/001179
Authority: WO
Inventors: Takeshi Ikeda; Tadataka Ohe
Original assignee: Takeshi Ikeda; Tadataka Ohe
Priority date: 1994-06-13
Filing date: 1995-06-13
Publication date: 1995-12-21
Also published as: AU2631295A

Abstract

An oscillator the oscillation of which can be adjusted over a wide range and which can stably operate and can be easily formed in an integrated circuit, comprises two phase shifting circuits (10C and 30C) each having a first serial circuit which divides the voltage of an inputted AC signal into about halves and which comprises two resistors, a second serial circuit which shifts the phase of the inputted AC signal by prescribed angle and which comprises a capacitor and a variable resistor, and a differential amplifier which performs prescribed amplification of the difference between the outputs of the first and second serial circuits, a noninverting circuit (50) connected to the input of the phase shifting circuit (10C), and a feedback resistor (70) which feeds back the signal outputted from the phase shifting circuit (30C) to the input of the noninverting circuit (50).

Description

Oscillator technology

The present invention relates to an oscillator which can be easily formed as an integrated circuit and whose oscillation frequency can be largely adjusted.

Background art

Light

Various oscillation circuits using an active element and a reactance element as a sine wave oscillator have been proposed and put into practical use. For example, as a sine wave oscillator, a Wien-bridge oscillator shown in FIG. 41 and a bridge T-type oscillator shown in FIG. 42 are conventionally known.

In the Wien-Pridge oscillator shown in Fig. 41, in order to change the frequency, the resistance of the variable resistor Rs, which forms a series circuit with the capacitor C, and the variable resistance Rp, which forms a parallel circuit with the capacitor C, change the frequency. The resistance value must be changed in conjunction with the resistance value.However, if an error occurs between the resistance values of the variable resistance Rs and the variable resistance Rp, the voltage input to the amplifier A will increase or decrease. Output fluctuates. When the oscillation output decreases, oscillation stops, and when the oscillation output increases, significant distortion occurs in the oscillation output.

Normally, it is difficult to stabilize the output fluctuation of a sine wave oscillator so as to reduce it, and the stabilization means adds nonlinearity to the amplitude characteristics of the amplifier, that is, the amplification varies depending on the magnitude of the output. That is, such a characteristic is added.

Adding such characteristics is not preferable because it deteriorates the linearity of the amplifier and the distortion of the output waveform.

In addition, it is particularly difficult to change the variable resistor Rs and variable resistor Rp while keeping the resistance ratio constant, when the circuit is integrated and the variable resistor is externally changed by a voltage control method. .

Not only Wien and Bridge type oscillators, but also the T-type oscillator shown in Fig. 42 The same can be said for a phase shift type oscillator.

Furthermore, it is difficult to form a variable frequency oscillator that can greatly adjust the oscillation frequency using an integrated circuit.

Therefore, the present invention has been conceived to solve such a problem. Disclosure of the invention

In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit comprising a third resistor and a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a second series circuit constituting the second series circuit. A differential amplifier that amplifies a difference between a third resistor and a potential at a connection point between the cano and the °-タ with a predetermined amplification degree and outputs the amplified signal, and the two cascade-connected two The output of the subsequent stage of the phase shift circuit is fed back to the input side of the previous stage, and the sine wave oscillation output is extracted from one of the two phase shift circuits. In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit comprising a third resistor and a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. And a differential amplifier that amplifies the difference between the resistance of the resistor and the potential of the connection point of the capacitor with a predetermined amplification degree and outputs the amplified signal, and outputs the input AC signal without changing the phase. A non-inverting circuit, cascade-connecting each of the two phase-shifting circuits and the non-inverting circuit, and feeding back the output of the last stage among the plurality of cascaded circuits to the input side of the first stage. From any of these circuits A sinusoidal oscillation output is obtained.

In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit including a third resistor and an intagter, and a potential at a connection point of the first and second resistors forming the first series circuit and the second series circuit. A differential amplifier that amplifies a difference between a potential of a connection point of the inductor and the third resistor forming a circuit with a predetermined amplification degree and outputs the amplified signal, and that is connected in cascade. The output of the subsequent stage of the two phase shift circuits is fed back to the input side of the previous stage, and the sine wave oscillation output is extracted from one of the two phase shift circuits. In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit composed of a third resistor and an intagter; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. And a differential amplifier that amplifies the difference between the resistance of the above-mentioned resistor and the potential at the connection point of the above-mentioned inqta at a predetermined amplification degree, and outputs the same without changing the phase of the input AC signal. A non-inverting circuit, cascade-connecting each of the two phase-shifting circuits and the non-inverting circuit, and feeding back the output of the last stage among the plurality of cascaded circuits to the input side of the first stage. From any of these circuits A sinusoidal oscillation output is obtained.

In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit comprising a third resistor and a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. A first phase shift circuit comprising a differential amplifier for amplifying and outputting a difference between the resistance of the capacitor and the potential of the connection point of the capacitor at a predetermined amplification factor, and an input AC signal applied to both ends, A first series circuit consisting of first and second resistors having substantially equal values, a second series circuit consisting of a third resistor and an intagter, to which the AC signal is applied to both ends, and a first series circuit The potential at the connection point of the first and second resistors constituting the circuit And a differential amplifier configured to amplify a difference between a potential of a connection point of the inductor and the third resistor constituting the second series circuit with a predetermined amplification degree and output the amplified result. The first and second phase-shift circuits connected in cascade are fed back to the input side of the previous-stage to the input side of the previous stage, and a sine wave oscillation is performed from one of the first and second phase-shift circuits. The output is retrieved.

In the oscillator according to the present invention, the input AC signal is applied to both ends, and the resistance value is A first series circuit comprising substantially equal first and second resistors; a second series circuit comprising a third resistor and a capacitor to which the AC signal is applied to both ends; and a first series circuit comprising: The difference between the potential of the connection point of the first and second resistors that constitutes and the potential of the connection point of the third resistor and the capacitor that make up the second series circuit is amplified at a predetermined amplification degree. A first phase shift circuit including a differential amplifier for outputting, a first series circuit including first and second resistors to which an input AC signal is applied to both ends and having substantially equal resistance values; An AC signal is applied to both ends, a second series circuit including a third resistor and an intagter, and a potential at a connection point of the first and second resistors forming the first series circuit and the second series circuit. The voltage at the connection point between the third resistor and the inductor forming a series circuit And a non-inverting circuit that outputs the same without changing the phase of the input AC signal. Each of the first and second phase shift circuits and the non-inverting circuit are cascaded, and the output of the last stage among the plurality of cascade-connected circuits is fed back to the input side of the first stage. The sine wave oscillation output is extracted from either of the above. .

In each of the oscillators described above, the total amount of phase shift is 0 ° by the entire two phase shift circuits or the entire two phase shift circuits and the non-inverting circuit, and the amplification of each circuit is adjusted. Sine wave oscillation is performed by setting the loop gain to 1 or more.

In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit comprising a third resistor and a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. And a differential amplifier that amplifies the difference between the potential of the resistor and the potential of the connection point of the capacitor with a predetermined amplification degree and outputs the result, and inverts the phase of the input AC signal and outputs the inverted signal. A phase inversion circuit, cascade-connecting each of the two phase-shift circuits and the phase-inversion circuit, and feeding back the output of the last stage of the plurality of cascade-connected circuits to the input side of the first stage. Any of these multiple circuits A sine wave oscillation output is extracted from the output. In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit composed of a third resistor and an intagter; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. And a differential amplifier that amplifies the difference between the resistance of the resistor and the potential of the connection point of the inductor with a predetermined amplification factor and outputs the amplified signal, and inverts and outputs the phase of the input AC signal. A phase inversion circuit, cascade-connecting each of the two phase-shift circuits and the phase-inversion circuit, and feeding back the output of the last stage of the plurality of cascade-connected circuits to the input side of the first stage. Any of these multiple circuits A sine wave oscillation output is extracted from the output.

In the oscillator according to the present invention, an input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends. A second series circuit comprising a third resistor and a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third series circuit constituting the second series circuit. A first phase shift circuit comprising a differential amplifier for amplifying and outputting a difference between the resistance of the capacitor and the potential of the connection point of the capacitor at a predetermined amplification factor, and an input AC signal applied to both ends, A first series circuit consisting of first and second resistors having substantially equal values, a second series circuit consisting of a third resistor and an intagter, to which the AC signal is applied to both ends, and a first series circuit The potential at the connection point of the first and second resistors constituting the circuit And a differential amplifier configured to amplify a difference between a potential of a connection point of the inductor and the third resistor constituting the second series circuit with a predetermined amplification degree and output the amplified result. And a phase inversion circuit that inverts the phase of the input AC signal and outputs the inverted signal, and cascade-connects each of the first and second phase-shift circuits and the phase-inversion circuit. The output of the last stage in the plurality of circuits is fed back to the input side of the first stage, and the sine wave oscillation output is extracted from any of the plurality of circuits.

In each of the oscillators described above, the sum of the phase shift amounts is 0 ° due to the entire two phase shift circuits and the phase inversion circuit, and the sine is adjusted by adjusting the amplification of each circuit to make the loop gain 1 or more. Wave oscillation is performed. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a circuit diagram showing a first embodiment of the oscillator of the present invention,

FIG. 2 is a circuit diagram showing the configuration of the phase shift circuit of the preceding stage shown in FIG. 1,

Fig. 3 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit shown in Fig. 2 and the voltage appearing on capacitors and the like.

FIG. 4 is an equivalent circuit diagram of the phase shift circuit shown in FIG. 2,

FIG. 5 is a circuit diagram showing the configuration of the subsequent phase shift circuit shown in FIG. 1,

FIG. 6 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit shown in FIG.

FIG. 7 is an equivalent circuit diagram of the phase shift circuit shown in FIG. 5,

FIG. 8 is a circuit diagram showing the oscillator of the present invention using a transfer function K1, FIG. 9 is a circuit diagram obtained by converting the circuit shown in FIG. 8 by Miller's theorem, and FIG. The figure is a circuit diagram showing a second embodiment of the oscillator of the present invention,

FIG. 11 is a circuit diagram showing the configuration of the phase shift circuit of the preceding stage shown in FIG. 10;

Fig. 12 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit shown in Fig. 11 and the voltage appearing in inductors, etc.

FIG. 13 is an equivalent circuit diagram of the phase shift circuit shown in FIG. 11,

FIG. 14 is a circuit diagram showing the configuration of the subsequent phase shift circuit shown in FIG. 10;

FIG. 15 is a vector diagram showing the relationship between the input / output voltage of the phase shift circuit shown in FIG.

FIG. 16 is an equivalent circuit diagram of the phase shift circuit shown in FIG.

FIG. 17 is a circuit diagram showing a third embodiment of the oscillator of the present invention,

FIG. 18 is a circuit diagram showing a fourth embodiment of the oscillator of the present invention,

FIG. 19 is a circuit diagram showing a fifth embodiment of the oscillator of the present invention,

FIG. 20 is a circuit diagram showing a sixth embodiment of the oscillator of the present invention,

FIG. 21 is a circuit diagram showing a seventh embodiment of the oscillator of the present invention,

FIG. 22 is a circuit diagram showing an eighth embodiment of the oscillator of the present invention,

FIG. 23 is a circuit diagram showing a ninth embodiment of the oscillator of the present invention, FIG. 24 is a circuit diagram showing a tenth embodiment of the oscillator according to the present invention;

FIG. 25 is a circuit diagram showing specific examples of a non-inverting circuit and a phase inverting circuit.

FIG. 26 is a block diagram showing the connection between the phase shift circuit and the non-inverting circuit.

Fig. 27 is a block diagram showing the connection between the phase shift circuit and the phase inversion circuit, and Fig. 28 shows the configuration of the phase shift circuit in which the variable resistor of the CR circuit in the phase shift circuit is replaced with an FET. circuit diagram,

FIG. 29 is a circuit diagram showing a configuration of a phase shift circuit in which the variable resistor of the LR circuit in the phase shift circuit is replaced with FET.

FIG. 30 is a circuit diagram showing a configuration of a phase shift circuit in which a capacitor of a CR circuit in the phase shift circuit is replaced with a variable capacitance diode;

FIG. 31 is a circuit diagram showing a configuration of a capacitance conversion circuit used in the oscillator of the present invention. FIG. 32 is a diagram showing the capacitance conversion circuit shown in FIG. 31 using a transfer function K4. circuit diagram,

FIG. 33 is a circuit diagram obtained by converting the circuit shown in FIG. 32 by Miller's theorem, FIG. 34 is a simplified circuit diagram of the capacitance conversion circuit shown in FIG. 31, and FIG. The figure is a circuit diagram showing the configuration of a capacitance conversion circuit using an emitter emitter follower circuit in the first stage,

FIG. 36 is a circuit diagram showing a configuration of a capacitance conversion circuit using a source follower circuit in the first stage,

FIG. 37 is a circuit diagram showing a configuration of an inductance conversion circuit used in the oscillator of the present invention.

FIG. 38 is a circuit diagram showing a configuration of an inductance conversion circuit in which the entire amplifier including the two operational amplifiers included in FIG. 37 is replaced with an emitter follower circuit;

FIG. 39 is a circuit diagram showing a configuration in which the inductance conversion circuit of FIG. 38 is realized by a source follower circuit;

FIG. 40 is a circuit diagram showing another example of the inductance conversion circuit,

Fig. 41 is a circuit diagram showing a conventional sine wave oscillator,

FIG. 42 is a circuit diagram showing a conventional sine wave oscillator. BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment)

FIG. 1 is a circuit diagram showing a configuration of an oscillator according to a first embodiment. This oscillator 1 includes a non-inverting circuit 50 that outputs an input signal without changing its phase, and each of the oscillators 1 determines the phase of an input signal. Two phase shift circuits 10 C and 30 C that perform a total of 0 ° phase shift at a predetermined frequency by performing a quantitative shift, and the output of the phase shift circuit 30 C is fed back to the input side of the non-inverting circuit 50. A feedback resistor 70 is provided. This feedback resistor 70 has a finite resistance value from 0 Ω. The non-inverting circuit 50 operates as a buffer circuit, but may be omitted if attention is paid only to the basic operation of the oscillator. FIG. 2 is a circuit diagram extracted from the configuration of the preceding phase shift circuit 10C shown in FIG. 1. The phase shift circuit 10C converts the two-input differential voltage into a predetermined amplification factor (for example, And a differential amplifier 12 that amplifies the signal and outputs the amplified signal, and a capacitor 14 that shifts the phase of the signal input to the input terminal 22 by a predetermined amount and inputs the signal to the non-inverting input terminal of the differential amplifier 12. The variable resistor 16 and the resistors 18 and 20 which divide the voltage level to about 1/2 without changing the phase of the signal input to the input terminal 22 and input to the inverting input terminal of the differential amplifier 12 It is configured. The following description will be made on the assumption that the connection point between the variable resistors 16 and 20 is grounded.

In the phase shift circuit 10 C having such a configuration, when a predetermined AC signal is input to the input terminal 22, the voltage applied to the input terminal 22 (the input voltage A voltage obtained by dividing E i) by the resistors 18 and 20 is applied. The resistance values of the resistor 18 and the resistor 20 are set substantially equal, and the voltage E i Z 2 divided by about 12 by the voltage dividing circuit constituted by the series circuit of the two resistors 18 and 20 is obtained. Applied to the inverting input terminal of the differential amplifier 12.

On the other hand, when the input signal is input to the input terminal 22, the signal appearing at the connection point between the capacitor 14 and the variable resistor 16 is input to the non-inverting input terminal of the differential amplifier 12. Since an input signal is input to one end of a CR circuit (series circuit) composed of the capacitor 14 and the variable resistor 16, the voltage of the signal obtained by shifting the phase of the input signal by a predetermined amount by the CR circuit is obtained. It is applied to the non-inverting input terminal of the differential amplifier 12.

The differential amplifier 12 determines the difference between the voltages applied to the two input terminals in this manner. Outputs a signal that has been amplified to a fixed amplification factor, for example, about twice.

FIG. 3 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit 10C and a voltage appearing on a capacitor or the like.

As shown in FIG. 3, the voltage VR1 appearing at both ends of the variable resistor 16 and the voltage VC1 appearing at both ends of the capacitor 14 are 90 ° out of phase with each other, and these are vectorically combined (added). Is the input voltage E i. Therefore, when the amplitude of the human input signal is constant and only the frequency changes, the voltage VR1 across the variable resistor 16 and the voltage VC1 across the capacitor 14 change along the circumference of the semicircle shown in FIG. .

Further, the voltage applied to the non-inverting input terminal of the differential amplifier 12 (voltage VR1 across the variable resistor 16) to the voltage applied to the inverting input terminal (voltage E i / 2 across the resistor 20) is vector-wise. Is the difference voltage Eo '. The difference voltage Eo 'can be represented by a vector having the center point as the starting point and the end point at a point on the circumference where the voltage VR1 and the voltage VC1 intersect in the semicircle shown in FIG. Its size is equal to the radius E i / 2 of the semicircle. Actually, the differential amplifier 12 doubles the differential voltage Eo ', and the output voltage Eo = Eo'X2 = Ei. Therefore, in the phase shift circuit 10C of this embodiment, it can be seen that the amplitude of the input signal is equal to the amplitude of the output signal, and no signal attenuation occurs between the input and output signals.

In addition, as is apparent from FIG. 3, since the voltage VR1 and the voltage VC1 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VR1 is such that the frequency ω changes from 0 to ∞. Varies from 90 ° to 0 ° according to Then, the phase shift amount 01 of the entire phase shift circuit 10C is twice that, and varies from 180 ° to 0 ° according to the frequency. Next, the relationship between the input and output voltages described above is quantitatively verified.

FIG. 4 is a diagram equivalently showing the preceding phase shift circuit 10C, and shows a configuration corresponding to two series circuits provided on the input side of the differential amplifier 12.

Since the input voltage E i is applied to both ends of the series circuit composed of the resistors 18 and 20, each of the resistors 18 and 20 is replaced with two voltage sources 27 and 28 that generate the voltage E iZ 2. You can think. At this time, the current I flowing through the closed loop of the equivalent circuit shown in FIG. 4 is expressed as follows, where C is the capacitance of the capacitor 14, and the resistance of the variable resistor 16 is the scale. E: C s

I = '(1)

1 + CR s

R +

C s

Becomes Here, when the potential difference (difference) Eo 'between the two points shown in FIG. 4 is obtained,

Eo '= I XR- E:' (2)

Two

Becomes Substituting equation (1) into equation (2) above yields-o = ^{CR S} Ei- _E i

1 + CR s 2

E

-CR s i

E: • (3)

2 (l + CRs) E

i

Becomes Since the output voltage Eo of the phase shift circuit IOC of this embodiment is twice the difference Eo ′ described above,

Eo = 2xEo '

-CR s one T s

Ei = — E: ■ (4)

1 + CR s 1 + Ts

Becomes Here, the time constant of the CR circuit including the capacitor 14 and the variable resistor 16 is set to T (= CR).

Substituting s = jω in equation (4) and transforming

-j ωΤ

Εο =-

1 + J ωΤ

(1- j ωΤ) ²

1+ (ωΤ) ^ζ

= Ei '(6). That is, Equation (6) indicates that the phase shift circuit 10C of this embodiment has a phase between input and output. Regardless of the rotation, the amplitude of the output signal is equal to the amplitude of the input signal and is constant.

Further, when the phase shift amount 01 of the output voltage Eo with respect to the input voltage E i is obtained from the equation (5),

01 = tan " ¹ {( _Λ } · * · (Ό

(ω-1

Becomes From this equation (7), for example, the phase shift amount 01 at a frequency where ω is approximately 1 T (= 1 / (CR)) is approximately 90 °, and the amplitude of the input signal is not attenuated. Only the phase can be shifted by almost 90 °. In addition, by changing the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount 01 becomes approximately 90 ° can be changed.

FIG. 5 is a circuit diagram extracted from the configuration of the subsequent phase shift circuit 30C shown in FIG. 1. The phase shift circuit 30C converts the two-input differential voltage into a predetermined amplification degree (for example, Differential amplifier 32, which amplifies and outputs the amplified signal by about 2 times, and a variable resistor 36, which shifts the phase of the signal input to the input terminal 42 by a predetermined amount and inputs the same to the non-inverting input terminal of the differential amplifier 32. A capacitor 34 and a resistor 38 and a resistor 40 which divide the voltage level to about 12 without changing the phase of the signal input to the input terminal 42 and input the voltage level to the inverting input terminal of the differential amplifier 32. It is configured.

In the phase shift circuit 30C having such a configuration, when a predetermined AC signal is input to the input terminal 42, the voltage applied to the input terminal 42 (input voltage E i) A voltage obtained by dividing the voltage by the resistors 38 and 40 is applied. The resistance values of the resistors 38 and 40 are set to be substantially equal, and the voltage E i / 2 divided by about 1 Z 2 by a voltage dividing circuit composed of a series circuit of these two resistors 38 and 40 is used. Is applied to the inverting input terminal of the differential amplifier 32.

On the other hand, when the input signal is input to the input terminal 42, the signal appearing at the connection point between the variable resistor 36 and the capacitor 34 is input to the non-inverting input terminal of the differential amplifier 32. Since an input signal is input to one end of a CR circuit (series circuit) composed of a variable resistor 36 and a capacitor 34, the voltage of the signal whose input signal is shifted by a predetermined amount by this CR circuit is differential. Applied to the non-inverting input terminal of amplifier 32. The differential amplifier 32 outputs a signal obtained by amplifying the difference between the voltages applied to the two input terminals to a predetermined width, for example, about twice.

FIG. 6 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit 30C and a voltage appearing on a capacitor or the like.

As shown in FIG. 6, the voltage VC2 appearing at both ends of the capacitor 34 and the voltage VR2 appearing at both ends of the variable resistor 36 are 90 ° out of phase with each other, and these are vectorically combined (added). Is the input voltage E i. Therefore, if the amplitude of the input signal is constant and only the frequency changes, the voltage VC2 across the capacitor 34 and the voltage VR2 across the variable resistor 36 change along the circumference of the semicircle shown in Fig. 6. I do.

In addition, the voltage applied to the inverting input terminal (the voltage E i 2 across the resistor 40) is vectorically subtracted from the voltage applied to the non-inverting input terminal of the differential amplifier 32 (the voltage VC2 across the capacitor 34). The result is the difference voltage Eo '. This differential voltage Eo 'can be represented by a vector having the semicircle shown in Fig. 6 as the starting point at the center point and the ending point at a point on the circumference where voltage VC2 and voltage VR2 intersect. The size is equal to the radius of the semicircle E iZ 2. Actually, the differential amplifier 32 amplifies the difference voltage Eo 'by two times, and the output voltage Eo = Eo'X2 = Ei. Therefore, in the phase shift circuit 30C of this embodiment, it is understood that the amplitude of the input signal is equal to the amplitude of the output signal, and no signal attenuation occurs between the input and output signals.

In addition, as is clear from FIG. 6, since the voltage VC2 and the voltage VR2 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VC2 is such that the frequency ω changes from 0 to ∞. Varies from 0 ° to 90 ° according to Then, the phase shift amount 02 of the entire phase shift circuit 30C is twice that, and changes from 0 ° to 180 ° according to the frequency. Next, the relationship between the input and output voltages described above is quantitatively verified.

FIG. 7 is a diagram equivalently showing the phase shift circuit 30C at the subsequent stage, and shows the components corresponding to two series circuits provided on the input side of the differential amplifier 32.

Since the input voltage E i is applied to both ends of the series circuit composed of the resistors 38 and 40, each of the resistors 38 and 40 generates the voltage E iZ 2 as in the case of the preceding phase shift circuit 10C. You can think of it as replacing two voltage sources 27 and 28. At this time, the current I flowing through the closed loop of the equivalent circuit shown in FIG. Where R is the capacitance of the capacitor 34 and C is the capacitance of the capacitor 34, which can be expressed by the above equation (1). Here, when the potential difference (difference) Eo ′ between the two points shown in FIG.

Becomes Substituting equation (1) into equation (8) above and calculating

^Eo ' ⁼ T cR7 ^Ei -2 ^Ei ¹ ^{CR S} Ei-(9)

2 (l + CRs)

Becomes The output voltage Eo of the phase shift circuit 30C of this embodiment is obtained by subtracting the difference Eo ′ described above by 2

1 •

Because it is doubled,

Eo = 2 X Eo '

Becomes Here, similarly to the phase shift circuit 10C, the time constant of the CR circuit including the variable resistor 36 and the capacitor 34 is set to T (= CR).

Substituting s = jω in Eq. (10) and transforming,

υ 11 j ωΤ.

Εο = -―— ~-Ei

1 + j ωΤ

(1 j wT) ²

1+ (ωΤ) ²

1— (ωΤ) ² — j · 2ωΤ

• (11)

1+ (ωΤ) ²

Becomes

Equations (10) and (11) described above differ from Equations (4) and (5) shown for the preceding phase shift circuit 10C only in sign. Therefore, the absolute value of the output voltage Eo can be directly applied to the equation (6), and the phase shift circuit 30C in the subsequent stage can output the amplitude of the output signal no matter how the phase between the input and output rotates. It can be seen that the amplitude is constant.

Further, the phase shift amount 02 of the output voltage Eo with respect to the input voltage Ei is obtained from the equation (11). Then

02 = tan " ¹ {(} ~ (12)

(ω ² Τ) ^ζ -.1

Becomes From this equation (12), for example, the phase shift amount 02 at a frequency where ω is approximately 1 / T (= 1 / (CR)) is approximately 90 °, and the amplitude of the input signal must be attenuated. And only the phase can be shifted by almost 90 °. Moreover, by changing the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount 02 becomes approximately 90 ° can be changed.

Thus, the phase is shifted by a predetermined amount in each of the two phase shift circuits 10C and 30C. As shown in FIGS. 3 and 6, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10 C and 30 C is in the opposite direction. A signal having a phase shift amount of 0 ° is output by the entire phase shift circuits 10C and 30C.

Further, the output of the subsequent phase shift circuit 30C is fed back to the input side of the non-inverting circuit 50 provided in the preceding stage of the phase shift circuit 10C via the feedback resistor 70, and the signal thus fed back is output. The signal is input to the input terminal (input terminal 22 shown in FIG. 2) of the preceding phase shift circuit 10C via the non-inverting circuit 50 functioning as a buffer circuit.

In the oscillator 1 of this embodiment, such a feedback loop is formed, and by setting the loop gain to 1 or more, a sine wave oscillation is performed at a frequency at which the phase shift amount becomes 0 ° when the loop goes through the closed loop. Done. As a method of setting the loop gain to 1 or more, a method of adjusting the amplification degree of each of the differential amplifiers 12 and 32 in the two phase shift circuits 10C and 30C and adjusting the amplification degree of the non-inverting circuit 50 There is.

FIG. 8 is a circuit diagram in which the whole of the two phase shift circuits 10C and 30C and the non-inverting circuit 50 having the above-described configuration are replaced with a circuit having a transfer function K1, and a circuit having a transfer function K1 and a resistance value R0 are shown. A closed loop is formed by the feedback resistor 70 of FIG. FIG. 9 is a circuit diagram obtained by converting the circuit shown in FIG. 8 by Miller's theorem.When the feedback resistor 70 having a resistance value R0 is converted into an input shunt resistor, the resistance value Rs becomes

Can be represented by

In this equation, considering that K1 is greater than 1, it can be seen that the input shunt resistance Rs is a negative resistance.

If an ideal phase-shift circuit with transfer function K1 (all-pass' network) satisfies the condition that the phase shift is 0 ° at any finite frequency, then at this frequency, Negative resistance is realized, and oscillation is possible. Actually, the input shunt resistance is in the form of being connected in parallel with the input impedance of the phase shift circuit, and it is necessary that the combination of these becomes the negative resistance.However, by setting the resistance value R0 of the feedback resistor 70 low, In addition, setting the input impedance of the phase shift circuit to a high value is extremely easy from a design standpoint. Therefore, theoretically, the effect of the input impedance of the phase shift circuit can be ignored.

By the way, as is clear from equation (4), the transfer function K2 of the preceding phase shift circuit 10C is

K2 = - is ^{^{{1 + lT l i S s}} } ...), (10) As is apparent from the equation, the transfer function kappa 3 in the subsequent stage phase shifting circuit 30 C ^{is, Κ3 =:, l z S} ~ (15 )

1 + 1 2 S

It is. However, the time constant of the CR circuit of the phase shifting circuit 10C and the 30C will assume be different, and respectively with T !, T _2.

Therefore, the overall transfer function K1 when connecting the phase shift circuits 10C and 30C is

Kl = K2xK3

Becomes Where s = jo>, s ² = —ω ² , Α = 1 + Τι T ₂ s ² = l— Τ, Τζω ² B = T! + T ₂ A—B s

Kl =-

A + B s

^{_ A 2 - 2 AB s +} B 2 s 2

One A ² -B ^z s ²

_—

(1 -Τ, Τ ₂ ω ² ) ² -2 j (1-Τ, Τ ₂ ω ² ) (Τ _Ι + Τ ₂ ) ω- (Τ ₁ + Τ ₂ ) ² ω ² (1 + Τ, Τ ₂ ω ² ) ² + (Τ ₁ + Τ ₂ ) ² ω ²

_{__ (1 -Τ, Τ 2 ω} 2) 2 - (Τ, + Τ 2) 2 ω 2 - 2 j (1 - Τ, Τ 2 ω 2) (Τ, + Τ 2) ω

— (17) In this equation (17), the imaginary term on the right side of equation (17) must be 0 in order for the phase difference between the input and output of the entire two-stage phase shifters 10C and 30C to be 0 ° Therefore, the following equation holds.

(1-Τ, Τ ₂ ω ² ) (Τ ₁ + Τ ₂ ) ω = 0 to (18) Therefore, 1—

In the case of, since the input signal is DC and the phase difference is 180 °, the other condition (1

At (Τ, 0 ₂ ), the phase difference is 0 °. At this frequency, the input shunt resistor Rs becomes a negative resistance and satisfies the oscillation voltage condition and the frequency condition at the same time.

In this way, by combining the two phase shift circuits 10 C and 30 C, the phase shift amount of a signal that makes a round of the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time is set to 1 or more. By doing so, the sine wave oscillation is maintained. In addition, the frequency at which the phase shift amount becomes 0 ° can be changed by changing the resistance value of the variable resistor 16 or the variable resistor 36 in each of the phase shift circuits 10C and 30C. Can be realized.

Further, the oscillator 1 of this embodiment is configured by combining a differential amplifier, a capacitor or a resistor, and any of the constituent elements can be formed on a semiconductor substrate, so that the oscillation frequency and the maximum attenuation can be reduced. It is easy to form the entire adjustable oscillator 1 on a semiconductor substrate to form an integrated circuit. In the oscillator 1 of the first embodiment described above, the phase shift circuit 10C is arranged in the preceding stage and the phase shift circuit 30C is arranged in the subsequent stage. Since it is sufficient that the phase shift amount is 0 °, the oscillator may be configured such that the phase shift circuit 30C is arranged at the preceding stage and the phase shift circuit 10C is arranged at the subsequent stage by exchanging the order.

(Second embodiment)

FIG. 10 is a circuit diagram showing a configuration of an oscillator according to a second embodiment to which the present invention is applied. The oscillator 2 includes a non-inverting circuit 50 that outputs an input signal without changing its phase, and A phase shift of a total of 0 ° at a predetermined frequency by shifting the phase of the input signal by a predetermined amount.Two phase shift circuits 10 L and 30 L, and the output of the phase shift circuit 30 L to the input side of the non-inverting circuit 50 And a feedback resistor 70 that feeds back the current. This feedback resistor 70 has a finite resistance value from 0 Ω. The non-inverting circuit 50 operates as a buffer circuit, but may be omitted if attention is paid only to the basic operation of the oscillator.

FIG. 11 is a circuit diagram extracting and showing the configuration of the preceding phase shift circuit 10L shown in FIG. 10. The phase shift circuit 10L converts the two-input differential voltage to a predetermined amplification degree (for example, And a variable resistor 16 that amplifies the output of the differential amplifier 12 by a predetermined amount and shifts the phase of the signal input to the input terminal 22 by a predetermined amount to input to the non-inverting input terminal of the differential amplifier 12. And a resistor 18 and a resistor 20 which divide the voltage level into about 1 Z2 without changing the phase of the signal input to the input terminal 22 and input the voltage to the inverting input terminal of the differential amplifier 12. It consists of.

The capacitor 19 inserted between the inductor 17 and the variable resistor 16 is a DC blocking capacitor, and its impedance is extremely small at the operating frequency, that is, has a large capacitance. The following description will be made on the assumption that the connection point between the inductor 17 and the resistor 20 is grounded.

In the phase shift circuit 10L having such a configuration, when a predetermined AC signal is input to the input terminal 22, the inverting input terminal of the differential amplifier 12 receives the voltage (input voltage) applied to the input terminal 22. A voltage obtained by dividing E i) by the resistors 18 and 20 is applied. The resistances of the resistors 18 and 20 are set substantially equal, and the resistances of these two resistors 18 and 20 are set. The voltage E 2 divided into about 12 by the voltage dividing circuit constituted by the series circuit is applied to the inverting input terminal of the differential amplifier 12.

On the other hand, when an input signal is input to the input terminal 22, the non-inverting input terminal of the differential amplifier 12 is connected to the connection point of the variable resistor 16 and the inqector 17 (more precisely, the capacitor 19 connected in series with the inductor 17). And the connection point of the variable resistor 16, but as described above, this capacitor 19 is for blocking direct current and does not affect the operation, so it can be omitted when explaining the basic operation.) A signal is input. Since an input signal is input to one end of an LR circuit (series circuit) composed of the variable resistor 16 and the inductor 17, the voltage of the signal obtained by shifting the phase of the input signal by a predetermined amount by the LR circuit is different. It is applied to the non-inverting input terminal of the operational amplifier 12.

The differential amplifier 12 outputs a signal obtained by amplifying the difference between the voltages applied to the two input terminals to a predetermined amplification factor, for example, about twice.

FIG. 12 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit 10L and a voltage appearing in an inductor or the like.

As shown in FIG. 12, the voltage VL1 appearing at both ends of the inductor 17 and the voltage VR3 appearing at both ends of the variable resistor 16 are 90 ° out of phase with each other, and these are vectorically combined (added). Is the input voltage E i. Therefore, when the amplitude of the input signal is constant and only the frequency changes, the voltage VL1 across inductor Π and the voltage VR3 across variable resistor 16 change along the circumference of the semicircle shown in Fig. 12. I do.

In addition, the voltage (the voltage Ei 2 across the resistor 20) applied to the inverting input terminal is vector-wise subtracted from the voltage (the voltage VL1 across the inductor 17) applied to the non-inverting input terminal of the differential amplifier 12. Becomes the differential voltage Eo '. This differential voltage Eo 'can be represented by a vector whose center point is the starting point and whose end point is a point on the circumference where voltage VL1 and voltage VR3 intersect in the semicircle shown in Fig. 12. , Whose size is equal to the radius E iZ 2 of the semicircle. Actually, the differential amplifier 12 amplifies the difference voltage Eo 'by twice, and the output voltage Eo = Eo'x2 = Ei. Therefore, it can be seen that in the phase shift circuit 10L of this embodiment, the amplitude of the input signal is equal to the amplitude of the output signal, and no signal attenuation occurs between the input and output signals.

As is clear from FIG. 12, the voltage VL1 and the voltage VR3 are perpendicular to each other on the circumference. Therefore, the phase difference between the input voltage Ei and the voltage VL1 changes from 90 ° to 0 ° as the frequency ω changes from 0 to ∞. And the phase shift amount 03 of the entire phase shift circuit 10L is twice that, and changes from 180 ° to 0 ° according to the frequency. Next, the relationship between the input and output voltages described above is quantitatively verified.

FIG. 13 is a diagram equivalently showing the preceding-stage phase shift circuit 10L, and shows a configuration corresponding to two series circuits provided on the input side of the differential amplifier 12.

Since the input voltage Ei is applied to both ends of the series circuit composed of the resistors 18 and 20, each of the resistors 18 and 20 should be replaced with two voltage sources 27 and 28 that generate the voltage Ei / 2 be able to. At this time, the current I 'flowing through the closed loop of the equivalent circuit shown in Fig. 13 is as follows, where L is the inductance of the inductor 17, and R is the resistance of the variable resistor 16.

Γ = ~ (19)

R + L s

Becomes Here, when the potential difference (difference) Eo 'between the two points shown in FIG. 13 is obtained,

Εο '= Γ XL s- Ei ~ (20). Substituting equation (19) into equation (20) above,

Eo '=-^ — ~ Ei—— Ei

R + L s 2

^R " ^LS Ei ... (21)

2 (R + L s)

Becomes The output voltage Eo of the phase shift circuit 10L of this embodiment is obtained by doubling the difference Eo ′ described above.

Eo = 2xEo '

R-L s

Ε:

R + L s

L

R -T s

Ei =-E: • (22) 丄 L 1 + Ts

1 ⁺ R ^S

Becomes Figure 1 shows the time constant of the LR circuit consisting of the variable resistor 16 and the T (= L / R) as in the case of the CR circuit in the phase-shift circuit IOC shown in (1).

This equation (22) is the same as the calculation result of equation (4) shown in the first embodiment, and the phase shift circuit 10L of this embodiment has the phase shift circuit 10C shown in FIG. It can be seen that the relationship between the input and output voltages is the same. Therefore, no matter how the phase between the input and output signals rotates, the amplitude of the output signal of the phase shift circuit 10L is constant.

In addition, as the phase shift amount 03 of the output voltage Eo with respect to the input voltage, 01 expressed by the above equation (7) is applied as it is, for example, when ω becomes approximately 1 / T (= R / L). The phase shift amount at the frequency is about 90 °. Moreover, by varying the resistance value R of the variable resistor 16, the frequency ω at which the phase shift amount becomes approximately 90 ° can be changed.

FIG. 14 shows a configuration extracted from the phase shift circuit 30L at the subsequent stage shown in FIG. 10. The phase shift circuit 30L converts the two-input differential voltage into a predetermined amplification factor (for example, Differential amplifier 32, which amplifies and outputs the amplified signal by about 2 times, and an inductor 37, which shifts the phase of the signal input to the input terminal 42 by a predetermined amount and inputs it to the non-inverting input terminal of the differential amplifier 32, and a variable. Consisting of a resistor 36, a resistor 38 and a resistor 40, which divide the voltage level to about 1/2 without changing the phase of the signal input to the input terminal 42 and input it to the inverting input terminal of the differential amplifier 32. Have been.

The capacitor 39 inserted in series with the inductor 37 is a DC blocking capacitor, and its impedance is extremely small at the operating frequency, that is, has a large capacitance.

In the phase shift circuit 30L having such a configuration, when a predetermined AC signal is input to the input terminal 42, a voltage applied to the input terminal 42 (input voltage E i) is divided by resistors 38 and 40. The resistance values of the resistor 38 and the resistor 40 are set substantially equal, and the voltage E iZ 2 divided by about 12 by the voltage dividing circuit constituted by the series circuit of the two resistors 38 and 40 is obtained. Applied to the inverting input terminal of the differential amplifier 32.

On the other hand, when the input signal is input to the input terminal 42, the signal appearing at the connection point between the inductor 37 and the variable resistor 36 is input to the non-inverting input terminal of the differential amplifier 32. One end of an LR circuit (series circuit) composed of an inductor 37 and a variable resistor 36 has an input signal , The voltage of the signal obtained by shifting the phase of the input signal by a predetermined amount by the LR circuit is applied to the non-inverting input terminal of the differential amplifier 32.

The differential amplifier 32 outputs a signal obtained by amplifying the difference between the voltages applied to the two input terminals to a predetermined width, for example, about twice.

FIG. 15 is a vector diagram showing a relationship between an input / output voltage of the phase shift circuit 30L and a voltage appearing in an inductor or the like.

As shown in Fig. 15, the voltage VR4 appearing at both ends of the variable resistor 36 and the voltage VL2 appearing at both ends of the inductor 37 are 90 ° out of phase with each other, and these are vectorically combined (added). Is the input voltage E i. Therefore, when the amplitude of the input signal is constant and only the frequency changes, the voltage VR4 across the variable resistor 36 and the voltage V L2 across the inductor 37 along the circumference of the semicircle shown in FIG. Change.

Further, the voltage applied to the non-inverting input terminal of the differential amplifier 32 (the voltage VE4 across the variable resistor 36) and the voltage applied to the inverting input terminal (the voltage E iZ 2 across the resistor 40) are vector-wise. The difference is the difference voltage Eo '. This differential voltage Eo 'can be expressed as a vector with the center point as the starting point and the point on the circumference where voltage VR4 and voltage VL2 intersect as the end point in the semicircle shown in Fig. 15. The size of which is equal to the radius of the semicircle E i / 2. Actually, the differential amplifier 32 amplifies the difference voltage Eo 'by two times, and the output voltage Eo = Eo'X2 = Ei. Therefore, in the phase shift circuit 30L of this embodiment, it can be seen that the amplitude of the input signal is equal to the amplitude of the output signal, and no signal attenuation occurs between the input and output signals.

Further, as is apparent from FIG. 15, since the voltage VR4 and the voltage VL2 intersect at right angles on the circumference, the phase difference between the input voltage Ei and the voltage VR4 varies from a frequency ω of 0 to ∞. The angle changes from 0 ° to 90 ° as required. Then, the phase shift amount 04 of the entire phase shift circuit 30L is twice that, and changes from 0 ° to 180 ° according to the frequency. Next, the relationship between the input and output voltages described above is quantitatively verified.

FIG. 16 is a diagram equivalently showing the subsequent phase shift circuit 30L, and shows a configuration corresponding to two series circuits provided on the input side of the differential amplifier 32.

Since the input voltage E i is applied to both ends of the series circuit composed of the resistors 38 and 40, each of the resistors 38 and 40 has the voltage E i as in the case of the preceding phase shift circuit 10L. It can be considered by replacing two voltage sources 27 and 28 that generate 2. At this time, the current I ′ flowing through the closed loop of the equivalent circuit shown in FIG. 16 can be expressed by the above equation (19), where R is the resistance of the variable resistor 36 and L is the inductance of the inductor 37.

Here, when the potential difference (difference) Eo 'between the two points shown in Fig. 16 is obtained, Eo' = I 'XR-! · Ei ~ (23) Substituting equation (19) into equation (23) above and calculating

^{^{E ° '= R ^ Ei -}} | Ei R_Ls Ei ~ (24)

2 (R + Ls)

Becomes Since the output voltage Eo of the phase shift circuit 30L of this embodiment is twice the difference Eo ′ described above,

Eo = 2 xEo '

R-Ls

E:

R + Ls

■ (25) 丄 L 1 + Ts

1 ⁺ R ^S

Becomes Here, similarly to the phase shift circuit 10L, the time constant of the LR circuit including the inductor 37 and the variable resistor 36 is set to T (= L / R).

This equation (25) is the same as equation (10) shown in the first embodiment, and the phase shift circuit 30L of this embodiment has the same input-output voltage as the phase shift circuit 30C of the first embodiment. It can be seen that the following relationship is satisfied. Therefore, no matter how the phase of the input / output signal is rotated, the amplitude of the output signal of the phase shift circuit 30L is constant.

In addition, as for the phase shift amount 04 of the output voltage Eo with respect to the input voltage, 02 expressed by the above equation (12) is applied as it is. The angle is almost 90 °. Moreover, by varying the resistance value R of the variable resistor 36, the frequency ω at which the phase shift amount becomes almost 90 ° is changed. Can be done.

Thus, the phase is shifted by a predetermined amount in each of the two phase shift circuits 10L and 30L. As shown in FIGS. 12 and 15, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10L and 30L is opposite, and two phase shifts at a certain frequency. A signal having a phase shift amount of 0 ° is output by the entire circuits 10L and 30L.

The output of the subsequent phase shift circuit 30L is fed back via a feedback resistor 70 to the input side of a non-inverting circuit 50 provided in the preceding stage of the phase shift circuit 10L. The signal is input to the input terminal (input terminal 22 shown in FIG. 11) of the preceding phase shift circuit 10 L via the non-inverting circuit 50 functioning as a circuit.

In the oscillator 2 of this embodiment, such a feedback loop is formed, and by setting the loop gain to 1 or more, the sine wave is generated at a frequency such that the phase shift amount becomes 0 ° when the loop goes through the closed loop. Oscillation is performed. The method for setting the loop gain to 1 or more is to adjust the amplification of the differential amplifiers 12 and 32 in the two phase shift circuits 10L and 30L, or to adjust the amplification of the non-inverting circuit 50. There is.

By the way, the oscillator 2 of the second embodiment including the non-inverting circuit 50 and the two phase shift circuits 10L and 30L described above can be replaced by a circuit having a transfer function K1 in the first embodiment. Similarly to the above, it can be represented by the circuit diagram shown in FIG. Therefore, by performing the conversion according to Mira's theorem, it can be represented by the circuit diagram shown in FIG. 9, and the input shunt resistance Rs of the circuit after the conversion can be represented by equation (13). Further, as is apparent from the equations (22) and (25), the transfer functions of the two phase shift circuits 10L and 30L of this embodiment are represented by the two phase shift circuits 10C of the first embodiment. , 30C are the same as the transfer functions, and the entire transfer function K1 when the non-inverting circuit 50 and the two phase shift circuits 10L and 30L are connected can be directly applied as shown in the equation (17). it can. Therefore, when 0 = 1 "(TiTz), the phase difference between the non-inverting circuit 50 and the entire input and output of the two phase shift circuits 10L and 30L is 0 °, and the oscillation voltage Condition and frequency condition are satisfied at the same time.

As described above, by combining the non-inverting circuit 50 and the two phase shift circuits 10 L and 30 L, the phase shift amount of a signal that goes around the closed loop is set to 0 ° at a certain frequency. By setting the loop gain to 1 or more, sine wave oscillation is maintained. Further, the frequency at which the phase shift amount becomes 0 ° can be changed by changing the resistance value of the variable resistor 16 or 36 in each of the phase shift circuits 10 L and 30 L. An oscillator can be realized. Moreover, the oscillation frequency ω of the oscillator 2 of this embodiment becomes 1 / T = R / L, for example, assuming that the time constants of the LR circuits in the two phase shift circuits 10 L and 30 L are the same. Therefore, by changing the resistance value R, it can be greatly changed.

In addition, it is possible to form the intagta 17, 37 on a semiconductor substrate by forming a spiral conductor by photolithography or the like, but by using such inductors 17, 37, It is also easy to form the entire oscillator 2 together with other components (differential amplifiers, resistors, etc.) on a semiconductor substrate to form an integrated circuit. In particular, when the oscillator 2 is formed as an integrated circuit, it is easy to increase the frequency ω (= R / L) by reducing the inductance of the inductors 17 and 37, which is suitable for increasing the oscillation frequency. I have.

In the oscillator 2 according to the second embodiment described above, the phase shift circuit 10L is arranged in the preceding stage and the phase shift circuit 30L is arranged in the subsequent stage, respectively. Since the amount only needs to be 0 °, the oscillator may be configured such that the phase shift circuit 30L is arranged at the front stage and the phase shift circuit 10L is arranged at the rear stage, with the order before and after these being interchanged.

(Third embodiment)

FIG. 17 is a circuit diagram showing the configuration of the oscillator according to the third embodiment. The oscillator 3 includes a non-inverting circuit 50 that outputs the input signal without changing the phase, and FIG. The phase shift circuits 10 C and 30 L whose configuration is shown in the figure are provided, and a feedback resistor 70 for feeding back the output of the subsequent phase shift circuit 30 L to the input side of the non-inverting circuit 50. This feedback resistor 70 has a finite resistance value from 0 Ω.

As described in the first and second embodiments, the phase is shifted by a predetermined amount by each of the two phase shift circuits 10C and 30L of the oscillator 3 in the third embodiment. Moreover, as shown in FIGS. 3 and 15, each phase shift circuit 10C, The relative phase relationship between the input and output voltages at 30 L is opposite, and a signal having a phase shift amount of 0 ° is output by the whole of the two phase shift circuits 10 C and 30 L at a certain frequency.

Further, the output of the subsequent phase shift circuit 30L is fed back to the input side of the non-inverting circuit 50 provided before the phase shift circuit 10C via a feedback resistor 70. The signal is input to the input terminal (input terminal 22 shown in FIG. 2) of the preceding phase shift circuit 10C via the non-inverting circuit 50 functioning as a buffer circuit.

Oscillator 3 has such a feedback loop formed, and by setting the loop gain to 1 or more, sine wave oscillation is performed at a frequency where the phase shift amount becomes 0 ° when the oscillator 3 makes a round of the closed loop. . As a method of setting the loop gain to 1 or more, the amplification of the differential amplifiers 12 and 32 in the two phase shift circuits 10C and 30L is adjusted, and the amplification of the non-inverting circuit 50 is adjusted. There is a way to adjust.

By the way, the oscillator 3 of the third embodiment including the non-inverting circuit 50 and the two phase shift circuits 10C and 30L described above can be replaced by a circuit having a transfer function K1 in the first embodiment. Similarly to the above, it can be represented by the circuit diagram shown in FIG. Therefore, the circuit can be represented by the circuit diagram shown in Fig. 9 by performing conversion according to Miller's theorem, and the input shunt resistance Rs of the circuit after conversion can be represented by equation (13).

Further, as is apparent from the equation (25), the transfer function of the subsequent phase shift circuit 30L of this embodiment is the same as each transfer function of the subsequent phase shift circuit 30C of the first embodiment. The whole transfer function K1 in the case where the inversion circuit 50 and the two phase shift circuits 10C and 30L are connected can be directly used as shown in the equation (17). Therefore, when ω = 1 / ^ (入出力, Τ ₂ ), the phase difference is 0 ° between the entire input and output that connects the non-inverting circuit 50 and the two phase shift circuits 10C and 30L, The voltage condition and the frequency condition are satisfied at the same time.

In this way, by combining the two phase shift circuits 10C and 30L, the phase shift amount of a signal that goes around the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time is set to 1 or more. By doing so, the sine wave oscillation is maintained. The frequency at which the phase shift amount is 0 ° is determined by the variable resistance in each of the phase shift circuits 10C and 30L. Since it can be changed by changing the resistance value of 16 or 36, a variable frequency oscillator can be easily realized.

Further, as described in the second embodiment, the inductor 37 can be formed on the semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using such an ingkta 37, it is easy to form an integrated circuit by forming the entire oscillator 3 together with other components (differential amplifier, resistor, etc.) on a semiconductor substrate.

The time constant T of the CR circuit of the preceding phase shift circuit 10C is CR, and the time constant T of the LR circuit of the subsequent phase shift circuit 30L is LZR. Because the denominator is divided, for example, when the entire oscillator 3 is formed on a semiconductor substrate and the variable resistors 16 and 36 are formed by FETs, the fluctuation of the oscillation frequency due to the temperature change of the resistance value is suppressed. So-called temperature compensation becomes possible. In the oscillator 3 of this embodiment, the phase shift circuit 10C is arranged at the preceding stage, and the phase shift circuit 30L is arranged at the subsequent stage. However, if the phase shift amount between the input and output signals becomes 0 ° due to the entirety thereof, For this reason, the oscillator may be configured such that the phase shift circuit 30L is arranged in the front stage and the phase shift circuit 10C is arranged in the subsequent stage by exchanging the order.

(Fourth embodiment)

FIG. 18 is a circuit diagram showing the configuration of the oscillator according to the fourth embodiment. This oscillator 4 includes a non-inverting circuit 50 that outputs the input signal without changing the phase, and FIG. 11 or FIG. The phase shift circuits 10 L and 30 C whose configuration is shown in the figure are configured by a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 30 C to the input side of the non-inverting circuit 50. This feedback resistor 70 has a finite resistance value from 0 Ω.

As described in the oscillators of the first and second embodiments, the phase is shifted by a predetermined amount by each of the two phase shift circuits 10L and 30C of the oscillator 4 in the fourth embodiment. Moreover, as shown in FIGS. 12 and 6, the relative phase relationship between the input and output voltages in each of the phase shift circuits 10L and 30C is opposite, and at a certain frequency, the two phase shift circuits 10L and 10L A signal with a phase shift amount of 0 ° is output by the entire 30C. The output of the subsequent phase shift circuit 30C is fed back via a feedback resistor 70 to the input side of a non-inverting circuit 50 provided before the phase shift circuit 10L. The signal is input to the input terminal (input terminal 22 shown in FIG. 11) of the preceding phase shift circuit 10 L via the non-inverting circuit 50 functioning as a buffer circuit.

Oscillator 4 has such a feedback loop formed, and by setting the loop gain to 1 or more, sine wave oscillation is performed at a frequency at which the phase shift amount becomes 0 ° when making a round of the closed loop. . As a method of setting the loop gain to 1 or more, the amplification degree of each of the differential amplifiers 12 and 32 in the two phase shift circuits 10 L and 30 C is adjusted, and the amplification degree of the non-inverting circuit 50 is adjusted. There is a way to adjust.

By the way, the oscillator 4 of the fourth embodiment including the non-inverting circuit 50 and the two phase shift circuits 10 L and 30 C described above is replaced with a circuit having a transfer function K1 as a whole. As in the case, it can be represented by the circuit diagram shown in FIG. Therefore, by performing the conversion according to Mira's theorem, it can be represented by the circuit diagram shown in FIG. 9, and the input shunt resistance Rs of the circuit after the conversion can be represented by equation (13). Further, as is apparent from the equation (22), the transfer function of the preceding phase shift circuit 10 L of this embodiment is the same as each transfer function of the preceding phase shift circuit 10 C of the first embodiment. The whole transfer function K1 when the non-inverting circuit 50 is connected to the two phase shift circuits 10 L and 30 C can be directly applied as shown in the equation (17). Therefore, the phase difference becomes 0 ° between ω = 1 ^ (Τ ί Τ ζ) between the entire input and output connected to the non-inverting circuit 50 and the two phase shift circuits 10 L and 30 C, and the oscillation The voltage condition and the frequency condition are satisfied at the same time.

In this way, by combining the two phase shift circuits 10 L and 30 C, the phase shift amount of the signal that goes through the closed loop can be set to 0 ° at a certain frequency, and the loop gain at this time is reduced. Sine wave oscillation is maintained by setting it to 1 or more. The frequency at which the phase shift amount becomes 0 ° can be changed by changing the resistance value of the variable resistor 16 or 36 in each of the phase shift circuits 10L and 30C. Oscillator can be realized.

In addition, as described in the second embodiment, the inctor 17 can be formed on a semiconductor substrate by forming a spiral-shaped conductor by photolithography or the like. However, by using such an inductor 17, it is easy to form an integrated circuit by forming the entire oscillator 4 on a semiconductor substrate together with other components (differential amplifier, resistor, etc.).

The time constant T of the LR circuit of the preceding phase shift circuit 10L is L / R, and the time constant T of the CR circuit of the succeeding phase shift circuit 30C is CR. For example, if the oscillator 4 is formed entirely on a semiconductor substrate and the variable resistors 16 and 36 are formed by FETs, the fluctuation of the oscillation frequency with respect to the temperature change of the resistance value is suppressed. So-called temperature compensation becomes possible. In the oscillator 4 of this embodiment, the phase shift circuit 10 L is arranged at the preceding stage, and the phase shift circuit 30 C is arranged at the subsequent stage. For this reason, the oscillator may be configured by exchanging the order before and after, by arranging the phase shift circuit 30C in the preceding stage and the phase shifting circuit 10L in the subsequent stage.

(Fifth embodiment)

The oscillator of each of the above-described embodiments is configured by combining two phase shift circuits in which the relative phase relationship between the input and output signals is opposite, as shown in FIGS. 3 and 6. An oscillator may be configured by combining two phase shift circuits having the same phase relationship.

FIG. 19 is a diagram showing a configuration of an oscillator according to a fifth embodiment. This oscillator 5 has a phase inversion circuit 80 that inverts the phase of an input signal and outputs the inverted signal, and FIG. The phase shift circuit 10C includes a phase shift circuit 10C and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 10C to the input side of the phase inversion circuit 80.

The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, by adjusting the amplification of each differential amplifier 12 in the phase inversion circuit 80 or the two phase shift circuits 10C, the loop gain can be easily set to 1 or more.

By the way, as described in the above-described first embodiment, each of the two phase shift circuits 10C changes the phase shift amount from 180 ° to 0 as the frequency ω of the input signal changes from 0 to ∞. Up to °. For example, CR times in two phase shift circuits 10C Assuming that the time constants of the paths are the same, and this is set to T, the phase shift amount in each of the two phase shift circuits 10C is 90 ° at the frequency of. Therefore, the phase is shifted by 180 ° by the entire two phase shift circuits 10 C, and the phase is inverted by the phase inverting circuit 80 provided at the preceding stage. Thus, a signal having a phase shift amount of 0 ° is output from the subsequent phase shift circuit 10C. By feeding back the output of the subsequent phase shift circuit 10C to the input side of the phase inversion circuit 80 via the feedback resistor 70, sine wave oscillation having the frequency ω is performed.

The transfer function K21 of each of the two phase shift circuits 10C is expressed by the following equation, where を is the time constant of the CR circuit in each phase shift circuit 10C.

K21 = - ^s ~ (26)

1 + 1 s

Becomes Therefore, the overall transfer function K11 when the phase inversion circuit 80 and the two phase shift circuits 10C are connected in cascade is

Kll = (-l) xK2lxK21

(1 Ts) ²

― (1 + Ts) ²

One l + (Ts) ² -2Ts

l + (Ts) ² + 2Ts ". The right side of the equation (27) is the transfer function shown in the equation (16) in the first embodiment.

K1 of T and T ₂ equal to the replaced T. That is, equation (27) is equal to the entire transfer function when the non-inverting circuit 50 and the two phase shift circuits 10 C and 30 C shown in the first embodiment are connected. It can be seen that the configuration in which the inversion circuit 80 and the two phase shift circuits 10C are connected is equivalent to the configuration of the oscillator 1 shown in FIG. 1 in the first embodiment.

Therefore, in the oscillator 5 of the fifth embodiment, by setting the amplification of the phase inversion circuit 80 or the amplification of the two phase shift circuits 10 C to an appropriate value and setting the loop gain to 1 or more, The sine wave oscillation is sustained at the frequency where the phase shift amount becomes 0 ° after one round.

By changing the resistance value R of the variable resistor 16 in each phase shift circuit 10C, Since the phase shift amount in the phase circuit IOC can be changed, the frequency at which the total phase shift amount becomes 0 ° can be changed by the entire phase inverting circuit 80 and the two phase shift circuits 10 C, which can be easily performed. The variable frequency oscillator 5 can be realized.

Also, the oscillator 5 of this embodiment is configured by combining a differential amplifier, a capacitor or a resistor, and any component can be formed on a semiconductor substrate, so that the oscillation frequency and the maximum attenuation are adjusted. It is also easy to form the integrated circuit by forming the entire obtained oscillator 5 on a semiconductor substrate.

(Sixth embodiment)

FIG. 20 is a diagram showing a configuration of an oscillator according to a sixth embodiment. This oscillator 6 has a phase inversion circuit 80 for inverting the phase of an input signal and outputting the inverted signal, and FIG. The phase shift circuit 30C includes a phase shift circuit 30C and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 30C to the input side of the phase inversion circuit 80.

The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, by adjusting the amplification of each differential amplifier 32 in the phase inversion circuit 80 or the two phase shift circuits 30C, the loop gain can be easily set to 1 or more.

By the way, as described in the above-described first embodiment, each of the two phase shift circuits 30C changes the phase shift amount from 0 ° to 180 ° as the frequency of the input signal changes from 0 to ∞. Up to °. For example, assuming that the time constants of the CR circuits in the two phase shift circuits 30 C are the same, and that this is T, the phase at each of the two phase shift circuits 30 C at a frequency of ω = 1 1 The shift amount is 90 °. Therefore, the phase is shifted by 180 ° by the entire two phase shift circuits 30C, and the phase is inverted by the phase inverting circuit 80 provided in the preceding stage. A signal in which the phase shift amount becomes 0 ° in one cycle is output from the subsequent phase shift circuit 30C. By feeding back the output of the subsequent phase shift circuit 30C to the input side of the phase inversion circuit 80 via the feedback resistor 70, a sine wave oscillation having a frequency ω is performed.

Two phase shifting circuits 30 each transfer function K31 of C, when the time constant of the CR circuit of each of the phase shifting circuit 30 C T, replaced by a T to T ₂ in (15), K31 = ^ ^5-ー (28)

1 + T s

Becomes Therefore, when the phase inversion circuit 80 and the two phase shift circuits 30C are connected, the overall transfer function K12 is

K12 = (-l) xK3lxK31

(1 Ts) ²

(1 + Ts) ²

l + (Ts) ² -2Ts

• (29) l + (Ts) ² + 2Ts

It becomes, etc. in the first embodiment transfer functions Kl's and T ₂ as shown in equation (16) derived by replacing the T, the calculation result is obtained.

That is, the configuration in which the phase inversion circuit 80 and the two phase shift circuits 30C are connected in this embodiment is different from the configuration in which the non-inversion circuit 50 and the two phase shift circuits 10C and 30C are connected in the first embodiment, This can be said to be equivalent to the configuration in which the phase inversion circuit 80 and the two phase shift circuits 10C are connected in the fifth embodiment.

Therefore, in the oscillator 6 of the sixth embodiment, by setting the amplification of the phase inversion circuit 80 or the amplification of the two phase shift circuits 30C to an appropriate value and setting the loop gain to 1 or more, The sine wave oscillation is maintained at the frequency where the phase shift becomes 0 ° when the circuit makes one round.

Also, by varying the resistance value R of the variable resistor 36 in each phase shift circuit 30C, the amount of phase shift in each phase shift circuit 30C can be changed, so that the phase inversion circuit 80 and the two phase shift circuits 30C are used. The frequency at which the phase shift amount becomes 0 ° in total can be changed by the entire C, and the variable frequency oscillator 6 can be easily realized.

Further, the oscillator 6 of this embodiment is configured by combining a differential amplifier, a capacitor or a resistor, and any of the constituent elements can be formed on a semiconductor substrate. Therefore, the oscillation frequency and the maximum attenuation are adjusted. It is easy to form the integrated circuit by forming the whole of the obtained oscillator 6 on a semiconductor substrate.

(Seventh embodiment) FIG. 21 is a diagram showing a configuration of an oscillator according to a seventh embodiment. This oscillator 7 has a phase inversion circuit 80 that inverts the phase of an input signal and outputs the inverted signal, and FIG. 11 shows a configuration thereof. It comprises two phase shift circuits 10L and a feedback resistor 70 for returning the output of the subsequent phase shift circuit 10L to the input side of the phase inversion circuit 80.

The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, by adjusting the amplification of each differential amplifier 12 in the phase inversion circuit 80 or the two phase shift circuits 10L, the loop gain can be easily set to 1 or more.

By the way, as described in the above-described second embodiment, each of the two phase shift circuits 10L changes the phase shift amount from 180 ° to 0 ° as the frequency ω of the input signal changes from 0 to ∞. Up to °. For example, assuming that the time constants of the LR circuits in the two phase shift circuits 10L are the same, and let Τ be the phase shift at each of the two phase shift circuits 10L at the frequency of ω = 1 相The amount is 90 °. Accordingly, the phase is shifted by 180 ° by the entire two phase shift circuits 10L, and the phase is inverted by the phase inverting circuit 80 provided in the preceding stage, so that the phase as a whole is completed. Then, a signal having a phase shift amount of 0 ° is output from the subsequent phase shift circuit 10L. By feeding back the output of the subsequent phase shift circuit 10L to the input side of the phase inversion circuit 80 via the feedback resistor 70, a sine wave oscillation having the frequency ω is performed.

As described in the second embodiment, each of the two phase shift circuits 10L has the same input-output voltage relationship as the phase shift circuit 10C whose configuration is shown in FIG. The function can be represented by K21 shown in equation (26). Therefore, the entire transfer function when the phase inversion circuit 80 and the two phase shift circuits 10 L are connected can also be expressed by Κ11 expressed by the equation (27). As described above, the calculation result of the transfer function K11 shown in the equation (27) is obtained by replacing と₂ with 伝達₂ in the transfer function K1 shown in the equation (16) in the first embodiment. be equivalent to.

That is, the configuration in which the phase inversion circuit 80 and the two phase shift circuits 10L are connected in this embodiment is equivalent to the configuration in which the non-inversion circuit 50 and the two phase shift circuits 10C and 30C are connected in the first embodiment. You can say that.

Therefore, in the oscillator 7 of the seventh embodiment, the amplification degree of the phase inversion circuit 80 Alternatively, by setting the gain of the two phase shifters 10 L to an appropriate value and setting the loop gain to 1 or more, the sine wave oscillation is sustained at a frequency where the phase shift amount becomes 0 ° during one round. Is done.

Also, by changing the resistance value R of the variable resistor 16 in each phase shift circuit 10L, the amount of phase shift in each phase shift circuit 10L can be changed, so that the phase inversion circuit 80 and the two phase shift circuits 10 L Thus, the frequency at which the phase shift amount becomes 0 ° in total can be changed, and the variable frequency oscillator 7 can be easily realized.

As described in the second embodiment, the inductor 17 can be formed on a semiconductor substrate by forming a spiral conductor by a photolithography method or the like. By using the inductor 17, it is easy to form an integrated circuit by forming the entire oscillator 7 together with other components (differential amplifier, resistor, etc.) on a semiconductor substrate. In particular, when the oscillator 7 is formed as an integrated circuit, it is easy to increase the frequency ω (= R / L) by reducing the inductance of the inductor 17 and is suitable for increasing the oscillation frequency. .

(Eighth embodiment)

FIG. 22 is a diagram showing a configuration of an oscillator according to an eighth embodiment. This oscillator 8 has a phase inversion circuit 80 that inverts the phase of an input signal and outputs the inverted signal, and FIG. 14 shows a configuration thereof. It is composed of two phase shift circuits 30 L and a feedback resistor 70 for returning the output of the subsequent phase shift circuit 30 L to the input side of the phase inversion circuit 80.

The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, the loop gain can be easily set to 1 or more by adjusting the amplification of each differential amplifier 32 in the phase inversion circuit 80 or the two phase shift circuits 30L.

By the way, as described in the second embodiment, each of the two phase shift circuits 30L changes the phase shift amount from 0 ° to 180 ° as the frequency ω of the input signal changes from 0 to ∞. Up to °. For example, assuming that the time constants of the LR circuits in the two phase shift circuits 30L are the same, and letting this be Τ, the phase shift amount in each of the two phase shift circuits 30L at the frequency of ω = 1 ΖΤ Is 90 °. According to Therefore, the phase is shifted by 180 ° by the entire two phase shift circuits 30L, and the phase is inverted by the phase inverting circuit 80 provided at the preceding stage. A signal having a phase shift amount of 0 ° is output from the subsequent phase shift circuit 30L. By feeding back the output of the subsequent phase shift circuit 30L to the input side of the phase inversion circuit 80 via the feedback resistor 70, a sine wave oscillation having the frequency ω is performed.

As described in the second embodiment, each of the two phase shift circuits 30L has the same input-output voltage relationship as the phase shift circuit 30C whose configuration is shown in FIG. The number can be represented by K31 shown in equation (28). Therefore, the entire transfer function when the phase inversion circuit 80 and the two phase shift circuits 30 L are connected can also be expressed by K12 expressed by the equation (29). As described above, the calculation result of the transfer function K12 shown in the equation (29) is obtained by replacing と₂ with 伝達₂ of the transfer function K1 shown in the equation (16) in the first embodiment. be equivalent to.

That is, the configuration in which the phase inversion circuit 80 and the two phase shift circuits 30L are connected in this embodiment is equivalent to the configuration in which the non-inversion circuit 50 and the two phase shift circuits 10C and 30C are connected in the first embodiment. You can say that.

Therefore, in the oscillator 8 of the eighth embodiment, by setting the amplification of the phase inversion circuit 80 or the amplification of the two phase shift circuits 30 L to an appropriate value and setting the loop gain to 1 or more, The sine wave oscillation is sustained at the frequency where the phase shift becomes 0 ° when the circuit makes one round.

Further, by changing the resistance value R of the variable resistor 36 in each phase shift circuit 30L, the amount of phase shift in each phase shift circuit 30L can be changed, so that the phase inversion circuit 80 and the two phase shift circuits 30L The frequency at which the phase shift amount becomes 0 ° in total can be changed by the entirety of L, and the variable frequency oscillator 8 can be easily realized.

In addition, as described in the second embodiment, the inctor 37 can be formed on a semiconductor substrate by forming a spiral-shaped conductor by photolithography or the like. By using such an ingkta 37, it is easy to form the entire oscillator 8 together with the other components (differential amplifier, resistor, etc.) on a semiconductor substrate to form an integrated circuit. In particular, when the oscillator 8 is formed as an integrated circuit, the inductance ω (= R / L) is increased by reducing the inductance of the inductor 37. It is suitable for increasing the oscillation frequency.

(Ninth embodiment)

FIG. 23 is a circuit diagram showing the configuration of the oscillator according to the ninth embodiment. This oscillator 9A includes a phase inverting circuit 80 that inverts the phase of an input signal and outputs the inverted signal, and FIG. It is composed of phase shift circuits 10 C and 10 L whose configuration is shown in FIG. 1, and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 10 L to the input side of the phase inversion circuit 80.

The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, by adjusting the amplification of each differential amplifier 12 in the phase inversion circuit 80 or the two phase shift circuits 10C and 10L, the loop gain can be easily set to 1 or more. As described in the first embodiment or the second embodiment, each of the phase shift circuits 10C and 10L has a phase shift amount of 1 as the frequency ω of the input signal changes from 0 to 0. It varies from 80 ° to 0 °. For example, assuming that the time constant of the CR circuit in the phase shift circuit 10 C is the same as the time constant of the LR circuit in the phase shift circuit 10 L, and this is assumed to be Τ, the shift at the frequency of ω = 1 ΖΤ The phase shift amount in each of the phase circuits 10C and 10L is 90 °. Therefore, the phase is shifted by 180 ° by the entire two phase shift circuits 10C and 10L, and the phase is inverted by the phase inverting circuit 80 provided at the preceding stage. A signal in which the phase shift amount becomes 0 ° in one cycle is output from the subsequent phase shift circuit 10L. By feeding back the output of the subsequent phase shift circuit 10L to the input side of the phase inversion circuit 80 via the feedback resistor 70, a sine wave oscillation having the frequency ω is performed.

Also, by changing the resistance value R of the variable resistor 16 in each phase shift circuit 10C, 10L, the amount of phase shift in each phase shift circuit 10C, 10L can be changed. The frequency at which the phase shift amount becomes 0 ° in total can be changed by the entirety of the two phase shift circuits 10C and 10L, and the variable frequency oscillator 9A can be easily realized.

In addition, in the oscillator 9A of this embodiment, the inctor 17 can be formed on a semiconductor substrate by forming a spiral-shaped conductor by photolithography or the like. However, by using such an integrator 17, it is easy to form the entire oscillator 9A together with the other components (differential amplifiers, resistors, etc.) on a semiconductor substrate to form an integrated circuit. It is.

The time constant T of the CR circuit of the preceding phase shift circuit 10 C is CR, and the time constant T of the LR circuit of the subsequent phase shift circuit 10 L is L / R. Since it is divided into a molecule and a denominator, for example, when the entire oscillator 9A is formed on a semiconductor substrate and two variable resistors 16 are formed by FETs, the oscillation frequency of the resistance value with respect to a temperature change of the resistance value is changed. It is possible to suppress fluctuations, so-called temperature compensation. In the above-described oscillator 9A of the ninth embodiment, the phase shift circuit 10C is arranged in the preceding stage and the phase shift circuit 10L is arranged in the subsequent stage, respectively. Since the amount only needs to be 180 °, the oscillator may be configured by exchanging these before and after, and disposing the phase shift circuit 10 L at the front stage and the phase shift circuit 10 C at the rear stage, respectively. .

(10th embodiment)

FIG. 24 is a circuit diagram showing the configuration of the oscillator according to the tenth embodiment. The oscillator 9 B includes a phase inversion circuit 80 that inverts the phase of an input signal and outputs the inverted signal. Alternatively, it is composed of a phase shift circuit 30 L and 30 C whose configuration is shown in FIG. 5, and a feedback resistor 70 that feeds back the output of the subsequent phase shift circuit 30 C to the input side of the phase inversion circuit 80. The phase inversion circuit 80 inverts the phase of the input signal, and outputs a signal obtained by amplifying the input signal with a predetermined amplification at the same time as the phase inversion. Therefore, the loop gain can be easily set to 1 or more by adjusting the amplification degree of each differential amplifier 32 in the phase inversion circuit 80 or the two phase shift circuits 30L and 30C. By the way, as described in the second embodiment or the first embodiment, each of the phase shift circuits 30 L and 30 C has a phase shift amount as the frequency ω of the input signal changes from 0 to ∞. Changes from 0 ° to 180 °. For example, assuming that the time constant of the LR circuit in the phase shift circuit 30 L and the time constant of the CR circuit in the phase shift circuit 30 C are the same, and if this is Τ, then at the frequency of ω = 1 / Τ The phase shift amount in each of the phase shift circuits 30L and 30C is 90 °. Therefore, two phase shift circuits 30L, The phase is shifted by 180 ° by the entire 30C, and the phase is inverted by the phase inverting circuit 80 provided in the preceding stage.As a whole, the phase completes and the phase shift amount becomes 0 °. Is output from the subsequent phase shift circuit 30C. By feeding back the output of the subsequent phase shift circuit 30C to the input side of the phase inversion circuit 80 via the feedback resistor 70, a sine wave oscillation having a frequency ω is performed.

Also, by changing the resistance R of the variable resistor 36 in each of the phase shift circuits 30L and 30C, the amount of phase shift in each of the phase shift circuits 30L and 30C can be changed. The frequency at which the phase shift amount becomes 0 ° in total can be changed by the entire phase shift circuits 30L and 30C, and the variable frequency oscillator 9B can be easily realized.

In the oscillator 9B of this embodiment, the inductor 37 has a force that can be formed on a semiconductor substrate by forming a spiral conductor by photolithography or the like. By using this, it is easy to form the entire oscillator 9B together with other components (differential amplifiers, resistors, etc.) on a semiconductor substrate to form an integrated circuit.

The time constant T of the LR circuit of the preceding phase shift circuit 30L is LZR, and the time constant T of the CR circuit of the subsequent phase shift circuit 30C is CR, and the resistance value R is the denominator and the denominator, respectively. For example, if the entire oscillator 9B is formed on a semiconductor substrate and two variable resistors 36 are formed by FETs, the fluctuation of the oscillation frequency due to the temperature change of the resistance value is suppressed. So-called temperature compensation becomes possible. In the above-described oscillator 9B of the tenth embodiment, the phase shift circuit 30L is arranged in the preceding stage and the phase shift circuit 30C is arranged in the subsequent stage, respectively. Since it is only necessary that the phase shifter be 180 °, the oscillator may be configured by exchanging the front and rear sides, and disposing the phase shift circuit 30C in the preceding stage and the phase shift circuit 30L in the subsequent stage.

(Other modes for carrying out the invention)

The non-inverting circuit 50 or the phase inverting circuit 80 that constitutes the oscillator according to each of the above-described embodiments can be easily configured by combining transistors, operational amplifiers, resistors, and the like. FIG. 25 is a diagram showing a specific example of a non-inverting circuit and a phase inverting circuit formed by using an operational amplifier. The non-inverting circuit 50 shown in FIG. And an operational amplifier 52 having a resistor 56 connected between the inverting input terminal and the output terminal, and operates as a buffer having a predetermined amplification determined by the resistance ratio of the two resistors 54 and 56. . When an AC signal is input to the non-inverting input terminal of the operational amplifier 52, an in-phase signal is output from the output terminal of the operational amplifier 52. The phase inversion circuit 80 shown in FIG. 25 (B) includes an operational amplifier 82 in which an input signal is input to an inverting input terminal via a resistor 84 and a non-inverting input terminal is grounded. It comprises a resistor 86 connected between the inverting input terminal and the output terminal. The phase inverting circuit 80 has a predetermined amplification degree determined by the resistance ratio of the two resistors 84 and 86, and when an AC signal is input to the inverting input terminal of the operational amplifier 82 via the resistor 84. The output terminal of the operational amplifier 82 outputs an inverted-phase signal with an inverted phase.

By the way, the oscillator of each of the above-described embodiments is configured by two phase shift circuits and a non-inverting circuit or two phase shift circuits and a phase inverting circuit, and is configured by three connected circuits as a whole. Thus, a predetermined oscillation operation is performed by setting the total phase shift amount to 0 ° at a predetermined frequency. Therefore, focusing only on the amount of phase shift, there is a certain degree of freedom in the order in which the three circuits are connected, and the connection order can be determined as necessary.

FIG. 26 is a block diagram showing a connection state when an oscillator is configured by combining two phase shift circuits and a non-inverting circuit. In these block diagrams, the feedback impedance element 70a most commonly uses a feedback resistor 70 as shown in FIG. However, the feedback impedance element 70a may be formed by a capacitor or an integrator, or may be formed by combining a resistance and a capacitor or an inductor.

FIG. 26 (A) shows a configuration in which a non-inverting circuit 50 is arranged at a stage subsequent to two phase shift circuits. As described above, when the non-inverting circuit 50 is arranged at the subsequent stage, a large output current can be taken out by providing the non-inverting circuit 50 with an output buffer function. FIG. 26 (B) shows a configuration in which a non-inverting circuit 50 is arranged between two phase shift circuits. In this way, in the case where the non-inverting circuit 50 is arranged in the middle, mutual interference between the preceding phase shift circuit and the subsequent phase shift circuit can be completely prevented.

FIG. 26 (C) shows a configuration in which a non-inverting circuit 50 is arranged in front of the two phase shift circuits. This configuration is shown in FIG. This corresponds to the oscillator 2 shown in FIG. 17, the oscillator 3 shown in FIG. 17, and the oscillator 4 shown in FIG. As described above, when the non-inverting circuit 50 is disposed in the preceding stage, the influence of the feedback impedance element 70a on the preceding-stage phase shifting circuit can be minimized.

Similarly, FIG. 27 is a block diagram showing a connection state when an oscillator is configured by combining two phase shift circuits and a phase inversion circuit. As described with reference to FIG. 26, the feedback impedance element 70a most commonly uses the feedback resistor 70. However, the feedback impedance element 70a may be formed by a capacitor or an inductor, or may be formed by combining a resistor, a capacitor, or an inductor.

FIG. 27 (A) shows a configuration in which a phase inversion circuit 80 is arranged at a stage subsequent to the two phase shift circuits. As described above, when the phase inversion circuit 80 is disposed at the subsequent stage, a large output current can be obtained by providing the phase inversion circuit 80 with an output buffer function.

FIG. 27 (B) shows a configuration in which a phase inversion circuit 80 is arranged between two phase shift circuits. As described above, when the phase inversion circuit 80 is arranged in the middle, mutual interference between the two phase shift circuits can be completely prevented.

FIG. 27 (C) shows a configuration in which a phase inverting circuit 80 is arranged in front of two phase shifting circuits. This configuration consists of the oscillator 5 shown in Fig. 19, the oscillator 6 shown in Fig. 20, the oscillator 7 shown in Fig. 21, the oscillator 8 shown in Fig. 22, and the oscillator shown in Fig. 23. It corresponds to each of the oscillator 9A and the oscillator 9B shown in FIG. As described above, when the phase inverting circuit 80 is arranged in the preceding stage, the influence of the feedback impedance element 70a on the preceding phase shifting circuit can be minimized.

Further, the phase shift circuit shown in each of the above embodiments includes the variable resistor 16 or 36. These variable resistors 16 and 36 are, specifically, junction type or MOS It can be realized by using a type FET.

FIG. 28 is a circuit diagram showing a configuration of a phase shift circuit in which the variable resistor 16 or 36 in two types of phase shift circuits 10 C or 30 C having a CR circuit is replaced by an FET. FIG. 1 shows a configuration in which the variable resistor 16 is replaced with an FET in the phase shift circuit 10C. FIG. 28 (B) shows a configuration in which the variable resistor 36 is replaced by an FET in the phase shift circuit 30C.

Similarly, Fig. 29 is a circuit diagram showing the configuration of a phase shift circuit in which the variable resistor 16 or 36 in the two types of phase shift circuits 10L or 30L having an LR circuit is replaced by an FET. Fig. 2 shows a configuration in which the variable resistor 16 is replaced with an FET in the phase shift circuit 10L. FIG. 29 (B) shows a configuration in which the variable resistor 36 is replaced with an FET in the phase shift circuit 30L.

In this way, instead of using the variable resistor 16 or 36, if a channel formed between the source and the drain of a £ is used as a resistor, the gate voltage is controlled and the channel resistance is changed arbitrarily within a certain range. Thus, the amount of phase shift in each phase shift circuit can be changed. Therefore, since the frequency at which the phase shift amount of the looping signal becomes 0 ° in each oscillator can be changed, the oscillation frequency of the oscillator can be arbitrarily changed.

In each of the phase shift circuits shown in FIGS. 28 and 29, the variable resistor is configured by one FET, that is, a p-channel or n-channel FET, but the p-channel FET and the n-channel FET are connected. One variable resistor may be configured by connecting in parallel, and a gate voltage of the same magnitude and different polarity may be applied between the gate and the substrate of each FET. When changing the resistance value, the magnitude of the gate voltage may be changed. In this way, by combining two FETs to form a variable resistor, the non-linear region of the FET can be improved, so that distortion of the oscillation output can be reduced.

Further, the phase shift circuit 10C or 30C shown in each of the above-described embodiments is obtained by changing the resistance value of the variable resistor 16 or 36 connected in series with the capacitor 14 or 34 to change the phase shift amount. Although the overall oscillation frequency was changed, the capacitors 14, 34 were formed by variable capacitance elements, and the capacitance was changed. In this case, the overall oscillation frequency may be changed.

FIG. 30 is a circuit diagram showing a configuration of the phase shift circuit in the case where the capacity 14 in the phase shift circuit 10C or 30C shown in each embodiment is replaced with a variable capacitance diode. 1A shows a configuration in which the variable resistor 16 is replaced with a fixed resistor and the capacitor 14 is replaced with a variable capacitance diode in one of the phase shift circuits 10C shown in FIG. 1 and the like. FIG. 30 (B) shows a configuration in which, in the other phase shift circuit 30C shown in FIG. 1, etc., the variable resistor 36 is replaced with a fixed resistor and the capacitor 34 is replaced with a variable capacitance diode. .

In FIGS. 30 (A) and (B), the capacitor connected in series with the variable capacitance diode blocks direct current when a reverse bias voltage is applied between the anode and cathode of the variable capacitance diode. The impedance of the capacitor is extremely small at the operating frequency, that is, it has a large capacitance. In addition, since the potential at both ends of the capacitance shown in FIGS. 30 (A :) and (B) is constant when the DC component is viewed, a reverse bias voltage larger than the amplitude of the AC component is applied to the anode force source. By applying the voltage between them, each variable capacitance diode can be operated as a variable capacitance capacitor.

In this way, the capacitor 14 or 34 is composed of a variable capacitance diode, and the reverse bias voltage applied between the node and the cathode is controlled to arbitrarily change the capacitance of the variable capacitance diode within a certain range. The amount of phase shift in each phase shift circuit can be changed. Therefore, it is possible to change the frequency at which the phase shift amount of the signal that goes round in each oscillator becomes 0 °, and it is possible to arbitrarily change the oscillation frequency of the oscillator.

By the way, in FIGS. 30 (A :) and (B) described above, a variable capacitance diode is used as the variable capacitance element, but the source and the drain are connected to a fixed potential in a DC manner, and the variable voltage is applied to the gate. It may be configured to use the FET to which is applied. As described above, since the potentials at both ends of the variable capacitance diodes shown in FIGS. 30 (A) and (B) are fixed in a DC manner, these variable capacitance diodes need only be replaced with the FETs described above. By varying the voltage applied to the gate, the gate capacitance, that is, the capacitance of the FET can be changed. Further, in FIGS. 30 (A) and (B) described above, only the capacitance of the variable capacitance diode is changed, but the resistance of the variable resistor 16 or 36 may be changed at the same time. FIG. 30 (C) shows a configuration in which a variable resistor 16 is used and the capacitor 14 is replaced with a variable capacitance diode in one of the phase shift circuits 10C shown in FIG. 1 and the like. . FIG. 30 (D) shows a configuration in which the variable resistor 36 is used and the capacitor 34 is replaced by a variable capacitance diode in the other phase shift circuit 30 C shown in FIG. 1 and the like. . In these, it is natural that the variable capacitance diode may be replaced by a variable gate capacitance FET.

Needless to say, the variable resistors shown in FIGS. 30 (C) and (D) can be formed by utilizing the channel resistance of FET as shown in FIG. In particular, when a p-channel FET and an n-channel FET are connected in parallel to form one variable resistor and gate voltages of the same magnitude and polarities are applied between the base and substrate of each FET Can improve the non-linear region of the FET, so that the distortion of the oscillation signal can be reduced.

As described above, even when a phase shift circuit is configured by combining a variable resistor and a variable capacitance element, each of the phase shift circuits is changed by arbitrarily changing the resistance value of the variable resistance and the capacitance of the variable capacitance element within a certain range. The amount of phase shift in the phase circuit can be changed. Therefore, it is possible to change the frequency at which the phase shift amount of the looping signal is 0 ° in each oscillator, and arbitrarily change the oscillation frequency of the oscillator.

When the oscillator of each of the above embodiments is formed on a semiconductor substrate, it is not possible to set a very large capacitance as the capacitor 14 or 34 in the phase shift circuits 10C and 30C. Therefore, if the small capacitance of the capacitor actually formed on the semiconductor substrate can be apparently increased by devising the circuit, the time constant T is set to a large value to reduce the oscillation frequency. This is convenient.

FIG. 31 is a circuit diagram showing a modification in which the capacitors 14 or 34 used in the phase shift circuits 10C and 30C shown in FIG. It operates as a capacitance conversion circuit that makes the capacitance of a capacitor formed on a semiconductor substrate appear large. The entire circuit shown in FIG. 31 corresponds to the capacitor 14 or 34 included in the phase shift circuit 10 C or 30 C. The capacitance conversion circuit 14a shown in FIG. 31 is composed of a capacitor 210 having a predetermined capacitance CO, two operational amplifiers 212 and 214, and four resistors 216, 218, 220 and 222. Have been.

The operational amplifier 212 in the first stage has a resistor 218 (this resistance is R18) connected between the output terminal and the inverting input terminal, and furthermore, this inverting input terminal is connected to the resistor 216 (this resistance is represented by R18). R 16).

The voltage between the voltage E 1 applied to the non-inverting input terminal of the operational amplifier 212 of the first stage and the voltage E 2 appearing at the output terminal is

E 2 = U +}

lD

There is a relationship. The first-stage operational amplifier 212 mainly operates as a buffer that performs impedance conversion, and may have a gain of 1. A gain of 1 means R 18ZR 16-0, that is, R 16 is set to infinity (the resistor 216 may be removed), or R 18 may be set to ΟΩ (directly connected).

In the second-stage operational amplifier 214, a resistor 222 (the resistance value of is represented by R22) is connected between the output terminal and the inverting input terminal, and the inverting input terminal and the output terminal of the above-described operational amplifier 212 are connected to each other. The resistor 220 (this resistance is R20) is connected between the two, and the non-inverting input terminal is grounded.

Assuming that the voltage appearing at the output terminal of the second-stage operational amplifier 214 is E3, the voltage between this voltage E3 and the voltage E2 appearing at the output terminal of the first-stage operational amplifier 212 is

E 3 =-If E2… As described above, the second-stage operational amplifier 214 operates as an inverting amplifier, and the first-stage operational amplifier 212 is used to set its input side to high impedance.

Further, as described above, the capacitor 210 having a predetermined capacitance is provided between the non-inverting input terminal of the first-stage operational amplifier 212 and the output terminal of the second-stage operational amplifier 214. It is connected.

Circuit of the capacitance conversion circuit 14a shown in FIG. 31 except for the capacitor 210 Assuming that the entire transfer function is K4, the capacitance conversion circuit 14a can be represented by a block diagram shown in FIG. Figure 33 is a block diagram converted from this by Miller's theorem.

Using the impedance Z0 shown in FIG. 32 to represent the impedance Z1 shown in FIG. 33,

^{Z1 =} T¾4- ⁽³²⁾ . Here, in the case of the capacitance conversion circuit 14a shown in FIG. 31, the impedance Z0 = 1 / (jωΟΟ), and this is substituted into the equation (32) to obtain jωΟΟ

Zl =

-Κ4

■ (33) j ω {(1-K4) C0}

C = (1-K4) C0-(34) Equation (34) indicates that the capacitance CO of the capacitor 210 in the capacitance conversion circuit 14a has apparently increased by (1−K4) times.

Therefore, when the gain K4 is negative, (1-1 K4) is always larger than 1, so that the capacitance C0 can be changed to the larger one.

By the way, the gain of the amplifier in the capacitance conversion circuit 14a shown in FIG. 31, that is, the gain K4 of the amplifier composed of the entirety of the operational amplifiers 212 and 214 is given by the following equations (30) and (31).

Becomes Substituting equation (35) into equation (34) yields c = ^{{1+ (1+} ti) -fi ^{} co} " ⁽³⁶⁾ . Therefore, the resistance of the four resistors 216, 218, 220, and 222 By setting the value to a predetermined value, the apparent capacitance C between the two terminals 224 and 226 can be increased. Further, when the gain of the amplifier of the first-stage operational amplifier 212 is 1, that is, when R 16 is set to infinity (the resistor 216 is removed) or R 18 is set to 0 Ω as described above, R lSZR ^ In the case of O, the above equation (36) is simplified,

C = (1 +) C O-(37).

FIG. 34 is a circuit diagram showing a configuration of the capacitance conversion circuit 14b in which the resistor 216 connected to the inverting input terminal of the first operational amplifier 212 shown in FIG. 31 is removed. In this case, since the capacitance C appearing between the terminals 224 and 226 is represented by the equation (37), it is possible to change C O to a larger value only by changing the ratio of R22 and R20.

As described above, the capacitance conversion circuit 14a or 14b described above has a resistance ratio R22Z R20 between the resistor 220 and the resistor 222, and a resistance ratio R18 between the resistors 216 and 218. By changing the capacitance, the capacitance C 0 of the capacitor 210 actually formed on the semiconductor substrate can be converted to an apparently larger one. Therefore, when forming the entire oscillator 1 shown in FIG. 1 and the like on a semiconductor substrate, the capacitor 210 having a small capacitance CO is formed on the semiconductor substrate and the With the circuit shown in the figure or Fig. 34, it can be converted to a large capacitance C, which is convenient for integration.

In addition, at least one of the resistors 216, 218, 220, and 222 (at least one of the resistors 220 and 222 in the case of the capacitance conversion circuit 14b shown in FIG. 34) is formed by a variable resistor. Specifically, by connecting a junction type or MOS type FET or a p-channel FET and an n-channel FET in parallel to form a variable resistor, the capacitance can be easily changed. A conversion circuit can be formed. Therefore, by using this capacitance conversion circuit instead of the variable capacitance diode shown in FIG. 30, the phase shift amount can be arbitrarily changed within a certain range. Therefore, it is possible to change the frequency at which the phase shift amount of the looping signal in the oscillator is 0 °, and to arbitrarily change the oscillation frequency of the oscillator of each embodiment. Since the first-stage operational amplifier 212 is used as a buffer for increasing the input impedance, this operational amplifier 212 is used as an emitter hollow. ヮ It may be replaced with a circuit or a source follower circuit.

FIG. 35 is a circuit diagram showing a configuration of a capacitance conversion circuit 14c using an emitter follower circuit in the first stage. This capacitance conversion circuit 14c has the structure shown in FIG. It has a configuration in which the operational amplifier 212 and the two resistors 216 and 218 at the stage are replaced with an emitter follower circuit 228 including a bipolar transistor and a resistor.

FIG. 36 is a diagram showing the configuration of a capacitance conversion circuit 14 d using a source follower circuit in the first stage. This capacitance conversion circuit 14 d It has a configuration in which the stage operational amplifier 212 and the two resistors 216 and 218 are replaced with a source follower circuit 230 including an FET and a resistor.

Further, each of the above-mentioned capacitance conversion circuits 14 c and 14 d changes the apparent capacitance between the terminals 224 and 226 by changing the resistance ratio of the resistors 220 and 222 connected to the operational amplifier 214. The point that C can be changed arbitrarily is the same as the capacitance conversion circuit 14a shown in FIG. 31 and the like. Therefore, by replacing at least one of the resistors 220 and 222 with a junction-type or MOS-type FET or a variable resistor in which a p-channel FET and an n-channel FET are connected in parallel, the capacitance can be changed. A circuit can be configured, and by using this capacitance conversion circuit instead of the variable capacitance diode shown in FIG. 30, the phase shift amount can be arbitrarily changed within a certain range. For this reason, the frequency at which the phase shift amount of the signal that goes around in each oscillator becomes 0 ° can be changed, and the oscillation frequency of the oscillator of each embodiment can be arbitrarily changed.

By the way, in FIGS. 31 to 36 described above, by combining an amplifier having a predetermined gain and a capacitor, the apparent capacitance becomes larger than the capacitance actually held by the capacitor element. However, the inductor can be used in place of the capacitor, and the inductance of the inductor can be increased in appearance.

That is, as described above, when the impedance Z1 shown in FIG. 33 is represented using the impedance Z0 shown in FIG. 32, the equation (32) is obtained. Here, in the case of an inqtor having an inductance L 0, the impedance Z 0 = jw LO, which is substituted into the equation (32) to obtain ^{1 =} Τ = 1ΰ

=] ^Ω · 1 ^ — K4-(38)

L =-^ ττ ~ (39)

14

Becomes This equation (39) shows that the inductance actually possessed by the inkuta element has apparently increased by a factor of 1 (1 一 4), and when the gain Κ4 is set between 0 and 1, the apparent It can be seen that the conductance becomes larger.

FIG. 37 is a circuit diagram showing a modified example in which the ingktor 17 or 37 used for the phase shift circuits 10L and 30L shown in FIG. Then, it operates as an inductance conversion circuit that apparently increases the inductance of the inductor element formed on the semiconductor substrate. The entire circuit shown in FIG. 37 corresponds to the ingktor 17 or 37 included in the phase shift circuits 10L and 30L. The inductance conversion circuit 17a shown in FIG. 37 includes an inductor 260 having a predetermined inductance L0, two operational amplifiers 262 and 264, and two resistors 266 and 268.

The first-stage operational amplifier 262 is a non-inverting amplifier with a gain of 1 whose output terminal is connected to the inverting input terminal, and mainly operates as a buffer for performing impedance conversion. Similarly, the output terminal of the second-stage operational amplifier 264 is connected to the inverting input terminal, and operates as a non-inverting amplifier having a gain of 1. Further, a voltage dividing circuit composed of resistors 266 and 268 is inserted between these two non-inverting amplifiers.

Thus, by inserting the voltage dividing circuit between the two, the gain of the whole amplifier including the two non-inverting amplifiers can be freely set between 0 and 1.

In the inductance conversion circuit 17a shown in FIG. 37, assuming that the transfer function of the entire circuit (amplifier) except for the inductor 260 is K4, this gain K4 is equal to that of the voltage dividing circuit composed of the resistors 266 and 268. It is determined by the voltage division ratio. If the resistance values are R66 and R68,

K4 = ^R68- (40)

R66 + R68 Becomes By substituting this gain K4 into Eq. (39) and calculating the apparent inductance L,

L 0

L =

1 R68

One

R66 + R68

= ₊ f |). _L. ···

Becomes Therefore, by increasing the resistance ratio R68ZR66 of the resistors 266 and 268, the apparent inductance L between the two terminals 254 and 256 can be increased. For example, when R68 = R66, the inductance L can be made twice as large as L0 from the equation (41).

As described above, the above-described inductance conversion circuit 17a changes the voltage dividing ratio of the voltage dividing circuit inserted between the two non-inverting amplifiers, thereby changing the inductance L 0 of the actually connected inductor 260. Can be apparently enlarged. Therefore, when forming the entire oscillator 2 shown in FIG. 10 etc. on a semiconductor substrate, an inductor 260 having a small inductance L0 is formed on the semiconductor substrate by a spiral conductor or the like. In this case, the inductance can be converted to a large inductance L by the inductance conversion circuit shown in FIG. 37, which is convenient for integration. In particular, if a large inductance can be secured in this manner, it becomes easy to lower the oscillation frequency of the oscillator 2 and the like shown in FIG. 10 to a relatively low frequency region. In addition, by performing integration, the mounting area of the entire oscillator can be reduced, and material costs can be reduced.

In addition to the case where the voltage dividing ratio of the voltage dividing circuit by the resistors 266 and 268 is fixed, at least one of the two resistors 266 and 268 is formed by a variable resistor, specifically, a junction type or MOS type. This voltage division ratio may be continuously changed by forming a variable resistor by connecting the other FETs or the p-channel FET and the n-channel FET in parallel. In this case, the gain of the entire amplifier including the operational amplifiers 262 and 264 shown in FIG. 37 changes, and the inductance L between the terminals 254 and 256 also changes continuously. Then, the phase shift amount of the looping signal in the oscillator becomes 0 ° The frequency can be changed, and the oscillation frequency of the above-described oscillator can be arbitrarily changed.

In addition, in the inductance conversion circuit 17a shown in Fig. 37, since the gain of the whole amplifier including the two operational amplifiers 262 and 264 is set to 1 or less, the whole is replaced with an emitter follower circuit or a source follower circuit. You may.

FIG. 38 is a diagram showing a configuration of an inductance conversion circuit in which the entire amplifier including the operational amplifiers 262 and 264 is replaced by an emitter follower circuit. A bipolar transistor 278 to which two resistors 274 and 276 are connected, an inductor 260 connected between the voltage dividing point by the two resistors 274 and 276 and the base of the transistor 278, and a DC blocking capacitor 280 It is composed of The impedance of the capacitor 280 inserted at one end of the inccuter 260 is extremely small at the operating frequency so as not to affect the frequency characteristics, that is, set to a large capacitance.

The gain of the emitter follower circuit described above is mainly determined by the resistance ratio of the two resistors 274 and 276, and the gain is always less than 1. Therefore, as can be seen from equation (39), the inductor 260 is actually The apparent inductance L0 can be increased. In addition, since one emitter hollow circuit is used, the circuit configuration can be simplified, and the maximum operating frequency can be set high.

FIG. 38 (B) is a diagram showing a modified example thereof, and differs in that the two resistors 274 and 276 shown in FIG. 38 (A) are replaced with variable resistors 282. As described above, by using the variable resistor 282, the gain can be arbitrarily and continuously changed, so that the apparent inductance L can also be arbitrarily and continuously changed. By using the circuit 17c as a variable inductor, the amount of phase shift in each phase shift circuit can be arbitrarily changed within a certain range. For this reason, the frequency at which the phase shift amount of the looping signal in the oscillator becomes 0 ° can be changed, and the oscillation frequency of the oscillator can be arbitrarily changed.

The inductance conversion circuit 17c shown in FIG. 38 (B) replaces the two resistors 274 and 276 in FIG. 38 (A) with one variable resistor 282. At least one of 274 and 276 may be constituted by a variable resistor. FIG. 39 is a diagram in which each of the inductance conversion circuits 17b and 17C shown in FIGS. 38 (A) and (B) is realized by a source follower circuit, and a bipolar transistor 278 is connected to the FET284. FIG. 39 (A) corresponds to FIG. 38 (A), and FIG. 39 (B) corresponds to FIG. 38 (B).

FIG. 40 is a circuit diagram showing a modification of the inductance conversion circuit 17a shown in FIG. The inductance conversion circuit 17d shown in FIG. 40 includes an npn-type bipolar transistor 286 and a resistor 290 connected to its emitter, a pnp-type bipolar transistor 288 and a resistor 292 connected to its emitter. , And an inductor 260 having an inductance L 0.

The transistor 286 and the resistor 290 form a first emitter follower circuit, and the other transistor 288 and the resistor 292 form a second emitter follower circuit, which are cascaded. Moreover, since the npn-type transistor 286 and the pnp-type transistor 288 are used, the base potential of the transistor 286, which is one end of the inductor 260, and the emitter potential of the transistor 288 can be set to be almost the same. This eliminates the need for a DC blocking capacitor.

Note that various modifications are possible in each of the embodiments described above.

For example, in each of the oscillators of the above-described embodiments, the difference between the two inputs is doubled by the differential amplifiers 12 and 32 in the phase shift circuits 10 C and 10 L or the phase shift circuits 30 C and 30 L, respectively. Although the loop gain of the oscillator is set to approximately 1 by using the output of the phase shift circuit, the amplification of the differential amplifiers 12 and 32 may be set to other values. For example, in each of the differential amplifiers 12 and 32, the difference between the two inputs is not amplified or amplified with an amplification other than twice and output, and the amplification of the non-inverting circuit 50 or the phase inverting circuit 80 is adjusted. The loop gain of the oscillator may be set to 1 or more.

In addition, the oscillator of each of the above-described embodiments includes two phase shift circuits. However, when the oscillation frequency is varied, the resistor constituting the CR circuit or the LR circuit included in both phase shift circuits is used. In addition to changing at least one element constant of the capacitor and the intagta, changing the resistance and at least one element constant of the capacitor and the intagta that constitute the CR circuit or the LR circuit included in one phase shift circuit May be considered. Alternatively, an oscillator having a fixed oscillation frequency may be configured by replacing the variable resistors 16 and 36 in each phase shift circuit shown in FIG. 1 and the like with a resistor having a fixed resistance value.

In addition, the oscillator of each of the above-described embodiments is obtained from one of the two phase shift circuits constituting the oscillator, or two of the phase shift circuits and the non-inverting circuit 50. Although a sine wave signal is extracted from one circuit, a sine wave signal may be extracted from two or three circuits constituting an oscillator. In particular, when the time constants of the two phase shift circuits forming the oscillator are set to be the same, the phase shift amount in each phase shift circuit is 90 °, and the phases are shifted 90 ° from each other. Phase output can be obtained. Further, from the circuits before and after the phase inversion circuit 80, two-phase outputs whose phases are inverted with each other can be obtained. Industrial applicability

As is clear from the description based on the best mode for carrying out the present invention, according to the oscillator of the present invention, the constituent elements can be formed by an integrated circuit manufacturing method. Can be formed as a small integrated circuit on a semiconductor wafer and can be manufactured at low cost by mass production.

In particular, the channel between the source and drain of the FET is used as a variable resistor that constitutes the CR circuit or LR circuit of each phase shift circuit, and the control voltage applied to the gate of this FET is changed to change the channel resistance. With such a configuration, it is possible to avoid the influence of the inductance of the wiring to which the control voltage is applied divided by the capacitance, and to obtain an oscillator having ideal characteristics almost as designed.

Also, if the capacitor that forms the CR circuit in the phase shift circuit is formed by a capacitance conversion circuit, or the inductor that forms the LR circuit in the phase shift circuit is formed by an inductance conversion circuit, the capacitance and inductance will be reduced. Since the size can be easily increased, the oscillation frequency can be reduced and the mounting area of the entire oscillator can be reduced.

Furthermore, in an oscillator using LC resonance, the oscillation frequency ω is 1 STL C, so if the capacitance C or the inductance L is changed to adjust the oscillation frequency, the oscillation frequency will be the square root of the change. Changes in proportion to According to this oscillator, it is also possible to change the resistance in proportion to the resistance value of the resistors included in the two phase shift circuits, and it is possible to greatly adjust the oscillation frequency.

Claims

The scope of the claims

1. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, A second series circuit including a third resistor and a capacitor; a potential at a connection point of the first and second resistors forming the first series circuit; and a third series circuit forming the second series circuit. And a differential amplifier that amplifies the difference between the potential of the resistor and the potential of the connection point of the capacitor with a predetermined amplification degree and outputs the amplified signal. The subsequent stage of the two cascade-connected two phase shift circuits An oscillator characterized by feeding back the output of the phase shifter to the input side of the preceding stage, and extracting a sine wave oscillation output from one of L and shift of the two phase shift circuits.

2. The oscillator according to claim 1, wherein a two-phase output is extracted from the two phase shift circuits.

3. The oscillator according to claim 1, wherein the connection of the third resistor and the capacitor constituting the second series circuit is reversed in the two phase shift circuits.

4. The oscillator according to claim 1, wherein the third resistor of at least one of the two phase shift circuits is formed by an FET channel, and the channel resistance is changed by changing a gate voltage.

5. The third resistor of at least one of the two phase shift circuits is formed by connecting a p-channel FET and an n-channel FET in parallel, and the magnitude of the gate voltage of each FET having a different polarity is formed. 2. The oscillator according to claim 1, wherein the channel resistance is changed by changing the length.

6. The oscillation frequency is changed by forming at least one of the capacitors of the two phase shift circuits by a variable capacitance element, and changing the capacitance to change the oscillation frequency. Oscillator.

7. At least one of the capacitors of the two phase shift circuits is connected to a capacitance conversion circuit including an amplifier having a negative gain and a capacitor element connected in parallel between the input and output of the amplifier. Claim 1 characterized by forming Oscillator.

8. The oscillation frequency according to claim 7, wherein the oscillation frequency is changed by changing the capacitance of the amplifier as viewed from the input side by changing the gain of the amplifier.

9. An input AC signal is applied to both ends, a first series circuit composed of first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. And a differential amplifier that amplifies the difference between the potential at the connection point of the capacitor and the potential at a predetermined amplification degree and outputs the result.

A non-inverting circuit that outputs the input AC signal without changing the phase,

Cascading each of the two phase-shift circuits and the non-inverting circuit, and returning the output of the last stage among the plurality of cascaded circuits to the input side of the first stage. An oscillator characterized by extracting a sine wave oscillation output from one of the circuits.

10. The oscillator according to claim 9, wherein a two-phase output is extracted from the two phase shift circuits and the non-inverting circuit.

10. The oscillator according to claim 9, wherein the third resistor and the capacitor constituting the second series circuit are connected in opposite ways in the two phase shift circuits. .

12. The oscillator according to claim 9, wherein the third resistor of at least one of the two phase shift circuits is formed by a FET channel, and a gate voltage is changed to change a channel resistance. .

1 3. The third resistor of at least one of the two phase shift circuits is formed by connecting a ρ-channel type FET and an η-channel type FET in parallel, and the gate of each F Ε なる having a different polarity is formed. 10. The oscillator according to claim 9, wherein the channel resistance is changed by changing the magnitude of the voltage.

1 4. To change the oscillation frequency by forming at least one of the capacitors of the two phase shift circuits with a variable capacitance element and changing this capacitance. 10. The oscillator according to claim 9, wherein:

5. At least one of the capacitors of the two phase shift circuits is connected to a capacitance conversion circuit including an amplifier having a negative gain and a capacitor element connected in parallel between the input and output of the amplifier. 10. The oscillator according to claim 9, wherein the oscillator is formed.

6. The oscillator according to claim 15, wherein an oscillation frequency is changed by changing a capacitance of the amplifier as viewed from an input side of the amplifier by changing a gain of the amplifier.

7. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by an intagter; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. And a differential amplifier that amplifies the difference between the potential at the connection point of the inductor and the potential at a predetermined amplification degree and outputs the amplified signal. The output of the latter stage of the two cascaded phase shift circuits is provided. An oscillator that feeds back to a previous stage input side and extracts a sine wave oscillation output from one of the two phase shift circuits.

8. The oscillator according to claim 17, wherein a two-phase output is extracted from the two phase shift circuits.

9. The oscillator according to claim 17, wherein a connection method of the third resistor and the intagter constituting the second series circuit is reversed in the two phase shift circuits. .

0. The claim 17, wherein the third resistor of at least one of the two phase shift circuits is formed by a channel of a FET, and the channel resistance is changed by changing a gate voltage. Oscillator.

1. The third resistor of at least one of the two phase shift circuits is formed by connecting a p-channel FET and an n-channel FET in parallel, and the magnitude of the gate voltage of each FET having a different polarity is formed. 18. The oscillator according to claim 17, wherein the channel resistance is changed by changing the length.

2. The oscillator according to claim 17, wherein an oscillation frequency is changed by changing an inductance of at least one of the two phase shift circuits.

3. Change the gain of at least one of the two phase shift circuits from 0 to

18. The oscillator according to claim 17, wherein the oscillator is formed by an inductance conversion circuit including an amplifier set between 1 and an inductor element connected in parallel between the input and output of the amplifier.

4. The oscillation frequency is varied by varying the gain of the amplifier to change the inductance seen from the input side of the amplifier.

3. The oscillator according to 3.

5. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by an intagter; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. And a differential amplifier that amplifies the difference between the potential at the connection point of the inductor and the potential at the connection point of the inductor with a predetermined amplification degree and outputs the amplified signal.

Each of the two phase shift circuits and the non-inverting circuit is cascaded, and the output of the last stage among the plurality of cascade-connected circuits is fed back to the input side of the first stage. An oscillator characterized by extracting a sine wave oscillation output from any one of the above circuits.

6. The oscillator according to claim 25, wherein a two-phase output is extracted from the two phase shift circuits and the non-inverting circuit.

7. The oscillator according to claim 25, wherein a connection manner of the third resistor and the inductor constituting the second series circuit is reversed in the two phase shift circuits. .

8. The oscillator according to claim 25, wherein the third resistor of at least one of the two phase shift circuits is formed by a channel of an FET, and a channel voltage is changed by changing a gate voltage. .

9. The third resistor of at least one of the two phase shift circuits is formed by connecting a p-channel FET and an n-channel FET in parallel, and the magnitude of the gate voltage of each FET having a different polarity is formed. 26. The oscillator according to claim 25, wherein the channel resistance is changed by changing the length.

0. The oscillator according to claim 25, wherein an oscillation frequency is changed by changing an inductance of at least one of said two phase shift circuits.

1. At least one of the two phase shift circuits is an inductance conversion circuit including an amplifier having a gain set between 0 and 1, and an inductor element connected in parallel between the input and output of the amplifier. The oscillator according to claim 25, wherein the oscillator is formed by:

32. The oscillator according to claim 31, wherein the oscillation frequency is changed by changing the gain of the amplifier to change the inductance seen from the input side of the amplifier.

3. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. A first phase shift circuit including a differential amplifier that amplifies a difference between the potential of the capacitor and a connection point of the capacitor with a predetermined amplification degree and outputs the amplified difference.

An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor and an A second series circuit configured; a potential at a connection point of the first and second resistors forming the first series circuit; a third resistor forming the second series circuit; and A second phase shift circuit including a differential amplifier that amplifies the difference between the potential at the connection point of the inductor with a predetermined amplification degree and outputs the amplified signal;

The output of the subsequent stage of the first and second phase shift circuits connected in cascade is fed back to the input side of the previous stage, and a sine wave oscillation is performed from one of the first and second phase shift circuits. Oscillator characterized by extracting output.

4. The oscillator according to claim 33, wherein a two-phase output is extracted from the first and second phase shift circuits.

5. The method of connecting the reactance element consisting of the capacitor or the inductor constituting the second series circuit and the third resistor in the two phase shift circuits is reversed. The oscillator according to item 33.

6. The channel resistance of at least one of the first and second phase shift circuits is formed by a channel of an FET, and a channel resistance is changed by changing a gate voltage. Oscillator.

7. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. A first phase shift circuit including a differential amplifier that amplifies a difference between the potential of the capacitor and a connection point of the capacitor with a predetermined amplification degree and outputs the amplified difference.

An input AC signal is applied to both ends, and a first series circuit including first and second resistors having substantially equal resistance sterns, and the AC signal is applied to both ends, and a third resistor and an inductor A second series circuit configured; a potential at a connection point of the first and second resistors forming the first series circuit; a third resistor forming the second series circuit; and A second phase shift circuit including a differential amplifier that amplifies the difference between the potential at the connection point of the inductor with a predetermined amplification degree and outputs the amplified signal;

Wherein the first and second phase shift circuits and the non-inverting circuit are cascade-connected, and the output of the last stage among the plurality of cascade-connected circuits is fed back to the input side of the first stage, An oscillator characterized in that a sine wave oscillation output is obtained from one of the plurality of circuits.

8. The oscillator according to claim 37, wherein a two-phase output is extracted from the first and second phase shift circuits and the non-inverting circuit.

9. The manner in which the third resistor is connected to the reactance element consisting of the capacitor or the inductor that forms the second series circuit is determined by the two phase shift circuits. 38. The oscillator according to claim 37, wherein the oscillators are reversed.

0. The third resistance of at least one of the first and second phase shift circuits is formed by an FET channel, and a gate voltage is changed to change a channel resistance. Oscillator.

1. An input AC signal is applied to both ends, a first series circuit composed of first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by a capacitor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. And a differential amplifier that amplifies the difference between the potential at the connection point of the capacitor and the potential at a predetermined amplification degree and outputs the result.

A phase inversion circuit that inverts the phase of the input AC signal and outputs the inverted signal;

Each of the two phase shift circuits and the phase inversion circuit is cascaded, and the output of the last stage among the plurality of cascade-connected circuits is returned to the input side of the first stage. Oscillator characterized by taking out sine wave oscillation output from the difference between t and t of the circuit.

2. The oscillator according to claim 41, wherein a two-phase output is extracted from the two phase shift circuits and the phase inversion circuit.

3. The oscillator according to claim 41, wherein the third resistor and the capacitor constituting the second series circuit are connected in the same manner in the two phase shift circuits. .

4. The oscillator according to claim 41, wherein the third resistor of at least one of the two phase shift circuits is formed by an FET channel, and a gate voltage is changed to change a channel resistance. .

5. Connect the third resistor of at least one of the two phase shift circuits to a p-channel type

41. The oscillator according to claim 41, wherein the FET is formed by connecting an FET and an n-channel FET in parallel, and the channel resistance is changed by changing the magnitude of the gate voltage of each FET having a different polarity. .

6. At least one of the two phase shift circuits is formed of a variable capacitance element, and the capacitance is changed to change the oscillation frequency. The oscillator according to claim 41, characterized by the following:

7. The capacitor of at least one of the two phase shift circuits is formed by a capacitance conversion circuit including an amplifier having a negative gain and a capacitor element connected in parallel between the input and output of the amplifier. The oscillator according to claim 41, characterized in that:

8. The oscillator according to claim 47, wherein the oscillation frequency is changed by changing the capacitance of the amplifier viewed from the input side by changing the gain of the amplifier.

9. An input AC signal is applied to both ends, a first series circuit including first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor A second series circuit constituted by an inductor; a potential at a connection point of the first and second resistors constituting the first series circuit; and a third resistor constituting the second series circuit. And a differential amplifier that amplifies a difference between a potential at a connection point of the inductor and a potential at a predetermined amplification degree and outputs the result.

Each of the two phase shift circuits and the phase inversion circuit is cascaded, and the output of the last stage among the plurality of cascade-connected circuits is returned to the input side of the first stage. An oscillator characterized by extracting a sine wave oscillation output from one of the circuits.

0. The oscillator according to claim 49, wherein a two-phase output is taken out from said two phase shift circuits and said phase inversion circuit.

1. The oscillator according to claim 49, wherein a connection method of the third resistor and the inductor constituting the second series circuit is the same in the two phase shift circuits. .

The oscillator according to claim 49, wherein the third resistor of at least one of the two phase shift circuits is formed by a FET channel, and a channel voltage is changed by changing a gate voltage. .

3. The third resistor of at least one of the two phase shift circuits is formed by connecting a p-channel type FET and an n-channel type FET in parallel, and has different polarities. 40. The oscillator according to claim 49, wherein the channel resistance is changed by changing the magnitude of the gate voltage of each FET.

4. The oscillator according to claim 49, wherein an oscillation frequency is changed by changing an inductance of at least one of said two phase shift circuits.

5. At least one of the inductors of the two phase shift circuits is controlled by an inductance conversion circuit including an amplifier having a gain set between 0 and 1, and an inductor element connected in parallel between the input and output of the amplifier. The oscillator according to claim 49, characterized by being formed.

6. The oscillator according to claim 55, wherein the oscillation frequency is changed by varying the gain of the amplifier to change the inductance as viewed from the input side of the amplifier.

An input AC signal is applied to both ends, a first series circuit composed of first and second resistors having substantially equal resistance values, and the AC signal is applied to both ends, and a third resistor and an inductor A second series circuit configured; a potential at a connection point of the first and second resistors forming the first series circuit; a third resistor forming the second series circuit; and A second phase shift circuit including a differential amplifier that amplifies the difference between the potential at the connection point of the inductor with a predetermined amplification degree and outputs the amplified signal;

The first and second phase shift circuits and the phase inverting circuit are cascade-connected, and the output of the last stage among the plurality of cascade-connected circuits is fed back to the input side of the first stage. An oscillator which extracts a sine wave oscillation output from any of the plurality of circuits.

8. The oscillator according to claim 57, wherein a two-phase output is obtained from the first and second phase shift circuits and the phase inversion circuit.

9. The method of connecting the reactance element comprising the capacitor or the inductor and the third resistor constituting the second series circuit to the third resistor in the same manner in the two phase shift circuits. The oscillator according to range 57. 0. The third resistance of at least one of the first and second phase shift circuits is formed by a channel of an FET, and a channel resistance is changed by changing a gate voltage. Oscillator.

1. The oscillator according to any one of claims 1 to 60, wherein the oscillator is formed as a semiconductor integrated circuit.