WO1986003333A3 - Condensateurs a tranchees de hautes performances pour les cellules des memoires dynamiques a acces aleatoire rapide (dram) - Google Patents

Condensateurs a tranchees de hautes performances pour les cellules des memoires dynamiques a acces aleatoire rapide (dram)

Info

Publication number
WO1986003333A3
WO1986003333A3 PCT/US1985/002234 US8502234W WO8603333A3 WO 1986003333 A3 WO1986003333 A3 WO 1986003333A3 US 8502234 W US8502234 W US 8502234W WO 8603333 A3 WO8603333 A3 WO 8603333A3
Authority
WO
WIPO (PCT)
Prior art keywords
dram cells
trench capacitors
capacitor
surface portions
highly doped
Prior art date
Application number
PCT/US1985/002234
Other languages
English (en)
Other versions
WO1986003333A2 (fr
Inventor
Joseph Lebowitz
William Thomas Lynch
Original Assignee
American Telephone & Telegraph
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone & Telegraph filed Critical American Telephone & Telegraph
Priority to DE8585905991T priority Critical patent/DE3579454D1/de
Priority to KR1019860700510A priority patent/KR940011101B1/ko
Priority to JP60505252A priority patent/JPH0691210B2/ja
Publication of WO1986003333A2 publication Critical patent/WO1986003333A2/fr
Publication of WO1986003333A3 publication Critical patent/WO1986003333A3/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/109Memory devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Un condensateur à capacité élevée (Hi-C), en exécution à tranchées, destiné aux cellules des mémoires dynamiques à accès alétoire rapide, est basé sur l'emploi d'une technique de dopage. Une zone à tranchées peu profondes à dopage élevé est ainsi créée. En même temps, des régions superficielles latérales (24) de la structure sont par conséquent également soumises à un dopage élevé. Ces régions permettent de faire une connexion facile entre le condensateur et un transistor d'accès adjacent qui est réalisé ultérieurement.
PCT/US1985/002234 1984-11-30 1985-11-11 Condensateurs a tranchees de hautes performances pour les cellules des memoires dynamiques a acces aleatoire rapide (dram) WO1986003333A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE8585905991T DE3579454D1 (de) 1984-11-30 1985-11-11 In einem graben hergestellter hochleistungskondensator fuer dram-zellen.
KR1019860700510A KR940011101B1 (ko) 1984-11-30 1985-11-11 Dram 셀용 고성능 트렌치 커패시터
JP60505252A JPH0691210B2 (ja) 1984-11-30 1985-11-11 Dramセル用高性能トレンチコンデンサ

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US676,677 1984-11-30
US06/676,677 US4694561A (en) 1984-11-30 1984-11-30 Method of making high-performance trench capacitors for DRAM cells

Publications (2)

Publication Number Publication Date
WO1986003333A2 WO1986003333A2 (fr) 1986-06-05
WO1986003333A3 true WO1986003333A3 (fr) 1986-07-17

Family

ID=24715497

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1985/002234 WO1986003333A2 (fr) 1984-11-30 1985-11-11 Condensateurs a tranchees de hautes performances pour les cellules des memoires dynamiques a acces aleatoire rapide (dram)

Country Status (7)

Country Link
US (1) US4694561A (fr)
EP (1) EP0203960B1 (fr)
JP (1) JPH0691210B2 (fr)
KR (1) KR940011101B1 (fr)
CA (1) CA1244143A (fr)
DE (1) DE3579454D1 (fr)
WO (1) WO1986003333A2 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023196A (en) * 1990-01-29 1991-06-11 Motorola Inc. Method for forming a MOSFET with substrate source contact
TW214610B (en) * 1992-08-31 1993-10-11 Siemens Ag Method of making contact for semiconductor device
US5627092A (en) * 1994-09-26 1997-05-06 Siemens Aktiengesellschaft Deep trench dram process on SOI for low leakage DRAM cell
US5652170A (en) 1996-01-22 1997-07-29 Micron Technology, Inc. Method for etching sloped contact openings in polysilicon
US5793075A (en) * 1996-07-30 1998-08-11 International Business Machines Corporation Deep trench cell capacitor with inverting counter electrode
US6057216A (en) * 1997-12-09 2000-05-02 International Business Machines Corporation Low temperature diffusion process for dopant concentration enhancement
US6001704A (en) * 1998-06-04 1999-12-14 Vanguard International Semiconductor Corporation Method of fabricating a shallow trench isolation by using oxide/oxynitride layers
US6498381B2 (en) * 2001-02-22 2002-12-24 Tru-Si Technologies, Inc. Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same
US6835977B2 (en) * 2002-03-05 2004-12-28 United Microelectronics Corp. Variable capactor structure
US7989922B2 (en) * 2008-02-08 2011-08-02 International Business Machines Corporation Highly tunable metal-on-semiconductor trench varactor
KR102258769B1 (ko) 2011-10-14 2021-06-01 지엘팜텍주식회사 장용소화효소제 및 그 제조방법
TWI691052B (zh) * 2019-05-07 2020-04-11 力晶積成電子製造股份有限公司 記憶體結構及其製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0009910A1 (fr) * 1978-09-20 1980-04-16 Fujitsu Limited Dispositif de mémoire à semiconducteurs et procédé de fabrication de ce dispositif
WO1981003241A1 (fr) * 1980-05-07 1981-11-12 Western Electric Co Circuits integres de silicium
EP0088451A1 (fr) * 1982-03-10 1983-09-14 Hitachi, Ltd. Mémoire semi-conductrice
WO1985004760A1 (fr) * 1984-04-05 1985-10-24 American Telephone & Telegraph Company Procede de dopage regule des parois laterales d'une tranchee dans un corps de semi-conducteur

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Publication number Priority date Publication date Assignee Title
US3387286A (en) * 1967-07-14 1968-06-04 Ibm Field-effect transistor memory
US3928095A (en) * 1972-11-08 1975-12-23 Suwa Seikosha Kk Semiconductor device and process for manufacturing same
US3969746A (en) * 1973-12-10 1976-07-13 Texas Instruments Incorporated Vertical multijunction solar cell
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS5856266B2 (ja) * 1977-02-03 1983-12-14 テキサス インスツルメンツ インコ−ポレイテツド Mosメモリ
FR2426335A1 (fr) * 1978-05-19 1979-12-14 Radiotechnique Compelec Dispositif semi-conducteur monolithique comportant une pluralite de cellules photosensibles
US4274892A (en) * 1978-12-14 1981-06-23 Trw Inc. Dopant diffusion method of making semiconductor products
DK145585C (da) * 1980-05-09 1988-07-25 Schionning & Arve As Taetningsring
JPS5937406B2 (ja) * 1980-07-28 1984-09-10 ダイキン工業株式会社 冷凍装置
JPS58137245A (ja) * 1982-02-10 1983-08-15 Hitachi Ltd 大規模半導体メモリ
US4472212A (en) * 1982-02-26 1984-09-18 At&T Bell Laboratories Method for fabricating a semiconductor device
JPS58171832A (ja) * 1982-03-31 1983-10-08 Toshiba Corp 半導体装置の製造方法
US4471524A (en) * 1982-06-01 1984-09-18 At&T Bell Laboratories Method for manufacturing an insulated gate field effect transistor device
JPS59117258A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 半導体装置の製造方法
JPS59184555A (ja) * 1983-04-02 1984-10-19 Nippon Telegr & Teleph Corp <Ntt> 半導体集積回路装置およびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0009910A1 (fr) * 1978-09-20 1980-04-16 Fujitsu Limited Dispositif de mémoire à semiconducteurs et procédé de fabrication de ce dispositif
WO1981003241A1 (fr) * 1980-05-07 1981-11-12 Western Electric Co Circuits integres de silicium
EP0088451A1 (fr) * 1982-03-10 1983-09-14 Hitachi, Ltd. Mémoire semi-conductrice
WO1985004760A1 (fr) * 1984-04-05 1985-10-24 American Telephone & Telegraph Company Procede de dopage regule des parois laterales d'une tranchee dans un corps de semi-conducteur

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
IBM Technical Disclosure Bulletin, Volume 26, No. 2, July 1983, New York (US) N.C.C. LU: "Groovetrench MIS Capacitor", pages 489-490 see the whole article *
International Electron Devices Meeting, 1983, IEEE, New York (US) E. KINSBRON et al.: "Source and Drain Junctions by Oxodizing Arsenic Doped Polysilicon", pages 674-677, see page 675, column 1, paragraphs 1,2; figures 1,2 *
International Electron Devices Meeting, 1983, IEEE, New York (US) K. MINEGISHI et al.: "A Submicron CMOS Megabit Level Dynamic RAM Technology using Doped Face Trench Capacitor Cell", pages 319-322, see figure 1 *
Japanese Journal of Applied Physics - Supplements, 1983, Tokyo (US) T. MORIE et al.: "Depletion Trench Capacitor Cell", pages 253-256, see figure 1 *

Also Published As

Publication number Publication date
WO1986003333A2 (fr) 1986-06-05
JPS62500972A (ja) 1987-04-16
KR880700451A (ko) 1988-03-15
EP0203960A1 (fr) 1986-12-10
DE3579454D1 (de) 1990-10-04
KR940011101B1 (ko) 1994-11-23
CA1244143A (fr) 1988-11-01
JPH0691210B2 (ja) 1994-11-14
US4694561A (en) 1987-09-22
EP0203960B1 (fr) 1990-08-29
CA1258539C (fr) 1989-08-15

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