US7282935B2 - Regenerator probe - Google Patents

Regenerator probe Download PDF

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Publication number
US7282935B2
US7282935B2 US11/338,274 US33827406A US7282935B2 US 7282935 B2 US7282935 B2 US 7282935B2 US 33827406 A US33827406 A US 33827406A US 7282935 B2 US7282935 B2 US 7282935B2
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US
United States
Prior art keywords
voltage
access port
recited
port
probe apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US11/338,274
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English (en)
Other versions
US20070170936A1 (en
Inventor
Glenn Wood
Donald M. Logelin
Brock J. LaMeres
Brent A. Holcombe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Priority to US11/338,274 priority Critical patent/US7282935B2/en
Assigned to AGILENT TECHNOLOGIES, INC. reassignment AGILENT TECHNOLOGIES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HOLCOMBE, BRENT A., LAMERES, BROCK J., LOGELIN, DONALD M., WOOD, GLENN
Priority to EP06253771A priority patent/EP1811313A3/fr
Priority to CNA2006101122463A priority patent/CN101008657A/zh
Priority to JP2007012773A priority patent/JP2007199062A/ja
Publication of US20070170936A1 publication Critical patent/US20070170936A1/en
Application granted granted Critical
Publication of US7282935B2 publication Critical patent/US7282935B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06772High frequency probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/20Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
    • G01R1/24Transmission-line, e.g. waveguide, measuring sections, e.g. slotted section

Definitions

  • An important aspect of digital circuit testing is proper probing of a target system.
  • logic analysis seeks to make measurements of the target system at speed without affecting target system circuit operation.
  • probe apparatus samples circuit voltages exactly as they would as they appear during unprobed operation of the target system.
  • frequency of operation of the target systems increases, however, it becomes more difficult to probe the target system without adding parasitic impedances to the target system circuits that affect its operation.
  • a known style of probe apparatus that is suitable for circuit test is a “snoop probe”.
  • a snoop probe is shown whereby one or more communication lines 101 of the target system circuit is interrupted and the snoop probe in interposed between two ends of the interrupted line.
  • the snoop probe provides a through connection for the interrupted communication line 101 to permit operation, but also has a parallel sampling circuit for probing signal activity on the line.
  • the snoop probe includes a through circuit portion with a tip resistor 102 connected in parallel to the through circuit.
  • the tip resistor 102 provides isolation between the through circuit portion and a measurement device 103 .
  • a probe cable 104 connected to the tip resistor 102 brings a sampled signal to the test equipment 103 .
  • the test equipment 103 is terminated in a termination impedance.
  • an impedance of the tip resistor is 5-10 times that of the termination impedance.
  • the snoop probe provides passive probing and isolation from the test equipment.
  • a disadvantage of the known snoop probe is that the test signal as seen by the measurement device is significantly attenuated by a voltage division ratio of the termination impedance relative to the impedance of the tip resistor 102 added to the termination impedance. Because of the voltage division ratio, the test equipment also sees an attenuated slew rate of the signals being measured. Therefore, the effective conversion of noise voltage is similarly slowed, which contributes to jitter in the measurement.
  • the jitter measurement may be improved with a smaller tip resistor impedance, but at the expense of isolation of the target system circuit 108 from the measurement device 103 .
  • Another disadvantage of the snoop probe in that parasitic capacitance that is inherent in the tip resistor 102 causes the isolation to decrease as test signal frequencies increase.
  • FIG. 1 illustrates a circuit configuration of a known probe.
  • FIGS. 2-4 illustrate embodiments of single line probe circuits according to the present teachings.
  • FIG. 5 illustrates an example form factor of a multiple line probe according to the present teachings.
  • FIG. 6 is a flow chart of an embodiment of a method according to the present teachings.
  • FIG. 2 of the drawings there is shown an embodiment of a regenerator probe apparatus 100 according to the present teachings in which the probe apparatus 100 is interposed in a communication line 101 of a target system 108 .
  • the communication line 101 is interrupted and each end of the interrupted communication line 101 is connected to a respective first access port 105 and second access port 106 of the probe apparatus 100 .
  • the first access port 105 electrically connects to a first probe trace 111 and the first probe trace 111 is connected to a voltage amplifier 109 .
  • the voltage amplifier 109 is terminated in a characteristic impedance that matches an impedance of the target system circuit 108 so that the target system circuit 108 substantially operates as if the probe apparatus were not interposed into it.
  • the voltage amplifier 109 amplifies the voltage signal present at the first access port 105 by a factor of two and has a linear amplifier characteristic of operation and frequency response over the voltage range and frequency of the target system circuit 108 . Accordingly, a voltage amplifier output 116 accurately represents the voltage signal activity at the first access port 105 .
  • the voltage amplifier output 116 is connected to a voltage splitter 110 .
  • the voltage splitter 110 is a 6 dB splitter so that half of the amplified voltage is presented to a first output of the voltage splitter 117 and half of the amplified voltage is presented to a second output 118 of the voltage splitter 110 .
  • a second probe trace 112 connects the first output of the voltage splitter 117 to the second access port 106 .
  • the voltage at the first access port 105 is substantially equal to the voltage at the second access port 106 . Accordingly, the operation of the target system is at speed with the exception of some additional incremental latency as a result of the increased transmission line and under conditions equivalent to those without the probe apparatus 100 interposed into a communication line.
  • multiple communication lines in the target system are probed and each line has a respective associated probe apparatus 100 for measurement of parallel lines in the target system.
  • the second output of the voltage splitter 118 is connected to a measurement trace 119 .
  • the measurement trace 119 is connected to the probe cable 104 for presentation to the measurement device 103 .
  • each communication line 101 is unidirectional.
  • This embodiment may be adapted for use in a target system with a full duplex bus by having separate probe circuits including the amplifier/amplifiers and splitter for each direction.
  • a probe apparatus according to the present teachings for a full duplex target system has two probe circuits and measurement port connections for each communication line 101 .
  • the voltage splitter 110 is a 6 dB splitter and presents half of the input voltage to the first output of the voltage splitter 117 and half of the input voltage to the second output of the voltage splitter 118 .
  • the first output of the voltage splitter 117 is connected to a first voltage amplifier 120 and the second output of the voltage splitter 118 is connected to a second voltage amplifier 121 .
  • the first and second voltage amplifiers are fixed amplifiers. In the embodiment illustrated in FIG. 3 of the drawings, each of the first and second voltage amplifiers is independently adjustable.
  • the first voltage amplifier 120 is connected to the 2 nd probe trace 112 and the second access port 106 .
  • the second voltage amplifier 121 is connected to the measurement trace 119 and probe cable 104 for presentation to the measurement device 103 . Accordingly, a user may choose to present substantially the same voltage at the output of the second voltage 121 amplifier as is found at the first access port 105 and may choose to attenuate or amplify the voltage signal presented to the first access port 105 and present it to the second access port 106 . This feature may be used for parametric margin and limp-along testing of the target system while also permitting full measurement of the voltage signal at the first access port. As one of ordinary skill in the art readily appreciates, none, one or both of the first and second voltage amplifiers may provide variable amplification depending upon a specific testing requirement.
  • FIG. 4 of the drawings there is shown another embodiment according to the present teachings that provides the feature present in the embodiment of FIG. 3 and employing only one voltage amplifier per tested communication line 101 .
  • the first access port 105 and first probe trace 111 is connected to the voltage amplifier 109 .
  • the output of the voltage amplifier 116 is connected to the input of the voltage splitter 110 .
  • the voltage splitter 110 is variable. Accordingly, the voltage splitter 110 may be adjusted to present differing voltages at the first and second outputs 117 , 118 .
  • FIG. 5 of the drawings there is shown an embodiment of a form factor suitable for an embodiment of the probe apparatus according to the present teachings.
  • multiple target system communication lines 101 are interrupted at a target PCI-EXPRESS connector 125 .
  • a maximum number of communication lines 101 that may be probed is defined by the size of the target PCI-EXPRESS connector 125 .
  • Other connectors are suitable and may be adapted for the present teachings by one of ordinary skill in the art with benefit of the present teachings.
  • the target PCI-EXPRESS connector 125 accepts an edge 122 of a probe printed circuit board 123 (PCB) to connect the probe apparatus 100 to each of the communication lines 101 .
  • PCB probe printed circuit board
  • the probe PCB 123 has a configuration that includes first and second major planar surfaces. Edge 122 of the PCB 123 has the first access port 105 on the first planar surface of the probe PCB 123 and the second access port 106 is disposed opposite the first access port 105 on the second planar surface of the probe PCB 123 .
  • the probe PCB 123 carries electronics of a probe apparatus according to the present teachings for each communication line 101 , such as the amplifier 109 and the splitter 110 . Specifically, the probe PCB 123 holds multiple amplifiers and splitter depending upon the specific embodiment of the probe apparatus and the number of communication lines 101 being probed. Layout of the probe PCB 123 has respective communication line electronics organized together along a rectangular area of the PCB 123 .
  • the probe PCB 123 also carries a probe PCI-EXPRESS connector 124 having the same width and configuration as the target PCI-EXPRESS connector 124 .
  • the probe 100 is not connected to the target system 127 and an edge 126 of companion PCB 128 is disposed in the target PCI-EXPRESS connector 124 .
  • the probe 100 is connected to the target system 127 through the target PCI-EXPRESS connector 125 via the probe PCB card edge 122 and the companion PCB 128 is connected to the probe PCI-EXPRESS connector 124 to complete the target system circuit 127 , 128 .
  • the probe PCB 123 may be inserted into the target system circuit 127 , 128 to monitor, but not change operation of the target system 127 .
  • the probe PCB 123 interconnects respective measurement traces 119 to the probe cable 104 for connection to the test equipment 103 .
  • FIG. 6 of the drawings there is shown a flow chart of an embodiment according to the present teachings in which a through circuit is interposed 125 between first and second access ports 105 , 106 of a test circuit.
  • a voltage present at the first access port 105 is amplified 126 and split 127 and a voltage substantially similar to the voltage at the first access port 105 is presented 128 at an output 118 of the voltage splitter 110 .
  • respective amplifiers 120 , 121 or variable splitters 110 for each separate communication line 101 may be independently adjusted for purposes of parametric testing of each line in addition to functional testing.
  • the amplifier 120 or variable splitter 110 is adjusted so that the test equipment 103 receives a voltage signal substantially similar to that found in the target system, but amplifies or attenuates the signal passed on to the rest of the target system through the communication line 101 .
  • Methods of carrying the amplification or attenuation may be manual or programmatic and depend upon design choice. Other variations, adaptations, and embodiments of the present teachings will occur to those of ordinary skill in the art given benefit of the present teachings.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Leads Or Probes (AREA)
  • Amplifiers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
US11/338,274 2006-01-24 2006-01-24 Regenerator probe Expired - Fee Related US7282935B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US11/338,274 US7282935B2 (en) 2006-01-24 2006-01-24 Regenerator probe
EP06253771A EP1811313A3 (fr) 2006-01-24 2006-07-19 Sonde régénérateur de mesure électrique
CNA2006101122463A CN101008657A (zh) 2006-01-24 2006-08-29 再生器式探头
JP2007012773A JP2007199062A (ja) 2006-01-24 2007-01-23 リジェネレータプローブ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/338,274 US7282935B2 (en) 2006-01-24 2006-01-24 Regenerator probe

Publications (2)

Publication Number Publication Date
US20070170936A1 US20070170936A1 (en) 2007-07-26
US7282935B2 true US7282935B2 (en) 2007-10-16

Family

ID=38038722

Family Applications (1)

Application Number Title Priority Date Filing Date
US11/338,274 Expired - Fee Related US7282935B2 (en) 2006-01-24 2006-01-24 Regenerator probe

Country Status (4)

Country Link
US (1) US7282935B2 (fr)
EP (1) EP1811313A3 (fr)
JP (1) JP2007199062A (fr)
CN (1) CN101008657A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120242362A1 (en) * 2011-03-23 2012-09-27 Hon Hai Precision Industry Co., Ltd. Test apparatus
US20120246371A1 (en) * 2011-03-23 2012-09-27 Hon Hai Precision Industry Co., Ltd. Test apparatus for pci card

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103713270A (zh) * 2013-10-31 2014-04-09 江苏绿扬电子仪器集团有限公司 针对逻辑分析仪前向通道的测试装置
CN108333393B (zh) * 2017-01-20 2021-12-24 罗德施瓦兹两合股份有限公司 探针和校正方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506210A (en) * 1982-02-18 1985-03-19 The United States Of America As Represented By The Secretary Of The Army Method for identifying cable conductors using two signals at different frequencies
US5293113A (en) * 1991-10-21 1994-03-08 Ch. Beha BmbH Test instrument for the display of electric voltages
US5460028A (en) * 1993-12-04 1995-10-24 Robert Bosch Gmbh Circuit arrangement for conditioning the signal of a measuring sensor
US6160408A (en) * 1998-06-17 2000-12-12 Tektronix, Inc. Thin profile vertically oriented probe adapter with code disassembly capability
US6909272B2 (en) * 2001-11-16 2005-06-21 General Electric Company System and method for voltage divider having a guard structure
US7083423B1 (en) * 2005-03-31 2006-08-01 Dell Products L.P. Method and apparatus for mounting a card connector

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2599852B1 (fr) * 1986-06-06 1988-06-24 Labo Electronique Physique Circuit d'entree pour sonde d'analyseur logique, et sonde et analyseur logique munis d'un tel circuit
JPH07248353A (ja) * 1994-03-11 1995-09-26 Sony Tektronix Corp 電源電流測定装置
JPH08136617A (ja) * 1994-11-08 1996-05-31 Oki Micro Design Miyazaki:Kk 半導体集積回路装置の測定方法
JP3478098B2 (ja) * 1997-12-04 2003-12-10 横河電機株式会社 バス用プローブ回路
JP2003204370A (ja) * 2002-01-09 2003-07-18 Sony Corp バス解析装置および信号入力デバイス
US6856129B2 (en) * 2002-07-09 2005-02-15 Intel Corporation Current probe device having an integrated amplifier
US7256575B2 (en) * 2004-06-01 2007-08-14 Tektronix, Inc. Wide bandwidth attenuator input circuit for a measurement probe

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506210A (en) * 1982-02-18 1985-03-19 The United States Of America As Represented By The Secretary Of The Army Method for identifying cable conductors using two signals at different frequencies
US5293113A (en) * 1991-10-21 1994-03-08 Ch. Beha BmbH Test instrument for the display of electric voltages
US5460028A (en) * 1993-12-04 1995-10-24 Robert Bosch Gmbh Circuit arrangement for conditioning the signal of a measuring sensor
US6160408A (en) * 1998-06-17 2000-12-12 Tektronix, Inc. Thin profile vertically oriented probe adapter with code disassembly capability
US6909272B2 (en) * 2001-11-16 2005-06-21 General Electric Company System and method for voltage divider having a guard structure
US7083423B1 (en) * 2005-03-31 2006-08-01 Dell Products L.P. Method and apparatus for mounting a card connector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120242362A1 (en) * 2011-03-23 2012-09-27 Hon Hai Precision Industry Co., Ltd. Test apparatus
US20120246371A1 (en) * 2011-03-23 2012-09-27 Hon Hai Precision Industry Co., Ltd. Test apparatus for pci card

Also Published As

Publication number Publication date
JP2007199062A (ja) 2007-08-09
US20070170936A1 (en) 2007-07-26
CN101008657A (zh) 2007-08-01
EP1811313A3 (fr) 2007-12-12
EP1811313A2 (fr) 2007-07-25

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AS Assignment

Owner name: AGILENT TECHNOLOGIES, INC., COLORADO

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WOOD, GLENN;LOGELIN, DONALD M.;LAMERES, BROCK J.;AND OTHERS;REEL/FRAME:017301/0081

Effective date: 20060124

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20111016