US4500615A - Wafer exposure method and apparatus - Google Patents

Wafer exposure method and apparatus Download PDF

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Publication number
US4500615A
US4500615A US06/421,070 US42107082A US4500615A US 4500615 A US4500615 A US 4500615A US 42107082 A US42107082 A US 42107082A US 4500615 A US4500615 A US 4500615A
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Prior art keywords
resist film
wafer
exposure
pattern
thickness
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Expired - Lifetime
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US06/421,070
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English (en)
Inventor
Hiroshi Iwai
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Toshiba Corp
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Tokyo Shibaura Electric Co Ltd
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Assigned to TOKYO SHIBAURA DENKI KABUSHIKI KAISHA, A CORP OF JAPAN reassignment TOKYO SHIBAURA DENKI KABUSHIKI KAISHA, A CORP OF JAPAN ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: IWAI, HIROSHI
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/7055—Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
    • G03F7/70558—Dose control, i.e. achievement of a desired dose
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70608—Monitoring the unpatterned workpiece, e.g. measuring thickness, reflectivity or effects of immersion liquid on resist

Definitions

  • This invention relates to a wafer exposure method adopting a step and repeat exposure method of a projection system, particularly a reduction projection system and an apparatus for carrying out the same.
  • microlithography With the progress of high integration LSI techniques, the importance of microlithography is increasing. The precision of microlithography greatly depends upon the performance of the exposure apparatus. Recently, the performance of the exposure apparatus has been strikingly improved, and step and repeat exposure apparatus of projection type, particularly reduction projection type, has been developed and is regarded to be an effective apparatus for lithography of line widths of the order of 1 ⁇ m.
  • FIG. 1 shows the construction of a well-known step and repeat exposure apparatus.
  • a wafer chuck 2 for securing a wafer to the stage 1.
  • an optical column 3 including an optical system for reducing mask patterns is disposed.
  • the optical column 3 is provided near the edge of its top with two marks 4a and 4b for being aligned with alignment marks of a mask to be described later.
  • a light source 5 is disposed at a predetermined distance therefrom. Further, the optical column 3 is provided with an alignment system 6 on its side wall.
  • the alignment system 6 includes a body 7 provided at the bottom with marks 8a and 8b for being aligned with the alignment marks of the mask to be described later and microscopes 9a and 9b provided on top of the body 7 for observing the state of alignment with the marks 8a and 8b with the alignment marks of the wafer.
  • a mirror or a half mirror may be provided between the marks 8a and 8b and the microscopes 9a and 9b, and by the agency of this mirror or half mirror an alignment monitor 10 for observing the state of alignment between the marks 8a and 8b and the alignment marks of the alignment mask of wafer.
  • the side of the stage 1 and the side of the optical column 3 are provided with marks 11a and 11b for effecting alignment of the two in the Y-direction.
  • the mask 12 is aligned with the optical column 3 by aligning the alignment marks 13a and 13b provided on a mask 12 having a desired mask pattern with the marks 4a and 4b provided on the optical column 3 near the edge of its top.
  • the mask pattern of the mask 12 is projected on a reduced scale on a wafer. Therefore, with the reduction of the mask pattern the out-of-alignment between the mask 12 and optical column 3 is also reduced, and thus alignment departure from the alignment between the mask 12 and optical system 3 gives rise to no problem.
  • alignment between the wafer 14 and alignment system 6 is effected. More particularly, alignment marks 15a and 15b provided on the wafer 14 are aligned to the marks 8a and 8b of the main body 7 by moving the wafer 14 while observing it with the microscopes 9a and 9b or the alignment monitor 10.
  • the alignment system 6 is secured to the optical column 3 at a predetermined position thereof, and thus the wafer 14 is indirectly aligned to the optical column 3 and mask 4.
  • the stage 1 is moved in the Y-direction along a rail (not shown) to effect alignment between the stage 1 and optical system 3 such that the wafer 14 is positioned directly beneath the optical column 3 as shown by double dot and bar line in FIG. 1.
  • the alignment between the stage 1 and optical column 3 in the Y-direction may be automatically effected with a laser interferometer by making use of the mark 11a of the stage 1 and the mark 11b of the optical column.
  • the step and repeat process is effected by moving the wafer 14 in the X- and Y-directions. For every step, light is projected from the light source 5 to illuminate the mask 12, and a reduced-scale pattern 16 of the mask pattern of the mask 12 is repeatedly projected on the wafer 14 as shown in FIG. 2.
  • the stage 1 is returned to the initial position (i.e., the position at which the alignment between the wafer 14 and alignment system 6 has been effected), and then the wafer is replaced with a new one.
  • the mask has one or more chip mask patterns, and the number of patterns 16 projected onto the wafer 14 is thus the product of the number of the chips of the mask and the number of times of repeat.
  • the resolution can be revolutionally improved, compared to a one-to-one projection system.
  • the resist image may differ from place to place.
  • the nonuniformity of the thickness of the resist film may also be attributed to changes in the developing characteristics.
  • the width of the chip pattern is also affected by changes in the degree of side etching which is, in turn, caused by changes in the etching characteristics or thickness of the material to be etched.
  • etching methods which do not cause side etching at all or which cause only slight side etching are already available, such as reactive ion etching.
  • a wafer exposure method comprising the steps of:
  • a wafer exposure apparatus comprising:
  • FIG. 1 is a perspective view of a conventional step and repeat exposure apparatus of the reduction projection type
  • FIG. 2 is a view showing the step and repeat exposure method using the apparatus shown in FIG. 1;
  • FIG. 3 is a sectional view of a wafer coated with a resist film
  • FIG. 4 is a perspective view of a step and repeat exposure apparatus of the reduction projection type according to an embodiment of the present invention.
  • FIG. 5 is a graph showing the proper exposure time (sec) as a function of the thickness of a resist film ( ⁇ m).
  • FIG. 6 is a sectional view for explaining control of the exposure of the wafer coated with the resist film.
  • FIG. 4 is a perspective view showing a step and repeat exposure apparatus of the reduction projection type according to an embodiment of the present invention.
  • the exposure apparatus includes a stage 101 which moves in X- and Y-directions and a wafer chuck 102 which is driven to rotate by a motor or the like.
  • An optical column 103 incorporating an optical system for reducing the pattern in scale is arranged above the stage 101.
  • Marks 104 and 105 are respectively formed on the side surfaces of the stage 101 and the optical column 103 so as to allow alignment thereof in the Y-direction.
  • Marks 106a and 106b of a cross-shape are formed at the periphery of the top surface of the optical column 103 so as to be aligned with the marks of a mask (to be described later).
  • a light source 107 is arranged immediately above the optical column 103 with a predetermined distance therebetween.
  • An alignment system 108 is mounted on the side surface of the optical column 103.
  • the alignment system 108 comprises a body 109 which is mounted on the side surface of the optical column 103, marks 110a and 110b of a cross-shape for alignment with the marks of the wafer which are formed on the bottom surface of the body 109, and microscopes 111a and 111b which are mounted on the body 109 and which allow observation of alignment between the marks of the wafer and the marks 110a and 110b.
  • the alignment system 108 may further include a half mirror (not shown) or a mirror which is interposed between the marks 110a and 110b and the microscopes 111a and 111b on the body 109, and an alignment monitor 112 for monitoring the alignment between these marks.
  • a resist film thickness meter 113 is also mounted on the side surface of the optical column 103 for measuring the thickness of the resist film portion corresponding to the transfer region i.e., a chip forming region, of the wafer before the step operation of the wafer and after the exposure.
  • the resist film thickness meter 113 is such a double beam interferometer as disclosed in U.S. Pat. No. 4,147,435. It measures the thickness of the resist film 17 in the following manner.
  • a monochromic light beam such as a laser beam is split into two beams. These beams are applied onto the wafer 14 at right angles thereto.
  • the beam reflected from the surface of the wafer 14 and the beam reflected from the surface of the resist film 17 are synthesized into one light beam.
  • the light waves interfere with each other, thus forming interference fringes. From these interference fringes the thickness of the resist film 17 is detected.
  • a laser beam of short wavelength such as 9,000 ⁇ is used so that the resist film will not be exposed at this time.
  • a light source such as a mercury lamp is selected for exposure which has a long wavelength such as 4,000 ⁇ which matches the peak of the photographic sensitivity of the resist film.
  • the light beam from the resist film thickness meter 113 may be applied to a surface area of the resist film 17 which is not large enough to cause an erroneous drawing of a pattern on the wafer 14. In this case the limited portion of the resist film 17 is exposed to light, but this makes no problem.
  • the measurement result from the resist film thickness meter 113 is supplied to a control system 114 comprising, for example, a computer.
  • the control system 114 controls the exposure output to thereby control the exposure during the exposure operation of the light source 107.
  • the optimal exposure which corresponds to each resist film thickness is determined by experiment and is stored in the memory of the computer.
  • control system 114 compares the measurement result with the prestored data by the CPU to provide the exposure, and produces a control signal from its output port.
  • the control signal opens/closes a shutter mechanism comprising a mechanical means or controls the ON time or power of the light source.
  • Marks 116a and 116b of a cross-shape on a chip forming mask 115 having a pattern of a desired element or field are aligned with the marks 106a and 106b at the periphery of the top surface of the optical column 103.
  • a wafer 117 coated with a resist film 119 is assembled in the wafer chuck 102.
  • the wafer chuck 102 is rotated and/or the stage 101 is moved in the X- and Y-directions so as to align the marks 110a and 110b of the body 109 with the marks 118a and 118b formed on the wafer 117 while monitoring the alignment through the microscopes 111a and 111b of the alignment system 108 mounted on the optical column 103.
  • the wafer chuck 102 or the stage 101 is moved so as to align the marks 110a and 110b of the body 109 with the marks 118a and 118b of the wafer 117 while monitoring through the alignment monitor 112. Since the alignment system 108 is fixed to the optical column 103, the wafer 117 is aligned with the optical column 103 and the chip forming mask 115. Thereafter, the stage 101 is moved in the Y-direction along a rail (not shown) to locate the wafer 117 immediately below the optical column 103 as indicated by the virtual line shown in FIG. 4. The alignment between the stage 101 and the optical column 103 is performed automatically by a laser interferometer utilizing the marks 104 and 105 formed on the stage 101 and the optical column 103, respectively.
  • the wafer 117 is step-and-repeated together with the stage 101 in the X- and Y-directions.
  • the thickness of this resist film portion is measured.
  • the measurement is fed back to the light source 107 through the control system 114 so as to subject the mask 115 to the optimal exposure for the measured resist film thickness.
  • the exposed pattern is reduced in scale by the optical column 103 to transfer the chip pattern of the wafer 117 onto the resist film 119.
  • FIG. 5 is a graph showing the proper exposure time (sec) as a function of the resist film thickness ( ⁇ m).
  • the proper exposure time increases with an increase in the resist film thickness.
  • the proper exposure time is the exposure time which is required to transfer the mask so as to obtain chip patterns of uniform dimensions independently of the resist film thickness.
  • the exposure is controlled such that the exposure from the light source 107 is increased at a thick resist film portion such as a transfer region 120 1 of a resist film 119 on the wafer 117 (FIG. 6), and the exposure is decreased at a thin resist film portion such as a transfer region 120 6 of the resist film 119.
  • the pattern width of the same portion of each resist pattern will be the same.
  • measurement of the resist film and exposure (pattern transfer) by the light from the light source 107 which is controlled to effect the proper exposure time, are repeated.
  • the present invention provides a wafer exposure method wherein the thickness of the resist film portion on the wafer for transfer is measured after the step operation and before the exposure, and the measurement is fed back to the light source through the control system or the like to control the exposure, so that a resist pattern of uniform size may be formed on the wafer independently of changes in the resist film thickness, thereby allowing manufacture of a micronized LSI.
  • the exposure is controlled on the basis of the measurement of the thickness of the resist film on the wafer which is obtained after the step operation and before the exposure operation.
  • the exposure may be controlled by the following method. First, photoresist is coated on a test wafer under specific conditions. The thickness of the resist film portion for transfer is then measured. From the thickness thus measured an optimum exposure is determined, and the data representing the optimum exposure is stored into a memory included in the control system. The data is used to determine an optimum exposure for the transfer portion of a resist film which has been coated on a wafer under said specific conditions.
  • This method is advantageous in that the thickness of only the resist film coated on the test wafer needs to be measured and that the thickness of the resist film on any product wafer need not be measured. This helps to enhance the productivity of the mask making very much.
  • the exposure be controlled according to not only the thickness of a resist film but also the physical properties of the film such as development characteristic or etching characteristic. If different resists are used, an optimum exposure for each resist film is determined by experiments, and data representing the optimum exposure is then stored into a memory included in the control system.
  • the developing characteristics may also be determined by experiment and the exposure may be controlled according to the resist film thickness and the developing characteristics determined in this manner.
  • the etching characteristics are also applicable to the etching characteristics.
  • the resist film at the periphery may become thinner by side etching or the like.
  • the exposure may be controlled according to the resist film thickness and the etching characteristics.
  • the amount of reflected light from the film (SiO 2 , Al, Si 3 N 4 or the like) may be measured, and the exposure may be controlled according to the resist film thickness and the amount of reflected light.
  • the thickness of the resist film may not be measured for every transfer portion. Only those of transfer portions which represent a sufficiently clear distribution of thickness of the resist film may be subjected to thickness measuring.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
US06/421,070 1981-09-22 1982-09-22 Wafer exposure method and apparatus Expired - Lifetime US4500615A (en)

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JP56149866A JPS5851514A (ja) 1981-09-22 1981-09-22 ウエハ露光方法及びその装置
JP56-149866 1981-09-22

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Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4576884A (en) * 1984-06-14 1986-03-18 Microelectronics Center Of North Carolina Method and apparatus for exposing photoresist by using an electron beam and controlling its voltage and charge
EP0205148A2 (en) * 1985-06-12 1986-12-17 Hitachi, Ltd. Method of applying a resist
US4652134A (en) * 1984-08-28 1987-03-24 Lsi Logic Corporation Mask alignment system
US4747683A (en) * 1986-01-17 1988-05-31 Eye Research Institute Of Retina Foundation Method and device for in vivo wetting determinations
EP0399837A2 (en) * 1989-05-25 1990-11-28 Motorola, Inc. Method of optimizing photoresist contrast
EP0451329A2 (en) * 1990-04-13 1991-10-16 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
US5124216A (en) * 1990-07-31 1992-06-23 At&T Bell Laboratories Method for monitoring photoresist latent images
EP0505144A1 (en) * 1991-03-18 1992-09-23 Canon Kabushiki Kaisha X-ray lithography mask, light exposure apparatus and process therefor
US5393624A (en) * 1988-07-29 1995-02-28 Tokyo Electron Limited Method and apparatus for manufacturing a semiconductor device
EP0811881A2 (en) * 1996-06-04 1997-12-10 Nikon Corporation Exposure apparatus and method
US5726756A (en) * 1995-11-02 1998-03-10 Sony Corporation Exposure apparatus with thickness and defect detection
EP1205806A1 (en) * 2000-11-09 2002-05-15 Semiconductor300 GmbH & Co KG Method for exposing a semiconductor wafer
WO2002063395A1 (en) * 2001-02-02 2002-08-15 Advanced Micro Devices, Inc. Stepper exposure dose control base upon across wafer variations in photoresist thickness
EP1463096A1 (en) * 2001-07-26 2004-09-29 Seiko Epson Corporation EXPOSURE DEVICE, EXPOSURE METHOD, METHOD OF PRODUCING SEMICONDUCTOR DEVICE, ELECTROOPTIC DEVICE, AND ELECTRONIC EQUIPMENT
EP1517189A3 (en) * 2003-09-17 2006-02-15 ASML Netherlands B.V. Critical dimension optimisation in lithography
US20060035175A1 (en) * 2002-07-01 2006-02-16 Obayashiseikou Co., Ltd. Transverse electric-field type liquid crystal display device, process of manufacturing the same,and scan-exposing device
DE102023202896A1 (de) 2023-03-30 2024-10-02 Carl Zeiss Smt Gmbh Verfahren und System zum Bestrahlen eines Lithografieobjekts

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56135376A (en) * 1980-03-27 1981-10-22 Honda Motor Co Ltd Burglary alarm device for two-wheel barrow
JPS59178729A (ja) * 1983-03-30 1984-10-11 Hitachi Ltd フォトレジストプロセスにおける露光方法
JPH0249417A (ja) * 1988-08-11 1990-02-19 Fuji Electric Co Ltd フォトレジストパターン形成方法

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US3950170A (en) * 1969-12-02 1976-04-13 Licentia Patent-Verwaltungs-G.M.B.H. Method of photographic transfer using partial exposures to negate mask defects
US4083634A (en) * 1973-01-16 1978-04-11 Canon Kabushiki Kaisha Pattern exposure apparatus using polychromatic light source
US4308586A (en) * 1980-05-02 1981-12-29 Nanometrics, Incorporated Method for the precise determination of photoresist exposure time
US4388389A (en) * 1981-11-16 1983-06-14 Nathan Gold Photo resist spectral matching technique

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JPS56146138A (en) * 1980-04-16 1981-11-13 Nec Corp Method and apparatus for exposing photomask

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
US3950170A (en) * 1969-12-02 1976-04-13 Licentia Patent-Verwaltungs-G.M.B.H. Method of photographic transfer using partial exposures to negate mask defects
US4083634A (en) * 1973-01-16 1978-04-11 Canon Kabushiki Kaisha Pattern exposure apparatus using polychromatic light source
US4308586A (en) * 1980-05-02 1981-12-29 Nanometrics, Incorporated Method for the precise determination of photoresist exposure time
US4388389A (en) * 1981-11-16 1983-06-14 Nathan Gold Photo resist spectral matching technique

Cited By (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4576884A (en) * 1984-06-14 1986-03-18 Microelectronics Center Of North Carolina Method and apparatus for exposing photoresist by using an electron beam and controlling its voltage and charge
US4652134A (en) * 1984-08-28 1987-03-24 Lsi Logic Corporation Mask alignment system
EP0205148A2 (en) * 1985-06-12 1986-12-17 Hitachi, Ltd. Method of applying a resist
US4738910A (en) * 1985-06-12 1988-04-19 Hitachi, Ltd. Method of applying a resist
EP0205148A3 (en) * 1985-06-12 1988-12-28 Hitachi, Ltd. Method of applying a resist
US4747683A (en) * 1986-01-17 1988-05-31 Eye Research Institute Of Retina Foundation Method and device for in vivo wetting determinations
US5393624A (en) * 1988-07-29 1995-02-28 Tokyo Electron Limited Method and apparatus for manufacturing a semiconductor device
EP0399837A3 (en) * 1989-05-25 1992-04-08 Motorola, Inc. Method of optimizing photoresist contrast
EP0399837A2 (en) * 1989-05-25 1990-11-28 Motorola, Inc. Method of optimizing photoresist contrast
US5747201A (en) * 1990-04-13 1998-05-05 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
EP0451329A2 (en) * 1990-04-13 1991-10-16 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
EP0451329A3 (en) * 1990-04-13 1992-03-25 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
US5409538A (en) * 1990-04-13 1995-04-25 Hitachi, Ltd. Controlling method of forming thin film, system for said controlling method, exposure method and system for said exposure method
US5288572A (en) * 1990-07-31 1994-02-22 At&T Laboratories Method for monitoring photoresist latent images
US5124216A (en) * 1990-07-31 1992-06-23 At&T Bell Laboratories Method for monitoring photoresist latent images
EP0505144A1 (en) * 1991-03-18 1992-09-23 Canon Kabushiki Kaisha X-ray lithography mask, light exposure apparatus and process therefor
US5444753A (en) * 1991-03-18 1995-08-22 Canon Kabushiki Kaisha X-ray lithography mask, light exposure apparatus and process therefore
US5726756A (en) * 1995-11-02 1998-03-10 Sony Corporation Exposure apparatus with thickness and defect detection
EP0811881A2 (en) * 1996-06-04 1997-12-10 Nikon Corporation Exposure apparatus and method
EP0811881A3 (en) * 1996-06-04 1999-02-24 Nikon Corporation Exposure apparatus and method
US5994006A (en) * 1996-06-04 1999-11-30 Nikon Corporation Projection exposure methods
US6590637B2 (en) 1996-06-04 2003-07-08 Nikon Corporation Exposure apparatus and method
US6396568B1 (en) 1996-06-04 2002-05-28 Nikon Corporation Exposure apparatus and method
WO2002039188A1 (en) * 2000-11-09 2002-05-16 Infineon Technologies Sc300 Gmbh & Co.Kg Method for exposing a semiconductor wafer
EP1205806A1 (en) * 2000-11-09 2002-05-15 Semiconductor300 GmbH & Co KG Method for exposing a semiconductor wafer
US20040029027A1 (en) * 2000-11-09 2004-02-12 Thorsten Schedel Method for exposing a semiconductor wafer
US6887722B2 (en) 2000-11-09 2005-05-03 Infineon Technologies Sc300 Gmbh & Co. Kg Method for exposing a semiconductor wafer
WO2002063395A1 (en) * 2001-02-02 2002-08-15 Advanced Micro Devices, Inc. Stepper exposure dose control base upon across wafer variations in photoresist thickness
US6576385B2 (en) 2001-02-02 2003-06-10 Advanced Micro Devices, Inc. Method of varying stepper exposure dose to compensate for across-wafer variations in photoresist thickness
EP1463096A1 (en) * 2001-07-26 2004-09-29 Seiko Epson Corporation EXPOSURE DEVICE, EXPOSURE METHOD, METHOD OF PRODUCING SEMICONDUCTOR DEVICE, ELECTROOPTIC DEVICE, AND ELECTRONIC EQUIPMENT
EP1463096A4 (en) * 2001-07-26 2006-07-12 Seiko Epson Corp EXPOSURE DEVICE, EXPOSURE METHOD, METHOD FOR PRODUCING A SEMICONDUCTOR CONSTRUCTION ELEMENT, ELECTROOPTICAL COMPONENT AND ELECTRONIC EQUIPMENT
US20060035175A1 (en) * 2002-07-01 2006-02-16 Obayashiseikou Co., Ltd. Transverse electric-field type liquid crystal display device, process of manufacturing the same,and scan-exposing device
US7423723B2 (en) * 2002-07-01 2008-09-09 Obayashiseikou Co., Ltd. Transverse electric-field type liquid crystal display device, process of manufacturing the same, and scan-exposing device
EP1517189A3 (en) * 2003-09-17 2006-02-15 ASML Netherlands B.V. Critical dimension optimisation in lithography
CN100468201C (zh) * 2003-09-17 2009-03-11 Asml荷兰有限公司 自适应的光刻临界尺寸增强
DE102023202896A1 (de) 2023-03-30 2024-10-02 Carl Zeiss Smt Gmbh Verfahren und System zum Bestrahlen eines Lithografieobjekts

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Publication number Publication date
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