US20210020778A1 - Shield gate mosfet and method for fabricating the same - Google Patents
Shield gate mosfet and method for fabricating the same Download PDFInfo
- Publication number
- US20210020778A1 US20210020778A1 US16/663,365 US201916663365A US2021020778A1 US 20210020778 A1 US20210020778 A1 US 20210020778A1 US 201916663365 A US201916663365 A US 201916663365A US 2021020778 A1 US2021020778 A1 US 2021020778A1
- Authority
- US
- United States
- Prior art keywords
- shield gate
- trenches
- gate
- doped region
- epitaxial layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title claims description 40
- 239000010410 layer Substances 0.000 claims description 151
- 239000011241 protective layer Substances 0.000 claims description 4
- 230000015556 catabolic process Effects 0.000 abstract description 12
- 238000004088 simulation Methods 0.000 description 7
- 239000004020 conductor Substances 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 238000010420 art technique Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
Definitions
- a top surface of the shield gate covered by the inter-gate oxide layer has rounded corners.
- the shield gate MOSFET further includes a source region disposed on a surface of the epitaxial layer, and a doping concentration of the second doped region is less than a doping concentration of the source region.
- FIG. 2 is a cross section of another shield gate MOSFET of the first embodiment.
- FIG. 1A is a top view of a shield gate MOSFET according to the first embodiment of the disclosure.
- FIG. 1B is a cross section of the structure of the I-I line segment and the II-II line segment of FIG. 1A .
- the shield gate MOSFET of the present embodiment includes an epitaxial layer 100 , trenches 102 formed in the epitaxial layer 100 , a shield gate 106 located in the trenches 102 , a control gate 108 located on the shield gate 106 in the trenches 102 , an insulating layer 110 located between the shield gate 106 and the epitaxial layer 100 , a gate oxide layer 112 located between the control gate 108 and the epitaxial layer 100 , an inter-gate oxide layer 114 located between the shield gate 106 and the control gate 108 , a first doped region 116 located in the epitaxial layer 100 of a trench bottom 102 a , and a second doped region 118 located between the trench bottom 102 a and the first doped region 116 .
- FIG. 1B Also shown in FIG. 1B is a well region 122 disposed in the source region 120 of an epitaxial layer surface 100 a and adjacent to the source region 120 , wherein the source region 120 has the first conductivity type and the well region 122 has the second conductivity type.
- the doping concentration of the second doped region 118 is less than the doping concentration of the source region 120 .
- FIG. 2 is a cross section of another shield gate MOSFET of the first embodiment, wherein the same or similar components are represented by the same reference numerals as in FIG. 1B , and the same or similar components are also as provided above and are not repeated herein.
- the doping concentration of the first doped region 306 may be a uniform concentration; alternatively, the method of forming the first doped region 306 may also be multi-stage doping so that the doping concentration of the first doped region 306 is a trapezoidal concentration gradually increasing from the end of the trenches 302 to an epitaxial layer bottom surface 300 b as shown in FIG. 2 .
- the exposed insulating layer 310 is removed to expose a portion of an epitaxial layer surface 300 c in the trenches 302 , and the insulating layer 310 may be slightly lower than the top surface of the shield gate 312 a .
- the removal method is, for example, dry etching or wet etching.
- the top surface of the shield gate 312 a may be optionally rounded to obtain a slightly semicircular top surface 312 c .
- the rounding process for example, first oxidizes the top surface of the shield gate 312 a and then removes the oxide there, wherein the removal method is, for example, wet dip.
- the protective layer 314 of the connecting region 304 may be removed prior to the rounding, so that the top surface of the protruding portion 312 b is also rounded and exposed by the trenches 302 of the connecting region 304 .
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17/505,662 US11916141B2 (en) | 2019-07-16 | 2021-10-20 | Method for fabricating shield gate MOSFET |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108125082A TWI696288B (zh) | 2019-07-16 | 2019-07-16 | 遮蔽閘金氧半場效電晶體及其製造方法 |
TW108125082 | 2019-07-16 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/505,662 Division US11916141B2 (en) | 2019-07-16 | 2021-10-20 | Method for fabricating shield gate MOSFET |
Publications (1)
Publication Number | Publication Date |
---|---|
US20210020778A1 true US20210020778A1 (en) | 2021-01-21 |
Family
ID=72176324
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/663,365 Abandoned US20210020778A1 (en) | 2019-07-16 | 2019-10-25 | Shield gate mosfet and method for fabricating the same |
US17/505,662 Active 2039-12-05 US11916141B2 (en) | 2019-07-16 | 2021-10-20 | Method for fabricating shield gate MOSFET |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/505,662 Active 2039-12-05 US11916141B2 (en) | 2019-07-16 | 2021-10-20 | Method for fabricating shield gate MOSFET |
Country Status (3)
Country | Link |
---|---|
US (2) | US20210020778A1 (zh) |
CN (1) | CN112242432A (zh) |
TW (1) | TWI696288B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112864236A (zh) * | 2021-03-09 | 2021-05-28 | 上海恒灼科技有限公司 | 一种中高压屏蔽栅场效应晶体管的制备方法 |
TWI838718B (zh) | 2022-03-25 | 2024-04-11 | 新唐科技股份有限公司 | 溝槽式功率半導體裝置及其製造方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112582260B (zh) * | 2020-12-04 | 2023-08-22 | 杭州芯迈半导体技术有限公司 | 沟槽型mosfet及其制造方法 |
US20220238698A1 (en) * | 2021-01-26 | 2022-07-28 | Pakal Technologies, Inc. | Mos-gated trench device using low mask count and simplified processing |
CN112908858A (zh) * | 2021-03-09 | 2021-06-04 | 上海华虹宏力半导体制造有限公司 | 半导体器件的制造方法 |
TWI823639B (zh) * | 2022-10-20 | 2023-11-21 | 世界先進積體電路股份有限公司 | 半導體裝置及其形成方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001352057A (ja) * | 2000-06-09 | 2001-12-21 | Mitsubishi Electric Corp | 半導体装置、およびその製造方法 |
US7936009B2 (en) * | 2008-07-09 | 2011-05-03 | Fairchild Semiconductor Corporation | Shielded gate trench FET with an inter-electrode dielectric having a low-k dielectric therein |
US7750412B2 (en) * | 2008-08-06 | 2010-07-06 | Fairchild Semiconductor Corporation | Rectifier with PN clamp regions under trenches |
US8610205B2 (en) * | 2011-03-16 | 2013-12-17 | Fairchild Semiconductor Corporation | Inter-poly dielectric in a shielded gate MOSFET device |
WO2014115253A1 (ja) * | 2013-01-23 | 2014-07-31 | 株式会社日立製作所 | 炭化珪素半導体装置及びその製造方法 |
US9761702B2 (en) * | 2014-02-04 | 2017-09-12 | MaxPower Semiconductor | Power MOSFET having planar channel, vertical current path, and top drain electrode |
US9917184B2 (en) * | 2015-07-24 | 2018-03-13 | Semiconductor Components Industries, Llc | Semiconductor component that includes a clamping structure and method of manufacturing the semiconductor component |
US9953969B2 (en) * | 2016-03-25 | 2018-04-24 | Force Mos Technology Co., Ltd. | Semiconductor power device having shielded gate structure and ESD clamp diode manufactured with less mask process |
TWI601295B (zh) * | 2016-08-25 | 2017-10-01 | 綠星電子股份有限公司 | 斷閘極金氧半場效電晶體 |
DE102018103849B4 (de) * | 2018-02-21 | 2022-09-01 | Infineon Technologies Ag | Siliziumcarbid-Halbleiterbauelement mit einer in einer Grabenstruktur ausgebildeten Gateelektrode |
US11251297B2 (en) * | 2018-03-01 | 2022-02-15 | Ipower Semiconductor | Shielded gate trench MOSFET devices |
WO2019169361A1 (en) * | 2018-03-01 | 2019-09-06 | Hamza Yilmaz | Self-aligned trench mosfet structures and methods |
US11538911B2 (en) * | 2018-05-08 | 2022-12-27 | Ipower Semiconductor | Shielded trench devices |
DE102018124740A1 (de) * | 2018-10-08 | 2020-04-09 | Infineon Technologies Ag | Halbleiterbauelement mit einem sic halbleiterkörper und verfahren zur herstellung eines halbleiterbauelements |
US10892320B2 (en) * | 2019-04-30 | 2021-01-12 | Vanguard International Semiconductor Corporation | Semiconductor devices having stacked trench gate electrodes overlapping a well region |
-
2019
- 2019-07-16 TW TW108125082A patent/TWI696288B/zh active
- 2019-07-30 CN CN201910693360.7A patent/CN112242432A/zh active Pending
- 2019-10-25 US US16/663,365 patent/US20210020778A1/en not_active Abandoned
-
2021
- 2021-10-20 US US17/505,662 patent/US11916141B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112864236A (zh) * | 2021-03-09 | 2021-05-28 | 上海恒灼科技有限公司 | 一种中高压屏蔽栅场效应晶体管的制备方法 |
TWI838718B (zh) | 2022-03-25 | 2024-04-11 | 新唐科技股份有限公司 | 溝槽式功率半導體裝置及其製造方法 |
Also Published As
Publication number | Publication date |
---|---|
TWI696288B (zh) | 2020-06-11 |
US11916141B2 (en) | 2024-02-27 |
US20220045210A1 (en) | 2022-02-10 |
TW202105729A (zh) | 2021-02-01 |
CN112242432A (zh) | 2021-01-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11916141B2 (en) | Method for fabricating shield gate MOSFET | |
US9741808B2 (en) | Split-gate trench power MOSFET with protected shield oxide | |
US20170278837A1 (en) | Semiconductor power device having shielded gate structure and esd clamp diode manufactured with less mask process | |
US8120100B2 (en) | Overlapping trench gate semiconductor device | |
US20060138549A1 (en) | High-voltage transistor and fabricating method thereof | |
CN108962989B (zh) | 一种沟槽型mos器件及其制造方法 | |
CN113053738A (zh) | 一种分裂栅型沟槽mos器件及其制备方法 | |
CN110854184B (zh) | 半导体元件及其制造方法 | |
US10734381B2 (en) | Fin-FET devices | |
US11652170B2 (en) | Trench field effect transistor structure free from contact hole | |
KR20100071406A (ko) | 반도체 소자의 형성 방법 | |
JP4801323B2 (ja) | 半導体装置の製造方法 | |
KR102453508B1 (ko) | 스페이서 내에 에어 보이드를 갖는 반도체 디바이스 | |
US20140061805A1 (en) | Semiconductor device and method for manufacturing | |
US10062751B2 (en) | Semiconductor device | |
US7859041B2 (en) | Gate structure of semiconductor device | |
CN111092113B (zh) | 金氧半场效应晶体管的终端区结构及其制造方法 | |
US11830908B2 (en) | RF switch device having a highly resistive substrate, an isolation layer therein or thereon, and a trap-rich layer therein or thereon | |
CN112103249B (zh) | 半导体结构及其形成方法 | |
US20240128313A1 (en) | Semiconductor structure and methods for manufacturing the same | |
CN111755335B (zh) | 半导体结构及其形成方法 | |
CN118039692A (zh) | 半导体结构及其形成方法 | |
TW202326825A (zh) | 溝槽式電晶體及其製造方法 | |
KR20050101999A (ko) | Mosfet 및 그 제조 방법 | |
KR20060007756A (ko) | 트랜지스터 및 그의 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION, TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SU, HUNG-I;HO, CHANG-CHIN;JIANG, YONG-KANG;REEL/FRAME:050822/0280 Effective date: 20191018 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |