US20210020778A1 - Shield gate mosfet and method for fabricating the same - Google Patents

Shield gate mosfet and method for fabricating the same Download PDF

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Publication number
US20210020778A1
US20210020778A1 US16/663,365 US201916663365A US2021020778A1 US 20210020778 A1 US20210020778 A1 US 20210020778A1 US 201916663365 A US201916663365 A US 201916663365A US 2021020778 A1 US2021020778 A1 US 2021020778A1
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Prior art keywords
shield gate
trenches
gate
doped region
epitaxial layer
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Abandoned
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US16/663,365
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English (en)
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Hung-I Su
Chang-Chin Ho
Yong-Kang Jiang
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Powerchip Semiconductor Manufacturing Corp
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Powerchip Semiconductor Manufacturing Corp
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Assigned to POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION reassignment POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HO, CHANG-CHIN, JIANG, Yong-kang, SU, HUNG-I
Publication of US20210020778A1 publication Critical patent/US20210020778A1/en
Priority to US17/505,662 priority Critical patent/US11916141B2/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623Buried supplementary region, e.g. buried guard ring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/66734Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode

Definitions

  • a top surface of the shield gate covered by the inter-gate oxide layer has rounded corners.
  • the shield gate MOSFET further includes a source region disposed on a surface of the epitaxial layer, and a doping concentration of the second doped region is less than a doping concentration of the source region.
  • FIG. 2 is a cross section of another shield gate MOSFET of the first embodiment.
  • FIG. 1A is a top view of a shield gate MOSFET according to the first embodiment of the disclosure.
  • FIG. 1B is a cross section of the structure of the I-I line segment and the II-II line segment of FIG. 1A .
  • the shield gate MOSFET of the present embodiment includes an epitaxial layer 100 , trenches 102 formed in the epitaxial layer 100 , a shield gate 106 located in the trenches 102 , a control gate 108 located on the shield gate 106 in the trenches 102 , an insulating layer 110 located between the shield gate 106 and the epitaxial layer 100 , a gate oxide layer 112 located between the control gate 108 and the epitaxial layer 100 , an inter-gate oxide layer 114 located between the shield gate 106 and the control gate 108 , a first doped region 116 located in the epitaxial layer 100 of a trench bottom 102 a , and a second doped region 118 located between the trench bottom 102 a and the first doped region 116 .
  • FIG. 1B Also shown in FIG. 1B is a well region 122 disposed in the source region 120 of an epitaxial layer surface 100 a and adjacent to the source region 120 , wherein the source region 120 has the first conductivity type and the well region 122 has the second conductivity type.
  • the doping concentration of the second doped region 118 is less than the doping concentration of the source region 120 .
  • FIG. 2 is a cross section of another shield gate MOSFET of the first embodiment, wherein the same or similar components are represented by the same reference numerals as in FIG. 1B , and the same or similar components are also as provided above and are not repeated herein.
  • the doping concentration of the first doped region 306 may be a uniform concentration; alternatively, the method of forming the first doped region 306 may also be multi-stage doping so that the doping concentration of the first doped region 306 is a trapezoidal concentration gradually increasing from the end of the trenches 302 to an epitaxial layer bottom surface 300 b as shown in FIG. 2 .
  • the exposed insulating layer 310 is removed to expose a portion of an epitaxial layer surface 300 c in the trenches 302 , and the insulating layer 310 may be slightly lower than the top surface of the shield gate 312 a .
  • the removal method is, for example, dry etching or wet etching.
  • the top surface of the shield gate 312 a may be optionally rounded to obtain a slightly semicircular top surface 312 c .
  • the rounding process for example, first oxidizes the top surface of the shield gate 312 a and then removes the oxide there, wherein the removal method is, for example, wet dip.
  • the protective layer 314 of the connecting region 304 may be removed prior to the rounding, so that the top surface of the protruding portion 312 b is also rounded and exposed by the trenches 302 of the connecting region 304 .

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
US16/663,365 2019-07-16 2019-10-25 Shield gate mosfet and method for fabricating the same Abandoned US20210020778A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/505,662 US11916141B2 (en) 2019-07-16 2021-10-20 Method for fabricating shield gate MOSFET

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW108125082A TWI696288B (zh) 2019-07-16 2019-07-16 遮蔽閘金氧半場效電晶體及其製造方法
TW108125082 2019-07-16

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US17/505,662 Active 2039-12-05 US11916141B2 (en) 2019-07-16 2021-10-20 Method for fabricating shield gate MOSFET

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CN (1) CN112242432A (zh)
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Cited By (2)

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CN112864236A (zh) * 2021-03-09 2021-05-28 上海恒灼科技有限公司 一种中高压屏蔽栅场效应晶体管的制备方法
TWI838718B (zh) 2022-03-25 2024-04-11 新唐科技股份有限公司 溝槽式功率半導體裝置及其製造方法

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CN112582260B (zh) * 2020-12-04 2023-08-22 杭州芯迈半导体技术有限公司 沟槽型mosfet及其制造方法
US20220238698A1 (en) * 2021-01-26 2022-07-28 Pakal Technologies, Inc. Mos-gated trench device using low mask count and simplified processing
CN112908858A (zh) * 2021-03-09 2021-06-04 上海华虹宏力半导体制造有限公司 半导体器件的制造方法
TWI823639B (zh) * 2022-10-20 2023-11-21 世界先進積體電路股份有限公司 半導體裝置及其形成方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112864236A (zh) * 2021-03-09 2021-05-28 上海恒灼科技有限公司 一种中高压屏蔽栅场效应晶体管的制备方法
TWI838718B (zh) 2022-03-25 2024-04-11 新唐科技股份有限公司 溝槽式功率半導體裝置及其製造方法

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TWI696288B (zh) 2020-06-11
US11916141B2 (en) 2024-02-27
US20220045210A1 (en) 2022-02-10
TW202105729A (zh) 2021-02-01
CN112242432A (zh) 2021-01-19

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