US20180090361A1 - Mounting table and plasma processing apparatus - Google Patents

Mounting table and plasma processing apparatus Download PDF

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Publication number
US20180090361A1
US20180090361A1 US15/718,126 US201715718126A US2018090361A1 US 20180090361 A1 US20180090361 A1 US 20180090361A1 US 201715718126 A US201715718126 A US 201715718126A US 2018090361 A1 US2018090361 A1 US 2018090361A1
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United States
Prior art keywords
hole
pin
mounting table
gap
electrostatic chuck
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US15/718,126
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English (en)
Inventor
Yasuharu Sasaki
Daiki Satoh
Akira Nagayama
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication date
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Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SATOH, DAIKI, NAGAYAMA, AKIRA, SASAKI, YASUHARU
Publication of US20180090361A1 publication Critical patent/US20180090361A1/en
Priority to US17/107,678 priority Critical patent/US20210082733A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32174—Circuits specially adapted for controlling the RF discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

Definitions

  • the disclosure relates to a mounting table and a plasma processing apparatus.
  • Japanese Patent Application Publication No. 2014-143244 discloses therein a plasma processing apparatus including a processing chamber capable of defining a vacuum space, a mounting table which mounts thereon a target object and serves as a lower electrode in the processing chamber, and an upper electrode provided to face the mounting table.
  • plasma processing is performed on the target object such as a wafer or the like which is mounted on the mounting table by applying a high frequency power between the mounting table serving as the lower electrode and the upper electrode.
  • the plasma processing apparatus disclosed in Japanese Patent Application Publication No. 2014-143244 includes a plurality of lifter pins for raising the target object from the mounting table.
  • the lifter pins can protrude and retract with respect to a surface of the mounting table.
  • the mounting table has holes for accommodating the lifter pins.
  • the plasma processing apparatus disclosed in Japanese Patent Application Publication No. 2014-143244 has a gas hole for supplying a heat transfer gas such as He gas or the like to a space between a backside of the target object and a top surface of the electrostatic chuck.
  • the plasma processing apparatus disclosed in Japanese Patent Application Publication No. 2014-143244 has the lifter pins having inverted tapered upper end portions and pin through-holes having tapered upper end portions to prevent discharge occurrence between the target object and the mounting table.
  • the upper end portions of the lifter pins are brought into surface contact with the upper end portions of the pin through-holes when the lifter pins are accommodated in the pin through-holes.
  • the mounting table includes: an electrostatic chuck, a base, a spacer and a pin.
  • the electrostatic chuck has a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, and a first through-hole is formed in the mounting surface.
  • the base is in contact with the rear surface of the electrostatic chuck and has a second through-hole communicating with the first through-hole.
  • the spacer has a cylindrical shape, and is inserted in the second through-hole.
  • the pin is accommodated in the first through-hole and the spacer. Gaps are formed between the pin and inner walls of the first through-hole and the spacer, and the gap between the first through-hole and the pin is greater than the gap between the spacer and the pin.
  • the pin is accommodated in the first through-hole formed in the mounting surface and the spacer inserted in the second through-hole communicating with the first through-hole. Therefore, the space of the hole formed in the mounting table can be reduced not to provide a space for acceleration of electrons. Accordingly, it is possible to prevent discharge occurrence at the first through-hole and the spacer. Further, the discharge can be prevented without deteriorating the gas supply function because the gaps are formed between the pin and the inner walls of the first through-hole and the spacer. Moreover, when the electrostatic chuck and the base are formed of different materials, the contact point between the first thorugh-hole and the spacer may be deviated due to the difference between the thermal expansion coefficients.
  • the gap between the pin and the first thorugh-hole is greater than the gap between the pin and the spacer. Accordingly, even when the electrostatic chuck and the base are formed of different materials, it is possible to avoid the damage of the pin inserted in the first through-hole and the spacer.
  • the present inventors have found that abnormal discharge can be effectively prevented when the space in the base is reduced compared with when the space in the electrostatic chuck is reduced. That is, by allowing the gap between the pin and the first thorugh-hole to have the space enough to avoid the damage of the pin, the abnormal discharge can be effectively prevented while avoiding damage of the pin.
  • a mounting table to which a voltage can be applicaed.
  • the mounting table includes: an electrostatic chuck, a base and a pin.
  • the electrostatic chuck has a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, and a first through-hole is formed in the mounting surface.
  • the base is in contact with the rear surface of the electrostatic chuck, and has a second through-hole communicating with the first through-hole.
  • the pin is accommodated in the first through-hole and the second through-hole. Gaps are formed between the pin and inner walls of the first through-hole and the second through-hole, and the gap between the first through-hole and the pin is greater than the gap between the second through-hole and the pin.
  • the pin is accommodated in the first through-hole formed in the mounting surface and the second through-hole communicating with the first through-hole. Therefore, the space of the hole formed in the mounting table can be reduced not to provide a space for acceleration of electrons. Accordingly, it is possible to prevent discharge occurrence at the first through-hole and the second through-hole. Further, the discharge can be prevented without deteriorating the gas supply function because the gaps are formed between the pin and the inner walls of the first through-hole and the second through-hole. Moreover, when the electrostatic chuck and the base are formed of different materials, the contact point between the first thorugh-hole and the second through-hole may be deviated due to the difference between the thermal expansion coefficients.
  • the gap between the pin and the first thorugh-hole is greater than the gap between the pin and the second through-hole. Accordingly, even when the electrostatic chuck and the base are formed of different materials, it is possible to avoid the damage of the pin inserted in the first through-hole and the second through-hole.
  • the present inventors have found that abnormal discharge can be effectively prevented when the space in the base is reduced compared with when the space in the electrostatic chuck is reduced. That is, by allowing the gap between the pin and the first thorugh-hole to have the space enough to avoid the damage of the pin, the abnormal discharge can be effectively prevented while avoiding damage of the pin.
  • a plasma processing apparatus including: a processing chamber, a gas supply unit and a mounting table.
  • the processing chamber defines a processing space where a plasma is generated.
  • the gas supply unit is configured to supply a processing gas into the processing space.
  • the mounting table is provided in the processing space and configured to mount thereon a target object.
  • the mounting table includes an electrostatic chuck, a base, a spacer and a pin.
  • the electrostatic chuck has a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, and a first through-hole is formed in the mounting surface.
  • the base is in contact with the rear surface of the electrostatic chuck and has a second through-hole communicating with the first through-hole.
  • the spacer has a cylindrical shape, and is inserted in the second through-hole.
  • the pin is accommodated in the first through-hole and the spacer. Gaps are formed between the pin and inner walls of the first through-hole and the spacer, and the gap between the first through-hole and the pin is greater than the gap between the spacer and the pin.
  • a plasma processing apparatus including: a processing chamber, a gas supply unit and a mounting table.
  • the processing chamber defines a processing space where a plasma is generated.
  • the gas supply unit is configured to supply a processing gas into the processing space.
  • the mounting table is provided in the processing space and configured to mount thereon a target object.
  • the mounting table includes an electrostatic chuck, a base and a pin.
  • the electrostatic chuck has a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, and a first through-hole is formed in the mounting surface.
  • the base is in contact with the rear surface of the electrostatic chuck, and has a second through-hole communicating with the first through-hole.
  • the pin is accommodated in the first through-hole and the second through-hole. Gaps are formed between the pin and inner walls of the first through-hole and the second through-hole, and the gap between the first through-hole and the pin is greater than the gap between the second through-hole and the pin.
  • the mounting table and the plasma processing apparatus including the mounting table are capable of preventing abnormal discharge.
  • FIG. 1 is a schematic cross sectional view showing a configuration of a plasma processing apparatus according to a first embodiment
  • FIGS. 2 and 3 are schematic cross sectional views showing a mounting table in the plasma processing apparatus shown in FIG. 1 ;
  • FIG. 4 is a schematic cross sectional view showing a configuration of a gas hole in the mounting table shown in FIGS. 2 and 3 ;
  • FIG. 5 explains positional relation of components defining the gas hole shown in FIG. 4 ;
  • FIGS. 6A to 6F explain abnormal discharge
  • FIG. 7 is a schematic cross sectional view showing a configuration of a gas hole according to a second embodiment.
  • FIG. 8 is a table showing occurrence/non-occurrence of discharge in test examples and a comparative example.
  • FIG. 1 is a schematic cross sectional view showing a configuration of a plasma processing apparatus according to a first embodiment.
  • the plasma processing apparatus includes a processing chamber 1 that is airtightly sealed and electrically connected to a ground potential.
  • the processing chamber 1 is formed in a cylindrical shape and made of, e.g., aluminum or the like.
  • the processing chamber 1 defines a processing space where a plasma is generated.
  • a mounting table 2 for horizontally supporting a semiconductor wafer (hereinafter, simply referred to as “wafer”) that is a target object is provided in the processing chamber 1 .
  • the mounting table 2 includes a base 2 a and an electrostatic chuck 6 .
  • the base 2 a is made of a conductive metal, e.g., aluminum or the like, and serves as a lower electrode.
  • the electrostatic chuck 6 has a function of attracting and holding the wafer W.
  • the mounting table 2 is supported by a conductive support 4 through an insulating plate 3 .
  • a focus ring 5 made of, e.g., single crystalline silicon, is provided on an outer periphery of the mounting table 2 .
  • a cylindrical inner wall member 3 a made of, e.g., quartz or the like, surrounds outer peripheries of the mounting table 2 and the support 4 .
  • the base 2 a is connected to a first RF power supply 10 a via a first matching unit 11 a and connected to a second
  • the first RF power supply 10 a is used for plasma generation and configured to supply a high frequency power having a predetermined high frequency to the base 2 a of the mounting table 2 .
  • the second RF power 10 b is used for ion attraction (bias) and configured to supply a high frequency power having a predetermined frequency lower than that of the first RF power supply 10 a to the base 2 a of the mounting table 2 . In this manner, a voltage can be applied to the mounting table 2 .
  • a shower head 16 serving as an upper electrode is provided above the mounting table 2 to face the mounting table 2 .
  • the shower head 16 and the mounting table function as a pair of electrodes (upper electrode and lower electrode).
  • the electrostatic chuck 6 has a configuration in which an electrode 6 a is buried in an insulator 6 b .
  • a DC power supply 12 is connected to the electrode 6 a .
  • the wafer W is attracted by a Coulomb force.
  • the insulator 6 b is made of, e.g., ceramic or the like.
  • a coolant flow path 2 d is formed in the mounting table 2 .
  • a coolant inlet line 2 b and a coolant outlet line 2 c are connected to the coolant flow path 2 d .
  • a coolant e.g., cooling water
  • the mounting table 2 can be controlled to a predetermined temperature.
  • a gas supply line 30 for supplying a cold heat transfer gas (backside gas) such as He gas or the like to the backside of the wafer W is formed through the mounting table 2 and the like.
  • the gas supply line 30 is connected to a gas supply source (not shown). With this configuration, the wafer W attracted and held on the top surface of the mounting table 2 by the electrostatic chuck 6 is controlled to a predetermined temperature.
  • a structure of the gas supply line 30 will be described later.
  • the mounting table 2 is provided with a plurality of, e.g., three pin through-holes 200 (only one shown in FIG. 1 ).
  • Lifter pins 61 are inserted into the respective pin through-holes 200 .
  • the lifter pins 61 are connected to a driving unit 62 and vertically moved by the driving unit 62 .
  • a structure of the pin through-holes 200 will be described later.
  • the shower head 16 is provided at a ceiling wall of the processing chamber 1 .
  • the shower head 16 includes a main body 16 a and an upper ceiling plate 16 b serving as an electrode plate.
  • the shower head 16 is supported at an upper portion of the processing chamber 1 through an insulating member 95 .
  • the main body 16 a is made of a conductive material, e.g., aluminum having an anodically oxidized surface and detachably holds the upper ceiling plate 16 b therebelow.
  • a gas diffusion space 16 c is provided in the main body 16 a .
  • a plurality of gas through-holes 16 d is formed at a bottom portion of the main body 16 a and positioned below the gas diffusion space 16 c .
  • Gas injection holes 16 e are formed through the upper ceiling plate 16 b in a thickness direction thereof and overlapped with the gas through-holes 16 d .
  • a gas inlet port 16 g for introducing the processing gas into the gas diffusion space 16 c is formed in the main body 16 a .
  • One end of a gas supply line 15 a is connected to the gas inlet port 16 g .
  • the other end of the gas supply line 15 a is connected to a processing gas supply source (gas supply unit) 15 for supplying a processing gas.
  • a mass flow controller (MFC) 15 b and an opening/closing valve V 2 are installed in the gas supply line 15 a in that order from an upstream side.
  • the processing gas for plasma etching is supplied from the processing gas supply source 15 into the gas diffusion space 16 c through the gas supply line 15 a and then distributed and supplied in a shower shape from the gas diffusion space 16 c into the processing chamber 1 through the gas through-holes 16 d and the gas injection holes 16 e.
  • a variable DC power supply 72 is electrically connected to the shower head 16 serving as the upper electrode via a low pass filter (LPF) 71 .
  • a power supply of the variable DC power supply 72 is on-off controlled by an on/off switch 73 .
  • Current/voltage of the variable DC power supply 72 and on/off of the on/off switch 73 are controlled by a control unit 90 to be described later.
  • the on/off switch 72 is turned on by the control unit 90 and a predetermined DC voltage is applied to the shower head 16 serving as the upper electrode, if necessary.
  • a cylindrical ground conductor 1 a extends upward from a sidewall of the processing chamber 1 to a position higher than a height of the shower head 16 .
  • the cylindrical ground conductor 1 a has a ceiling wall at the top thereof.
  • a gas exhaust port 81 is formed at a bottom portion of the processing chamber 1 .
  • a first gas exhaust unit 83 is connected to the gas exhaust port 81 via a gas exhaust line 82 .
  • the first gas exhaust unit 83 has a vacuum pump. By operating the vacuum pump, a pressure in the processing chamber 1 can be decreased to a predetermined vacuum level.
  • a loading/unloading port 84 for the wafer W and a gate valve for opening/closing the loading/unloading port 84 are provided at a sidewall of the processing chamber 1 .
  • a deposition shield 86 is provided along an inner wall surface of the processing chamber 1 .
  • the deposition shield 86 prevents etching by-products (deposits) from being attached to the processing chamber 1 .
  • a conductive member (GND block) 89 is provided at a portion of the deposition shield 86 at the substantially same height as the height of the wafer W. The conductive member 89 is connected such that a potential with respect to the ground can be controlled. Due to the presence of the conductive member 89 , abnormal discharge is prevented.
  • a deposition shield 87 extending along the inner wall member 3 a is provided at a lower side of the deposition shield 86 .
  • the deposition shields 86 and 87 are detachably provided.
  • the operation of the plasma processing apparatus configured as described above is integrally controlled by the control unit 90 .
  • the control unit 90 includes a process controller 91 having a CPU, a user interface 92 , and a storage unit 93 .
  • the user interface 92 includes a keyboard for a process manager to input commands to operate the plasma processing apparatus, a display for visualizing an operational status of the plasma processing apparatus, and the like.
  • the storage unit 93 stores therein recipes including a control program (software), processing condition data and the like for realizing various processes performed by the plasma processing apparatus under the control of the process controller 91 . If necessary, any recipe is retrieved from the storage unit 93 in response to a command from the user interface 92 or the like and executed by the process controller 91 . Accordingly, a desired process in the plasma processing apparatus is performed under the control of the process controller 91 .
  • the recipes including the control program, the processing condition data and the like can be stored in a computer-readable storage medium (e.g., a hard disk, a CD, a flexible disk, a semiconductor memory, or the like) or can be transmitted, when needed, from another apparatus, via, e.g., a dedicated line, and used on-line.
  • a computer-readable storage medium e.g., a hard disk, a CD, a flexible disk, a semiconductor memory, or the like
  • FIGS. 2 and 3 are schematic cross sectional views of the mounting table 2 in the plasma processing apparatus shown in FIG. 1 .
  • FIG. 2 shows a case in which the wafer W is raised and supported by the lifter pins 61 .
  • FIG. 3 shows a case in which the wafer W is supported on the electrostatic chuck 6 by lowering the lifter pins 61 .
  • the mounting table 2 includes the base 2 a and the electrostatic chuck 6 , and the lifter pins 61 can be inserted from a lower portion of the base 2 a to protrude beyond the electrostatic chuck 6 .
  • the electrostatic chuck 6 is formed in a disc shape and has a mounting surface 21 for mounting the wafer W thereon and a rear surface 22 opposite to the mounting surface 21 .
  • the mounting surface 21 has a circular shape and supports the disc-shaped wafer W while being in contact with the backside of the wafer W.
  • the base 2 a is in contact with the rear surface 22 of the electrostatic chuck 6 .
  • the electrostatic chuck 6 can be made to be in contact with the surface of the base 2 a by using an adhesive.
  • An end portion (gas hole) of the gas supply line 30 is formed at the mounting surface 21 .
  • the gas supply line 30 supplies He gas for cooling or the like.
  • the end portion of the gas supply line 30 is formed by a first through-hole 17 and a second through-hole 18 .
  • the first through-hole 17 extends from the rear surface 22 to the mounting surface 21 of the electrostatic chuck 6 .
  • the electrostatic chuck 6 defines an inner wall of the first through-hole 17 .
  • the second through-hole 18 extends from a rear surface of the base 2 a to a contact surface with the electrostatic chuck 6 .
  • the base 2 a defines an inner wall of the second through-hole 18 .
  • a diameter of the second through-hole 18 is greater than that of the first through-hole 17 .
  • the electrostatic chuck 6 and the base 2 a are arranged such that the first through-hole 17 and the second through-hole 18 communicate with each other.
  • a gas spacer 204 is provided at the gas supply line 30 .
  • the gas spacer 204 is made of an insulator, e.g., ceramic or the like, and has a cylindrical shape.
  • the gas spacer 204 has an outer diameter that is substantially equal to the diameter of the second through-hole 18 so that the gas spacer 204 can be in contact with the base 2 a inside the second through-hole 18 and insertion-fitted into the second through-hole 16 from a bottom surface toward a top surface of the base 2 a .
  • the gas spacer 204 has an inner diameter smaller than the diameter of the first through-hole 17 .
  • a pin 31 is accommodated in the gas hole.
  • the pin 31 is accommodated in the first through-hole 17 and the gas spacer 204 .
  • An outer diameter of the pin 31 is smaller than the inner diameter of the gas spacer 204 and the inner diameter of the first through-hole 17 .
  • the gas spacer 204 has an inner diameter that is smaller than the diameter of the first through-hole 17 and greater than the outer diameter of the pin 31 .
  • the pin 31 may be made of an insulator, e.g., ceramic or the like.
  • the pin through-holes 200 for accommodating the respective lifter pins 61 are formed in the mounting surface 21 .
  • the first through-hole 17 and the second through-hole 18 form the pin through-hole 200 .
  • the first through-hole 17 is formed at the electrostatic chuck 6 and the second through-hole 18 is formed at the base 2 a .
  • the first through-hole 17 forming the pin through-hole 200 has a diameter slightly greater than the outer diameter of the lifter pin 61 (by, e.g., 0.1 mm to 0.5 mm) and, thus, the lifter pin 61 can be accommodated therein.
  • the diameter of the second through-hole is greater than, e.g., the diameter of the first through-hole.
  • a pin spacer 203 is provided between the inner wall of the second through-hole 18 and the lifter pin 61 .
  • the pin spacer 203 is provided in the second through-hole 18 forming the pin through-hole 200 .
  • the pin spacer 203 is made of an insulator, e.g., ceramic or the like, and has a cylindrical shape.
  • the pin spacer 203 has an outer diameter that is substantially equal to the diameter of the second through-hole 18 so that the pin spacer 203 can be in contact with the base 2 a inside the second through-hole 18 and is insertion-fitted into the second through-hole 18 from the bottom surface toward the top surface of the base 2 a .
  • the pin spacer 203 has an inner diameter that is smaller than the diameter of the first through-hole 17 and greater than the outer diameter of the lifter pin 61 .
  • the lifter pin 61 includes a pin-shaped pin main body 61 a made of insulating ceramic or resin and an upper end portion 61 b .
  • the pin main body 61 a is formed in a cylindrical shape and has an outer diameter of, e.g., a few mm.
  • the upper end portion 61 b is formed by chamfering the pin main body 61 a and has a spherical surface.
  • the spherical surface has, e.g., a considerably large curvature, and the entire pin upper end portion 61 b of the lifter pin 61 is positioned close to the backside of the wafer W.
  • the lifter pin 61 can vertically move through the pin through-hole 200 to protrude beyond and retreat below the mounting surface 21 of the mounting table 2 by the driving unit 62 shown in FIG. 1 .
  • the driving unit 62 adjusts a height of a stop position of the lifter pin 76 such that the pin upper end portion 61 b of the lifter pin 61 is positioned right below the backside of the wafer W when the lifter pin 61 is accommodated.
  • FIG. 4 is a schematic cross sectional view showing a configuration of the gas hole in the mounting table shown in FIGS. 2 and 3 .
  • a gap CL 1 is formed between a side portion of the pin 31 and the first through-hole 17 ;
  • a gap CL 2 is formed between the side portion of the pin 31 and an inner wall 204 a of the spacer 204 ;
  • a gap CL 3 is formed between the upper end of the pin 31 and the backside of the wafer W.
  • the gap CL 1 is greater than the gap CL 2 .
  • FIG. 5 explains positional relation of components defining the gas hole of FIG. 4 .
  • the gas spacer 204 is omitted.
  • the length g 2 of the gap CL 2 in the second through-hole 18 corresponds to a distance between an inner wall of the gas spacer 204 and the side portion of the pin 31 .
  • the length g 2 of the gap CL 2 in the second through-hole 18 corresponds to a distance between the inner wall of the second through-hole 18 and the side portion of the pin 31 .
  • FIGS. 6A to 6F explain the abnormal discharge.
  • FIGS. 6A to 6C show a case in which the gap CL 2 is greater than the gap CL 1 .
  • FIGS. 6D to 6F show a case in which the gap CL 1 is greater than the gap CL 2 .
  • the gas spacer 204 is omitted in FIGS. 6A to 6F .
  • the gap CL 2 is greater than the gap CL 1
  • FIG. 6A when the voltage is applied to the mounting table, an electric field is generated between a side portion 2 ae of the base 2 a (side portion of the gas spacer 204 when the gas spacer 204 is provided) which defines the gap CL 2 and a corresponding portion WE in the backside of the wafer W.
  • a space that is enough for acceleration of electrons exists, so that micro-hollow cathode discharge PL 1 occurs in the gap CL 2 .
  • FIG. 6B electrons are supplied from the gap CL 2 to the gap CL 1 .
  • FIG. 6C glow discharge occurs at the backside of the wafer W. In other words, it is considered that when the gap CL 2 is greater, abnormal discharge is caused by the micro-hollow cathode discharge.
  • the pin 31 is accommodated in the first through-hole 17 formed at the mounting surface 21 and the gas spacer 204 inserted in the second through-hole 18 communicating with the first through-hole 17 . Therefore, the space of the hole formed in the mounting table 2 can be reduced not to provide a space for acceleration of electrons. Accordingly, it is possible to prevent discharge occurrence at the first through-hole 17 and the gas spacer 204 . Further, the discharge can be prevented without deteriorating the gas supply function because the gaps are formed between the pin 31 and the inner walls of the first through-hole 17 and the gas spacer 204 .
  • the gap CL 2 that is effective in suppressing the occurrence of abnormal discharge is reduced. Accordingly, the abnormal discharge can be effectively prevented while avoiding damage of the pin 31 .
  • a mounting table and a plasma processing apparatus according to a second embodiment are the same as the mounting table and the plasma processing apparatus according to the first embodiment except that the pin spacer 203 and the gas spacer 204 are not provided.
  • redundant description will be omitted and differences will be described mainly.
  • FIG. 7 is a schematic cross sectional view showing a configuration of the gas hole in the mounting table.
  • a gap CL 1 is formed between the side portion of the pin 31 and the first through-hole 17 ;
  • a gap CL 2 is formed between the side portion of the pin 31 and the second through-hole 18 ;
  • a gap CL 3 is formed between the upper end of the pin 31 and the backside of the wafer W.
  • the gap CL 1 is greater than the gap CL 2 .
  • the other configurations of the mounting table are the same as those in the first embodiment.
  • the pin 31 is accommodated in the first through-hole 17 formed in the mounting surface 21 and the second through-hole 18 communicating with the first through-hole 17 . Therefore, the space of the hole formed in the mounting table 2 can be reduced not to provide a space for acceleration of electrons. Accordingly, it is possible to prevent the discharge occurrence at the first and the second through-hole 17 and 18 . Further, the discharge can be prevented without deteriorating the gas supply function because the gaps are formed between the pin 31 and the inner walls of the first and the second through-hole 17 and 18 .
  • the gap CL 2 that is effective in suppressing the occurrence of abnormal discharge is reduced. Accordingly, the abnormal discharge can be effectively prevented while avoiding damage of the pin 31 .
  • the gap CL 1 is made to be greater than the gap CL 2 by setting the diameter of the first through-hole 17 to be greater than the inner diameter of the gas spacer 204 .
  • the gap CL 1 may be made to be greater than the gap CL 2 by changing the shape of the pin 31 .
  • the gap CL 1 is made to be greater than the gap CL 2 by setting the diameter of the first through-hole 17 to be greater than the inner diameter of the gas spacer 204 .
  • the gap CL 1 may be made to be greater than the gap CL 2 by changing the shape of the pin 31 .
  • the pin 31 may be a lifter pin.
  • the plasma processing apparatus may use a plasma generated by a radial line slot antenna.
  • the plasma processing apparatus was used.
  • the wafer W was mounted on the mounting table 2 .
  • a plasma was generated by applying a voltage to the mounting table 2 (first RF power supply 10 a: 2700 W, second RF power supply 10 b: 19000 W, pressure: 30 Torr (3.9 ⁇ 10 3 Pa)). He gas was used as a heat transfer gas.
  • the gap CL 1 was set to 0.15 mm.
  • the gap CL 2 was set to 0.05 mm.
  • the gap CL 3 was set to 0.2 mm.
  • the plasma processing was performed for a predetermined period of time. Then, it was checked whether or not a discharge mark was formed on the backside of the wafer W.
  • the gap CL 3 was set to 0.3 mm.
  • the other conditions were the same as those in the test example 1.
  • the plasma processing apparatus was used.
  • a wafer W was mounted on the mounting table 2 .
  • a plasma was generated by applying a voltage to the mounting table 2 .
  • the gap CL 1 was set to 0.035 mm.
  • the gap CL 2 was set to 0.2 mm.
  • the gap CL 3 was set to substantially 0 mm.
  • the plasma processing was performed for a predetermined period of time. Then, it was checked whether or not a discharge mark was formed on the backside of the wafer W.
  • the processing conditions were the same as those in the test example 1.
  • FIG. 8 A result thereof is shown in FIG. 8 .
  • the abnormal discharge occurred on the backside of the wafer W.
  • the test examples 1 and 2 the test examples 1 and 2 (gap CL 1 >gap CL 2 )
  • the abnormal discharge did not occur on the backside of the wafer W. This indicates that the occurrence of the abnormal discharge can be effectively prevented by setting the gap CL 2 to be smaller than the gap CL 1 .

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Plasma Technology (AREA)
  • Drying Of Semiconductors (AREA)
US15/718,126 2016-09-29 2017-09-28 Mounting table and plasma processing apparatus Abandoned US20180090361A1 (en)

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CN113643955A (zh) * 2021-08-09 2021-11-12 长鑫存储技术有限公司 半导体机台
US11192323B2 (en) 2017-10-03 2021-12-07 Applied Materials, Inc. Bonding structure of e chuck to aluminum base configuration
US11380572B2 (en) 2019-05-24 2022-07-05 Applied Materials, Inc. Substrate support carrier with improved bond layer protection
US11456161B2 (en) 2018-06-04 2022-09-27 Applied Materials, Inc. Substrate support pedestal

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JP7149739B2 (ja) * 2018-06-19 2022-10-07 東京エレクトロン株式会社 載置台及び基板処理装置
CN111489950B (zh) * 2019-01-28 2023-03-31 中微半导体设备(上海)股份有限公司 一种静电夹盘及其所在的等离子体处理装置
JP7329960B2 (ja) * 2019-05-14 2023-08-21 東京エレクトロン株式会社 載置台およびプラズマ処理装置
CN112687602A (zh) * 2019-10-18 2021-04-20 中微半导体设备(上海)股份有限公司 一种静电吸盘及其制造方法、等离子体处理装置
JP2021141277A (ja) 2020-03-09 2021-09-16 東京エレクトロン株式会社 載置台及びプラズマ処理装置
US20220028720A1 (en) * 2020-07-22 2022-01-27 Applied Materials, Inc. Lift pin interface in a substrate support
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CN107887246B (zh) 2020-03-06
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CN107887246A (zh) 2018-04-06
KR20180035685A (ko) 2018-04-06
JP6688715B2 (ja) 2020-04-28

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