US20150296631A1 - Connection using conductive vias - Google Patents
Connection using conductive vias Download PDFInfo
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- US20150296631A1 US20150296631A1 US14/750,384 US201514750384A US2015296631A1 US 20150296631 A1 US20150296631 A1 US 20150296631A1 US 201514750384 A US201514750384 A US 201514750384A US 2015296631 A1 US2015296631 A1 US 2015296631A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
- H05K9/002—Casings with localised screening
- H05K9/0022—Casings with localised screening of components mounted on printed circuit boards [PCB]
- H05K9/0024—Shield cases mounted on a PCB, e.g. cans or caps or conformal shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Definitions
- the present disclosure relates to electronic modules having electromagnetic shields and methods of manufacturing the same.
- a shield is formed from a grounded conductive structure that covers a module or a portion thereof.
- the electromagnetic emissions are electrically shorted through the grounded conductive structure that forms the shield, thereby reducing emissions.
- external emissions from outside the shield strike the exterior surface of the shield, a similar electrical short occurs, and the electronic components in the module do not experience the emissions.
- the conductive structure that forms the shield needs to be coupled to ground.
- the miniaturization of the modules makes it increasingly difficult to couple the shields to the ground.
- shielding the inner layers within the substrate becomes more and more important as miniaturization allows a greater density of these modules to be placed within a given area.
- a shield structure that is easily coupled to ground and which provides more shielding of the inner layers within the substrate.
- the present disclosure may be used to form one or more electromagnetic shields for a given electronic module so that the electromagnetic shields are directly attached to one or more conductive vertical interconnect access structures (via) and thus may be easily connected to ground.
- an electronic module is formed on a component portion that defines a component area on a surface of the substrate.
- the electromagnetic shield may be directly attached to one or more of the conductive vias that are positioned about the periphery of the component portion.
- These conductive vias may be within and/or extend from the substrate and may be formed as part of a metallic structure associated with the component portion, which is configured to form a path to ground.
- the substrate may also have one or more vertically stacked metallic layers that extend along a periphery of the component portion and are attached to one another by the conductive vias.
- the metallic structure may be formed to have the conductive vias and metallic layers.
- an overmold may then be provided to cover the component areas. Openings may be formed through at least the overmold to expose one or more of the conductive vias.
- An electromagnetic shield material may then be formed in the opening and over the overmold by applying an electromagnetic shield material. Since the exposed conductive vias are positioned at the periphery of the component portion, the electromagnetic shield can easily couple to the exposed conductive vias and connect to ground. Furthermore, precise cuts are not needed when exposing the conductive vias because the electromagnetic shield may couple to any section of the exposed conductive vias.
- FIG. 1 illustrates one embodiment of an electronic module.
- FIGS. 1A-1E illustrates steps for forming the electronic module of FIG. 1 .
- FIGS. 2A-2B illustrates steps for forming another embodiment of an electronic module.
- FIGS. 3A-3B illustrates steps for forming yet another embodiment of an electronic module.
- FIG. 4 is a top down view of one embodiment of a metallic layer that extends along a perimeter of a component area on a surface of a substrate.
- FIG. 5 illustrates one embodiment of an electronic meta-module.
- FIG. 6 illustrates one embodiment of an electronic module singulated from the electronic meta-module in FIG. 5 .
- FIGS. 7A-7L illustrates steps for forming the electronic meta-module of FIG. 5 .
- FIGS. 8A-8L illustrates steps for forming another embodiment of an electronic meta-module.
- FIG. 1 illustrates one embodiment of an electronic module 10 that is manufactured in accordance with this disclosure.
- the electronic module 10 may be formed on a substrate 12 .
- This substrate 12 may be made from any material(s) utilized to support electronic components.
- substrate 12 may be formed from laminates such as FR-1, FR-2, FR-3, FR-4, FR-5, FR-6, CEM-1, CEM-2, CEM-3, CEM-4, CEM-5, and the like.
- Substrate 12 may also be formed from ceramics, and/or alumina.
- the substrate 12 has a component portion 14 that supports the components of the electronic module 10 and may take up the entire substrate 12 or may take up only a particular portion of the substrate 12 .
- the component portion 14 may be one of a plurality of component portions 14 on the substrate 12 .
- the component portion 14 includes a component area 16 on a surface 18 of the substrate 12 and one or more electronic components 20 formed on the component area 16 . Structures that form part of or are coupled to the electronic components 20 may be formed within the component portion 14 .
- the component portion 14 may include conductive paths that form internal and external connections to and from the electronic module 10 .
- the electronic components 20 may be any type of electronic component.
- electronic components 20 may be an electronic circuit built on its own semiconductor substrate, such as a processor, volatile memory, non-volatile memory, a radio frequency circuit, or a micro-mechanical system (MEMS) device.
- Electronic components 20 may also be electrical devices such as filters, capacitors, inductors, and resistors or electronic circuits having any combination of these electronic devices.
- an overmold 22 and electromagnetic shield 24 are formed over the component area 16 which cover the electronic components 20 .
- the overmold 22 may be utilized to isolate the electronic components 20 and may include insulating or dielectric materials that prevent or substantially reduce both internal electromagnetic transmissions from the electronic components 20 and external electromagnetic transmissions generated outside of the electronic module 10 .
- a metallic structure 28 is provided that extends through the component portion 14 and is attached to the electromagnetic shield 24 .
- the metallic structure 28 includes a plurality of metallic layers 30 , which in this embodiment are stacked over one another, and a plurality of conductive vias 38 that are between and directly attached to the metallic layers 30 .
- the conductive vias 38 provide an electrical connection to one another through their attachment to the metallic layers 30 .
- the conductive vias 38 may not be directly attached to the metallic layers 30 and may indirectly connect to the metallic layers 30 .
- the conductive vias 38 may be electrically connected to the metallic layers 30 by other structures within the metallic structure 28 .
- the conductive vias 38 may be directly connected to one another without the use of the metallic layers 30 .
- the metallic layers 30 extend along a periphery 32 of the component portion 14 while the conductive vias are positioned along the periphery 32 .
- the periphery 32 may be defined as any boundary line, area, or volume at the boundary of the component portion 14 .
- the plurality of conductive vias 38 may be provided to surround the component portion 14 .
- Lateral portions 34 of the electromagnetic shield 24 extend downward from a top portion 36 of the electromagnetic shield 24 to directly attach the electromagnetic shield 24 to metallic structure 28 .
- the lateral portions 34 may be directly attached to one or more of these conductive vias 38 .
- the electromagnetic shield 24 is coupled to the plurality of conductive vias 38 that are positioned at a perimeter of the component area 16 and extend above the surface 18 of the substrate 12 .
- the electromagnetic shield 24 may be directly attached to any of the conductive vias 38 so that the electromagnetic shield 24 makes electrical contact with the metallic structure 28 . Since the conductive vias 38 are positioned at the periphery 32 of the component portion 14 , the conductive vias 38 make it easier to electrically connect the electromagnetic shield 24 to the ground plate 26 .
- the conductive vias 38 may be any type of structure utilized to connect components on different vertical levels through a substrate 12 .
- conductive vias 38 may be formed as plated through-holes, conductive pillars, conductive bars, and the like.
- the metallic layers 30 and conductive vias 38 may extend along or be at the periphery 32 (or a perimeter) by being within, adjacent to, close to, or defining the periphery 32 of the component portion 14 . In some embodiments, the metallic layers 30 extend about only a portion of the periphery 32 . However, as shall be explained in further detail below, the metallic layers 30 in this embodiment extend along the entire periphery 32 so that each circumscribes a horizontal cross-section of the component portion 14 . Similarly, the conductive vias 38 may be at a particular location or section of the periphery 32 or about of the entire periphery 32 .
- FIGS. 1A-1E illustrates a series of steps for manufacturing the electronic module 10 illustrated in FIG. 1 .
- the order of these steps are simply illustrative and the steps may be performed in a different order.
- the steps are not meant to be exhaustive and other steps and different steps may be utilized to manufacture the electronic module 10 , as shall be recognized by those of ordinary skill in the art. The same is true for steps discussed throughout this disclosure.
- the substrate 12 is provided ( FIG. 1A ).
- Substrate 12 may be formed from vertically stacked insulating substrate layers 40 that make up the body of the component portion 14 .
- the vertically stacked insulating substrate layers 40 may be formed from one or more dielectric or insulating materials.
- the component portion 14 has been formed over the ground plate 26 .
- metallic layers 30 on the top surface 18 of the component portion 14 , between each of the vertically stacked insulating substrate layers 40 , and at the bottom of the component portion 14 , which is the ground plate 26 .
- the metallic layers 30 extend about the vertically stacked insulating substrate layers 40 of the component portion 14 to circumscribe a horizontal cross-sectional area of the component portion 14 .
- the top metallic layer 30 on the surface 18 of the component portion 14 surrounds a perimeter of the component area 16 .
- Substrate 12 may include additional layers above, below, and between vertically stacked insulating substrate layers 40 and metallic layers 30 depending on the application for the electronic module 10 .
- the plurality of conductive vias 38 are positioned between the metallic layers 30 and may be directly attached to the metallic layers 30 to electrically connect them.
- the conductive vias 38 may be utilized to form a conductive path to the ground plate 26 .
- conductive vias 38 may be utilized to form conductive paths for internal or external connections. For example, a common ground node may physically displaced from the electronic module and thus conductive vias 38 may be utilized to form a path to an external connection that couples the metallic structure 28 to the ground node.
- the metallic layers 30 and conductive vias 38 also provide shielding for the vertically stacked insulating substrate layers 40 within the component portion 14 of the substrate 12 .
- metallic layers 30 surround the periphery 32 of the component portion 14 thereby circumventing a horizontal cross-section of the component portion 14 .
- a set of the plurality of conductive vias 38 above and between each of the metallic layers 30 substantially surround the perimeter 32 to circumvent the portions of the periphery 32 between the metallic layers 30 and the component area 16 .
- These conductive vias 38 are discrete from one another and thus do not fully surround the perimeter 32 of the component portion 14 . Consequently, gaps between the conductive vias 38 are exposed.
- conductive vias 38 may be provided close enough to one another so as to present an electromagnetic barrier to electromagnetic emissions.
- the metallic layers 30 may be made from any type of metal such as, for example, copper (Cu), gold (Au), silver (Ag), Nickel (Ni).
- the metallic material may also include metallic alloys and other metallic materials mixed with or forming ionic or covalent bonds with other non-metallic materials to provide a desired material property.
- electronic components 20 may be provided on the component area 16 ( FIG. 1B ) and the overmold 22 is provided over the surface 18 to cover the component area 16 ( FIG. 1C ).
- an opening 42 is formed through the overmold 22 to the set of conductive vias 38 that extend above the surface 18 of the substrate 12 ( FIG. 1D ).
- a seed layer (not shown) may then be provided over the overmold 22 and conductive vias 38 .
- An electromagnetic shield material may then be applied onto the seed layer by, for example, an electrolytic or electroless plating process so that the electromagnetic shield material builds on the set of conductive vias 38 that extend above the surface 18 of the substrate 12 and are within the opening 42 . This forms the electromagnetic shield 24 over the component area 16 and the electromagnetic shield 24 is directly attached to the set of conductive vias 38 that extend over the surface 18 of the substrate 12 to form the electronic module 10 ( FIG. 1E ).
- FIGS. 2A and 2B illustrates steps for manufacturing another embodiment of an electronic module.
- the substrate 44 and an overmold 46 are provided utilizing essentially the same steps as described above in FIGS. 1A-1D .
- a cut has been made through the overmold 46 and into the substrate 44 that has removed the top metallic layer (not shown).
- the top metallic layer that once rested on a surface 48 of the substrate 44 has been cut away.
- the substrate now has first, second, and third metallic layers 50 , 52 , 54 within or below the substrate 44 .
- the cut has also cut into a top insulating substrate layer 55 of the substrate 44 and into a first set of conductive vias 56 .
- the first set of conductive vias 56 were internally within the substrate 44 .
- a second and third set of conductive vias 58 , 60 are also provided and remain within the substrate 44 after the cut, as shown in FIG. 2A .
- the first set of conductive vias 56 are positioned above the first metallic layer 50 and extend above a surface 62 of the substrate 44 to surround a component area 64 (shown in 2 B) of a component portion 66 in the substrate 44 .
- the first set of conductive vias 56 have a first end 68 attached to the first metallic layer 50 within the substrate 44 and a second end 70 that extends above the surface 62 of the substrate 44 .
- an opening 72 is formed by the cut along a periphery of the component portion 66 through the overmold 46 and into the first set of conductive vias 56 to expose sections 74 on the second ends 70 of the first set of conductive vias 56 .
- the cut may also be formed to expose any section of any of the first, second, or third set of conductive vias 56 , 58 , 60 .
- the opening 72 actually penetrates into the conductive vias 56 .
- An electromagnetic shield material may then be applied over the overmold 46 and the sections 74 within the opening 72 to form the electromagnetic shield 76 ( FIG. 2B ) which is directly attached to the sections 74 of the first set of conductive vias 56 .
- the first, second, or third set of conductive vias 56 , 58 , 60 may be any type of structure utilized to connect components on different vertical levels through the substrate 44 .
- first, second, or third set of conductive vias 56 , 58 , 60 may be formed as plated through-holes, conductive pillars, conductive bars, and the like.
- first, second, or third set of conductive vias 56 , 58 , 60 may be attached to the first, second, and/or third metallic layers 50 , 52 , 54 by being separate or distinct pieces that have been connected to one another or by being integrated and unsegregated pieces.
- a grinding process may be utilized to make a cut that exposes any section of any of the first, second, or third set of conductive vias 56 , 58 , 60 . Since any section of any of the first, second, or third set of conductive vias 56 , 58 , 60 can be utilized to couple to the electromagnetic shield 76 , the accuracy required in making the cuts and create the opening 72 is reduced.
- FIG. 3A and FIG. 3B illustrate steps for manufacturing yet another embodiment of an electronic module.
- a substrate 80 shown in FIG. 3A , has a substrate body 82 that defines a component portion 83 .
- the substrate 80 has a stack of a first, second, third, and fourth metallic layers 84 , 86 , 88 , 90 that extend along a periphery 91 (shown in FIG. 3B ) of the component portion 83 .
- the first, second, third, and fourth metallic layers 84 , 86 , 88 , 90 extend about the entire periphery 91 of the component portion 83 to surround the component portion 83 .
- first, second, third, and fourth metallic layers 84 , 86 , 88 , 90 may only extend along a portion of the periphery 91 . Attached to and between the first, second, third, and fourth metallic layers 84 , 86 , 88 , 90 are the first, second, and third sets of conductive vias 92 , 94 , 96 .
- an opening 98 has been formed into the substrate body 82 , through the first metallic layer 84 , and into the first set of conductive vias 92 .
- the cut that forms the opening 98 forms sections 100 of the first set of conductive vias 92 which are now exposed by the opening 98 .
- the sections 100 and the first set of conductive vias 92 are positioned below a component area 102 on a surface 104 of the substrate body 82 .
- an overmold 106 was provided over the surface 104 to cover the component area 102 and thus, the opening 98 was also formed by cutting through the overmold 106 .
- any section 100 of the first set of component vias 92 may be exposed to connect an electromagnetic shield to ground, the sections 100 may be formed anywhere on the surface or within the first set of conductive vias 92 . Consequently, less accuracy is required in making cuts when creating the opening 98 .
- a seed layer (not shown) may be provided on the overmold 106 and within the opening 98 .
- An electromagnetic shield material is applied to this seed layer to form the electromagnetic shield 108 , as illustrated in FIG. 3B to form the electronic module 110 .
- the electromagnetic shield 108 is directly attached to the sections 100 of the first set of conductive vias 92 and also to the remaining parts of the first metallic layer 84 . Consequently, lateral portions 112 of the electromagnetic shield 108 are formed to shield part of the substrate body 82 in the component portion 83 and thus providing shielding to internal portions of the substrate 80 .
- the opening 98 illustrated in FIG.
- the depth of the lateral portions 112 can be controlled so that the electromagnetic shield 108 shields any desired part of the periphery 91 of the component portion 83 .
- FIG. 4 is a top down view of a metallic layer 116 that extends along a perimeter 118 of a component area 120 on a surface 122 of a substrate 124 . Illustrated on the metallic layer 116 are projections 126 , 128 of conductive vias attached below the metallic layer 116 .
- the conductive vias are solid metal bars and the projection 126 is of a circular shaped conductive metal bar and projection 128 is of a slot shaped conductive metal bar.
- conductive vias may be made from any type of conductive material such as metals like, for example, copper (Cu), gold (Au), silver (Ag), Nickel (Ni).
- the conductive material may also include metallic alloys and other conductive materials mixed with or forming ionic or covalent bonds with other non-conductive materials to provide a desired material property.
- an electronic meta-module 130 having a plurality of shielded electronic modules 132 is shown.
- the plurality of shielded electronic modules 132 is arranged as an array 133 of shielded electronic modules 132 .
- the array 133 may be of any shape, however, in this example, the array 133 is a rectangular array that arranges the plurality of shielded electronic modules 132 in rows and columns. As shown in FIG. 6 , these shielded electronic modules 132 may be singulated from the electronic meta-module 130 to provide individual shielded electronic modules 132 .
- FIGS. 7A-7L illustrates a series of steps for manufacturing the electronic meta-module 130 .
- a carrier metallic layer 134 is first provided ( FIG. 7A ) and a first metallic sheet 136 is formed on the carrier metallic layer 134 ( FIG. 7B ).
- Photolithography may be utilized to form the metallic sheet 136 into a first metallic layer 138 of a plurality of metallic structures 140 ( FIG. 7C ).
- Photolithography may also be utilized to form circuitry (not shown). This circuitry may form part of the first metallic layers 138 , be within the first metallic layers 138 , couple the first metallic layers 138 , and/or form structures that are not part of the first metallic layers 138 .
- the first metallic layers 138 of the illustrated embodiment are separated from one another because the plurality of metallic structures 140 are to be built as separated structures. Also, each of these first metallic layers 138 surrounds and defines an aperture 142 which may include the circuitry discussed above (not shown). In other embodiments, the first metallic layers 138 may simply be a metallic strip and thus would not define the aperture 142 .
- a first set of conductive vias 144 may then be formed on each of the first metallic layers 138 of the plurality of metallic structures 140 ( FIG. 7D ).
- the first set of conductive vias 144 is provided around each of the first metallic layers 138 .
- a first insulating substrate layer 146 may then be provided over the first metallic layers 138 and the first set of conductive vias 144 ( FIG. 7E ).
- the first insulating substrate layer 146 may be formed from a dielectric material that is laminated over the first metallic layers 138 and the first set of conductive vias 144 .
- the first set of conductive vias 144 may extend above the first insulating substrate layer 146 .
- the first set of conductive vias 144 may be grinded so that the first set of conductive vias 144 is flush with the first insulating substrate layer 146 .
- the first insulating substrate layer 146 forms a part of the substrate body 148 of the substrate.
- the first set of conductive vias 144 of the illustrated embodiment is formed on the first metallic layers 138 prior to providing the first insulating substrate layer 146 .
- the first insulating substrate layer 146 may be provided prior to forming the first set of conductive vias 144 .
- holes may be etched into the first insulating substrate layer 146 and a conductive material plated into these holes to form the first set of conductive vias 144 .
- each of the apertures 142 (shown in FIG. 7C ) enclosed by the first metallic layers 138 are filled with substrate material and each of the first metallic layers 138 surrounds an area 143 that forms part of a component portion of the substrate body 148 .
- the first metallic layer 138 circumscribes the area 143 ( FIG. 7E ) and defines a section of the periphery of the component portion.
- the carrier metallic layer 134 may be removed and the process described in FIGS. 7A-7E may be repeated to form the desired number of insulating substrate layers 146 , 150 , 152 ( FIG.
- the substrate 154 has a plurality of component portions 163 which each have a second, third, and fourth metallic layers 156 , 158 , 160 formed over the first metallic layer 138 ; and a first, second, and third set of conductive vias 144 , 162 , 164 , attached between the first, second, third, and fourth metallic layers 138 , 156 , 158 , 160 .
- the second and third insulating substrate layers 150 , 152 are formed over the first insulating substrate layer 146 .
- the substrate 154 does not necessarily have to be formed from the bottom up.
- the substrate 154 could be provided from the top down where first metallic layer 138 and the first insulating substrate layer 146 are the top layers.
- the substrate 154 may be built from the middle outwards where the first metallic layer 138 and the first insulating substrate layer 146 are one of the middle layers of the substrate body 148 .
- the second, third, and fourth metallic layers 156 , 158 , 160 , the second and third insulating substrate layers 150 , 152 , and the second and third set of conductive vias 162 , 164 would be formed on either side of the first metallic layer 138 to form the substrate 154 .
- each component portion 163 includes a component area 162 on a surface 164 of the substrate body 148 .
- One or more electronic components 165 may be formed on each component area 162 and then an overmold 166 provided over the surface 164 to cover the component areas 162 ( FIG. 7H ).
- Channels 168 provide openings along a periphery 169 of each of the component portions 163 ( FIG. 7I ).
- FIG. 7J illustrate a cross sectional view between two component portions 163 after the channels 168 have been formed through the overmold 166 and the fourth metallic layers 160 to expose a section 170 of the third set of conductive vias 164 .
- these channels 168 may extend through the overmold 166 and the substrate body 148 to expose any desired set of conductive vias 144 , 162 , 164 of the metallic structures 140 .
- sections 170 of the third set of conductive vias 164 are exposed by the channel 168 .
- An electromagnetic shield material is applied over the overmold 166 and within the channel 168 to form electromagnetic shields 171 over the component areas 162 ( FIG. 7K ).
- Sections 170 of the third set of conductive vias 164 directly attach to the electromagnetic shields 171 so that the electromagnetic shields 171 are electrically connected to the metallic structures 140 .
- the component portions 163 may be then be singulated from one another to form individual shielded electronic modules 132 ( FIG. 7L ).
- FIGS. 8A-8L illustrates a series of steps for manufacturing another embodiment of an electronic meta-module.
- a carrier metallic layer 172 is first provided ( FIG. 8A ) and a first metallic sheet 174 is formed on the carrier metallic layer 172 ( FIG. 8B ).
- Photo lithography may be utilized to form the metallic sheet 174 into a first metallic layer 176 of a plurality of metallic structures 178 ( FIG. 8C ).
- Photo lithography may also be utilized to form circuitry (not shown). This circuitry may form part of the first metallic layers 176 , be within the first metallic layers 176 , couple the first metallic layers 176 , and/or form structures that are not part of the first metallic layers 176 .
- the first metallic layers 176 in this embodiment are integrated with one another because the plurality of metallic structures 178 are built as part of an integrated meta-metallic structure 180 .
- Each of these first metallic layers 176 surrounds and defines an aperture 182 which may include the circuitry discussed above (not shown). In other embodiments, the first metallic layers 176 may simply be a metallic strip and thus would not define the aperture 182 .
- a first set of conductive vias 184 may then be formed on each of the first metallic layers 176 in the plurality of metallic structures 178 .
- the first sets of conductive vias 184 are provided around each of the first metallic layers 176 .
- a first insulating substrate layer 186 may then be provided over the first metallic layers 176 and the first sets of conductive vias 184 ( FIG. 8E ).
- the first insulating substrate layer 186 may be formed from a dielectric material that is laminated over the first metallic layers 176 and the first set of conductive vias 184 .
- the first set of conductive vias 184 may extend above the first insulating substrate layer 186 .
- the first set of conductive vias 184 may be grinded so that the first set of conductive vias 184 is flush with the first insulating substrate layer 186 .
- the first insulating substrate layer 186 forms a part of the substrate body 188 of the substrate.
- the first sets of conductive vias 184 of the illustrated embodiment are formed on the first metallic layers 176 prior to providing the first insulating substrate layer 186 .
- the first insulating substrate layer 186 may be provided prior to forming the first set of conductive vias 184 . Afterwards, holes may be etched into the first insulating substrate layer 186 and a conductive material plated into these holes to form the first set of conductive vias 184 .
- each of the apertures 182 (shown in FIG. 8C ) enclosed by the first metallic layers 176 are filled with substrate material and each of the first metallic layers 176 surrounds an area 190 ( FIG. 8E ) that forms part of a component portion of the substrate body 188 .
- the first metallic layer 176 circumscribes the area 190 and defines a section of the periphery of one of the component portions.
- the carrier metallic layer 172 may be removed and the process described in FIGS.
- the substrate 195 is depicted as having second, third, and fourth metallic layers 194 , 196 , 200 formed over of the first metallic layer 176 .
- First, second, and third sets of conductive vias 184 , 202 , 204 are attached between the first, second, third, and fourth metallic layers 176 , 194 , 196 , 200 .
- the second and third insulating substrate layers 192 , 193 are formed over the first insulating substrate layer 186 .
- the substrate 195 does not necessarily have to be formed from the bottom up.
- the substrate 195 could be provided from the top down, where the first metallic layer 176 and the first insulating substrate layer 186 are the top layers.
- substrate 195 may be built from the middle outwards where the first metallic layer 176 and the first insulating substrate layer 186 are one of the middle layers of the substrate body 188 .
- the second, third, and fourth metallic layers 194 , 196 , 200 ; the second and third insulating substrate layers 192 , 193 ; and the second and third set of conductive vias 202 , 204 would be formed on either side of the first metallic layer 176 and first insulating substrate layer 186 to form the substrate 195 .
- the substrate 195 has a plurality of component portions 205 ( FIG. 8F ) each having a metallic structure 178 within the substrate body 188 .
- each component portion 205 is also formed to have a component area 206 on a surface 208 of the substrate body 188 .
- one or more electronic components 210 may be attached to each component area 206 ( FIG. 8G ) and then an overmold 212 provided over the surface 208 to cover the component areas 206 ( FIG. 8H ). Cuts are made into the overmold 212 and channels 214 form openings through the overmold 212 and substrate body 188 along a periphery 216 of each of the component portions 205 ( FIG. 8I ).
- FIG. 8J illustrates a cross sectional view between two component portions 205 after the channels 214 have been formed through the overmold 212 ; the second, third, fourth metallic layers 194 , 196 , 200 ; and the first, second, third set of conductive vias 184 , 202 , 204 to expose a section 211 of the first set of conductive vias 184 .
- these channels 214 may extend through the overmold 206 and the substrate body 188 to expose any desired set of conductive vias 184 , 202 , 204 of the metallic structures 178 .
- sections 211 of the third set of conductive vias 204 are exposed by the channel 214 .
- An electromagnetic shield material is applied over the overmold 212 and within the channel 214 to form electromagnetic shields 218 over the component areas 206 ( FIG. 8K ).
- the sections 211 of the first set of conductive vias 184 (and other exposed sections of the metallic structures 178 ) are directly attached to one of the electromagnetic shields 218 so that the electromagnetic shields 218 are electrically connected to the metallic structures 178 .
- the component portions 205 may then be singulated from one another to form individual shielded electronic modules 220 ( FIG. 8L ).
Abstract
Description
- This application claims priority to and is a divisional application of U.S. patent application Ser. No. 14/447,847, filed Jul. 31, 2014 and entitled “CONNECTION USING CONDUCTIVE VIAS,” which is hereby incorporated by reference in its entirety.
- The '847 application is a divisional application of U.S. patent application Ser. No. 13/034,787, filed Feb. 25, 2011, now U.S. Pat. No. 8,835,226, which is hereby incorporated by reference in its entirety.
- The '787 application is related to U.S. patent application Ser. No. 12/030,711, entitled “INTERLEAVED INTERDIGITATED TRANSDUCERS,” filed Feb. 13, 2008, now U.S. Pat. No. 8,069,542; U.S. patent application Ser. No. 11/199,319, entitled “METHOD OF MAKING A CONFORMAL ELECTROMAGNETIC INTERFERENCE SHIELD,” filed Aug. 8, 2005, now U.S. Pat. No. 7,451,539; U.S. patent application Ser. No. 11/435,913, entitled “SUB-MODULE CONFORMAL ELECTROMAGNETIC INTERFERENCE SHIELD,” filed May 17, 2006, now U.S. Pat. No. 8,062,930; U.S. patent application Ser. No. 11/768,014, entitled “INTEGRATED SHIELD FOR A NO-LEAD SEMICONDUCTOR DEVICE PACKAGE,” filed Jun. 25, 2007, now U.S. Pat. No. 8,053,872; U.S. patent application Ser. No. 11/952,513, entitled “ISOLATED CONFORMAL SHIELDING,” filed Dec. 7, 2007, now U.S. Pat. No. 8,220,145; U.S. patent application Ser. No. 11/952,592, entitled “CONFORMAL SHIELDING PROCESS USING FLUSH STRUCTURES,” filed Dec. 7, 2007, now U.S. Pat. No. 8,409,658; U.S. patent application Ser. No. 11/952,617, entitled “HEAT SINK FORMED WITH CONFORMAL SHIELD,” filed Dec. 7, 2007, now U.S. Pat. No. 8,434,220; U.S. patent application Ser. No. 11/952,634, entitled “CONFORMAL SHIELDING PROCESS USING PROCESS GASES,” filed Dec. 7, 2007, now U.S. Pat. No. 8,186,048; U.S. patent application Ser. No. 11/952,670, entitled “PROCESS FOR MANUFACTURING A MODULE,” filed Dec. 7, 2007, now U.S. Pat. No. 8,359,739; U.S. patent application Ser. No. 11/952,690, entitled “METHOD OF MANUFACTURING A MODULE,” filed Dec. 7, 2007, now U.S. Pat. No. 8,061,012; U.S. patent application Ser. No. 12/797,381, entitled “TRANSCEIVER WITH SHIELD,” filed Jun. 9, 2010; U.S. patent application Ser. No. 12/913,364, entitled “METHOD FOR FORMING AN ELECTRONIC MODULE HAVING BACKSIDE SEAL,” filed Oct. 27, 2010, now U.S. Pat. No. 8,296,938; U.S. patent application Ser. No. 13/034,755, entitled “ELECTRONIC MODULES HAVING GROUNDED ELECTROMAGNETIC SHIELDS,” filed Feb. 25, 2011; U.S. patent application Ser. No. 13/034,787, entitled “CONNECTION USING CONDUCTIVE VIAS,” filed Feb. 25, 2011; U.S. patent application Ser. No. 13/036,272, entitled “MICROSHIELD ON STANDARD QFN PACKAGE,” filed Feb. 28, 2011; U.S. patent application Ser. No. 13/117,284, entitled “CONFORMAL SHIELDING EMPLOYING SEGMENT BUILDUP,” filed May 27, 2011, now U.S. Pat. No. 8,296,941; U.S. patent application Ser. No. 13/151,499, entitled “CONFORMAL SHIELDING PROCESS USING PROCESS GASES,” filed Jun. 2, 2011, now U.S. Pat. No. 8,720,051; U.S. patent application Ser. No. 13/187,814, entitled “INTEGRATED SHIELD FOR A NO-LEAD SEMICONDUCTOR DEVICE PACKAGE,” filed Jul. 21, 2011, now U.S. Pat. No. 8,349,659; U.S. patent application Ser. No. 13/189,838, entitled “COMPARTMENTALIZED SHIELDING OF SELECTED COMPONENTS,” filed Jul. 25, 2011; U.S. patent application Ser. No. 13/906,692, entitled “IMAGE FORMING DEVICE HAVING DETACHABLE DEVELOPING DEVICE UNIT,” filed May 31, 2013, now U.S. Pat. No. 8,744,308; and U.S. patent application Ser. No. 13/415,643, entitled “FIELD BARRIER STRUCTURES WITHIN A CONFORMAL SHIELD,” filed Mar. 8, 2012, now U.S. Pat. No. 8,614,899; all of which are commonly owned and assigned, at the time of the invention, and are hereby incorporated herein by reference in their entireties. When interpreting the language of this disclosure, any inconsistencies between this disclosure and the above-identified related applications are to be resolved in favor of the interpretations demanded by this disclosure.
- The present disclosure relates to electronic modules having electromagnetic shields and methods of manufacturing the same.
- Electronic components have become ubiquitous in modern society. The electronics industry routinely announces accelerated clocking speeds, higher transmission frequencies, and smaller integrated circuit modules. While the benefits of these devices are myriad, smaller electronic components that operate at higher frequencies also create problems. Higher operating frequencies mean shorter wavelengths, where shorter conductive elements within electronic circuitry may act as antennas to unintentionally broadcast electromagnetic emissions throughout the electromagnetic spectrum. If the signal strengths of the emissions are high enough, the emissions may interfere with the operation of an electronic component subjected to the emissions. Further, the Federal Communications Commission (FCC) and other regulatory agencies regulate these emissions, and as such, these emissions must be kept within regulatory requirements.
- One way to reduce emissions is to form a shield around the modules. Typically, a shield is formed from a grounded conductive structure that covers a module or a portion thereof. When emissions from electronic components within the shield strike the interior surface of the shield, the electromagnetic emissions are electrically shorted through the grounded conductive structure that forms the shield, thereby reducing emissions. Likewise, when external emissions from outside the shield strike the exterior surface of the shield, a similar electrical short occurs, and the electronic components in the module do not experience the emissions.
- If the electronic components in these modules are formed on a substrate, the conductive structure that forms the shield needs to be coupled to ground. However, the miniaturization of the modules makes it increasingly difficult to couple the shields to the ground. Furthermore, shielding the inner layers within the substrate becomes more and more important as miniaturization allows a greater density of these modules to be placed within a given area. Thus, what is needed is a shield structure that is easily coupled to ground and which provides more shielding of the inner layers within the substrate.
- The present disclosure may be used to form one or more electromagnetic shields for a given electronic module so that the electromagnetic shields are directly attached to one or more conductive vertical interconnect access structures (via) and thus may be easily connected to ground. In one embodiment, an electronic module is formed on a component portion that defines a component area on a surface of the substrate. To more easily attach the electromagnetic shield to ground, the electromagnetic shield may be directly attached to one or more of the conductive vias that are positioned about the periphery of the component portion. These conductive vias may be within and/or extend from the substrate and may be formed as part of a metallic structure associated with the component portion, which is configured to form a path to ground. The substrate may also have one or more vertically stacked metallic layers that extend along a periphery of the component portion and are attached to one another by the conductive vias. Thus, the metallic structure may be formed to have the conductive vias and metallic layers.
- To form the electronic module, electronic components are provided on the component area and an overmold may then be provided to cover the component areas. Openings may be formed through at least the overmold to expose one or more of the conductive vias. An electromagnetic shield material may then be formed in the opening and over the overmold by applying an electromagnetic shield material. Since the exposed conductive vias are positioned at the periphery of the component portion, the electromagnetic shield can easily couple to the exposed conductive vias and connect to ground. Furthermore, precise cuts are not needed when exposing the conductive vias because the electromagnetic shield may couple to any section of the exposed conductive vias.
- Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.
- The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.
-
FIG. 1 illustrates one embodiment of an electronic module. -
FIGS. 1A-1E illustrates steps for forming the electronic module ofFIG. 1 . -
FIGS. 2A-2B illustrates steps for forming another embodiment of an electronic module. -
FIGS. 3A-3B illustrates steps for forming yet another embodiment of an electronic module. -
FIG. 4 is a top down view of one embodiment of a metallic layer that extends along a perimeter of a component area on a surface of a substrate. -
FIG. 5 illustrates one embodiment of an electronic meta-module. -
FIG. 6 illustrates one embodiment of an electronic module singulated from the electronic meta-module inFIG. 5 . -
FIGS. 7A-7L illustrates steps for forming the electronic meta-module ofFIG. 5 . -
FIGS. 8A-8L illustrates steps for forming another embodiment of an electronic meta-module. - The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
- The present disclosure relates to shielded electronic modules and methods of manufacturing electromagnetic shields in electronic modules. The electromagnetic shields of the electronic module may be easily grounded by directly attaching at least one conductive vertical interconnect access structure (via) in a metallic structure that is either connected to ground or may be connected to ground.
FIG. 1 illustrates one embodiment of anelectronic module 10 that is manufactured in accordance with this disclosure. Theelectronic module 10 may be formed on asubstrate 12. Thissubstrate 12 may be made from any material(s) utilized to support electronic components. For example,substrate 12 may be formed from laminates such as FR-1, FR-2, FR-3, FR-4, FR-5, FR-6, CEM-1, CEM-2, CEM-3, CEM-4, CEM-5, and the like.Substrate 12 may also be formed from ceramics, and/or alumina. - The
substrate 12 has acomponent portion 14 that supports the components of theelectronic module 10 and may take up theentire substrate 12 or may take up only a particular portion of thesubstrate 12. For example, as explained in further detail below, thecomponent portion 14 may be one of a plurality ofcomponent portions 14 on thesubstrate 12. Thecomponent portion 14 includes acomponent area 16 on asurface 18 of thesubstrate 12 and one or moreelectronic components 20 formed on thecomponent area 16. Structures that form part of or are coupled to theelectronic components 20 may be formed within thecomponent portion 14. In addition, thecomponent portion 14 may include conductive paths that form internal and external connections to and from theelectronic module 10. - The
electronic components 20 may be any type of electronic component. For example,electronic components 20 may be an electronic circuit built on its own semiconductor substrate, such as a processor, volatile memory, non-volatile memory, a radio frequency circuit, or a micro-mechanical system (MEMS) device.Electronic components 20 may also be electrical devices such as filters, capacitors, inductors, and resistors or electronic circuits having any combination of these electronic devices. - To protect the
electronic components 20 from both internal and external electromagnetic emissions, anovermold 22 andelectromagnetic shield 24 are formed over thecomponent area 16 which cover theelectronic components 20. Theovermold 22 may be utilized to isolate theelectronic components 20 and may include insulating or dielectric materials that prevent or substantially reduce both internal electromagnetic transmissions from theelectronic components 20 and external electromagnetic transmissions generated outside of theelectronic module 10. To couple theelectromagnetic shield 24 to aground plate 26 below thesubstrate 12, ametallic structure 28 is provided that extends through thecomponent portion 14 and is attached to theelectromagnetic shield 24. Themetallic structure 28 includes a plurality ofmetallic layers 30, which in this embodiment are stacked over one another, and a plurality ofconductive vias 38 that are between and directly attached to the metallic layers 30. Theconductive vias 38 provide an electrical connection to one another through their attachment to the metallic layers 30. In the alternative, theconductive vias 38 may not be directly attached to themetallic layers 30 and may indirectly connect to the metallic layers 30. In this case, theconductive vias 38 may be electrically connected to themetallic layers 30 by other structures within themetallic structure 28. In yet another alternative embodiment, theconductive vias 38 may be directly connected to one another without the use of the metallic layers 30. The metallic layers 30 extend along a periphery 32 of thecomponent portion 14 while the conductive vias are positioned along the periphery 32. The periphery 32 may be defined as any boundary line, area, or volume at the boundary of thecomponent portion 14. As shall be explained in further detail below, the plurality ofconductive vias 38 may be provided to surround thecomponent portion 14. -
Lateral portions 34 of theelectromagnetic shield 24 extend downward from atop portion 36 of theelectromagnetic shield 24 to directly attach theelectromagnetic shield 24 tometallic structure 28. Thelateral portions 34 may be directly attached to one or more of theseconductive vias 38. In this embodiment, theelectromagnetic shield 24 is coupled to the plurality ofconductive vias 38 that are positioned at a perimeter of thecomponent area 16 and extend above thesurface 18 of thesubstrate 12. However, theelectromagnetic shield 24 may be directly attached to any of theconductive vias 38 so that theelectromagnetic shield 24 makes electrical contact with themetallic structure 28. Since theconductive vias 38 are positioned at the periphery 32 of thecomponent portion 14, theconductive vias 38 make it easier to electrically connect theelectromagnetic shield 24 to theground plate 26. Theconductive vias 38 may be any type of structure utilized to connect components on different vertical levels through asubstrate 12. For example,conductive vias 38 may be formed as plated through-holes, conductive pillars, conductive bars, and the like. - The metallic layers 30 and
conductive vias 38 may extend along or be at the periphery 32 (or a perimeter) by being within, adjacent to, close to, or defining the periphery 32 of thecomponent portion 14. In some embodiments, themetallic layers 30 extend about only a portion of the periphery 32. However, as shall be explained in further detail below, themetallic layers 30 in this embodiment extend along the entire periphery 32 so that each circumscribes a horizontal cross-section of thecomponent portion 14. Similarly, theconductive vias 38 may be at a particular location or section of the periphery 32 or about of the entire periphery 32. -
FIGS. 1A-1E illustrates a series of steps for manufacturing theelectronic module 10 illustrated inFIG. 1 . It should be noted that the order of these steps are simply illustrative and the steps may be performed in a different order. Furthermore, the steps are not meant to be exhaustive and other steps and different steps may be utilized to manufacture theelectronic module 10, as shall be recognized by those of ordinary skill in the art. The same is true for steps discussed throughout this disclosure. First, thesubstrate 12 is provided (FIG. 1A ).Substrate 12 may be formed from vertically stacked insulating substrate layers 40 that make up the body of thecomponent portion 14. The vertically stacked insulating substrate layers 40 may be formed from one or more dielectric or insulating materials. In this embodiment, thecomponent portion 14 has been formed over theground plate 26. - There are
metallic layers 30 on thetop surface 18 of thecomponent portion 14, between each of the vertically stacked insulating substrate layers 40, and at the bottom of thecomponent portion 14, which is theground plate 26. The metallic layers 30 extend about the vertically stacked insulating substrate layers 40 of thecomponent portion 14 to circumscribe a horizontal cross-sectional area of thecomponent portion 14. For example, the topmetallic layer 30 on thesurface 18 of thecomponent portion 14 surrounds a perimeter of thecomponent area 16.Substrate 12 may include additional layers above, below, and between vertically stacked insulating substrate layers 40 andmetallic layers 30 depending on the application for theelectronic module 10. - The plurality of
conductive vias 38 are positioned between themetallic layers 30 and may be directly attached to themetallic layers 30 to electrically connect them. Theconductive vias 38 may be utilized to form a conductive path to theground plate 26. In other embodiments,conductive vias 38 may be utilized to form conductive paths for internal or external connections. For example, a common ground node may physically displaced from the electronic module and thusconductive vias 38 may be utilized to form a path to an external connection that couples themetallic structure 28 to the ground node. - The metallic layers 30 and
conductive vias 38 also provide shielding for the vertically stacked insulating substrate layers 40 within thecomponent portion 14 of thesubstrate 12. As explained above,metallic layers 30 surround the periphery 32 of thecomponent portion 14 thereby circumventing a horizontal cross-section of thecomponent portion 14. A set of the plurality ofconductive vias 38 above and between each of themetallic layers 30 substantially surround the perimeter 32 to circumvent the portions of the periphery 32 between themetallic layers 30 and thecomponent area 16. Theseconductive vias 38 are discrete from one another and thus do not fully surround the perimeter 32 of thecomponent portion 14. Consequently, gaps between theconductive vias 38 are exposed. However,conductive vias 38 may be provided close enough to one another so as to present an electromagnetic barrier to electromagnetic emissions. The metallic layers 30 may be made from any type of metal such as, for example, copper (Cu), gold (Au), silver (Ag), Nickel (Ni). The metallic material may also include metallic alloys and other metallic materials mixed with or forming ionic or covalent bonds with other non-metallic materials to provide a desired material property. - Next,
electronic components 20 may be provided on the component area 16 (FIG. 1B ) and theovermold 22 is provided over thesurface 18 to cover the component area 16 (FIG. 1C ). In this embodiment, anopening 42 is formed through theovermold 22 to the set ofconductive vias 38 that extend above thesurface 18 of the substrate 12 (FIG. 1D ). A seed layer (not shown) may then be provided over theovermold 22 andconductive vias 38. An electromagnetic shield material may then be applied onto the seed layer by, for example, an electrolytic or electroless plating process so that the electromagnetic shield material builds on the set ofconductive vias 38 that extend above thesurface 18 of thesubstrate 12 and are within theopening 42. This forms theelectromagnetic shield 24 over thecomponent area 16 and theelectromagnetic shield 24 is directly attached to the set ofconductive vias 38 that extend over thesurface 18 of thesubstrate 12 to form the electronic module 10 (FIG. 1E ). -
FIGS. 2A and 2B illustrates steps for manufacturing another embodiment of an electronic module. InFIG. 2A , thesubstrate 44 and anovermold 46 are provided utilizing essentially the same steps as described above inFIGS. 1A-1D . In this embodiment, a cut has been made through theovermold 46 and into thesubstrate 44 that has removed the top metallic layer (not shown). Thus, the top metallic layer that once rested on asurface 48 of thesubstrate 44 has been cut away. Instead, the substrate now has first, second, and thirdmetallic layers substrate 44. The cut has also cut into a top insulatingsubstrate layer 55 of thesubstrate 44 and into a first set ofconductive vias 56. Thus, prior to making the cut, the first set ofconductive vias 56 were internally within thesubstrate 44. A second and third set of conductive vias 58, 60 are also provided and remain within thesubstrate 44 after the cut, as shown inFIG. 2A . In this embodiment, the first set ofconductive vias 56 are positioned above the firstmetallic layer 50 and extend above asurface 62 of thesubstrate 44 to surround a component area 64 (shown in 2B) of acomponent portion 66 in thesubstrate 44. The first set ofconductive vias 56 have afirst end 68 attached to the firstmetallic layer 50 within thesubstrate 44 and asecond end 70 that extends above thesurface 62 of thesubstrate 44. - As shown in
FIG. 2A , anopening 72 is formed by the cut along a periphery of thecomponent portion 66 through theovermold 46 and into the first set ofconductive vias 56 to exposesections 74 on the second ends 70 of the first set ofconductive vias 56. However, the cut may also be formed to expose any section of any of the first, second, or third set ofconductive vias 56, 58, 60. In this embodiment, theopening 72 actually penetrates into theconductive vias 56. An electromagnetic shield material may then be applied over theovermold 46 and thesections 74 within theopening 72 to form the electromagnetic shield 76 (FIG. 2B ) which is directly attached to thesections 74 of the first set ofconductive vias 56. - The first, second, or third set of
conductive vias 56, 58, 60 may be any type of structure utilized to connect components on different vertical levels through thesubstrate 44. For example, first, second, or third set ofconductive vias 56, 58, 60 may be formed as plated through-holes, conductive pillars, conductive bars, and the like. In addition, first, second, or third set ofconductive vias 56, 58, 60 may be attached to the first, second, and/or thirdmetallic layers - It should be noted a grinding process may be utilized to make a cut that exposes any section of any of the first, second, or third set of
conductive vias 56, 58, 60. Since any section of any of the first, second, or third set ofconductive vias 56, 58, 60 can be utilized to couple to theelectromagnetic shield 76, the accuracy required in making the cuts and create theopening 72 is reduced. - For example,
FIG. 3A andFIG. 3B illustrate steps for manufacturing yet another embodiment of an electronic module. In this embodiment, asubstrate 80, shown inFIG. 3A , has asubstrate body 82 that defines acomponent portion 83. Thesubstrate 80 has a stack of a first, second, third, and fourthmetallic layers FIG. 3B ) of thecomponent portion 83. In this example, the first, second, third, and fourthmetallic layers entire periphery 91 of thecomponent portion 83 to surround thecomponent portion 83. In alternative embodiments, the first, second, third, and fourthmetallic layers periphery 91. Attached to and between the first, second, third, and fourthmetallic layers conductive vias - As shown in
FIG. 3A , anopening 98 has been formed into thesubstrate body 82, through the firstmetallic layer 84, and into the first set ofconductive vias 92. The cut that forms theopening 98forms sections 100 of the first set ofconductive vias 92 which are now exposed by theopening 98. Thesections 100 and the first set ofconductive vias 92 are positioned below acomponent area 102 on asurface 104 of thesubstrate body 82. As in the previous embodiment, anovermold 106 was provided over thesurface 104 to cover thecomponent area 102 and thus, theopening 98 was also formed by cutting through theovermold 106. Since anysection 100 of the first set of component vias 92 may be exposed to connect an electromagnetic shield to ground, thesections 100 may be formed anywhere on the surface or within the first set ofconductive vias 92. Consequently, less accuracy is required in making cuts when creating theopening 98. - Next, a seed layer (not shown) may be provided on the
overmold 106 and within theopening 98. An electromagnetic shield material is applied to this seed layer to form theelectromagnetic shield 108, as illustrated inFIG. 3B to form theelectronic module 110. In this embodiment of theelectronic module 110, theelectromagnetic shield 108 is directly attached to thesections 100 of the first set ofconductive vias 92 and also to the remaining parts of the firstmetallic layer 84. Consequently,lateral portions 112 of theelectromagnetic shield 108 are formed to shield part of thesubstrate body 82 in thecomponent portion 83 and thus providing shielding to internal portions of thesubstrate 80. However, the opening 98 (illustrated inFIG. 3A ) may be formed to expose any section of any of the first, second, and third sets ofconductive vias lateral portions 112 can be controlled so that theelectromagnetic shield 108 shields any desired part of theperiphery 91 of thecomponent portion 83. -
FIG. 4 is a top down view of ametallic layer 116 that extends along aperimeter 118 of acomponent area 120 on asurface 122 of asubstrate 124. Illustrated on themetallic layer 116 areprojections metallic layer 116. In this particular embodiment, the conductive vias are solid metal bars and theprojection 126 is of a circular shaped conductive metal bar andprojection 128 is of a slot shaped conductive metal bar. These shapes are advantageous because they provide a large solid volume for cuts thereby decreasing the accuracy required in making cuts so that an electromagnetic shield appropriately connects to ground. These conductive vias may be made from any type of conductive material such as metals like, for example, copper (Cu), gold (Au), silver (Ag), Nickel (Ni). The conductive material may also include metallic alloys and other conductive materials mixed with or forming ionic or covalent bonds with other non-conductive materials to provide a desired material property. - Referring now to
FIG. 5 , one embodiment of an electronic meta-module 130 having a plurality of shieldedelectronic modules 132 is shown. In this example, the plurality of shieldedelectronic modules 132 is arranged as anarray 133 of shieldedelectronic modules 132. Thearray 133 may be of any shape, however, in this example, thearray 133 is a rectangular array that arranges the plurality of shieldedelectronic modules 132 in rows and columns. As shown inFIG. 6 , these shieldedelectronic modules 132 may be singulated from the electronic meta-module 130 to provide individual shieldedelectronic modules 132. -
FIGS. 7A-7L illustrates a series of steps for manufacturing the electronic meta-module 130. To create the substrate for the electronic meta-module 130, a carriermetallic layer 134 is first provided (FIG. 7A ) and a firstmetallic sheet 136 is formed on the carrier metallic layer 134 (FIG. 7B ). Photolithography may be utilized to form themetallic sheet 136 into a firstmetallic layer 138 of a plurality of metallic structures 140 (FIG. 7C ). Photolithography may also be utilized to form circuitry (not shown). This circuitry may form part of the firstmetallic layers 138, be within the firstmetallic layers 138, couple the firstmetallic layers 138, and/or form structures that are not part of the firstmetallic layers 138. The firstmetallic layers 138 of the illustrated embodiment are separated from one another because the plurality ofmetallic structures 140 are to be built as separated structures. Also, each of these firstmetallic layers 138 surrounds and defines anaperture 142 which may include the circuitry discussed above (not shown). In other embodiments, the firstmetallic layers 138 may simply be a metallic strip and thus would not define theaperture 142. - A first set of
conductive vias 144 may then be formed on each of the firstmetallic layers 138 of the plurality of metallic structures 140 (FIG. 7D ). In this embodiment, the first set ofconductive vias 144 is provided around each of the firstmetallic layers 138. A first insulatingsubstrate layer 146 may then be provided over the firstmetallic layers 138 and the first set of conductive vias 144 (FIG. 7E ). For example, the first insulatingsubstrate layer 146 may be formed from a dielectric material that is laminated over the firstmetallic layers 138 and the first set ofconductive vias 144. When the first insulatingsubstrate layer 146 is initially provided over the firstmetallic layers 138 and the first set ofconductive vias 144, the first set ofconductive vias 144 may extend above the first insulatingsubstrate layer 146. In this embodiment, the first set ofconductive vias 144 may be grinded so that the first set ofconductive vias 144 is flush with the first insulatingsubstrate layer 146. The first insulatingsubstrate layer 146 forms a part of thesubstrate body 148 of the substrate. - The first set of
conductive vias 144 of the illustrated embodiment is formed on the firstmetallic layers 138 prior to providing the first insulatingsubstrate layer 146. In the alternative, the first insulatingsubstrate layer 146 may be provided prior to forming the first set ofconductive vias 144. Afterwards, holes may be etched into the first insulatingsubstrate layer 146 and a conductive material plated into these holes to form the first set ofconductive vias 144. - When the first insulating
substrate layer 146 is provided, each of the apertures 142 (shown inFIG. 7C ) enclosed by the firstmetallic layers 138 are filled with substrate material and each of the firstmetallic layers 138 surrounds anarea 143 that forms part of a component portion of thesubstrate body 148. Thus, in the illustrated embodiment, the firstmetallic layer 138 circumscribes the area 143 (FIG. 7E ) and defines a section of the periphery of the component portion. Next, the carriermetallic layer 134 may be removed and the process described inFIGS. 7A-7E may be repeated to form the desired number of insulating substrate layers 146, 150, 152 (FIG. 7F ) in thesubstrate body 148 of thesubstrate 154,metallic layers conductive vias metallic structures 148 for eachcomponent portion 163. Thesubstrate 154 has a plurality ofcomponent portions 163 which each have a second, third, and fourthmetallic layers metallic layer 138; and a first, second, and third set ofconductive vias metallic layers substrate layer 146. It should be noted however that thesubstrate 154 does not necessarily have to be formed from the bottom up. Thesubstrate 154 could be provided from the top down where firstmetallic layer 138 and the first insulatingsubstrate layer 146 are the top layers. In addition, thesubstrate 154 may be built from the middle outwards where the firstmetallic layer 138 and the first insulatingsubstrate layer 146 are one of the middle layers of thesubstrate body 148. The second, third, and fourthmetallic layers conductive vias metallic layer 138 to form thesubstrate 154. - In this embodiment, as illustrated in
FIG. 7G , eachcomponent portion 163 includes acomponent area 162 on asurface 164 of thesubstrate body 148. One or moreelectronic components 165 may be formed on eachcomponent area 162 and then anovermold 166 provided over thesurface 164 to cover the component areas 162 (FIG. 7H ).Channels 168 provide openings along aperiphery 169 of each of the component portions 163 (FIG. 7I ). -
FIG. 7J illustrate a cross sectional view between twocomponent portions 163 after thechannels 168 have been formed through theovermold 166 and the fourthmetallic layers 160 to expose asection 170 of the third set ofconductive vias 164. However, thesechannels 168 may extend through theovermold 166 and thesubstrate body 148 to expose any desired set ofconductive vias metallic structures 140. In this embodiment,sections 170 of the third set ofconductive vias 164 are exposed by thechannel 168. An electromagnetic shield material is applied over theovermold 166 and within thechannel 168 to formelectromagnetic shields 171 over the component areas 162 (FIG. 7K ).Sections 170 of the third set ofconductive vias 164 directly attach to theelectromagnetic shields 171 so that theelectromagnetic shields 171 are electrically connected to themetallic structures 140. Thecomponent portions 163 may be then be singulated from one another to form individual shielded electronic modules 132 (FIG. 7L ). -
FIGS. 8A-8L illustrates a series of steps for manufacturing another embodiment of an electronic meta-module. To create the substrate for the electronic meta-module, a carriermetallic layer 172 is first provided (FIG. 8A ) and a firstmetallic sheet 174 is formed on the carrier metallic layer 172 (FIG. 8B ). Photo lithography may be utilized to form themetallic sheet 174 into a firstmetallic layer 176 of a plurality of metallic structures 178 (FIG. 8C ). Photo lithography may also be utilized to form circuitry (not shown). This circuitry may form part of the firstmetallic layers 176, be within the firstmetallic layers 176, couple the firstmetallic layers 176, and/or form structures that are not part of the firstmetallic layers 176. The firstmetallic layers 176 in this embodiment are integrated with one another because the plurality ofmetallic structures 178 are built as part of an integrated meta-metallic structure 180. Each of these firstmetallic layers 176 surrounds and defines anaperture 182 which may include the circuitry discussed above (not shown). In other embodiments, the firstmetallic layers 176 may simply be a metallic strip and thus would not define theaperture 182. - As shown in
FIG. 8D , a first set ofconductive vias 184 may then be formed on each of the firstmetallic layers 176 in the plurality ofmetallic structures 178. In this embodiment, the first sets ofconductive vias 184 are provided around each of the firstmetallic layers 176. A first insulatingsubstrate layer 186 may then be provided over the firstmetallic layers 176 and the first sets of conductive vias 184 (FIG. 8E ). For example, the first insulatingsubstrate layer 186 may be formed from a dielectric material that is laminated over the firstmetallic layers 176 and the first set ofconductive vias 184. When the first insulatingsubstrate layer 186 is initially provided over the firstmetallic layers 176 and the first set ofconductive vias 184, the first set ofconductive vias 184 may extend above the first insulatingsubstrate layer 186. In this embodiment, the first set ofconductive vias 184 may be grinded so that the first set ofconductive vias 184 is flush with the first insulatingsubstrate layer 186. The first insulatingsubstrate layer 186 forms a part of thesubstrate body 188 of the substrate. The first sets ofconductive vias 184 of the illustrated embodiment are formed on the firstmetallic layers 176 prior to providing the first insulatingsubstrate layer 186. In the alternative, the first insulatingsubstrate layer 186 may be provided prior to forming the first set ofconductive vias 184. Afterwards, holes may be etched into the first insulatingsubstrate layer 186 and a conductive material plated into these holes to form the first set ofconductive vias 184. - When the first insulating
substrate layer 186 is provided, each of the apertures 182 (shown inFIG. 8C ) enclosed by the firstmetallic layers 176 are filled with substrate material and each of the firstmetallic layers 176 surrounds an area 190 (FIG. 8E ) that forms part of a component portion of thesubstrate body 188. Thus, in the illustrated embodiment, the firstmetallic layer 176 circumscribes thearea 190 and defines a section of the periphery of one of the component portions. The carriermetallic layer 172 may be removed and the process described inFIGS. 8A-8E may be repeated to form the desired number of insulating substrate layers 186, 192, 193 in thesubstrate body 188 of thesubstrate 195;metallic layers metallic structures 178; and sets ofconductive vias FIG. 8F ). Thesubstrate 195 is depicted as having second, third, and fourthmetallic layers metallic layer 176. First, second, and third sets ofconductive vias metallic layers substrate layer 186. As in the previous embodiment, thesubstrate 195 does not necessarily have to be formed from the bottom up. Thesubstrate 195 could be provided from the top down, where the firstmetallic layer 176 and the first insulatingsubstrate layer 186 are the top layers. In addition,substrate 195 may be built from the middle outwards where the firstmetallic layer 176 and the first insulatingsubstrate layer 186 are one of the middle layers of thesubstrate body 188. The second, third, and fourthmetallic layers conductive vias metallic layer 176 and first insulatingsubstrate layer 186 to form thesubstrate 195. - The
substrate 195 has a plurality of component portions 205 (FIG. 8F ) each having ametallic structure 178 within thesubstrate body 188. In this embodiment, eachcomponent portion 205 is also formed to have acomponent area 206 on asurface 208 of thesubstrate body 188. Next, one or moreelectronic components 210 may be attached to each component area 206 (FIG. 8G ) and then anovermold 212 provided over thesurface 208 to cover the component areas 206 (FIG. 8H ). Cuts are made into theovermold 212 andchannels 214 form openings through theovermold 212 andsubstrate body 188 along aperiphery 216 of each of the component portions 205 (FIG. 8I ). -
FIG. 8J illustrates a cross sectional view between twocomponent portions 205 after thechannels 214 have been formed through theovermold 212; the second, third, fourthmetallic layers conductive vias section 211 of the first set ofconductive vias 184. However, thesechannels 214 may extend through theovermold 206 and thesubstrate body 188 to expose any desired set ofconductive vias metallic structures 178. In this embodiment,sections 211 of the third set ofconductive vias 204 are exposed by thechannel 214. An electromagnetic shield material is applied over theovermold 212 and within thechannel 214 to formelectromagnetic shields 218 over the component areas 206 (FIG. 8K ). Thesections 211 of the first set of conductive vias 184 (and other exposed sections of the metallic structures 178) are directly attached to one of theelectromagnetic shields 218 so that theelectromagnetic shields 218 are electrically connected to themetallic structures 178. Thecomponent portions 205 may then be singulated from one another to form individual shielded electronic modules 220 (FIG. 8L ). - Those skilled in the art will recognize improvements and modifications to the embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
Claims (12)
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US20140340859A1 (en) | 2014-11-20 |
US9420704B2 (en) | 2016-08-16 |
US20120217624A1 (en) | 2012-08-30 |
US9942994B2 (en) | 2018-04-10 |
US8835226B2 (en) | 2014-09-16 |
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