JP2005109306A - Electronic component package and its manufacturing method - Google Patents

Electronic component package and its manufacturing method Download PDF

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JP2005109306A
JP2005109306A JP2003342995A JP2003342995A JP2005109306A JP 2005109306 A JP2005109306 A JP 2005109306A JP 2003342995 A JP2003342995 A JP 2003342995A JP 2003342995 A JP2003342995 A JP 2003342995A JP 2005109306 A JP2005109306 A JP 2005109306A
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layer
electronic component
plating
component package
surface
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喜久 ▲高▼瀬
Masaaki Hayama
Masaaki Katsumata
Yoshihisa Takase
Shigeki Yamada
雅昭 勝又
茂樹 山田
雅昭 葉山
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Matsushita Electric Ind Co Ltd
松下電器産業株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01011Sodium [Na]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15158Shape the die mounting substrate being other than a cuboid
    • H01L2924/15159Side view
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component package and its manufacturing method for realizing a shield effect sufficient for miniaturizing an electronic apparatus, reducing its height, reducing its weight and increasing frequency, according to the improvement in the sealing properties of the electronic component package. <P>SOLUTION: The electronic component package is composed of a circuit board 1 having a ground pattern 3, a packaging component 5 composed of an electronic component packaged on an upper surface of the circuit board 1, a seal 6 composed of epoxy resin containing an inorganic filler for sealing the packaging component 5, and a shielding layer, composed of an electroless copper plating layer as a first layer 7 to be formed on the surface of the seal 6, an electrolytic copper plating layer as a second layer 8 and a coating layer for preventing copper oxidation as a third layer 9, and is configured by grounding the shield layer on the ground pattern 3. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、各種電子機器、通信機器等に用いられる電子部品パッケージおよびその製造方法に関するものである。 The present invention, various electronic apparatuses, an electronic component package and a manufacturing method thereof, for use in a communication device or the like.

従来、この種の電子部品パッケージは、図5に示されるような構成を有していた。 Conventionally, an electronic component package of this type had a configuration as shown in FIG.

図5は従来の電子部品パッケージの斜視図である。 Figure 5 is a perspective view of a conventional electronic component package.

図5において、回路基板20の上面にグランドパターンと導通する接地用電極パターン21を形成し、前記回路基板20に実装部品22を実装し、これらの実装部品22をエポキシ樹脂による封止体23で封止し、前記封止体23の表面にニッケルめっき層24を接地用電極パターン21と導通させるように形成して電子部品パッケージの電磁波シールドを行っていた。 5, to form a grounding electrode pattern 21 electrically connected to the ground pattern on the upper surface of the circuit board 20, the implement mounting component 22 on the circuit board 20, these mounting components 22 with the sealing body 23 by the epoxy resin sealed, had done an electromagnetic wave shielding of electronic component package of the nickel plating layer 24 on the surface of the sealing body 23 is formed so as to turn the grounding electrode pattern 21.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献1が知られている。 As information on prior art documents related to the invention of the application, for example, Patent Document 1 is known.
特開平11−163583号公報 JP 11-163583 discloses

しかしながら、近年、電子部品パッケージが小型化、低背化、軽量化、高周波化する中で、従来の電子部品パッケージに採用されているニッケルめっき皮膜では電磁波を十分にシールドしていくことが困難となってきている。 However, in recent years, the electronic component package is compact, low-profile, lightweight, in the higher frequency, in the nickel plating film, which is adopted in the conventional electronic component packaging is difficult to go fully shielded electromagnetic waves It has become to. そこで、ニッケルめっき皮膜の厚さを厚くすることでシールド性を向上させることで対応しているが、ニッケルめっき皮膜を厚くすることで多くの不具合が発生している。 Therefore, although are supported by improving the shielding properties by increasing the thickness of the nickel plating film, many defects are generated in increasing the thickness of the nickel plating film. 例えば、ニッケルめっき厚が3μm以上になると加熱時にクラックが発生する。 For example, cracks are generated upon heating the nickel plating thickness becomes more than 3 [mu] m. あるいは封止樹脂とニッケルめっき皮膜の膨張係数が大きく違うため電子部品パッケージをマザーの回路基板にはんだ接合するのに、リフロー炉を通すとニッケル皮膜が封止樹脂から浮く、膨れるなどの不具合が発生する。 Alternatively to soldered electronic component package for expansion coefficient of the sealing resin and nickel plating film differs greatly to the circuit board of the mother, floats from the reflow furnace is passed through the nickel coating encapsulating resin, bulging such trouble occurs to.

また、シールド性については、シールド皮膜の導電性が大きく関係することがわかっており、ニッケルめっき皮膜の中でも電解ニッケルめっき皮膜の方が無電解ニッケルめっき皮膜より10倍ほど小さい。 As for shielding it is found that the conductive shield film is greatly related, toward the electroless nickel plating film among the nickel plating film is smaller about 10 times than the electroless nickel plating film.

そこで、電解ニッケルめっきでシールド性を向上させようとすると、電解ニッケル皮膜は塩水噴霧試験を行うとシールド効果が著しく低下する。 Therefore, if an attempt to improve the shielding properties by electrolytic nickel plating, electroless nickel coating shielding effect is significantly reduced when performing the salt spray test.

一方、無電解めっき皮膜は、めっき液中の還元剤に含まれるリンをめっき皮膜中に取り込むため数%のリンを含むNi−P皮膜である。 On the other hand, the electroless plating film is Ni-P coating containing a few percent of phosphorus for capturing phosphorus contained in the reducing agent in the plating solution in the plating film. 従って、リン含有率が6%以上の中リン、高リンタイプの無電解ニッケルめっき皮膜を用いると耐食性に著しく優れた皮膜になるが、リン含有率が増えるに従い皮膜の導電性は悪くなり、さらに硬度も高いため、膜厚を厚くしてシールド性を向上させようとすると、先に延べたように加熱時のクラック、膨れ、剥離などの不具合が発生し電子部品パッケージのシールド皮膜として使用するには限界があり、シールド性を向上させるという要望に対応できないという問題点を有していた。 Accordingly, the phosphorus in the phosphorus content of 6% or more, becomes significantly film excellent corrosion resistance using electroless nickel plating film of high phosphorus type conductive film in accordance with the phosphorus content increases is deteriorated, further for even higher hardness and by increasing the thickness to try to improve the shielding property, cracks during heating as previously described, blistering, defect such as peeling occurs use as a shield film electronic component package There is a limit, there is a problem that can not correspond to the desire to improve the shielding property.

本発明は上記従来の課題を解決するもので、電子部品パッケージのシールド性向上に対応し、電子機器の小型化、低背化、軽量化、高周波化に十分なシールド効果を実現する電子部品パッケージとその製造方法を提供することを目的とするものである。 The present invention is intended to solve the conventional problems described above, an electronic component package electronic component package of the corresponding shield improvement, miniaturization of electronic devices, low-profile, lightweight, to achieve sufficient shielding effect in a high frequency of and it is an object to provide a manufacturing method thereof.

上記目的を達成するために、本発明は以下の構成およびプロセスを有する。 To achieve the above object, the present invention has the following structure and processes.

本発明の請求項1に記載の発明は、グランドパターンを有する回路基板と、この回路基板の上面に実装された電子部品からなる実装部品と、この実装部品を封止する無機質フィラーを含有するエポキシ樹脂からなる封止体と、この封止体の表面に形成した第1層としての無電解銅めっき層と、第2層としての電解銅めっき層と、第3層としての銅の酸化を防止する皮膜層からなるシールド層とからなり、このシールド層を前記グランドパターンに接地した電子部品パッケージであり、これにより、小型、低背、軽量で電磁波シールド性に優れた電子部品パッケージを構成できるという作用効果が得られる。 According to a first aspect of the present invention, an epoxy containing a circuit board having a ground pattern, and a mounting part made of electronic components mounted on the upper surface of the circuit board, the inorganic filler to seal the mounting component prevention and sealing body made of resin, and electroless copper plating layer as a first layer formed on the surface of the sealing member, and the electrolytic copper plating layer as a second layer, the oxidation of copper as a third layer consists of a shield layer made of the coating layer to an electronic component package ground the shield layer to said ground pattern, by which a small, low-profile, that lightweight can be configured superior electronic component package in electromagnetic shielding action and effect can be obtained.

本発明の請求項2に記載の発明は、皮膜層が錫めっき層からなる請求項1に記載の電子部品パッケージであり、これにより、実装時にはんだリフロー炉を通ることにより錫めっき層が溶融し、めっき皮膜が緻密な層になり、薄いめっき厚でも耐湿性等環境特性に優れた皮膜を形成することができ、第2層の電解銅めっき層の酸化等を防ぐことができるという作用効果が得られる。 The invention according to claim 2 of the present invention is an electronic component package according to claim 1 which coating layer consists of tin-plated layer, thereby, the tin-plated layer is melted by passing through a solder reflow furnace at the time of mounting , plating film becomes dense layer, is the action and effect that it is possible to prevent the thin plating also can form a film excellent in moisture resistance environmental characteristics in thickness, oxidation of the electrolytic copper plating layer of the second layer can get.

本発明の請求項3に記載の発明は、皮膜層がニッケル、ニッケル−硼素またはニッケル−リンめっき層からなる請求項1に記載の電子部品パッケージであり、これにより、無電解めっき皮膜が硼素またはリンを含むことで耐湿試験等環境特性に優れた皮膜を形成し第2層の電解銅めっき層の酸化等を防ぐことができるという作用効果が得られる。 The invention described in claim 3 of the present invention, the coating layer is nickel, nickel - boron or nickel - is an electronic component package according to claim 1 consisting of phosphorus plating layer, thereby, an electroless plating film boron or effect that can prevent the oxidation of the electrolytic copper plating layer of the second layer to form a film excellent in humidity resistance test such environmental properties by containing phosphorus is obtained.

本発明の請求項4に記載の発明は、グランドパターンを有する回路基板の上面に電子部品からなる実装部品を実装し、この実装部品を無機質フィラーを含有するエポキシ樹脂からなる封止体で封止し、この封止体の表面に無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程によりシールド層を形成し、このシールド層をグランドパターンに接地する電子部品パッケージの製造方法であり、これにより、電磁波シールド性に優れた電子部品パッケージを製造できるという作用効果が得られる。 The invention according to claim 4 of the present invention, the upper surface of the circuit board having a ground pattern implements the mounting components made from the electronic component, sealing the mounting component with a sealing material made of epoxy resin containing an inorganic filler and form a step of forming a first layer by electroless copper plating on the surface of the sealing member, forming a second layer by electrolytic copper plating, a third layer with a film to prevent oxidation of the copper the shielding layer is formed by a process, a method for producing an electronic component package to ground the shield layer to the ground pattern, thereby, effect that can be produced an excellent electronic component package in electromagnetic shielding property is obtained.

本発明の請求項5に記載の発明は、グランドパターンを有する回路基板の上面に電子部品からなる実装部品を実装し、この実装部品を無機質フィラーを含有するエポキシ樹脂からなる封止体で封止し、この封止体の上からグランドパターンが露出するように前記回路基板の一部を切削してスリット部を形成し、上記封止体の表面および切削面に無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程によりシールド層を形成し、このシールド層をグランドパターンに接地する電子部品パッケージの製造方法であり、これにより、電磁波シールド性に優れた電子部品パッケージを提供できるという作用効果が得られる。 The invention described in claim 5 of the present invention, the upper surface of the circuit board having a ground pattern implements the mounting components made from the electronic component, sealing the mounting component with a sealing material made of epoxy resin containing an inorganic filler and, a slit portion by cutting a portion of the circuit board so that the ground pattern from the top of the sealing member is exposed, the first layer by electroless copper plating on the surface and the cutting surface of the sealing body forming a step of forming a second layer by electrolytic copper plating, the shielding layer is formed by forming a third layer with a film to prevent oxidation of the copper, grounding the shield layer to the ground pattern a method of manufacturing an electronic component package, thereby, effect that can provide an excellent electronic component package in electromagnetic shielding property is obtained.

本発明の請求項6に記載の発明は、100℃以上の熱処理工程を無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程の少なくともいずれか1つの工程の後に設けた請求項4または請求項5に記載の電子部品パッケージの製造方法であり、これにより、めっき皮膜中の水分が除去され封止体とめっき皮膜の密着性がより強固になると共にめっき皮膜粒子が粒径が再結晶することによりめっき皮膜の導通性が安定化するという作用効果が得られる。 The invention described in claim 6 of the present invention includes the steps of forming a first layer by electroless copper plating 100 ° C. or more heat treatment steps, a step of forming a second layer by electrolytic copper plating, copper oxidation a method of manufacturing an electronic component package according to claim 4 or claim 5 provided after at least one of the steps of forming a third layer with a film to prevent, thereby, water in the plating film plating film particles together with adhesion becomes stronger the removed sealing member and the plating film particle size conduction of the plated film by recrystallization to obtain operational effects of stabilizing.

本発明の請求項7に記載の発明は、20μm以下の表面粗さを有する封止体に無電解銅めっき皮膜を形成する請求項4または請求項5に記載の電子部品パッケージのシールドめっき皮膜形成方法であり、これにより、20μm以上の表面粗さでは、封止体へのめっき皮膜の楔効果が得られなかったが20μm以下であれば、その効果が顕著に得られめっき皮膜をクロスカットしたテープ試験で剥がれの無い密着強度が得られることが確認でき封止体に密着性の優れたシールドめっき皮膜を形成することができるという作用効果が得られる。 The invention according to claim 7 of the present invention, the shield plating film formed of an electronic component package according to claim 4 or claim 5 to form an electroless copper plating film on the sealing member having a surface roughness of less than 20μm a method whereby, in the above surface roughness 20 [mu] m, although the wedge effect of the plating film to the sealing body can not be obtained if 20 [mu] m or less, the effect was cross-cut significantly resulting plated film action and effect that it is possible to form an excellent shield plating film adhesion to the sealing body confirmed that no adhesion strength of the peeling tape test is obtained is obtained.

本発明の請求項8に記載の発明は、特に、第2層が電解銅めっき、第3層が電解錫めっきの皮膜形成工程でめっき液を一定の周波数で振動させる周波数15〜60Hz以下の超振動攪拌する請求項5に記載の電子部品パッケージの製造方法であり、これにより、超振動攪拌によりめっき液の移動がより加速され、めっき析出速度があがり(電流効率が良化される)、また、スリット部への液循環が良くなり、スリット部へのめっき付きまわり性が向上し電子部品パッケージの表面へのめっき付きまわりに優れたシールドめっき皮膜を形成できるという作用効果が得られる。 The invention of claim 8 of the present invention, particularly, the second layer electrolytic copper plating, the third layer of the following frequency 15~60Hz vibrating the plating liquid at a constant frequency with a film forming step of electroless tin plating super a method of manufacturing an electronic component package according to claim 5 for agitating vibration, thereby, be moved accelerate more of the plating solution by the ultrasonic vibration stirring, plating deposition rate goes up (current efficiency is improved), also liquid circulation to the slit portion becomes good, effect that can form a shield plating film-plated around properties with excellent plating with around the improved surface of the electronic component packages to the slit portion can be obtained.

本発明の請求項9に記載の発明は、特に、第3層が無電解ニッケル−リンめっき皮膜形成工程で、ニッケルめっき皮膜中に6%以上のリンを含有させる請求項5に記載の電子部品パッケージの製造方法であり、これにより、耐環境性に優れた電子部品パッケージのめっき皮膜を形成できるという作用効果が得られる。 The invention described in claim 9 of the present invention, particularly, the third layer is electroless nickel - phosphorus plating film formation step, the electronic component according to claim 5 which contains phosphorus at least 6% in the nickel plating film a method of manufacturing a package, thereby, effect that can form a plating film of an electronic component package having excellent environmental resistance can be obtained.

本発明の請求項10に記載の発明は、無電解銅めっき工程の前処理工程として、樹脂封止された電子部品を熱処理する工程と、封止体の表面の樹脂を粗化するエッチング工程と、封止体の表面の無機質フィラーを粗化するエッチング工程と、銅めっきを析出させるためのパラジウム付与工程と、銅を析出させる無電解銅めっき工程とを有する請求項4または請求項5に記載の電子部品パッケージの製造方法であり、これにより、めっき皮膜が密着性に優れた電子部品パッケージおよびそのシールドめっき皮膜を形成できるという作用効果が得られる。 The invention according to claim 10 of the present invention, as a pretreatment step of the electroless copper plating step, a step of heat-treating the resin encapsulated electronic component, and an etching step of roughening the resin on the surface of the sealing body , claim 4 or claim 5 comprising an etching step of roughening the inorganic filler of the surface of the sealing body, and palladium providing step for depositing copper plating, the electroless copper plating process to deposit copper of a method of manufacturing an electronic component package, thereby, the effect that the plating film can be formed excellent electronic component package and its shield plating film adhesion is obtained.

本発明の請求項11に記載の発明は、特に、樹脂封止された電子部品を熱処理する工程が封止体のガラス転移点(Tg)以上の熱処理である請求項10に記載の電子部品パッケージの製造方法であり、これにより、シールドめっき皮膜を形成した後、シールドめっき皮膜の密着強度試験で脆い樹脂層から剥がれるという現象を解決することができ、めっき密着性に優れた電子部品パッケージおよびそのシールドめっき皮膜を形成できるという作用効果が得られる。 The invention according to claim 11 of the present invention, particularly, an electronic component package according to claim 10 heat-treating the resin sealed electronic component is a glass transition point (Tg) or heat treatment of the sealing body a method of manufacturing, thereby, after forming a shield plating film, it is possible to solve the phenomenon detached from brittle resin layer in the adhesion strength test of the shield plating film, an electronic component package and its excellent plating adhesion effect that can form a shield plating film can be obtained.

本発明の請求項12に記載の発明は、特に、封止体の表面の無機質フィラーを粗化するエッチング液がふっ化水素酸である請求項10に記載の電子部品パッケージの製造方法であり、これにより、スリット部に露出した回路基板の銅パターンを侵すことなく、封止体の表面を適度に粗化することができ、密着性に優れた電子部品パッケージおよびそのシールドめっき皮膜を形成できるという作用効果が得られる。 The invention according to claim 12 of the present invention are, in particular, a method for producing an electronic component package according to claim 10 etching solution is hydrofluoric acid to roughen the inorganic filler of the surface of the sealing body, that this way, without violating the copper pattern of the circuit substrate exposed in the slit portion can be appropriately roughening the surface of the sealing body can be formed excellent electronic component package and its shield plating film adhesion action and effect can be obtained.

本発明のグランドパターンを有する回路基板と、この回路基板の上面に実装された電子部品からなる実装部品と、この実装部品を封止する無機質フィラーを含有するエポキシ樹脂からなる封止体と、この封止体の表面に形成した第1層としての無電解銅めっき層と、第2層としての電解銅めっき層と、第3層としての銅の酸化を防止する皮膜層からなるシールド層とからなり、このシールド層を前記グランドパターンに接地した電子部品パッケージであり電磁波シールド性に優れた電子部品パッケージを形成できるとともに密着性に優れたシールドめっき皮膜を形成することができるという効果を奏するものである。 A circuit board having a ground pattern of the present invention, the mounting components made electronic components mounted on the upper surface of the circuit board, a sealing body made of an epoxy resin containing an inorganic filler to seal the mounted components, the and electroless copper plating layer as a first layer formed on the surface of the sealing body, from the electrolytic copper plating layer as a second layer, a shield layer made of the coating layer to prevent oxidation of copper as a third layer It becomes, in which an effect that it is possible to form an excellent shield plating film adhesion with the shield layer can form an electronic component package having excellent and electromagnetic shielding an electronic component package which is grounded to the ground pattern is there.

(実施の形態1) (Embodiment 1)
以下、実施の形態1を用いて本発明の特に請求項1〜3に記載の発明について説明する。 Hereinafter, the invention will be described according to particular claims 1-3 of the present invention with reference to the first embodiment.

本発明の実施の形態1における電子部品パッケージは図1の斜視図で示すように多層基板で形成した回路基板1の上に電磁波シールド層2を形成している。 Electronic component package according to the first embodiment of the present invention forms an electromagnetic wave shielding layer 2 on the circuit board 1 formed in the multilayer substrate shown in perspective view in FIG. 図2は図1のA−Aで示した電子部品パッケージの断面図を示している。 Figure 2 shows a cross-sectional view of an electronic component package shown in the A-A FIG. 断面図に示すように回路基板1の内層および外層にはグランドパターン3や配線パターン4が少なくとも2層以上で形成されている。 The inner and outer layers of the circuit board 1 as shown in the sectional view the ground pattern 3 and the wiring pattern 4 is formed of at least two or more layers.

また、前記回路基板1はガラスエポキシ樹脂等の絶縁材からなり、ビアホール(図示せず)で層間を電気的に接続されている。 Further, the circuit board 1 is made of an insulating material such as glass epoxy resin, and is electrically connected to the interlayer via hole (not shown). 本実施の形態では4層基板で説明している。 In the present embodiment has been described in four-layer board.

そして、実施の形態1の電子部品パッケージは前記グランドパターン3を有する回路基板1の上面に実装部品5(IC、チップ抵抗、チップコンデンサーなど)を配線パターン4の上にリフローによるはんだで実装している。 The electronic component package of the first embodiment the ground pattern 3 circuit mount component 5 on the upper surface of the substrate 1 having the (IC, chip resistors, chip etc. condensers) implemented in solder by reflowing on the wiring pattern 4 there.

一方、電子部品パッケージは実装部品5と反対面にある回路基板1の下面の配線パターン4とマザーボード(図示せず)とをはんだで実装しマザーボードと導通させて使用される。 On the other hand, the electronic component package is used mounted part 5 and the lower surface of the wiring pattern 4 and the motherboard of the circuit board 1 on the opposite side (not shown) and was allowed to conduct with mounted by soldering the motherboard.

上述の実装部品5(IC、チップ抵抗、チップコンデンサーなど)が実装された回路基板1の上面は、無機質フィラーを含有するエポキシ樹脂からなる封止樹脂によって封止体6が形成される。 Mount component 5 described above (IC, chip resistors, such as a chip condenser) upper surface of the circuit board 1 mounted is, the sealing body 6 is formed by a sealing resin made of epoxy resin containing an inorganic filler. この封止体6は回路基板1の平面形状と略同一形であり、両者が一体となって電子部品パッケージを構成する。 The sealing body 6 is a plan shape substantially the same type of circuit board 1, both constituting the electronic component package together.

この封止体6に用いられる無機質フィラー入りエポキシ樹脂は耐湿性、耐候性、絶縁性及び耐熱性に優れると共に、前述のガラスエポキシ樹脂からなる回路基板1とは異なる成分構成でできている。 Inorganic filler-containing epoxy resin is moisture resistant for use in this sealing body 6, weather resistance, excellent in insulating properties and heat resistance, it is made of different components constituting the circuit board 1 made of the foregoing glass epoxy resin. 前記封止体6の表面に電磁波シールド層2を形成する。 Forming an electromagnetic wave shielding layer 2 on the surface of the sealing body 6. この電磁波シールド層2を形成するにあたり、封止体6の表面を化学的に処理することにより、めっきが実用的強度で形成されるのを可能としている。 In forming the electromagnetic wave shielding layer 2, by chemically treating the surface of the sealing body 6, plating is possible from being formed at a practical strength.

また、実施の形態1では図2に示したように回路基板1の端面にグランドパターン3の一部が外部表面に露出している。 A part of the ground pattern 3 is exposed on the outer surface on the end face of the circuit board 1 as shown in FIG. 2 in the first embodiment.

前記封止体6の表面に形成される電磁波シールド層2は無電解銅めっき法によって無機質フィラーを含有するエポキシ樹脂の上に銅を析出して第1層7が形成されている。 The electromagnetic wave shielding layer 2 formed on the surface of the sealing body 6 is the first layer 7 by precipitating copper on epoxy resin containing inorganic filler by electroless copper plating is formed.

さらに電解銅めっき法で第1層7の上に電解銅を析出させ第2層8を形成することで、封止体6の表面の抵抗を下げることができ、より電磁波シールド性を向上することができる。 By forming the second layer 8 is deposited electrolytic copper over more of the first layer 7 in the electrolytic copper plating method, it is possible to reduce the resistance of the surface of the sealing body 6, to improve the more EMI shielding can.

また、第1層7と第2層8で形成した銅層のみでは大気中の酸素によって銅の表面が酸化し封止体6の表面の抵抗が上がり、電磁波シールド性が低下する。 Further, the first layer 7 with only copper layer formed by the second layer 8 increases the resistance of the surface of the sealing member 6 is oxidized copper surface by atmospheric oxygen, electromagnetic shielding property is lowered.

そこで、第2層8の上に銅の酸化を防止するために電解錫めっき法、無電解ニッケルめっき法、電解ニッケルめっき法のいずれかで錫層またはニッケル層による第3層9を形成している。 Therefore, the electroless tin plating in order to prevent oxidation of copper on the second layer 8, electroless nickel plating, to form the third layer 9 by a tin layer or a nickel layer in one of the electroless nickel plating there.

また、このようにして形成された電磁波シールド層2は封止体6の周辺及び回路基板1の端面のグランドパターン3の露出部にも電磁波シールド層2が形成されることになる。 Further, such an electromagnetic wave shielding layer 2 thus formed will be the electromagnetic wave shielding layer 2 to the exposed portion of the ground pattern 3 near and the end surface of the circuit board 1 of the sealing body 6 is formed. その結果、外部の電磁波ノイズから実装部品5をシールドすることができる。 As a result, it is possible to shield the mounting part 5 from the external electromagnetic noise. また、同様に電子部品パッケージの内部から発生する電磁波ノイズを外部に放出することも無いため他の周辺の電子部品、電子機器に電波障害を与えることも無い。 Similarly, other peripheral electronics for it not to emit electromagnetic noise generated inside to the outside of the electronic component package, it is also not giving interference to the electronic device.

このように、無機質フィラーを含有するエポキシ樹脂からなる封止体6の表面に第1層7として無電解銅めっき層、第2層8として電解銅めっき層、第3層9として銅の酸化を防止する層(錫層またはニッケル層)を形成して電磁波シールド層2を形成することができる。 Thus, an electroless copper plating layer as a first layer 7 on the surface of the sealing body 6 made of epoxy resin containing an inorganic filler, electroless copper plating layer as the second layer 8, the oxidation of copper as a third layer 9 it is possible to form the electromagnetic wave shielding layer 2 to form a layer for preventing (tin layer or a nickel layer).

従来、無電解ニッケルめっき法で形成されるニッケルめっき層を電磁波シールド層2に使用していたが、Ni,Ni−P,Ni−B皮膜は導電性に劣り、昨今の小型化、低背化、軽量化、高周波化するなかで、ニッケルめっき皮膜では十分に電磁波をシールドすることが困難になってきている。 Conventionally, a nickel plating layer formed by electroless nickel plating method has been used in the electromagnetic wave shielding layer 2, Ni, Ni-P, Ni-B film is inferior in conductivity, recent miniaturization, low profile weight reduction, among the high frequency, be shielded sufficiently electromagnetic waves in nickel plating film has become difficult. また、シールド性を向上させるためにはシールド皮膜の導電性が低ければ低いほど良いことが分かっており、簡便な方法であるめっき法で形成できる銅皮膜に着目した。 In order to improve the shielding properties has been found to be as low as possible a conductive shield film is focused on a copper film can be formed by plating a simple method. 銅の導電性を1.0とすると、電解Niめっき皮膜は0.22、無電解Ni−1%B皮膜は0.10、無電解Ni−2.1%Pで0.057、無電解Ni−7%Pで0.024である。 When the conductivity of copper and 1.0, electroless Ni plating film 0.22, electroless Ni-1% B coating 0.10, in an electroless Ni-2.1% P 0.057, electroless Ni in -7% P is 0.024.

また、Niめっき皮膜に比べ、硬度も低く、耐熱性にも優れ、加熱によるクラックの発生も無い。 Moreover, compared with Ni plating film hardness is low, excellent heat resistance, no generation of cracks due to the heating.

しかし、前述のように無電解銅めっきで形成した第1層7だけではめっき皮膜の緻密さ、皮膜物性が劣るため、本実施の形態1に示すように、第1層7の上面に第2層8を形成しめっき皮膜の物性を確保している。 However, denseness of the first layer 7 alone plated film formed by electroless copper plating as mentioned above, since the film properties are poor, as shown in the first embodiment, first the upper surface of the first layer 7 2 It has secured physical properties of the formed plating film layer 8.

また、銅は大気中で酸化しやすいため皮膜の抵抗が上がり、電磁波シールド性が劣ってくるという欠点を有するため、第3層9として、銅の酸化を防止する目的でニッケルめっき皮膜または錫めっき皮膜を採用している。 Moreover, copper increases the resistance of the film and is easily oxidized in the air, because it has the disadvantage that the electromagnetic wave shielding property comes poor, as the third layer 9, the nickel plating film or tin-plated to prevent oxidation of the copper We have adopted a film.

特に、塩水噴霧試験など環境試験においては純ニッケル皮膜より、リンを含有することで著しく耐環境特性は向上する。 In particular, in the environmental test such as the salt spray test than pure nickel coating, significantly environmental resistance by containing phosphorus is improved.

特に、Pを6%以上含有することでNi−P皮膜の耐環境性は著しく向上する。 In particular, environmental resistance of Ni-P film by containing P 6% or more significantly improved.

また、錫めっき皮膜はめっき後ポーラスなめっき皮膜であっても、電子部品パッケージをマザーボードにはんだ実装する時、はんだリフロー温度を230℃(錫の融点)以上の温度に上げると、錫はいったん溶融するため緻密な膜となって、耐環境性に優れた膜となる。 Also, the tin plating film is a plating after porous plating film, when solder mounting the electronic component package to the motherboard, increasing the solder reflow temperature to 230 ° C. (melting point of tin) temperatures above tin once melted It becomes a dense film to, an excellent film environmental resistance.

従って、銅の良好な導電性、ニッケルまたは錫の良好な耐環境性を組み合わせることにより、薄いめっき皮膜でも十分な電磁波シールド性を得ることができる。 Thus, good conductivity of copper, by combining good environmental resistance of nickel or tin, can also thin plating film obtain sufficient electromagnetic shielding property.

また、最近の高周波化に対応して、さらに高いシールド効果が必要になってもNi皮膜に比べ薄いCuめっき皮膜の厚みで可能となった。 Further, in response to recent high frequency, made possible by the thickness of the thin Cu plating film compared with Ni coating also it becomes necessary higher shielding effect. 銅の酸化を防止する第3層9は極薄いめっき皮膜で良い。 Third layer 9 to prevent the oxidation of copper can be very thin plating film.

(実施の形態2) (Embodiment 2)
以下、実施の形態2を用いて、本発明の特に請求項4〜12に記載の発明について説明する。 Hereinafter, with reference to the second embodiment will be described the invention described in particular claim 4-12 of the present invention.

なお、実施の形態1の構成と同様の構成を有するものについては、同一符号を付しその説明を省略する。 Component elements having substantially the same configuration as the configuration according to the first embodiment will be omitted given the same reference numerals.

図3、図4は、上記の構成からなる電子部品パッケージの製造方法を示したものである。 3, FIG. 4 is a diagram showing a method of manufacturing an electronic component package having the above-described structure.

図3(a)に示すように各単一回路基板毎にダイシングライン(図示せず)が想定される集合回路基板11のいずれかの層(本実施の形態2では多層回路基板の2層目)にグランドパターン3を有している。 3 the second layer of each single circuit any of the layers (multilayer circuit board in the second embodiment of the collective circuit board 11 dicing lines for each substrate (not shown) is assumed as shown in (a) ) to have a ground pattern 3. この集合回路基板11の各単一基板毎に実装部品5(IC、チップ抵抗、チップコンデンサーなど)を所定の位置に搭載し、ダイボンド、ワイヤボンド、リフローによるはんだ接続などの手段で集合回路基板11に実装する。 This set circuit each single board mounting parts 5 for each of the substrate 11 (IC, chip resistors, chip etc. capacitors) mounted in place, the die bonding, a set by means other wire bonds, solder connection by reflowing the circuit board 11 to implement to.

次に、図3(b)に示すように集合回路基板11の上面全体に無機質フィラー含有エポキシ樹脂を充填し、集合回路基板11の上に均一な厚さの封止体6を形成して実装部品5を樹脂封止する。 Next, an inorganic filler-containing epoxy resin was filled into the entire upper surface of the collective circuit board 11 as shown in FIG. 3 (b), mounted to form a molded body 6 of uniform thickness on a collective circuit board 11 parts 5 resin sealing. その後、封止体6の厚さを揃えるため、研削盤で表面研削を行う。 Then, to align the thickness of the sealing body 6, for surface grinding in grinder.

次に、図3(c)はダイシングによりダイシングライン(図示せず)に沿って封止体6の上から格子状に切り込みのスリット部12を入れ、集合回路基板11の略下半部を残した状態でハーフダイシングを行う。 Next, FIG. 3 (c) dicing along the dicing line (not shown) a slit portion 12 of the cut in a lattice shape from the top of the sealing body 6 by leaving a substantially lower half of the collective circuit board 11 perform a half-dicing in the state. このハーフダイシングによって封止体6は各単一回路基板毎にスリット部12の周面が露出すると共に、接地用グランドパターン3の一端部も集合回路基板11から露出することになる。 With this circumferential surface of the sealing body 6 is slit portion 12 in each single circuit board by half-dicing is exposed, also the one end portion of the ground the ground pattern 3 will be exposed from the set circuit board 11.

そして、上記工程で、ハーフダイシングが終了した封止体6の樹脂のガラス転移点(Tg)以上の温度で熱処理を行う。 Then, in the above step, heat treatment is performed at half-dicing of the sealing body 6 ended glass transition point (Tg) of the resin or higher. 本発明の封止体6の樹脂のTgは150℃であるため150℃で実施した。 Tg of the resin of the sealing member 6 of the present invention was carried out at 0.99 ° C. for a 0.99 ° C..

次に、図3(d)、図4(e)に示すように、封止体6の樹脂の表面を粗化する目的で、エチレングリコールモノブチルエーテルと水酸化ナトリウム混合液で樹脂を膨潤させ、その後過マンガン酸カリウムと水酸化ナトリウム混合液に浸漬する。 Next, FIG. 3 (d), the as shown in FIG. 4 (e), in order to roughen the surface of the resin molded body 6, the resin is swelled with ethylene glycol monobutyl ether and sodium hydroxide mixture, thereafter immersed in potassium permanganate and sodium hydroxide mixture solution. その後、硫酸で中和処理して樹脂表面を粗化する。 Then, roughening the resin surface was neutralized with sulfuric acid.

次に、樹脂表面に30μm以下の表面粗化部13を形成することを目的に封止体6の樹脂中の無機質フィラーをふっ化水素酸溶液でエッチングする。 Then, etching with hydrofluoric acid solution an inorganic filler in the resin of the sealing body 6 for the purpose of forming the following surface roughening section 13 30 [mu] m on the resin surface. このふっ化水素酸溶液を用いることにより、スリット部12に形成された集合回路基板11の一部に露出した銅パターンを侵すことなく、封止体6の樹脂中の無機質フィラーをエッチングし、次工程の無電解銅めっき皮膜との密着性を著しく向上させることができる。 By using this hydrofluoric acid solution, without violating the exposed portion of copper pattern of collective circuit board 11 which is formed in the slit portion 12, by etching the inorganic filler in the resin of the sealing body 6, the following the adhesion between the electroless copper plated film process can be significantly improved.

無電解銅めっき工程としては、まず、アミノカルボン酸塩等の活性剤で樹脂表面の脱脂、コンディショニングを行う。 The electroless copper plating process, first, degreasing the resin surface, the conditioning carried out with an activator such as an amino acid salt. 次に、過硫酸ナトリウム、硫酸混合液で表面を軽くエッチングし、硫酸でスミアの除去を行う。 Next, sodium persulfate, lightly etching the surface with sulfuric acid mixture, to remove the smear with sulfuric acid. 次にパラジウムを樹脂表面に付与し、無電解銅めっき液で銅めっきを行い、約1μmの厚さの無電解銅めっき層からなる第1層7を形成する。 Then palladium was applied to the resin surface, subjected to copper plating in an electroless copper plating solution to form a first layer 7 consisting of the electroless copper plating layer having a thickness of about 1 [mu] m.

次に、図4(f)に示すように、ジエタノールアミン、硫酸混合液で表面を脱脂し、硫酸で表面を活性化した後、硫酸銅めっき液で電解銅めっきを行い、約1〜5μmの電解銅めっき層からなる第2層8を形成する。 Next, as shown in FIG. 4 (f), diethanolamine, degreased surface with sulfuric acid mixed solution, after activating the surface with sulfuric acid, subjected to electroless copper plating in the copper sulfate plating solution, about 1~5μm electrolyte forming the second layer 8 consisting of copper plating layer.

次に、図4(g)に示すように、ジエタノールアミン、硫酸混合液で表面を脱脂し、過硫酸ナトリウム、硫酸混合液で電解銅めっき層の表面を軽くエッチングし、銅めっき層上の酸化膜を除去した後、硫酸で酸活性し、電解錫めっきを行い、約1〜6μmの電解錫めっき層からなる第3層9を形成する。 Next, as shown in FIG. 4 (g), diethanolamine, degreased surface with sulfuric acid mixed solution, sodium persulfate, lightly etching the surface of the electrolytic copper plating layer with sulfuric acid mixed solution, the oxide film on the copper plating layer after removal of, and acid activity with sulfuric acid, subjected to the electroless tin plating, to form the third layer 9 consisting of the electroless tin plating layer of about 1 to 6 m.

尚、電解錫めっきを行うとき、錫めっき浴を周波数15〜60Hz超振動攪拌をすることにより、錫めっき浴の液流動性が良くなり、めっき析出速度が上がりめっき時間の短縮化が図れると共に、ハーフダイシングした封止体6−集合回路基板11の一部スリット部12へのめっきカバーリング性が著しく向上し、より電磁波シールド性効果が良くなる。 Incidentally, when performing electrolytic tin plating, by the frequency 15~60Hz ultrasonic vibration stirring tin plating bath, the better the liquid fluidity of the tin plating bath, with shortening the plating time plating deposition speed is increased can be reduced, plating covering property is remarkably improved to some slits 12 of sealing body 6 collective circuit board 11 which is half-dicing, more electromagnetic shielding effect is improved.

また、錫めっき層よりなる第3層9の形成品をピーク温度260℃のはんだリフロー炉に通すことにより、錫めっき層が溶融し、より緻密な皮膜となり、耐環境性が一段と向上した。 Further, by passing the formed article of the third layer 9 made of tin-plated layer on a solder reflow furnace of the peak temperature of 260 ° C., the tin plated layer is melted and becomes more dense film, environmental resistance was further improved.

第3層9の他の形成方法として、第2層8の電解銅めっき層の形成後、スルファミン酸ニッケルめっき液により1〜2μmの電解ニッケルめっき層を形成し環境試験(耐湿試験)を行ったところ、第1層7、第2層8を形成する銅の酸化が起こらずに電磁波シールド性の劣化は見られなかった。 Another method for forming the third layer 9, after the formation of the electrolytic copper plating layer of the second layer 8 were formed environmental testing electrolytic nickel plating layer of 1~2μm by nickel sulfamate plating solution (humidity resistance test) where, the first layer 7, the electromagnetic wave shielding property deterioration was observed regardless occur oxidation of the copper forming the second layer 8.

また、第3層9の他の形成方法として、第2層8の電解銅めっき層の形成後、水素化ホウ素ナトリウムを還元剤とする無電解Ni−B浴で無電解ニッケルめっき浴で、1〜2μmの無電解Ni−Bめっき層を形成し環境試験(耐湿試験)を行ったところ、第1層7、第2層8を形成する銅の酸化が起こらずに電磁波シールド性の劣化は見られなかった。 Further, as another method for forming the third layer 9, after the formation of the electrolytic copper plating layer of the second layer 8, in an electroless nickel plating bath in an electroless Ni-B bath of sodium borohydride as a reducing agent, 1 When forming an electroless Ni-B plating layer ~2μm were subjected to environmental test (humidity resistance test), a first layer 7, the electromagnetic wave shielding property deterioration without occur oxidation of the copper to form a second layer 8 viewed It is did not.

さらに、第3層9の他の形成方法として、第2層8の電解銅めっき層の形成後、次亜リン酸ナトリウムを還元剤とする無電解Ni−P浴で無電解ニッケルめっき浴で、1〜2μmの無電解Ni−Pめっき層を形成し環境試験(耐湿試験)を行ったところ、第1層7、第2層8を形成する銅の酸化が起こらずに電磁波シールド性の劣化は見られなかった。 Further, as another method for forming the third layer 9, after the formation of the electrolytic copper plating layer of the second layer 8, in an electroless nickel plating bath in an electroless Ni-P bath of sodium hypophosphite as a reducing agent, was carried out formed environmental testing an electroless Ni-P plating layer of 1 to 2 [mu] m (humidity resistance test), a first layer 7, the electromagnetic wave shielding property deterioration does not occur oxidation of the copper forming the second layer 8 It was not observed.

又、沿岸近くあるいは海上で使用される機器に電子部品パッケージを搭載する場合の評価として、塩水噴霧試験がある。 Further, as an evaluation of the case of mounting the electronic component package to devices used in coastal near or sea, there is a salt spray test. そこで、第3層9の皮膜について、塩水噴霧試験(72時間)を行ったところ、電解ニッケルめっき、無電解Ni−Bめっき、6%以下のPを含有する無電解ニッケルめっき層は低周波数域でおおよそ10dB、1000MHzで25dB程、電磁波シールド効果が低下した。 Therefore, the film of the third layer 9, was subjected salt spray test (72 hours), electroless nickel plating, electroless Ni-B plating, electroless nickel plating layer containing 6% or less P is low frequency range in approximately 10dB, about 25dB at 1000MHz, the electromagnetic wave shielding effect was reduced. しかし、6%以上のPを含有する無電解Ni−P層は電磁波シールド効果に変化が見られなかった。 However, the electroless Ni-P layer containing more than 6% of P is changed to the electromagnetic wave shielding effect was not observed.

従って、厳しい環境条件を要求される場合は、無電解Ni−Pめっき浴で形成した皮膜で、Pの含有量が6%を超える中P(P含有量6〜8%)、高P(P含有量8%以上)タイプのニッケルめっき皮膜が適している。 Therefore, severe if the environmental conditions are required, with a film formed by electroless Ni-P plating bath, P (P content 6% to 8%) in the content of P is more than 6%, a high P (P nickel plating film content more than 8%) type is suitable.

次の工程として、第3層9のめっき層を形成した後、100℃、1時間の熱処理を行う。 As a next step, after forming the plating layer of the third layer 9, performing 100 ° C., a heat treatment of 1 hour. このことにより、封止体6の樹脂とめっき層との密着性は良くなり、粘着テープによるクロスカット試験で良好な結果が得られた。 Thus, adhesion between the resin and the plating layer of the sealing body 6 is improved and good results have been obtained at a cross-cut test using an adhesive tape. また、めっき層の形成の最後である第3層9の形成後のみでなく、第1層7、第2層8の各めっき層形成後に100℃以上、1時間の熱処理を行うことにより更に密着性が向上した。 Moreover, not only after the formation of the third layer 9 which is the last formation of the plating layer, the first layer 7, the 100 ° C. or higher after the plating layer forming the second layer 8, further adhesion by heat treatment of 1 hour sex was improved.

上述の各工程を実施し、封止体6の外表面に第1層7としての無電解銅めっき層、第2層8としての電解銅めっき層、第3層9としての銅の酸化防止層からなる電磁波シールド層を形成する。 Performing the steps of the above, the electroless copper plating layer as the first layer 7 on the outer surface of the sealing body 6, the electroless copper plating layer as the second layer 8, oxidation-preventing layer of copper as a third layer 9 forming an electromagnetic wave shielding layer made of. この時、ハーフダイシングによって封止体6のスリット部12にもめっきが回り込んで、各単一回路基板毎に封止体6の周囲に電磁波シールド層2が形成されるために、電磁波シールド層2が接地用グランドパターン3の露出している集合回路基板11のグランドパターン露出部10にも付着し、電磁波シールド層2がシールド作用を発揮し、実装部品5を電界ノイズや磁界ノイズからシールドすることができる。 At this time, it flows around the plating in the slit portion 12 of the sealing body 6 by half-dicing, for electromagnetic shielding layer 2 is formed around the sealing body 6 for each single circuit board, the electromagnetic wave shielding layer 2 also adheres to the ground pattern exposure portion 10 of the collective circuit board 11 which is exposed grounding the ground pattern 3, the electromagnetic wave shielding layer 2 exerts a shielding effect, shielding the mounting part 5 from the electric field noise and magnetic noise be able to.

さらに、図4(h)に示すように、集合回路基板11の全面に無機質フィラー含有エポキシ樹脂を充填し、ハーフダイシングすることにより封止体6の各単一回路基板毎のスリット部12の周面を露出させ、一度に多数同時に電磁波シールド層2を形成することができる。 Furthermore, as shown in FIG. 4 (h), an inorganic filler-containing epoxy resin was filled into the entire surface of the collective circuit board 11, the peripheral of each single circuit slit portion 12 of each substrate of the sealing body 6 by half-dicing exposing the surface, a number can be simultaneously formed electromagnetic shielding layer 2 at a time.

そして、最後に集合回路基板11に想定されたダイシングに沿って再びダイシングし、各単一回路基板毎に完全に切り離して一つ一つの電子部品パッケージ14に分割する。 Finally, diced again along the dicing which is supposed to set the circuit board 11 is divided into each one of the electronic component package 14 completely disconnect each single circuit board.

なお、回路基板に設けたグランドパターンの形状及び一端部の露出個所は上記実施の形態に限定されない。 Incidentally, the exposure point of the shape and one end portion of the ground pattern provided on the circuit board is not limited to the above embodiment.

本発明にかかる電子部品パッケージ及びその製造方法は、封止体との密着性、耐環境性、電磁波シールド効果に優れ電磁波シールド層を有し、各種電子機器、通信機器等に用いられる電子部品パッケージ及びそのシールド層形成技術として有用である。 Electronic component package and a manufacturing method thereof according to the present invention, adhesion to the sealing body, environmental resistance, it has an electromagnetic wave shielding layer excellent in electromagnetic wave shielding effect, various electronic devices, an electronic component package for use in a communication device or the like and it is useful as a shield layer forming technique.

本発明の実施の形態1における電子部品パッケージの斜視図 Perspective view of an electronic component package according to the first embodiment of the present invention 同実施の形態1における電子部品パッケージの断面図 Sectional view of an electronic component package in the first same embodiment (a)〜(d)本発明の実施の形態2における電子部品パッケージの製造方法の各工程毎の断面図 (A) cross-sectional view of each step of a method for producing an electronic component package according to the second embodiment of ~ (d) the invention (e)〜(h)本発明の実施の形態2における電子部品パッケージの製造方法の各工程毎の断面図 (E) cross-sectional view of each step of a method for producing an electronic component package according to the second embodiment of ~ (h) invention 従来の電子部品パッケージの斜視図 Perspective view of a conventional electronic component package

符号の説明 DESCRIPTION OF SYMBOLS

1 回路基板 2 電磁波シールド層 3 グランドパターン 4 配線パターン 5 実装部品 6 封止体 7 第1層 8 第2層 9 第3層 10 グランドパターン露出部 11 集合回路基板 12 スリット部 13 表面粗化部 14 電子部品パッケージ 1 circuit board 2 electromagnetic wave shielding layer 3 ground patterns 4 wiring pattern 5 mounted part 6 package 7 the first layer 8 and the second layer 9 the third layer 10 ground pattern exposure portion 11 sets the circuit board 12 slit portion 13 surface roughening section 14 electronic component package

Claims (12)

  1. グランドパターンを有する回路基板と、この回路基板の上面に実装された電子部品からなる実装部品と、この実装部品を封止する無機質フィラーを含有するエポキシ樹脂からなる封止体と、この封止体の表面に形成した第1層としての無電解銅めっき層と、第2層としての電解銅めっき層と、第3層としての銅の酸化を防止する皮膜層からなるシールド層とからなり、このシールド層を前記グランドパターンに接地した電子部品パッケージ。 A circuit board having a ground pattern, and a mounting part made of electronic components mounted on the upper surface of the circuit board, a sealing body made of an epoxy resin containing an inorganic filler to seal the mounting part, the sealing body and electroless copper plating layer as a first layer formed on the surface of the electrolytic copper plating layer as a second layer, composed of a shield layer made of the coating layer to prevent oxidation of copper as a third layer, the electronic component package was grounded shield layer to the ground pattern.
  2. 皮膜層が錫めっき層からなる請求項1に記載の電子部品パッケージ。 Electronic component package according to claim 1 which coating layer consists of tin-plated layer.
  3. 皮膜層がニッケル、ニッケル−硼素またはニッケル−リンめっき層からなる請求項1に記載の電子部品パッケージ。 Nickel coating layer, a nickel - boron or nickel - electronic component package according to claim 1 consisting of phosphorus plating layer.
  4. グランドパターンを有する回路基板の上面に電子部品からなる実装部品を実装し、この実装部品を無機質フィラーを含有するエポキシ樹脂からなる封止体で封止し、この封止体の表面に無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程によりシールド層を形成し、このシールド層をグランドパターンに接地する電子部品パッケージの製造方法。 The upper surface of the circuit board having a ground pattern implements the mounting components made from the electronic component, the mounting component is sealed with a sealing body made of an epoxy resin containing an inorganic filler, electroless copper to the surface of the sealing body forming a first layer by plating, and forming a second layer by electrolytic copper plating, the shielding layer is formed by forming a third layer with a film to prevent oxidation of the copper, the shield layer method of manufacturing an electronic component package to be grounded to the ground pattern.
  5. グランドパターンを有する回路基板の上面に電子部品からなる実装部品を実装し、この実装部品を無機質フィラーを含有するエポキシ樹脂からなる封止体で封止し、この封止体の上からグランドパターンが露出するように前記回路基板の一部を切削してスリット部を形成し、上記封止体の表面および切削面に無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程によりシールド層を形成し、このシールド層をグランドパターンに接地する電子部品パッケージの製造方法。 The upper surface of the circuit board having a ground pattern implements the mounting components made from the electronic component, the mounting component is sealed with a sealing body made of an epoxy resin containing an inorganic filler, a ground pattern from the top of the sealing body by cutting a portion of the circuit board so as to expose a slit portion, and forming a first layer by electroless copper plating on the surface and the cutting surface of the sealing body, second by electrolytic copper plating process and the shield layer is formed by forming a third layer with a film to prevent oxidation of the copper, the method of manufacturing the electronic component package to ground the shield layer to the ground pattern to form a layer.
  6. 100℃以上の熱処理工程を無電解銅めっきで第1層を形成する工程と、電解銅めっきで第2層を形成する工程と、銅の酸化を防止する皮膜で第3層を形成する工程の少なくともいずれか1つの工程の後に設けた請求項4または請求項5に記載の電子部品パッケージの製造方法。 Forming a first layer of 100 ° C. or more heat treatment steps in an electroless copper plating, and forming a second layer by electrolytic copper plating, the step of forming a third layer with a film to prevent oxidation of the copper method of manufacturing an electronic component package according to claim 4 or claim 5 provided after at least one of the steps.
  7. 20μm以下の表面粗さを有する封止体に無電解銅めっき皮膜を形成する請求項4または請求項5に記載の電子部品パッケージの製造方法。 Method of manufacturing an electronic component package according to claim 4 or claim 5 to form an electroless copper plating film on the sealing member having a surface roughness of less than 20 [mu] m.
  8. 第2層が電解銅めっき、第3層が電解錫めっきの皮膜形成工程で、めっき液を一定の周波数で振動させる周波数15〜60Hz以下の超振動攪拌する請求項5に記載の電子部品パッケージの製造方法。 The second layer is an electrolytic copper plating, in the third layer is film-forming step of electroless tin plating, an electronic component package according to claim 5, ultra vibration stirring following frequency 15~60Hz vibrating the plating solution at a fixed frequency Production method.
  9. 第3層が無電解ニッケル−リンめっき皮膜形成工程で、ニッケルめっき皮膜中に6%以上のリンを含有させる請求項5に記載の電子部品パッケージの製造方法。 Third layer electroless nickel - phosphorus plating film formation method of manufacturing an electronic component package according to claim 5 which contains phosphorus at least 6% in the nickel plating film.
  10. 無電解銅めっき工程の前処理工程として、樹脂封止された電子部品を熱処理する工程と、封止体の表面の樹脂を粗化するエッチング工程と、封止体の表面の無機質フィラーを粗化するエッチング工程と、銅めっきを析出させるためのパラジウム付与工程と、銅を析出させる無電解銅めっき工程とを有する請求項4または請求項5に記載の電子部品パッケージの製造方法。 As a pretreatment step of the electroless copper plating step, roughening the step of heat treating the resin encapsulated electronic component, and an etching step of roughening the resin on the surface of the sealing body, the inorganic filler of the surface of the sealing body the method of manufacturing an electronic component package according to claim 4 or claim 5 comprising an etching step, and palladium providing step for depositing copper plating, the electroless copper plating process to deposit copper to.
  11. 樹脂封止された電子部品を熱処理する工程が封止体のガラス転移点(Tg)以上の熱処理である請求項10に記載の電子部品パッケージの製造方法。 Method of manufacturing an electronic component package according to claim 10 step is a heat treatment the glass transition point (Tg) or more of the sealing body of heat-treating the resin sealed electronic components.
  12. 封止体の樹脂表面の無機質フィラーを粗化するエッチング液がふっ化水素酸である請求項10に記載の電子部品パッケージの製造方法。 Method of manufacturing an electronic component package according to claim 10 etching solution is hydrofluoric acid to roughen the inorganic filler of the sealing body of the resin surface.
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