US20150144982A1 - Led package and manufacturing process of same - Google Patents
Led package and manufacturing process of same Download PDFInfo
- Publication number
- US20150144982A1 US20150144982A1 US14/611,683 US201514611683A US2015144982A1 US 20150144982 A1 US20150144982 A1 US 20150144982A1 US 201514611683 A US201514611683 A US 201514611683A US 2015144982 A1 US2015144982 A1 US 2015144982A1
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- United States
- Prior art keywords
- layer
- substrate
- positive
- led chip
- negative
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title abstract description 17
- 239000010410 layer Substances 0.000 claims abstract description 71
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000012790 adhesive layer Substances 0.000 claims abstract description 16
- 239000000835 fiber Substances 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 description 13
- 230000000694 effects Effects 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910001174 tin-lead alloy Inorganic materials 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/507—Wavelength conversion elements the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/508—Wavelength conversion elements having a non-uniform spatial arrangement or non-uniform concentration, e.g. patterned wavelength conversion layer, wavelength conversion layer with a concentration gradient of the wavelength conversion material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
Definitions
- the present invention relates generally to a light-emitting diode (LED) and more particularly, to an LED package and its manufacturing process.
- LED light-emitting diode
- a conventional manufacturing process of an LED package is to fasten an LED chip to a substrate, then to connect multiple wires to between the LED chip and the substrate by wire bonding, and finally to package the LED chip via an encapsulating member (e.g. epoxy resin).
- an encapsulating member e.g. epoxy resin
- Taiwan Patent Laid-open No. 20103858 disclosed that LED chips are mounted inside two substrates superposed on each other, and a single-sided or double-sided redistribution layer (RDL) is available, thus reducing the thickness of the whole package.
- RDL redistribution layer
- the primary objective of the present invention is to provide an LED package capable of decreasing production cost and package thickness.
- the LED package formed of a substrate, an LED chip, an insulated layer, and a fluorescent adhesive layer.
- the substrate includes a positive contact and a negative contact, both of which are located at the same side thereof.
- the LED chip is located on the substrate and includes a positive terminal and a negative terminal, the former of which is electrically connected with the positive contact and latter is electrically connected with the negative contact.
- the insulated layer is mounted to the substrate and surrounds the LED chip.
- the fluorescent adhesive layer is mounted to a surface of the insulated layer and covers the LED chip.
- the secondary objective of the present invention is to provide a manufacturing process of the LED package that can be effectively simplified.
- the manufacturing process including the steps of forming a cavity on a surface of the substrate; forming a solder mask layer on the surface of the substrate, the solder mask layer having such a first opening for exposing the cavity and a negative contact zone adjacent to the cavity; electroplating an electrically-conductive layer to the negative contact zone; removing the solder mask layer; forming an insulated layer on the surface of the substrate, the insulated layer having a second opening for exposing the cavity, the electrically-conductive layer, and a positive contact zone adjacent to the cavity; electroplating two solder layers to the positive contact zone and a surface of the electrically-conductive layer, respectively, to make the two solder layers become the positive contact and the negative contact, respectively; fastening the LED chip to the substrate via electrically-conductive adhesive mounted inside the cavity and making; hot-pressing the LED chip to melt the two solder layers to further fasten the positive and negative terminals of the LED chip to the positive and negative contacts; and dispose the fluorescent adhesive layer to the surface of
- the manufacturing process of the LED chip of the present invention can be completed with one single substrate, so compared with the conventional manufacturing process, the present invention can effectively reduce more production cost and more package size.
- FIG. 1 is a structural schematic view of a first preferred embodiment of the present invention.
- FIG. 2 is a flow chart of the first preferred embodiment of the present invention.
- FIG. 3 is a structural schematic view of a second preferred embodiment of the present invention.
- an LED package 10 constructed according to a first preferred embodiment of the present invention is formed of a substrate 20 , an LED chip 30 , an insulated layer 40 , and a fluorescent adhesive layer 50 .
- the detailed descriptions and operations of these elements as well as their interrelations are recited in the respective paragraphs as follows.
- the substrate 20 includes a fiber prepreg 21 , a first metallic layer 22 , and a second metallic layer 23 in this preferred embodiment.
- the fiber prepreg 21 is made of a composite material formed of glass fiber and epoxy resin.
- the first and second metallic layers 22 and 23 are adhered to a front side and a rear side of the fiber prepreg 21 , respectively.
- the substrate 20 further includes a positive contact 24 and a negative contact 25 .
- the positive and negative contacts 24 and 25 are mounted to a surface of the first metallic layer 22 to be located on the same side of the substrate 20 .
- the LED chip 30 is fixed to the surface of the first metallic layer 22 and includes a positive terminal 32 and a negative terminal 34 .
- the positive terminal 32 is electrically connected with the positive contact 24 of the substrate 20 and the negative terminal 34 is electrically connected with the negative contact 25 of the substrate 20 .
- the insulated layer 40 is disposed on the surface of the first metallic layer 22 and surrounds the LED chip 30 for providing protection of insulation for the positive and negative contacts 24 and 25 of the substrate 20 and the positive and negative terminals 32 and 34 of the LED chip 30 . It is worth mentioning that the insulated layer 40 is preferably white in color to prevent the insulated layer 40 from absorbing rays generated by the LED chip 30 to further prevent the absorption of the rays from adversely affecting the illumination.
- the fluorescent adhesive layer 50 is mounted to a surface of the insulated layer 40 and covers the LED chip 30 for enhancing the luminous efficiency of the LED chip 30 .
- the fluorescent adhesive layer 40 is made of epoxy resin and fluorescent power.
- a manufacturing process of the LED package 10 includes the following steps.
- S 7 Mount electrically-conductive adhesive 36 , e.g. silver paste, into the cavity 221 of the substrate 20 , fasten the LED chip 30 to the surface of the first metallic layer 22 via the electrically-conductive adhesive 36 , and make the positive and negative terminals 32 and 34 adhesively connected with the two solder mask layers, respectively.
- electrically-conductive adhesive 36 e.g. silver paste
- the package of the LED chip 30 of the present invention can be completed with one single substrate 20 .
- the LED package 10 of the present invention not only has the relatively simpler process but reduces the production cost and the package size.
- an LED package 60 constructed according to a second preferred embodiment of the present invention is similar to that of the first preferred embodiment of the present invention, having the primary difference lying in that the substrate 70 of the second preferred embodiment is structurally different from that of the first preferred embodiment.
- the substrate 70 includes a transparent layer 72 preferably made of polyethylene terephthalate (PET).
- PET polyethylene terephthalate
- a metallic layer 74 which is made of a copper foil, is adhered to a front side of the transparent layer 72 .
- An insulated layer 40 is coated onto a surface of the metallic layer 74 .
- a fluorescent adhesive layer 50 is coated to a surface of the insulated layer 40 .
- Another fluorescent adhesive layer 52 is coated to a rear side of the transparent layer 72 and made of epoxy resin and fluorescent powder for make the rays of the LED chip 30 emitted through front and rear sides of the substrate 70 . Since the manufacturing process of the LED package 70 further includes a step of coating the fluorescent adhesive layer 52 to the rear aside of the transparent layer 74 and the other steps are identical to those of the first preferred embodiment, detailed recitation of the manufacturing process of the second preferred embodiment is skipped.
- the LED package 60 includes the effect of double-sided illumination based on the transparent layer 72 and the two fluorescent adhesive layers 50 and 52 as well as the effects of reduced production cost and decreased package thickness.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
- Non-Portable Lighting Devices Or Systems Thereof (AREA)
Abstract
A LED package is formed of a substrate, an LED chip, an insulated layer, and a fluorescent adhesive layer. The substrate includes a positive contact and a negative contact. The LED chip is fixed to the substrate and includes a positive terminal and a negative terminal, the former of which is electrically connected with the positive contact and latter is electrically connected with the negative contact. The insulated layer is mounted to the surface of the substrate and surrounds the LED chip. The fluorescent adhesive layer is mounted to a surface of the insulated layer and covers the LED chip. In this way, the LED package can reduce the production cost and the whole size.
Description
- This application is a Divisional of co-pending application Ser. No. 14/072,245, filed on Nov. 5, 2013, for which priority is claimed under 35 U.S.C. §120; and this application claims priority of Application No. 102132666 filed in Taiwan, R.O.C. on Sep. 10, 2013, under 35 U.S.C. §119; the entire contents of all of which are hereby incorporated by reference.
- 1. Field of the Invention
- The present invention relates generally to a light-emitting diode (LED) and more particularly, to an LED package and its manufacturing process.
- 2. Description of the Related Art
- A conventional manufacturing process of an LED package is to fasten an LED chip to a substrate, then to connect multiple wires to between the LED chip and the substrate by wire bonding, and finally to package the LED chip via an encapsulating member (e.g. epoxy resin). However, such package fails to effectively reduce the whole thickness because of the connection of the wires and the requirement for circuit conduction, thus leading to insufficient competitivity in the market while it is applied to the products.
- To eliminate the aforesaid problem, Taiwan Patent Laid-open No. 20103858 disclosed that LED chips are mounted inside two substrates superposed on each other, and a single-sided or double-sided redistribution layer (RDL) is available, thus reducing the thickness of the whole package. However, the manufacturing process of this package is quite complicated and the effect of thickness reduction is actually limited, so it fails to indeed decrease the production cost and the thickness of the package.
- The primary objective of the present invention is to provide an LED package capable of decreasing production cost and package thickness.
- The foregoing objective of the present invention is attained by the LED package formed of a substrate, an LED chip, an insulated layer, and a fluorescent adhesive layer. The substrate includes a positive contact and a negative contact, both of which are located at the same side thereof. The LED chip is located on the substrate and includes a positive terminal and a negative terminal, the former of which is electrically connected with the positive contact and latter is electrically connected with the negative contact. The insulated layer is mounted to the substrate and surrounds the LED chip. The fluorescent adhesive layer is mounted to a surface of the insulated layer and covers the LED chip.
- The secondary objective of the present invention is to provide a manufacturing process of the LED package that can be effectively simplified.
- The foregoing objective of the present invention is attained by the manufacturing process including the steps of forming a cavity on a surface of the substrate; forming a solder mask layer on the surface of the substrate, the solder mask layer having such a first opening for exposing the cavity and a negative contact zone adjacent to the cavity; electroplating an electrically-conductive layer to the negative contact zone; removing the solder mask layer; forming an insulated layer on the surface of the substrate, the insulated layer having a second opening for exposing the cavity, the electrically-conductive layer, and a positive contact zone adjacent to the cavity; electroplating two solder layers to the positive contact zone and a surface of the electrically-conductive layer, respectively, to make the two solder layers become the positive contact and the negative contact, respectively; fastening the LED chip to the substrate via electrically-conductive adhesive mounted inside the cavity and making; hot-pressing the LED chip to melt the two solder layers to further fasten the positive and negative terminals of the LED chip to the positive and negative contacts; and dispose the fluorescent adhesive layer to the surface of the insulated layer to make the fluorescent adhesive layer cover the LED chip.
- In light of the above, the manufacturing process of the LED chip of the present invention can be completed with one single substrate, so compared with the conventional manufacturing process, the present invention can effectively reduce more production cost and more package size.
-
FIG. 1 is a structural schematic view of a first preferred embodiment of the present invention. -
FIG. 2 is a flow chart of the first preferred embodiment of the present invention. -
FIG. 3 is a structural schematic view of a second preferred embodiment of the present invention. - Structural features and desired effects of the present invention will become more fully understood by reference to two preferred embodiments given hereunder. However, it is to be understood that these embodiments are given by way of illustration only, thus are not limitative of the claim scope of the present invention.
- Referring to
FIG. 1 , anLED package 10 constructed according to a first preferred embodiment of the present invention is formed of asubstrate 20, anLED chip 30, aninsulated layer 40, and a fluorescentadhesive layer 50. The detailed descriptions and operations of these elements as well as their interrelations are recited in the respective paragraphs as follows. - The
substrate 20 includes afiber prepreg 21, a firstmetallic layer 22, and a secondmetallic layer 23 in this preferred embodiment. Thefiber prepreg 21 is made of a composite material formed of glass fiber and epoxy resin. The first and secondmetallic layers fiber prepreg 21, respectively. Thesubstrate 20 further includes apositive contact 24 and anegative contact 25. The positive andnegative contacts metallic layer 22 to be located on the same side of thesubstrate 20. - The
LED chip 30 is fixed to the surface of the firstmetallic layer 22 and includes apositive terminal 32 and anegative terminal 34. Thepositive terminal 32 is electrically connected with thepositive contact 24 of thesubstrate 20 and thenegative terminal 34 is electrically connected with thenegative contact 25 of thesubstrate 20. - The insulated
layer 40 is disposed on the surface of the firstmetallic layer 22 and surrounds theLED chip 30 for providing protection of insulation for the positive andnegative contacts substrate 20 and the positive andnegative terminals LED chip 30. It is worth mentioning that theinsulated layer 40 is preferably white in color to prevent theinsulated layer 40 from absorbing rays generated by theLED chip 30 to further prevent the absorption of the rays from adversely affecting the illumination. - The fluorescent
adhesive layer 50 is mounted to a surface of the insulatedlayer 40 and covers theLED chip 30 for enhancing the luminous efficiency of theLED chip 30. The fluorescentadhesive layer 40 is made of epoxy resin and fluorescent power. - Referring to
FIG. 2 , a manufacturing process of theLED package 10 includes the following steps. - S1: Etch the surface of the first
metallic layer 22 of thesubstrate 20 to form acavity 221. - S2: Coat a
solder mask layer 26 onto the surface of the firstmetallic layer 22 and make afirst opening 262 on thesolder mask layer 26 for exposing thecavity 221 and anegative contact zone 27 adjacent to thecavity 221 from thefirst opening 262. - S3: Electroplate an electrically-
conductive layer 28, which is preferably made of copper, to thenegative contact zone 27. - S4: Remove the
solder mask layer 26. - S5: Coat an
insulated layer 40 onto the surface of the firstmetallic layer 22 and make a second opening on theinsulated layer 40 for exposing thecavity 221, the electrically-conductive layer 28, and apositive contact zone 29 adjacent to thecavity 221 from thesecond opening 42. - S6: Electroplate two solder layers, each of which is preferably made of tin-lead alloy, to surfaces of the
positive contact zone 29 and the electrically-conductive layer 28, respectively to make the two solder layers become thepositive contact 24 and thenegative contact 25 of thesubstrate 20. - S7: Mount electrically-
conductive adhesive 36, e.g. silver paste, into thecavity 221 of thesubstrate 20, fasten theLED chip 30 to the surface of the firstmetallic layer 22 via the electrically-conductive adhesive 36, and make the positive andnegative terminals - S8: Hot-press the
LED chip 30 via a hot-pressingmember 38 to melt the solder mask layers to make thepositive terminal 32 fixedly connected with thepositive contact 24 and make thenegative terminal 34 fixedly connected with thenegative contact 25 to further complete the electrical connection between theLED chip 30 and thesubstrate 20. - S9: Coat a fluorescent
adhesive layer 50 to the surface of the insulatedlayer 40 and make the fluorescentadhesive layer 50cover LED chip 30. - In light of the steps mentioned above, the package of the
LED chip 30 of the present invention can be completed with onesingle substrate 20. Compared with the conventional wire bonding or the conventional layout of the two superposed substrates and the RDL, theLED package 10 of the present invention not only has the relatively simpler process but reduces the production cost and the package size. - Referring to
FIG. 3 , an LED package 60 constructed according to a second preferred embodiment of the present invention is similar to that of the first preferred embodiment of the present invention, having the primary difference lying in that thesubstrate 70 of the second preferred embodiment is structurally different from that of the first preferred embodiment. Specifically, thesubstrate 70 includes atransparent layer 72 preferably made of polyethylene terephthalate (PET). Ametallic layer 74, which is made of a copper foil, is adhered to a front side of thetransparent layer 72. An insulatedlayer 40 is coated onto a surface of themetallic layer 74. A fluorescentadhesive layer 50 is coated to a surface of the insulatedlayer 40. Another fluorescentadhesive layer 52 is coated to a rear side of thetransparent layer 72 and made of epoxy resin and fluorescent powder for make the rays of theLED chip 30 emitted through front and rear sides of thesubstrate 70. Since the manufacturing process of theLED package 70 further includes a step of coating the fluorescentadhesive layer 52 to the rear aside of thetransparent layer 74 and the other steps are identical to those of the first preferred embodiment, detailed recitation of the manufacturing process of the second preferred embodiment is skipped. - In conclusion, the LED package 60 includes the effect of double-sided illumination based on the
transparent layer 72 and the two fluorescentadhesive layers
Claims (5)
1. An LED package comprising:
a substrate having a positive contact and a negative contact, the positive and negative contacts being located at the same side of the substrate;
an LED chip mounted to the substrate and having a positive terminal and a negative terminal, the positive terminal being electrically connected with the positive contact of the substrate, the negative terminal being electrically connected with the negative contact of the substrate;
an insulated layer mounted to the substrate and surrounding the LED chip; and
a fluorescent adhesive layer mounted to a surface of the insulated layer and covering the LED chip.
2. The LED package as defined in claim 1 , wherein the substrate comprises a fiber prepreg, a first metallic layer, and a second metallic layer, the fiber prepreg having a front side and a rear side, the first and second metallic layers being mounted to the front and rear sides of the fiber prepreg, respectively, the positive and negative contacts being mounted to a surface of the first metallic layer.
3. The LED package as defined in claim 1 , wherein the substrate comprises a transparent layer and a metallic layer, the transparent layer having a front side and a rear side, the metallic layer being mounted to the front side of the transparent layer; the positive and negative contacts being mounted to the metallic layer.
4. The LED package as defined in claim 3 , wherein the transparent layer comprises another florescent layer mounted to the rear side thereof.
5. The LED package as defined in claim 1 , wherein the insulated layer is white in color.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/611,683 US20150144982A1 (en) | 2013-09-10 | 2015-02-02 | Led package and manufacturing process of same |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW102132666 | 2013-09-10 | ||
TW102132666A TW201511347A (en) | 2013-09-10 | 2013-09-10 | LED package structure and manufacturing method thereof |
US14/072,245 US8980659B1 (en) | 2013-09-10 | 2013-11-05 | LED package and manufacturing process of same |
US14/611,683 US20150144982A1 (en) | 2013-09-10 | 2015-02-02 | Led package and manufacturing process of same |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/072,245 Division US8980659B1 (en) | 2013-09-10 | 2013-11-05 | LED package and manufacturing process of same |
Publications (1)
Publication Number | Publication Date |
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US20150144982A1 true US20150144982A1 (en) | 2015-05-28 |
Family
ID=52624688
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/072,245 Active US8980659B1 (en) | 2013-09-10 | 2013-11-05 | LED package and manufacturing process of same |
US14/611,683 Abandoned US20150144982A1 (en) | 2013-09-10 | 2015-02-02 | Led package and manufacturing process of same |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
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US14/072,245 Active US8980659B1 (en) | 2013-09-10 | 2013-11-05 | LED package and manufacturing process of same |
Country Status (4)
Country | Link |
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US (2) | US8980659B1 (en) |
JP (1) | JP2015056654A (en) |
KR (1) | KR101509045B1 (en) |
TW (1) | TW201511347A (en) |
Cited By (1)
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US20210175279A1 (en) * | 2019-12-06 | 2021-06-10 | Samsung Display Co., Ltd. | Method for aligning a light-emitting element, method for fabricating a display device using the same and display device |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT513747B1 (en) * | 2013-02-28 | 2014-07-15 | Mikroelektronik Ges Mit Beschränkter Haftung Ab | Assembly process for circuit carriers and circuit carriers |
US9666516B2 (en) * | 2014-12-01 | 2017-05-30 | General Electric Company | Electronic packages and methods of making and using the same |
CN106816513B (en) * | 2015-11-30 | 2019-06-28 | 讯芯电子科技(中山)有限公司 | The encapsulating structure and its manufacturing method of LED chip |
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Also Published As
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US8980659B1 (en) | 2015-03-17 |
TW201511347A (en) | 2015-03-16 |
US20150069435A1 (en) | 2015-03-12 |
JP2015056654A (en) | 2015-03-23 |
KR20150029497A (en) | 2015-03-18 |
KR101509045B1 (en) | 2015-04-07 |
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