WO2022203452A1

WO2022203452A1 - Light-emitting diode package

Info

Publication number: WO2022203452A1
Application number: PCT/KR2022/004227
Authority: WO
Inventors: 민승구; 곽준식; 나정현; 박은지; 이영진
Original assignee: 서울바이오시스 주식회사
Priority date: 2021-03-25
Filing date: 2022-03-25
Publication date: 2022-09-29

Abstract

A light-emitting diode package comprises: a circuit board having an upper surface and a lower surface; a light-emitting diode element mounted on the circuit board and including an electrode section, a light emission structure, and a growth substrate; a partition wall part having an inner surface and an outer surface, provided around the light-emitting diode element, and having a cavity through which a mounting area of the circuit board is exposed; a coating layer arranged to surround at least a part of the light-emitting diode element. The coating layer may be formed to expose the upper surface of the growth substrate of the light-emitting diode element and surround the side surface of the electrode section of the light-emitting diode element.

Description

light emitting diode package

The present disclosure relates to a light emitting diode package.

A light emitting device containing a compound such as GaN or AlGaN has many advantages, such as having a wide and easily adjustable band gap energy, and thus can be used in various ways as a light emitting device, a light receiving device, and various diodes.

In particular, light emitting devices such as light emitting diodes or laser diodes can implement various colors such as red, green, blue, and ultraviolet light through the development of thin film growth technology and device materials. White light can also be implemented, and it has a longer lifespan, lower power consumption, and faster response speed than conventional light sources such as fluorescent lamps and incandescent lamps.

In addition, when a light receiving device such as a photodetector or a solar cell is manufactured using a semiconductor group 3-5 or group 2-6 compound semiconductor material, it absorbs light in various wavelength ranges through the development of the device material to reduce the photocurrent. By generating it, it is possible to use light in a range of wavelengths from gamma rays to radio wavelengths.

Therefore, the light emitting device is a light emitting diode backlight that replaces a cold cathode fluorescence lamp (CCFL) constituting a transmission module of an optical communication means, a backlight of an LCD display device, and a white light emitting diode lighting that can replace a fluorescent lamp or an incandescent light bulb. Applications are expanding to devices, automobile headlights and traffic lights, and sensors that detect gas or fire. In addition, the light emitting device can be applied to high-frequency application circuits, other power control devices, and communication modules.

In particular, a semiconductor device emitting light in the ultraviolet wavelength band may be used for curing, medical, and sterilization by curing or sterilizing.

On the other hand, although research on the UV light emitting diode package is active, the UV light emitting diode still has problems in that reliability and efficiency decrease over time.

An object of the present disclosure is to provide a light emitting diode package with improved moisture-proof performance of the light emitting diode package by protecting the light emitting diode device.

Another problem to be solved by the present disclosure is to provide a light emitting diode package capable of improving light extraction efficiency.

A light emitting diode package according to an embodiment of the present disclosure includes: a circuit board having an upper surface and a lower surface; a light emitting diode device mounted on the circuit board and including an electrode part, a light emitting structure, and a growth substrate; a barrier rib portion having an inner surface and an outer surface, provided around the light emitting diode element, and having a cavity exposing a mounting region of the circuit board; and a coating layer disposed to surround at least a portion of the light emitting diode device, wherein the coating layer exposes an upper surface of the growth substrate of the light emitting diode device and surrounds a side surface of the electrode portion of the light emitting diode device.

The coating layer may have a higher reflectance than the reflectance of the circuit board with respect to the light emitted from the light emitting diode device.

The coating layer may be formed at the same height as the height from the upper surface of the circuit board to the upper portion of the light emitting structure.

The coating layer may be formed to be higher than a height from the upper surface of the circuit board to an upper portion of the light emitting structure.

The coating layer may be formed to be lower than a height from the upper surface of the circuit board to an upper portion of the growth substrate.

The light emitted from the light emitting diode device may be ultraviolet light.

The coating layer may be formed in contact with the inner surface of the partition wall portion.

The coating layer may have a flat upper surface at least in part, and a curved surface inclined adjacent to the inner surface of the partition wall part.

A thickness of the coating layer in contact with the light emitting diode device may be smaller than a thickness of the coating layer in contact with the inner surface of the partition wall portion.

The coating layer may gradually decrease in thickness as it moves away from the light emitting diode device, and may form an inclined curved surface adjacent to the inner surface of the barrier rib part.

A thickness of the coating layer in contact with the light emitting diode device may be thicker than a thickness of the coating layer in contact with the inner surface of the partition wall portion.

The coating layer may include a thermosetting material.

A light emitting diode package according to another embodiment includes a circuit board having an upper surface and a lower surface; a light emitting diode device mounted on the circuit board and including an electrode part, a light emitting structure, and a growth substrate; a barrier rib portion having an inner surface and an outer surface, provided around the light emitting diode element, and having a cavity exposing a mounting region of the circuit board; and a coating layer disposed to surround at least a portion of the light emitting diode device, wherein a height from the top surface of the circuit board to the top surface of the coating layer is 6 μm to 420 μm.

A height from the top surface of the circuit board to the top surface of the coating layer may be 6 μm to 20 μm.

The coating layer may include a thermosetting material.

The light emitting diode package according to an embodiment of the present disclosure may protect the light emitting diode device and may have excellent moisture-proof effect.

In addition, the light emitting diode package according to an embodiment of the present disclosure may improve light extraction efficiency by improving reflectance with respect to ultraviolet light.

1A is a schematic plan view illustrating a light emitting diode package according to an embodiment of the present disclosure;

1B is a schematic plan view illustrating a light emitting diode package according to another embodiment of the present disclosure.

1C is a schematic partial cross-sectional view taken along line A-A' of FIG. 1A.

FIG. 2 is an enlarged partial cross-sectional view of the light emitting diode device of FIG. 1A.

3 is a schematic cross-sectional view for explaining a light emitting diode package according to another embodiment of the present disclosure.

4A is a schematic plan view illustrating a light emitting diode package according to another embodiment of the present disclosure.

4B is a schematic partial cross-sectional view taken along line B-B' of FIG. 4A.

5A is a schematic plan view illustrating a light emitting diode package according to another embodiment of the present disclosure.

FIG. 5B is a schematic partial cross-sectional view taken along line C-C′ of FIG. 5A .

Embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The embodiments introduced below are provided as examples so that the spirit of the present disclosure can be sufficiently conveyed to those skilled in the art to which the present disclosure pertains. Accordingly, the present disclosure is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. In addition, when one component is described as being “on” or “on” another component, each component is different from each component as well as when each component is “immediately above” or “directly on” the other component. It includes the case where another component is interposed between them. Like reference numerals refer to like elements throughout.

1A, 1B, 1C, and 2 are plan and cross-sectional views illustrating a light emitting diode package 1000 according to an embodiment of the present disclosure.

1A, 1B and 1C , a light emitting diode package 1000 according to an embodiment of the present disclosure includes a package body 100 , a circuit board 101 , an insulating part 103 , and a partition wall part 105 . ), a cavity 107 , a light emitting diode device 10 , a protection device 109 , and a coating part (or coating layer) 111 .

The package body 100 includes a circuit board 101 and a partition wall part 105 , the circuit board 101 may be disposed below the package body 100 , and the partition wall part 105 includes A cavity 107 may be formed around the upper surface of the circuit board 101 and surrounded by the partition wall 105 .

The circuit board 101 and the partition wall part 105 may include a metal or ceramic material, and may be made of different materials, but is not limited thereto. In addition, the circuit board 101 and the barrier rib part 105 may be integrally formed in a semiconductor device package, or may have a structure connected to each other. More specifically, the circuit board 101 may include an insulating substrate, a printed circuit board (PCB), or a metal substrate. The circuit board 101 may be an insulating substrate including a ceramic material. The ceramic material may include a low temperature co-fired ceramic (LTCC) or a high temperature co-fired ceramic (HTCC). For example, the circuit board 101 may include a ceramic material such as AlN. However, the present disclosure is not limited thereto, and the circuit board 101 may include other ceramic materials such as SiO ₂ , SixOy, Si ₃ N ₄ , SixNy, SiOxNy, Al ₂ O ₃ , and the like. The barrier rib part 105 may be formed of the same material as the circuit board 101 , but is not limited thereto.

A first electrode 101a and a second electrode 101b may be disposed on the upper and lower surfaces of the circuit board 101 . The first and

second electrodes

101a and 101b may supply power to the light emitting diode device 10 and the protection device 150 . The

electrodes

101a and 101b may include metal. For example, the

electrodes

101a and 101b may include gold (Au), silver (Ag), platinum (Pt), titanium (Ti), copper (Cu), nickel (Ni), tantalum (Ta), and tin. (Sn), aluminum (Al), tungsten (W), and palladium (pd) may be included. In addition, the metals may be formed in a single layer or in multiple layers. In this embodiment, the

electrodes

101a and 101b may be made of gold (Au), and when the light emitted from the light emitting structure 13 to be described later is light of an ultraviolet wavelength, the

electrodes

101a and 101b may have a reflectance of 20% to 45% with respect to the light of the ultraviolet wavelength.

The insulating part 103 may be disposed between the first electrode 101a and the second electrode 101b disposed on the upper surface of the circuit board 101 , and at least two side surfaces of the light emitting diode device and They may be arranged parallel to each other. Due to the disposition of the insulating part 103 , the first electrode 101a and the second electrode 101b may be separated and driven.

The insulating part 103 may be formed without an electrode formed on the upper surface of the circuit board 101 , but may be formed, but is not limited thereto. The insulating part 103 may be made of an insulating material. For example, PSR (Photoimageable Solder Resist), EMC, white silicone, silicone resin, epoxy resin, polyphthalamide (PPA), polycarbonate resin, polyphenylene sulfide (PPS), ABS resin, phenol resins and acrylic resins, and the like.

The barrier rib part 105 may have a lower surface contacting the upper surface of the circuit board 101 and an upper surface corresponding to the lower surface of the circuit board 101 . In addition, the partition wall part 105 may include an inner surface 105a forming the cavity 107 and an outer surface 105b forming an outer wall of at least a portion of the package body 100 .

The cavity 107 is defined by the inner surface 105a of the partition wall part 105 and may be variously changed according to the inner surface 105a of the partition wall part 105 . The inner surface 105a of the partition 105 may have four surfaces, but the present disclosure is not limited thereto, and the inner surface 105a of the partition 105 is formed in an even number of 4 or more. It can also be formed in the form of a circle. For example, as shown in FIG. 1B , the inner surface 105a of the partition 105 may include eight inner surfaces 105a.

The inner surface 105a of the partition wall part 105 may be vertically disposed from the top surface of the partition wall part 105 to the top surface of the circuit board 101 . However, the present disclosure is not limited thereto, and the inner surface 105a may be disposed with an inclination from the upper surface of the partition wall part 105 to the upper surface of the circuit board 101 . In addition, the width of the upper surface of the partition wall portion 105 may be formed to be narrower than the width of the lower surface. The inner surface 105a may diffusely reflect light generated and emitted from the light emitting diode device 10 to improve light extraction efficiency. In addition, a reflective material may be coated on the inner surface 105a to maximize light extraction efficiency.

An outer surface of the partition wall part 105 may constitute an outer wall of the package body 100 together with a side surface of the circuit board 101 . The width of the outer surface of the barrier rib part 105 may be the same as the width of the circuit board 101 , and accordingly, the outer surface of the barrier rib part 105 and the side surface of the circuit board 101 are It may be formed on the same line.

The upper surface of the partition wall part 105 may further include a metal. For example, the upper surface of the barrier rib part 105 may be gold (Au), silver (Ag), platinum (Pt), titanium (Ti), copper (Cu), nickel (Ni), tantalum (Ta), or tin. (Sn), aluminum (Al), tungsten (W), and palladium (pd) may be included. In the present embodiment, the upper surface of the barrier rib part 105 may be made of gold (Au), and may be formed simultaneously with the first and

second electrodes

101a and 101b of the circuit board 101 .

The light emitting diode device 10 may be disposed on the upper side of the circuit board 101 to be spaced apart from the partition wall part 105 in the cavity 107 . In the light emitting diode device 10 , a first electrode pad 31a and a second electrode pad 31b, which will be described later, and the first electrode 101a and the second electrode 101b are thermally sonic (TS) bonding. It can be bonded using technology. However, the present disclosure is not limited thereto, and bonding may be performed by various methods such as solder bonding and eutectic bonding.

Also, referring to FIG. 2 , the light emitting diode device 10 may include a growth substrate 11 , a light emitting structure 13 , and an electrode part 30 .

The growth substrate 11 is not limited as long as it is a substrate on which the light emitting structure 13 can be grown, and may include, for example, a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate. In addition, the growth substrate 11 may include a polar, non-polar, or semi-polar growth surface. In an embodiment of the present disclosure, the growth substrate 11 may be a sapphire substrate, but is not limited thereto.

The light emitting structure 13 may be formed as an upper surface of the growth substrate 11 . The light emitting structure 13 is formed between a first conductivity type semiconductor layer 13a and a second conductivity type semiconductor layer 13c and the first and second conductivity type semiconductor layers 13a and 13c to emit light. It may be a structure including the active layer 13b. The light emitting structure 13 may have a thickness of 3 μm to 10 μm, but the present disclosure is not limited thereto. Specifically, the light emitting structure 13 may have a thickness of 4 μm to 9 μm, and more specifically, a thickness of 5 μm to 7 μm.

The first conductivity-type semiconductor layer 13a is a nitride-based semiconductor layer doped with an n-type impurity, for example, a nitride semiconductor layer doped with Si, Ge, Se, Te, or C. Examples of the material of the first conductivity type semiconductor layer 13a include GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like.

The active layer 13b may be grown on the first conductivity-type semiconductor layer 13a, and the active layer 13b may have a single quantum well structure or a multiple quantum well (MQW) in which barrier layers and quantum well layers are alternately stacked. ) structure.

The second conductivity type semiconductor layer 13c may be grown on the active layer 13b. The second conductivity-type semiconductor layer 13c is a nitride-based semiconductor layer doped with p-type impurities, and may be formed of, for example, a semiconductor layer doped with p-type impurities such as Mg, Zn, Ca, Sr, and Ba. Examples of the material for the second conductivity type semiconductor layer include GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like.

The light emitting diode device 10 including the light emitting structure 13 may emit visible light, infrared light, and ultraviolet light. For example, the light emitting diode device 10 may emit light of about 200 nm to 420 nm as an ultraviolet light emitting diode device.

The light emitting structure 13 may form a mesa through a mesa etching process. In more detail, the second conductivity type semiconductor layer 13c and the active layer 13b may have a mesa structure and may be disposed on the first conductivity type semiconductor layer 13a. The mesa may include the active layer 13b and the second conductivity type semiconductor layer 13c, and may include at least a portion of the first conductivity type semiconductor layer 13a.

A first ohmic contact layer 21a may be formed on the first conductivity type semiconductor layer 13a, and a second ohmic contact layer 21b may be formed on the second conductivity type semiconductor layer 13b. have. A first capping electrode 23a covering the first ohmic contact layer 21a and a second capping electrode 23b covering the second ohmic contact layer 21b may be formed. A lower insulating layer 25 is formed on the first and

second capping electrodes

23a and 23b , and a first contact electrode 27a and a second contact electrode 27a and a second side surface are formed on at least a portion of the lower insulating layer 25 . A contact electrode 27b may be formed. In addition, an upper insulating layer 29 is formed on top and side surfaces of the first and

second contact electrodes

27a and 27b , and a first electrode pad 31a and a second electrode are formed on the upper insulating layer 29 . A pad 31b may be formed.

The first ohmic contact layer 21a may contact the first conductivity type semiconductor layer 13a. The first ohmic contact layer 21a may be formed to be spaced apart from the mesa by a predetermined interval. The first ohmic contact layer 21a may be formed by depositing a plurality of metal layers and then alloying the metal layers through a rapid thermal alloy (RTA) process. For example, after sequentially depositing Cr/Ti/Al/Ti/Au, the first ohmic contact layer 21a may be alloyed within seconds or tens of seconds at 935° C. by an RTA process. Accordingly, the first ohmic contact layer 21a may be an alloy layer containing Cr, Ti, Al, and Au. The thickness of the first ohmic contact layer 21a may be, for example, about 0.1 μm to 0.3 μm, but the present disclosure is not limited thereto.

The second ohmic contact layer 21b may contact the second conductivity type semiconductor layer 13b. The second ohmic contact layer 21b may be formed over almost the entire region of the upper region of the second conductivity-type semiconductor layer 13b. The second ohmic contact layer 21b may be formed by depositing a plurality of metal layers and then alloying the metal layers through a rapid thermal alloy (RTA) process. For example, after depositing Ni/Au, it may be formed through an RTA process at about 590° C. for about 80 seconds. The thickness of the second ohmic contact layer 21b may be about 0.05 μm to 0.1 μm, but the present disclosure is not limited thereto.

The first capping electrode 23a may be formed to cover an upper surface and a side surface of the first ohmic contact layer 21a, and the second capping electrode 23b may be formed to cover an upper surface of the second ohmic contact layer 21b. And it may be formed to cover the side. The first and

second capping electrodes

23a and 23b may be made of a metal material such as Au and may have a thickness of about 0.3 μm to 0.5 μm, but the present disclosure is not limited thereto. The first and

second capping electrodes

23a and 23b may protect the first and second ohmic contact layers 21a and 21b having a relatively thin thickness. In more detail, it is possible to prevent the first and second ohmic contact layers 21a and 21b from being etched when an etching process is performed to form the opening 25a of the lower insulating layer 25, which will be described later. have.

The lower insulating layer 25 covers upper surfaces and side surfaces of the first and

second capping electrodes

23a and 23b, and furthermore, the first conductivity type semiconductor layer 13a, the active layer 13b, and the second conductivity At least a portion of the type semiconductor layer 13c may be covered. The lower insulating layer 25 may have a first opening 25a exposing the first capping electrode 23a and a second opening 25b exposing the second capping electrode 23b. The openings 25a and 25b may be formed on the first and

second capping electrodes

23a and 23b. The openings 25a and 25b may be used as connection passages to allow the

contact electrodes

27a and 27b to connect to the ohmic contact layers 21a and 21b. The lower insulating layer 25 may be formed of SiO2, but is not limited thereto. The thickness of the lower insulating layer 25 may be, for example, about 1 μm to 2 μm.

The first contact electrode 27a and the second contact electrode 27b may be formed on the lower insulating layer 25 . The first contact electrode 27a and the second contact electrode 27b may cover the first and second openings 25a and 25b of the lower insulating layer 25 . The first contact electrode 27a may be connected to the first ohmic contact layer 21a through the first opening 25a of the lower insulating layer 25 , and the second contact electrode 27b may be connected to the lower part of the insulating layer 25 . It may be connected to the second ohmic contact layer 21b through the second opening 25b of the insulating layer 25 .

The first and

second contact electrodes

27a and 27b may be formed of a plurality of metal layers such as Ti, Ni, and Au. For example, the first and

second contact electrodes

27a and 27b may have a multilayer structure of Ti/Ni/Ti/Ni/Ti/Ni/Au/Ti. The first contact electrode 27a and the second contact electrode 27b may be formed together by the same process using the same material, and therefore, it can be said that these

contact electrodes

27a and 27b are located at the same level. have. Accordingly, the thicknesses of the

contact electrodes

27a and 27b may be the same, for example, about 0.5 μm to 1 μm.

The upper insulating layer 29 may be formed to cover upper surfaces and side surfaces of the first and

second contact electrodes

27a and 27b. The upper insulating layer 29 may have a first opening 29a exposing the first contact electrode 27a and a second opening 29b exposing the second contact electrode 27b.

The upper insulating layer 29 may be formed of a single layer of SiO2 or Si3N4, but is not limited thereto. For example, the upper insulating layer 29 may have a multilayer structure including SiO2 or Si3N4, and may include a distributed Bragg reflector in which SiO2 layers and TiO2 layers are alternately stacked. The thickness of the upper insulating layer 29 may be, for example, about 1 μm to 2 μm.

The first electrode pad 31a and the second electrode pad 31b may be formed to cover at least a portion of the upper insulating layer 29 . The first electrode pad 31a may electrically contact the first contact electrode 27a exposed through the first opening 29a of the upper insulating layer 29 , and the second electrode pad 31b ) may electrically contact the second contact electrode 27b exposed through the second opening 29b of the upper insulating layer 29 . The first and second electrode pads 31a and 31b may also be formed in the first and second openings 29a and 29b of the upper insulating layer 29 , respectively.

The first and second electrode pads 31a and 31b may be formed of a plurality of metal layers such as Ti, Ni, and Au. For example, the first and second electrode pads 31a and 31b may have a multilayer structure of Ti/Ni/Ti/Ni/Ti/Ni/Ti/Au. The first electrode pad 31a and the second electrode pad 31b may be formed together by the same process using the same material, and thus, these electrode pads 31a and 31b may be said to be located at the same level. have. Accordingly, the thicknesses of the electrode pads 31a and 31b may be the same, for example, about 2 μm to 3 μm.

Accordingly, in FIG. 2 , the thickness of the vertical distance from the second conductivity type semiconductor 13c to the first electrode pad 31a or the second electrode pad 31b is about 3 μm to 10 μm. can In addition, the thickness of the vertical distance from the lower surface of the light emitting structure 13 to the uppermost surface of the first electrode pad 31a or the second electrode pad 31b may be at least 6 μm, but the present disclosure is not limited thereto. not.

In one embodiment of the present disclosure, the light emitting diode device 10 is described with respect to which a device having a flip-chip structure is disposed, but the present disclosure is not limited thereto.

The protection element 109 may be disposed on the second electrode 101b in the cavity 107 . The protection element 109 is disposed to be spaced apart from the light emitting diode element 10 , and may protect the light emitting diode element 10 . The protection element 109 may include a Zener diode or a Transient Voltage Suppression (TVS) diode. The protection element 109 may be connected to the first electrode 101a through a wire (W). The thickness of the protection element 109 may be 110 μm to 130 μm, and the wire W may be disposed to be connected from the top surface of the protection device 109 to the top surface of the first electrode 101a.

The protection element 109 may prevent a failure of the light emitting diode package 1000 by preventing reverse voltage, static electricity, and surge current using a characteristic that the voltage is constant even when the current is changed.

The coating layer 111 may be formed on the upper surface of the circuit board 101 . In detail, the coating layer 111 may be formed to have a thickness lower than the thickness of the light emitting diode device 10 so that the upper surface of the light emitting diode device 10 is exposed, but the present disclosure is not limited thereto not. The coating layer 111 may be in contact with at least a portion of a side surface of the light emitting diode device 10 and may be formed in contact with at least a portion of a lower surface of the light emitting diode device 10 . In more detail, the coating layer 111 may be in contact with the side surface of the electrode part 30 of the light emitting diode device 10 , and may be formed to a thickness such that the side surface of the electrode part 30 is not exposed. That is, the coating layer 111 may be formed to have substantially the same height as the height from the upper surface of the circuit board 101 to the upper portion of the light emitting structure 13 of the light emitting diode device 10 . In this case, the side and top surfaces of the growth substrate 11 of the light emitting diode device 10 may be exposed to the air layer in the cavity 107 without contacting the coating layer 111 . Meanwhile, the present disclosure is not limited thereto, and the coating layer 111 is in contact with at least a portion of the side surface of the growth substrate 11 of the light emitting diode device 10 , and at least a portion of the side surface of the growth substrate 11 . It can be formed to a thickness that is not exposed. That is, the coating layer 111 may be formed to be higher than the height from the top surface of the circuit board 101 to the top of the light emitting structure 13 of the light emitting diode device 10 , but the coating layer 111 is the circuit board It is formed to be lower than the height from the top surface of 101 to the top of the growth substrate 11 of the light emitting diode device 10 . Accordingly, a portion of a side surface of the growth substrate 11 and an upper surface of the growth substrate 11 of the light emitting diode device 10 may be exposed to the air layer in the cavity 107 .

Also, the coating layer 111 may contact the side surface of the protection element 109 and at least a portion of the wire W.

The upper surface of the coating layer 111 may have at least a partially flat upper surface. In addition, until the coating solvent forming the coating layer 111 is cured, it may rise up on the side surface of the partition wall part 105 by surface tension. Accordingly, at least a portion of the coating layer 111 adjacent to the partition wall portion 105 may be formed to have a curved surface. The thickness t1 of the coating layer 111 in contact with the side surface of the barrier rib part 105 may be formed to be higher than the thickness t2 of the coating layer 111 in contact with the side surface of the light emitting diode device 10 .

A thickness of at least a portion of the coating layer 111 may be thicker than the total thickness of the electrode part 30 and the light emitting structure 13 of the light emitting diode device 10 , and the growth substrate of the light emitting diode device 10 . It can be formed by contacting the side of (11) with a minimum thickness. For example, the thickness of the electrode part 30 of the light emitting diode device 10 may be 3 μm to 10 μm, the thickness of the light emitting structure 13 may be 3 μm to 10 μm, and the growth substrate The thickness of (11) may be about 400 μm. Accordingly, the thickness of the coating layer 111 may be at least about 6 μm to 420 μm. Preferably, the thickness of the coating layer 111 may be about 6 μm to 30 μm, and more preferably, 6 μm to 15 μm. Accordingly, as shown in FIG. 1C , the upper surface of the coating layer 111 may be formed to contact the side surface of the growth substrate 11 at a position higher than the lower end of the growth substrate 11 .

The coating layer 111 may be formed of one or more of PSR (Photo Solder Resist) ink or silicon, and exposure printing may be performed without a separate solder resist solution, but the present disclosure is not limited thereto. In addition, the PSR ink may include a polyfunctional monomer, an epoxy resin, and an epoxy curing accelerator. In addition, the coating layer 111 may include a thermosetting resin. The material of the coating layer 111 may be doped, jetted, or dispensed. However, the present disclosure is not limited thereto, and the material of the coating layer 111 may be an ultraviolet curable resin material or a film-type material.

The coating layer 111 may be formed of a material having a reflectance higher than that of the

electrodes

101a and 101b of the circuit board 101 . For example, the coating layer 111 may have a reflectance of about 80% or more when the light extracted from the light emitting structure 13 is light of an ultraviolet wavelength. More specifically, the coating layer 111 may have a reflectance of about 90% or more in a wavelength range of 250 nm to 290 nm. Accordingly, the coating layer 111 may improve the reflectance of light extracted from the side surface of the light emitting structure 13 , thereby improving the light extraction efficiency of the light emitting diode package 1000 .

The coating layer 111 may serve to protect the light emitting diode device 10 by covering the side surface of the electrode part 30 and the side surface of the light emitting structure 13 of the light emitting diode device 10 . The coating layer 111 may block moisture penetrating into the light emitting diode device 10 , thereby improving moisture-proof performance of the light emitting diode package 1000 . Accordingly, the reliability of the light emitting diode package 1000 may be improved.

In addition, the coating layer 111 is formed in contact with at least a portion of the side surface of the growth substrate 11 of the light emitting diode device 10 , so that the light generated by the light emitting structure 13 is transmitted through the growth substrate 11 . When it is emitted, it is possible to improve the side and top extraction efficiency of light. Therefore, when the coating layer 111 is disposed in contact with the side surface of the growth substrate 11 of the light emitting diode device 10 to a minimum, in particular, the side surface of the growth substrate 11 of the light emitting diode device 10 is It is possible to increase the light extraction efficiency.

In one embodiment of the present disclosure, the light-emitting diode package that does not include the coating layer 111 and the light-emitting diode package surrounding the light emitting diode device 10 and having a molding layer may have superior light intensity and electrical characteristics change rate. .

Light quantity characteristics and electrical characteristics through reliability tests according to the above-described coating layer 111 and the growth substrate 11 are shown in Table 1 below. The reliability test was conducted in the light emitting diode package of each experimental group at a temperature of 60° C. and a humidity of 90%.

구분division	코팅층coating layer	몰딩층molding layer	성장 기판 노출growth Board exposure	실험 시간(hour)Experiment time (hour)
				500500		10001000
				광량amount of light	동작 전압operating voltage	광량amount of light	동작 전압operating voltage
비교예1Comparative Example 1	무radish	무radish	유you	85.5%85.5%	-1.9957V-1.9957V	84.5%84.5%	-2.1625V-2.1625V
비교예2Comparative Example 2	무radish	유you	무radish	71.8%71.8%	+0.0553V+0.0553V	NGNG	NGNG
실시예1Example 1	유you	무radish	유you	97.9%97.9%	+0.0036V+0.0036V	95.4%95.4%	+0.0105V+0.0105V

Referring to Table 1, the light quantity and the operating voltage may be expressed based on the initial values of each experimental group.

In the case of Comparative Example 1, when the experimental group did not include the coating layer 111 and the growth substrate 11 was exposed, and 500 hours of the experiment time elapsed, a decrease in the amount of light by 14.5% compared to the initial amount of light occurred, and 1.9957 compared to the initial operating voltage V is lowered. In addition, when 1000 hours of the experiment time elapsed, 15.5% of the light intensity decreased compared to the initial light amount, and 2.1625V was lowered compared to the initial operating voltage. As the operating voltage is lowered, it can be seen that a leakage current is generated in the light emitting diode package, thereby deteriorating reliability performance.

In the case of Comparative Example 2, the molding layer may be included, and the molding layer may be formed to cover the upper surface and side surfaces of the growth substrate 11 of the light emitting diode device 10 , and the light emitting diode device 10 . ) can be molded so as not to be exposed to the air layer. In addition, the material of the molding layer may be an acrylic, silicone, or urethane-based resin. Accordingly, light emitted from the light emitting diode device 10 may be absorbed by the molding layer, thereby reducing light extraction efficiency. In Comparative Example 2, when 500 hours of the experiment time elapsed, a 28.2% decrease in light intensity compared to the initial light amount occurred, and 0.0553V increased compared to the initial operating voltage. In addition, it can be seen that, when 1000 hours of the experiment time elapsed, cracks occurred in the molding layer, and reliability performance was lowered due to moisture permeation in the light emitting diode package.

Example 1 is according to an embodiment of the present disclosure, and when the experimental time of 500 hours has elapsed, Comparative Example 1 has a 12.4% higher rate of light decrease compared to Example 1, and a change value of the operating voltage is 1.9921V larger, Comparative Example 2 has a 26.1% higher rate of decrease in light intensity than Example 1, and has a larger difference of 0.0517V in the change value of the operating voltage.

Therefore, in one embodiment of the present disclosure, the light extraction efficiency can be improved by improving the light reduction rate, and it is seen that the difference in the change value of the operating voltage is small, and the light extraction efficiency is improved by the coating layer 111 It can be seen that the reliability is improved by reducing damage to the light emitting diode package 1000 due to moisture permeation.

In order to avoid duplication of description in the following other embodiments, the differences from the above-described embodiments will be mainly described, and the same components will be briefly described or omitted.

3 is a schematic cross-sectional view for explaining a light emitting diode package 2000 according to another embodiment of the present disclosure.

Referring to FIG. 3 , the light emitting diode package 2000 has the same configuration as that of FIG. 1C except for the coating layer 211 .

The upper surface of the coating layer 211 may have an asymmetrical concave shape. Accordingly, the coating layer 211 has a thickness t3 of the coating layer 211 in contact with the side surface of the barrier rib part 205 and a thickness t4 of the coating layer 211 in contact with the side surface of the light emitting diode device 40 . ) can be formed lower than In more detail, the coating layer 211 may form a downward slope as the thickness of the coating layer 211 decreases from the adjacent side surface of the light emitting diode device 40 toward the barrier rib portion 205 , and is adjacent to the barrier rib portion 205 . As the sun goes down, it can form an uphill slope. In other words, in the coating layer 211 , the inner portion in contact with the side surface of the light emitting diode device 40 may be formed to contact the side surface of the growth substrate 40 at a position higher than the lower end of the growth substrate 41 , and the coating layer The height of 211 may decrease from the inner portion toward the middle portion and then increase toward the outer portion in contact with the partition wall portion 205 . In addition, the height of the outer portion of the coating layer 211 may be lower than the height of the inner portion. This may be formed by riding up the side surface of the light emitting diode device 40 and the side surface of the barrier rib part 205 by surface tension until the coating solvent forming the coating layer 211 is cured. The shape of the coating layer 211 can be adjusted according to the application position and the amount of coating when the coating solvent is applied.

In addition, the thickness of the coating layer 211 in contact with the light emitting diode device 40 may be formed to be thicker than the total thickness of the electrode part 50 and the light emitting structure 43 of the light emitting diode device 40, The side surface of the growth substrate 41 of the diode device 40 may be formed in contact with a minimum thickness. For example, the thickness of the electrode part 50 may be 3 μm to 10 μm, the thickness of the light emitting structure 43 may be about 3 μm to 10 μm, and the thickness of the growth substrate 41 is It may be about 400 μm. Accordingly, the thickness t4 of the coating layer 211 may be at least 6 μm to 420 μm. Preferably, the thickness of the coating layer 211 may be about 8 μm to 30 μm, and more preferably, 10 μm to 15 μm.

As the thickness of the coating layer 211 becomes at least partially thinner toward the barrier rib portion 205 from the light emitting diode device 40 , the light emitted from the light emitting diode device 40 is transmitted to the coating layer 211 . By reducing the absorption, it is possible to increase the light extraction efficiency.

4A and 4B are schematic plan and cross-sectional views illustrating a light emitting diode package 3000 according to another embodiment of the present disclosure.

Referring to FIGS. 4A and 4B , the light emitting diode package 3000 has the same configuration as those of FIGS. 1A and 1C except for the coating layer 311 .

The coating layer 311 may have a shape concavely inclined toward the circuit board 301 from the side surface of the light emitting diode device 60 . Accordingly, the coating layer 311 may have the highest thickness t5 in contact with the side surface of the light emitting diode device 60 , and may gradually decrease toward the barrier rib portion 305 . In more detail, the coating layer 311 may be thinner from the adjacent side surface of the light emitting diode device 60 toward the barrier rib portion 305 and may be in contact with the upper surface of the circuit board 301 . . Accordingly, a top surface of at least a portion of the circuit board 301 may be exposed to the cavity 307 . The shape of the coating layer 311 can be adjusted according to the application position and the amount of coating when the coating solvent is applied.

The thickness of the coating layer 311 decreases from the light emitting diode device 60 toward the barrier rib portion 305 , and at least a portion of the circuit board 301 is exposed, so that in the light emitting diode device 60 , Absorption of emitted light by the coating layer 311 may be reduced to increase light extraction efficiency.

5A and 5B are schematic plan and cross-sectional views illustrating a light emitting diode package 4000 according to another embodiment of the present disclosure.

5A and 5B , the light emitting diode package 4000 has the same configuration as that of FIGS. 1A and 1B , and may further include a transparent part 420 .

A transparent part 420 may be further disposed on the body 400 . The transparent part 420 may have a lower surface of the transparent part 420 attached to the upper surface of the partition wall part 405 of the main body 400 . The side surface of the transparent part 420 may be disposed so as not to exceed the outer surface 405b of the partition wall part 405 . The upper and lower surfaces of the transparent part 420 may be flat. Also, the center of the transparent part 420 may overlap the optical axis of the light emitting diode device 80 .

The transparent part 420 may include a material capable of transmitting light emitted from the light emitting diode device 80 . The transparent part 420 may include a material such as silicon, epoxy, oxide, or nitride. Also, the transparent part 420 may include a glass material. For example, the transparent part 420 may be formed of a transparent material such as LiF, MgF ₂ , CaF ₂ , BaF ₂ , Al ₂ O ₃ , SiO ₂ or optical glass (N-BK7), and in the case of SiO ₂ , may be a quartz crystal.

Also, although not shown, an adhesive layer (not shown) may be disposed between the partition wall part 405 and the transparent part 420 . The adhesive layer may include at least one of a resin material such as silicone and epoxy, and a metal material. The amount of the adhesive layer applied may vary depending on the area of the upper surface of the barrier rib part 405 .

As the transparent part 420 is disposed, the cavity 407 may include an air gap. The air gap may mean a space filled with air, and one air gap may be formed over the entire area. However, the present invention is not limited thereto, and various gases other than air may be filled in the cavity 407 , such as nitrogen, or a polymer resin may be filled in the cavity 407 .

In the above, various embodiments of the present disclosure have been described, but the present disclosure is not limited only to the above embodiments. In addition, matters or components described with respect to one embodiment may be applied to other embodiments without departing from the spirit of the present disclosure.

Claims

In the light emitting diode package,

a circuit board having an upper surface and a lower surface;

a light emitting diode device mounted on the circuit board and including an electrode part, a light emitting structure, and a growth substrate;

a barrier rib portion having an inner surface and an outer surface, provided around the light emitting diode element, and having a cavity exposing a mounting region of the circuit board; and

a coating layer disposed to surround at least a portion of the light emitting diode device;

The coating layer exposes a top surface of the growth substrate and is formed to surround a side surface of the electrode part, a light emitting diode package.
The method of claim 1,

The coating layer has a higher reflectance than the reflectance of the circuit board with respect to the light emitted from the light emitting diode device,

light emitting diode package.
The method of claim 1,

The coating layer is formed at the same height as the height from the upper surface of the circuit board to the upper portion of the light emitting structure,

light emitting diode package.
The method of claim 1,

The coating layer is formed higher than the height from the upper surface of the circuit board to the upper portion of the light emitting structure,

light emitting diode package.
The method of claim 1,

The coating layer is formed lower than the height from the top surface of the circuit board to the top of the growth substrate,

light emitting diode package.
3. The method of claim 2,

The light emitted from the light emitting diode device is ultraviolet light,

light emitting diode package.
The method of claim 1,

The coating layer is formed in contact with the inner surface of the partition wall portion,

light emitting diode package.
The method of claim 1,

The coating layer has a flat upper surface at least in part, and forms an inclined curved surface adjacent to the inner surface of the partition wall part,

light emitting diode package.
The method of claim 1,

The thickness of the coating layer in contact with the light emitting diode device is formed to be thinner than the thickness of the coating layer in contact with the inner surface of the partition wall portion,

light emitting diode package.
The method of claim 1,

The coating layer gradually becomes thinner as it goes away from the light emitting diode device, and forms a curved surface inclined adjacent to the inner surface of the partition wall part,

light emitting diode package.
The method of claim 1,

The thickness of the coating layer in contact with the light emitting diode device is formed to be thicker than the thickness of the coating layer in contact with the inner surface of the partition wall portion,

light emitting diode package.
The method of claim 1,

The coating layer comprises a thermosetting material,

light emitting diode package.
In the light emitting diode package,

a circuit board having an upper surface and a lower surface;

a light emitting diode device mounted on the circuit board and including an electrode part, a light emitting structure, and a growth substrate;

a barrier rib portion having an inner surface and an outer surface, provided around the light emitting diode element, and having a cavity exposing a mounting region of the circuit board; and

a coating layer disposed to surround at least a portion of the light emitting diode device;

The height from the upper surface of the circuit board to the upper surface of the coating layer is 6㎛ to 420㎛,

light emitting diode package.
14. The method of claim 13,

The coating layer has a higher reflectance than the reflectance of the circuit board with respect to the light emitted from the light emitting diode device,

light emitting diode package.
14. The method of claim 13,

The height from the top surface of the circuit board to the top surface of the coating layer is 6 μm to 20 μm,

light emitting diode package.
15. The method of claim 14,

The light emitted from the light emitting diode device is ultraviolet light,

light emitting diode package.
14. The method of claim 13,

The coating layer is formed in contact with the inner surface of the partition wall portion,

light emitting diode package.
14. The method of claim 13,

The coating layer has a flat upper surface at least in part, and forms an inclined curved surface adjacent to the inner surface of the partition wall part,

light emitting diode package.
14. The method of claim 13,

The thickness of the coating layer in contact with the light emitting diode device is formed to be thinner than the thickness of the coating layer in contact with the inner surface of the partition wall portion,

light emitting diode package.
14. The method of claim 13,

The coating layer comprises a thermosetting material,

light emitting diode package.