US20130217169A1 - Bifacial solar cells with back surface doping - Google Patents

Bifacial solar cells with back surface doping Download PDF

Info

Publication number
US20130217169A1
US20130217169A1 US13/849,813 US201313849813A US2013217169A1 US 20130217169 A1 US20130217169 A1 US 20130217169A1 US 201313849813 A US201313849813 A US 201313849813A US 2013217169 A1 US2013217169 A1 US 2013217169A1
Authority
US
United States
Prior art keywords
front surface
depositing
back surface
boron doped
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/849,813
Inventor
Martin Kaes
Peter Borden
Kamel Ounadjela
Andreas Kraenzl
Alain Paul Blosse
Fritz G. Kirscht
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Silicor Materials Inc
Original Assignee
Silicor Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicor Materials Inc filed Critical Silicor Materials Inc
Priority to US13/849,813 priority Critical patent/US20130217169A1/en
Publication of US20130217169A1 publication Critical patent/US20130217169A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0684—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells double emitter cells, e.g. bifacial solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates generally to solar cells and, in particular, to an improved structure and manufacturing process for a bifacial solar cell.
  • Bifacial solar cells may use any of a variety of different designs to achieve higher efficiencies than those typically obtained by a conventional, monofacial solar cell.
  • One such design is shown in U.S. Pat. No. 5,665,175 which discloses a BSC configuration with first and second active regions formed on the front and back surfaces of the BSC, respectively, the two regions separated by a distance ⁇ .
  • the distance ⁇ allows a leakage current to flow between the first and second active regions, thus allowing a solar cell panel utilizing such bifacial cells to continue to operate even if one or more individual solar cells become shaded or defective.
  • U.S. Pat. No. 7,495,167 discloses an n + pp + structure and a method of producing the same.
  • the p + layer formed by boron diffusion, exhibits a lifetime close to that of the initial level of the substrate.
  • the '167 patent teaches that after phosphorous gettering, the cell must be annealed at a temperature of 600° C. or less for one hour or more.
  • the cell then undergoes a final heat treatment step in which the cell is fired at a temperature of around 700° C. or less for one minute or less.
  • U.S. Patent Application Publication No. 2005/0056312 discloses an alternative technique for achieving two or more p-n junctions in a single solar cell, the disclosed technique using transparent substrates (e.g., glass or quartz substrates).
  • the BSC includes two thin-film polycrystalline or amorphous cells formed on opposing sides of a transparent substrate. Due to the design of the cell, the high temperature deposition of the absorber layers can be completed before the low temperature deposition of the window layers, thus avoiding degradation or destruction of the p-n junctions.
  • a manufacturing method is provided that is comprised of the steps of depositing a boron doped layer onto the back surface of a p-type silicon substrate, depositing a back surface dielectric over the boron doped layer, diffusing phosphorous onto the front surface of the silicon substrate to form an n + layer and a front surface junction, removing the phosphor-silicate glass formed during the diffusion step (e.g., by etching with HF), depositing a front surface passivation and AR dielectric layer onto the n + layer, applying front and back surface contact grids, firing the front and back surface contact grids, and isolating the front surface junction, for example using a laser scriber.
  • the front and back surface contact grid firing steps may be performed simultaneously. Alternately, the back surface contact grid applying and firing steps may be performed prior to, or after, the front surface contact grid applying and firing steps.
  • the boron doped layer depositing step can be formed by depositing a boron doped silicon dioxide layer using CVD, depositing a boron doped polysilicon layer using CVD, depositing a boron doped amorphous silicon layer using PE-CVD, spray coating a boric acid solution onto the back surface of the substrate, spray/wipe coating a boron-doped spin-on glass onto the back surface of the substrate, or by other means.
  • the phosphorous diffusing step may be performed at a temperature in the range of 825° C. to 890° C. for a duration of approximately 10 to 20 minutes.
  • a bifacial solar cell (BSC) is provided that is comprised of a silicon substrate of a first conductivity type with a front surface active region of a second conductivity type and a back surface doped region of the first conductivity type, dielectric layers deposited on the front surface active region and on the back surface doped region, a front surface contact grid applied to the front surface passivation and AR dielectric layer which alloys through the front surface dielectric to the active region during firing, a back surface contact grid applied to the back surface dielectric layer which alloys through the back surface dielectric to the back surface doped region during firing, and a groove on the front surface of the silicon substrate, the groove isolating the front surface junction.
  • BSC bifacial solar cell
  • the silicon substrate may be comprised of p-type silicon, the active region may be comprised of n + material resulting from a phosphorous diffusion step, and the doped region may be comprised of a boron dopant.
  • the silicon substrate may be comprised of n-type silicon, the active region may be comprised of p + material resulting from a boron diffusion step, and the doped region may be comprised of a phosphorous dopant.
  • FIG. 1 illustrates a preferred embodiment of a BSC in accordance with the invention
  • FIG. 2 illustrates the process flow for the BSC of FIG. 1 ;
  • FIG. 3 illustrates an alternate process flow for the BSC of FIG. 1 .
  • FIG. 1 illustrates a cross-sectional view of a preferred bifacial solar cell (BSC) structure fabricated in accordance with the procedure described in FIGS. 2 and 3 .
  • Silicon substrate 101 may be of either p- or n-type. In the exemplary device and process illustrated in FIGS. 1-3 , a p-type substrate is used.
  • substrate 101 is prepared using any of a variety of well-known substrate preparatory processes (step 201 ).
  • saw and handling induced damage is removed via an etching process, for example using a nitric and hydrofluoric (HF) acid mixture.
  • the bottom surface of substrate 101 is doped, thereby forming a back surface doped region 103 (step 203 ).
  • Region 103 is doped with the same doping type as substrate 101 .
  • doped region 103 reduces back surface recombination and the effects of a positive potential in the back surface insulator to attract minority carriers to the back surface and thus away from the front surface collecting junction.
  • Region 103 can be formed using any of a variety of techniques. Exemplary techniques include, but are not limited to, chemical vapor deposition (CVD), plasma enhanced CVD (PE-CVD), spray coating, and spin coating. Accordingly, and assuming a p-type substrate, region 103 can be formed by depositing a boron doped polysilicon layer using CVD; depositing a boron doped silicon dioxide or amorphous silicon layer using PE-CVD; spray/spin coating a boric acid solution or doped spin-on glass onto the back surface of substrate 101 ; or by other means.
  • CVD chemical vapor deposition
  • PE-CVD plasma enhanced CVD
  • spray coating and spin coating. Accordingly, and assuming a p-type substrate, region 103 can be formed by depositing a boron doped polysilicon layer using CVD; depositing a boron doped silicon dioxide or amorphous silicon layer using PE-CVD; spray/spin coating a boric acid solution or doped spin-on glass onto
  • a dielectric layer 105 is deposited on the back surface of substrate 101 , specifically on top of doped region 103 as shown (step 205 ).
  • layer 105 is comprised of either silicon nitride or silicon dioxide, preferably deposited at a temperature of 300° C. to 400° C., and has a thickness of approximately 76 nanometers for silicon nitride or 100 nanometers for silicon dioxide.
  • layer 105 is comprised of silicon oxynitride.
  • layer 105 is comprised of a dielectric stack, for example 70 nanometers of silicon nitride on 10 nanometers of silicon dioxide or aluminum oxide.
  • phosphorous is diffused onto the front surface of substrate 101 , creating n + layer 107 and a p-n junction at the interface of substrate 101 and n + layer 107 (step 207 ).
  • n + layer 107 is formed using phosphoryl chloride (POCl 3 ), where the diffusion is performed at a diffusion temperature in the range of 825° C. to 890° C., preferably at a temperature of approximately 850° C., for 10 to 20 minutes in a nitrogen atmosphere (step 207 ). It will be appreciated that during the phosphorous diffusion step 207 , boron from region 103 is diffused into the back surface of substrate 101 to form a back surface field (BSF).
  • BSF back surface field
  • the phosphor-silicate glass (PSG) formed during diffusion step 207 is then etched away, for example using a hydrofluoric (HF) etch at or near room temperature for 1 to 5 minutes (step 209 ).
  • the front side junction has a depth of 0.3 to 0.6 microns and a surface doping concentration of about 8 ⁇ 10 21 /cm 3 .
  • a front surface passivation and anti-reflection (AR) dielectric layer 109 is deposited, layer 109 preferably being approximately 76 nanometers thick.
  • layer 109 is comprised of silicon nitride or silicon oxynitride.
  • layer 109 is deposited at a temperature of 300° C. to 400° C.
  • contact grids are applied to the front and back surfaces of BSC 100 (step 213 ), for example using a screen printing process.
  • front contact grid 111 is comprised of silver while back contact grid 113 is comprised of an aluminum-silver mixture.
  • both the front and back contact grids are aligned and use the same contact size and spacing, with electrodes being approximately 100 microns wide, 15 microns thick and spaced approximately 2.5 millimeters apart.
  • the back contact grid uses a finer spacing in order to lessen resistance losses from lateral current flow in the substrate.
  • a contact firing step 213 is performed, preferably at a peak temperature of 750° C.
  • FIG. 3 illustrates an alternate process for fabricating cell 100 . As illustrated, this process is identical to that shown in FIG. 2 , except that the front surface and back surface contact grids are applied and fired separately, thereby allowing different firing conditions to be used for each grid.
  • contact grid 113 is applied (step 301 ) and fired (step 303 ) first, followed by the application (step 305 ) and firing (step 307 ) of front contact grid 111 .
  • an n-type substrate may also be used with the invention.
  • an n-type dopant such as phosphorous
  • a p-type material such as boron

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes an active region located on the front surface of the substrate, formed for example by a phosphorous diffusion step. The back surface includes a doped region, the doped region having the same conductivity as the substrate but with a higher doping level. Contact grids are formed, for example by screen printing. Front junction isolation is accomplished using a laser scribe.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • This application is a Divisional of U.S. patent application Ser. No. 12/456,404, filed Jun. 15, 2009, which claims the benefit of the filing date of U.S. Provisional Patent Application Ser. No. 61/215,199, filed May 1, 2009, the disclosure of which is incorporated herein by reference for any and all purposes.
    • FIELD OF THE INVENTION
  • The present invention relates generally to solar cells and, in particular, to an improved structure and manufacturing process for a bifacial solar cell.
    • BACKGROUND OF THE INVENTION
  • Bifacial solar cells (BSC) may use any of a variety of different designs to achieve higher efficiencies than those typically obtained by a conventional, monofacial solar cell. One such design is shown in U.S. Pat. No. 5,665,175 which discloses a BSC configuration with first and second active regions formed on the front and back surfaces of the BSC, respectively, the two regions separated by a distance λ. The distance λ allows a leakage current to flow between the first and second active regions, thus allowing a solar cell panel utilizing such bifacial cells to continue to operate even if one or more individual solar cells become shaded or defective.
  • U.S. Pat. No. 7,495,167 discloses an n+pp+ structure and a method of producing the same. In the disclosed structure, the p+ layer, formed by boron diffusion, exhibits a lifetime close to that of the initial level of the substrate. In order to achieve this lifetime, the '167 patent teaches that after phosphorous gettering, the cell must be annealed at a temperature of 600° C. or less for one hour or more. In order to retain the lifetime recovered by the phosphorous and low-temperature born gettering steps, the cell then undergoes a final heat treatment step in which the cell is fired at a temperature of around 700° C. or less for one minute or less.
  • U.S. Patent Application Publication No. 2005/0056312 discloses an alternative technique for achieving two or more p-n junctions in a single solar cell, the disclosed technique using transparent substrates (e.g., glass or quartz substrates). In one disclosed embodiment, the BSC includes two thin-film polycrystalline or amorphous cells formed on opposing sides of a transparent substrate. Due to the design of the cell, the high temperature deposition of the absorber layers can be completed before the low temperature deposition of the window layers, thus avoiding degradation or destruction of the p-n junctions.
  • Although there are a variety of BSC designs and techniques for fabricating the same, these designs and techniques tend to be relatively complex, and thus expensive. Accordingly, what is needed is a solar cell design that achieves the benefits associated with bifacial solar cells while retaining the manufacturing simplicity of a monofacial solar cell. The present invention provides such a design.
    • SUMMARY OF THE INVENTION
  • The present invention provides a simplified manufacturing process and the resultant bifacial solar cell (BSC), the simplified manufacturing process reducing manufacturing costs. In at least one embodiment of the invention, a manufacturing method is provided that is comprised of the steps of depositing a boron doped layer onto the back surface of a p-type silicon substrate, depositing a back surface dielectric over the boron doped layer, diffusing phosphorous onto the front surface of the silicon substrate to form an n+ layer and a front surface junction, removing the phosphor-silicate glass formed during the diffusion step (e.g., by etching with HF), depositing a front surface passivation and AR dielectric layer onto the n+ layer, applying front and back surface contact grids, firing the front and back surface contact grids, and isolating the front surface junction, for example using a laser scriber. The front and back surface contact grid firing steps may be performed simultaneously. Alternately, the back surface contact grid applying and firing steps may be performed prior to, or after, the front surface contact grid applying and firing steps. The boron doped layer depositing step can be formed by depositing a boron doped silicon dioxide layer using CVD, depositing a boron doped polysilicon layer using CVD, depositing a boron doped amorphous silicon layer using PE-CVD, spray coating a boric acid solution onto the back surface of the substrate, spray/wipe coating a boron-doped spin-on glass onto the back surface of the substrate, or by other means. The phosphorous diffusing step may be performed at a temperature in the range of 825° C. to 890° C. for a duration of approximately 10 to 20 minutes.
  • In at least one embodiment of the invention, a bifacial solar cell (BSC) is provided that is comprised of a silicon substrate of a first conductivity type with a front surface active region of a second conductivity type and a back surface doped region of the first conductivity type, dielectric layers deposited on the front surface active region and on the back surface doped region, a front surface contact grid applied to the front surface passivation and AR dielectric layer which alloys through the front surface dielectric to the active region during firing, a back surface contact grid applied to the back surface dielectric layer which alloys through the back surface dielectric to the back surface doped region during firing, and a groove on the front surface of the silicon substrate, the groove isolating the front surface junction. The silicon substrate may be comprised of p-type silicon, the active region may be comprised of n+ material resulting from a phosphorous diffusion step, and the doped region may be comprised of a boron dopant. The silicon substrate may be comprised of n-type silicon, the active region may be comprised of p+ material resulting from a boron diffusion step, and the doped region may be comprised of a phosphorous dopant.
  • A further understanding of the nature and advantages of the present invention may be realized by reference to the remaining portions of the specification and the drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 illustrates a preferred embodiment of a BSC in accordance with the invention;
  • FIG. 2 illustrates the process flow for the BSC of FIG. 1; and
  • FIG. 3 illustrates an alternate process flow for the BSC of FIG. 1.
    •  DESCRIPTION OF THE SPECIFIC EMBODIMENTS
  • FIG. 1 illustrates a cross-sectional view of a preferred bifacial solar cell (BSC) structure fabricated in accordance with the procedure described in FIGS. 2 and 3. Silicon substrate 101 may be of either p- or n-type. In the exemplary device and process illustrated in FIGS. 1-3, a p-type substrate is used.
  • Initially, substrate 101 is prepared using any of a variety of well-known substrate preparatory processes (step 201). In general, during step 201 saw and handling induced damage is removed via an etching process, for example using a nitric and hydrofluoric (HF) acid mixture. After substrate preparation, the bottom surface of substrate 101 is doped, thereby forming a back surface doped region 103 (step 203). Region 103 is doped with the same doping type as substrate 101. Increasing the doping level of region 103, compared to substrate 101, lowers the contact resistance. Additionally, doped region 103 reduces back surface recombination and the effects of a positive potential in the back surface insulator to attract minority carriers to the back surface and thus away from the front surface collecting junction.
  • Region 103 can be formed using any of a variety of techniques. Exemplary techniques include, but are not limited to, chemical vapor deposition (CVD), plasma enhanced CVD (PE-CVD), spray coating, and spin coating. Accordingly, and assuming a p-type substrate, region 103 can be formed by depositing a boron doped polysilicon layer using CVD; depositing a boron doped silicon dioxide or amorphous silicon layer using PE-CVD; spray/spin coating a boric acid solution or doped spin-on glass onto the back surface of substrate 101; or by other means.
  • After formation of region 103, a dielectric layer 105 is deposited on the back surface of substrate 101, specifically on top of doped region 103 as shown (step 205). Preferably layer 105 is comprised of either silicon nitride or silicon dioxide, preferably deposited at a temperature of 300° C. to 400° C., and has a thickness of approximately 76 nanometers for silicon nitride or 100 nanometers for silicon dioxide. In an alternate embodiment, layer 105 is comprised of silicon oxynitride. In another alternate embodiment, layer 105 is comprised of a dielectric stack, for example 70 nanometers of silicon nitride on 10 nanometers of silicon dioxide or aluminum oxide.
  • After deposition of dielectric layer 105, phosphorous is diffused onto the front surface of substrate 101, creating n+ layer 107 and a p-n junction at the interface of substrate 101 and n+ layer 107 (step 207). Preferably n+ layer 107 is formed using phosphoryl chloride (POCl3), where the diffusion is performed at a diffusion temperature in the range of 825° C. to 890° C., preferably at a temperature of approximately 850° C., for 10 to 20 minutes in a nitrogen atmosphere (step 207). It will be appreciated that during the phosphorous diffusion step 207, boron from region 103 is diffused into the back surface of substrate 101 to form a back surface field (BSF). The phosphor-silicate glass (PSG) formed during diffusion step 207 is then etched away, for example using a hydrofluoric (HF) etch at or near room temperature for 1 to 5 minutes (step 209). In the preferred embodiment, the front side junction has a depth of 0.3 to 0.6 microns and a surface doping concentration of about 8×1021/cm3.
  • In step 211, a front surface passivation and anti-reflection (AR) dielectric layer 109 is deposited, layer 109 preferably being approximately 76 nanometers thick. In the exemplary embodiment, layer 109 is comprised of silicon nitride or silicon oxynitride. Preferably, layer 109 is deposited at a temperature of 300° C. to 400° C.
  • After deposition of the dielectric layer 109, contact grids are applied to the front and back surfaces of BSC 100 (step 213), for example using a screen printing process. In the exemplary embodiment, front contact grid 111 is comprised of silver while back contact grid 113 is comprised of an aluminum-silver mixture. In the preferred embodiment, both the front and back contact grids are aligned and use the same contact size and spacing, with electrodes being approximately 100 microns wide, 15 microns thick and spaced approximately 2.5 millimeters apart. In at least one alternate embodiment, the back contact grid uses a finer spacing in order to lessen resistance losses from lateral current flow in the substrate. Next, a contact firing step 213 is performed, preferably at a peak temperature of 750° C. for 3 seconds in air. As a result of this process, contacts 111 alloy through passivation and AR dielectric coating 109 to n+ layer 107. Similarly, contacts 113 alloy through dielectric coating 105 to layer 103. Lastly, the front junction is isolated, for example using a laser scriber to form a groove on the front cell surface around the periphery of the cell (step 217).
  • FIG. 3 illustrates an alternate process for fabricating cell 100. As illustrated, this process is identical to that shown in FIG. 2, except that the front surface and back surface contact grids are applied and fired separately, thereby allowing different firing conditions to be used for each grid. Preferably contact grid 113 is applied (step 301) and fired (step 303) first, followed by the application (step 305) and firing (step 307) of front contact grid 111.
  • As previously noted, an n-type substrate may also be used with the invention. In such an embodiment, an n-type dopant, such as phosphorous, is used for region 103 while a p-type material, such as boron, is diffused into the front surface to form the p-n junction at the interface of substrate 101 and diffused region 107.
  • As will be understood by those familiar with the art, the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof Accordingly, the disclosures and descriptions herein are intended to be illustrative, but not limiting, of the scope of the invention.

Claims (17)

1-20. (canceled)
21. A method of fabricating a bifacial solar cell (BSC), the method comprising the steps of:
depositing a boron doped layer on a back surface of a p-type silicon substrate;
depositing a back surface dielectric onto said boron doped layer;
diffusing phosphorous onto a front surface of said silicon substrate to form an n+ layer and a front surface junction;
removing a phosphor-silicate glass (PSG) formed during said phosphorous diffusing step;
depositing a front surface passivation and anti-reflection (AR) dielectric layer onto said n+ layer;
applying a back surface contact grid;
applying a front surface contact grid;
firing said back surface contact grid;
firing said front surface contact grid; and
isolating said front surface junction.
22. The method of claim 21, wherein said step of applying said back surface contact grid further comprises the step of screen printing said back surface contact grid, and wherein said step of applying said front surface contact grid further comprises the step of screen printing said front surface contact grid.
23. The method of claim 21, wherein said front surface junction isolating step further comprises the step of forming a groove on the front surface of the BSC with a laser scriber.
24. The method of claim 21, wherein said steps of firing said back and front surface contact grids are performed simultaneously.
25. The method of claim 21, wherein said step of firing said back surface contact grid is performed prior to said step of applying said front surface contact grid.
26. The method of claim 21, wherein said boron doped layer depositing step further comprises the step of depositing a boron doped silicon dioxide layer using chemical vapor deposition.
27. The method of claim 21, wherein said boron doped layer depositing step further comprises the step of depositing a boron doped silicon layer using chemical vapor deposition.
28. The method of claim 21, wherein said boron doped layer depositing step further comprises the step of depositing a boron doped amorphous silicon layer using plasma enhanced chemical vapor deposition.
29. The method of claim 21, wherein said boron doped layer depositing step further comprises the step of spraying a boric acid solution onto said back surface of said silicon substrate.
30. The method of claim 21, wherein said boron doped layer depositing step further comprises the step of spraying a boron doped spin-on glass onto said back surface of said silicon substrate.
31. The method of claim 21, wherein said PSG removing step further comprises the step of etching said front surface with a hydrofluoric etch.
32. The method of claim 21, further comprising the step of selecting said dielectric from the group consisting of silicon nitride, silicon dioxide and silicon oxynitride.
33. The method of claim 21, wherein said step of depositing said back surface dielectric onto said boron doped layer further comprises the step of depositing a dielectric stack onto said boron doped layer.
34. The method of claim 32, further comprising the step of selecting materials for said dielectric stack from the group consisting of silicon nitride, silicon dioxide and aluminum oxide.
35. The method of claim 21, wherein said phosphorous diffusing step is performed at a temperature of approximately 850° C. for a duration of approximately 10 to 20 minutes.
36. The method of claim 21, further comprising the step of selecting said front surface passivation and AR dielectric layer from the group consisting of silicon nitride and silicon oxynitride.
US13/849,813 2009-05-01 2013-03-25 Bifacial solar cells with back surface doping Abandoned US20130217169A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/849,813 US20130217169A1 (en) 2009-05-01 2013-03-25 Bifacial solar cells with back surface doping

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US21519909P 2009-05-01 2009-05-01
US12/456,404 US8404970B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface doping
US13/849,813 US20130217169A1 (en) 2009-05-01 2013-03-25 Bifacial solar cells with back surface doping

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US12/456,404 Division US8404970B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface doping

Publications (1)

Publication Number Publication Date
US20130217169A1 true US20130217169A1 (en) 2013-08-22

Family

ID=43029508

Family Applications (5)

Application Number Title Priority Date Filing Date
US12/456,378 Expired - Fee Related US8298850B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with overlaid back grid surface
US12/456,398 Abandoned US20100275995A1 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface reflector
US12/456,404 Expired - Fee Related US8404970B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface doping
US13/662,242 Abandoned US20130056061A1 (en) 2009-05-01 2012-10-26 Bifacial solar cells with overlaid back grid surface
US13/849,813 Abandoned US20130217169A1 (en) 2009-05-01 2013-03-25 Bifacial solar cells with back surface doping

Family Applications Before (4)

Application Number Title Priority Date Filing Date
US12/456,378 Expired - Fee Related US8298850B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with overlaid back grid surface
US12/456,398 Abandoned US20100275995A1 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface reflector
US12/456,404 Expired - Fee Related US8404970B2 (en) 2009-05-01 2009-06-15 Bifacial solar cells with back surface doping
US13/662,242 Abandoned US20130056061A1 (en) 2009-05-01 2012-10-26 Bifacial solar cells with overlaid back grid surface

Country Status (5)

Country Link
US (5) US8298850B2 (en)
EP (3) EP2425455A4 (en)
JP (3) JP2012525702A (en)
CN (3) CN102668114A (en)
WO (3) WO2010126572A2 (en)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8298850B2 (en) * 2009-05-01 2012-10-30 Silicor Materials Inc. Bifacial solar cells with overlaid back grid surface
KR102017558B1 (en) 2009-09-18 2019-09-03 신에쓰 가가꾸 고교 가부시끼가이샤 Solar cell, method for manufacturing solar cell, and solar cell module
TW201121066A (en) * 2009-12-14 2011-06-16 Ind Tech Res Inst Bificial solar cell
DE102010025983A1 (en) * 2010-03-03 2011-09-08 Centrotherm Photovoltaics Ag Solar cell with dielectric backside mirroring and process for its production
EP2423981B1 (en) * 2010-08-27 2018-11-28 LG Electronics Inc. Method of manufacturing solar cell electrodes by paste firing
KR101661768B1 (en) 2010-09-03 2016-09-30 엘지전자 주식회사 Solar cell and manufacturing method thereof
KR101699300B1 (en) * 2010-09-27 2017-01-24 엘지전자 주식회사 Solar cell and manufacturing method thereof
US20130133741A1 (en) * 2010-10-05 2013-05-30 Mitsubishi Electric Corporation Photovoltaic device and manufacturing method thereof
JP5430773B2 (en) * 2010-10-20 2014-03-05 三菱電機株式会社 Photovoltaic device and manufacturing method thereof
KR20120084104A (en) * 2011-01-19 2012-07-27 엘지전자 주식회사 Solar cell
CN102169923B (en) * 2011-03-05 2013-03-27 常州天合光能有限公司 Method for passivating P-type doping layer of N-type silicon solar cell and cell structure
KR101699299B1 (en) * 2011-03-29 2017-01-24 엘지전자 주식회사 Bifacial solar cell
KR20120140026A (en) * 2011-06-20 2012-12-28 엘지전자 주식회사 Solar cell
US20140158193A1 (en) * 2011-08-09 2014-06-12 Solexel, Inc. Structures and methods of formation of contiguous and non-contiguous base regions for high efficiency back-contact solar cells
TWI584485B (en) 2011-10-29 2017-05-21 西瑪奈米技術以色列有限公司 Aligned networks on substrates
CN102437238A (en) * 2011-11-30 2012-05-02 晶澳（扬州）太阳能科技有限公司 Method for boron doping of crystalline silicon solar battery
CN102437246B (en) * 2011-12-20 2013-12-25 日地太阳能电力股份有限公司 Preparation method of crystalline silicon solar cell
KR101776874B1 (en) * 2011-12-21 2017-09-08 엘지전자 주식회사 Solar cell
KR101838278B1 (en) * 2011-12-23 2018-03-13 엘지전자 주식회사 Solar cell
KR101329855B1 (en) * 2012-01-31 2013-11-14 현대중공업 주식회사 Method for fabricating bi-facial solar cell
KR101335082B1 (en) * 2012-02-01 2013-12-03 현대중공업 주식회사 Method for fabricating bi-facial solar cell
US20130199606A1 (en) * 2012-02-06 2013-08-08 Applied Materials, Inc. Methods of manufacturing back surface field and metallized contacts on a solar cell device
JP2013165160A (en) * 2012-02-10 2013-08-22 Shin Etsu Chem Co Ltd Method for manufacturing solar cell, and solar cell
KR20130096822A (en) 2012-02-23 2013-09-02 엘지전자 주식회사 Solar cell and method for manufacturing the same
US9379269B2 (en) 2012-02-29 2016-06-28 Bakersun Bifacial crystalline silicon solar panel with reflector
WO2013130448A1 (en) * 2012-02-29 2013-09-06 Bakersun Bifacial crystalline silicon solar panel with reflector
KR20140022515A (en) * 2012-08-13 2014-02-25 엘지전자 주식회사 Solar cell
US9190294B2 (en) * 2012-08-23 2015-11-17 Michael Xiaoxuan Yang Methods and apparatus for separating a substrate
EP2701204B1 (en) * 2012-08-24 2021-02-24 Industrial Technology Research Institute Solar cell module
TWI484115B (en) * 2012-08-31 2015-05-11 George Uh-Schu Liau A photovoltaic case
KR101372305B1 (en) * 2012-09-21 2014-03-14 영남대학교 산학협력단 Solar cell and the fabrication method thereof
US20140238478A1 (en) * 2013-02-28 2014-08-28 Suniva, Inc. Back junction solar cell with enhanced emitter layer
US20140361407A1 (en) * 2013-06-05 2014-12-11 SCHMID Group Silicon material substrate doping method, structure and applications
CN103367545A (en) * 2013-07-08 2013-10-23 浙江晶科能源有限公司 Method for synchronously implementing local contact and local doping at back of solar cell by utilizing laser
EP3047524B1 (en) * 2013-09-16 2020-11-04 Specmat Inc. Solar cell and method of fabricating solar cells
KR101627028B1 (en) * 2014-02-20 2016-06-03 제일모직주식회사 The method for preparing the bifacial solar cell
KR101627029B1 (en) * 2014-02-20 2016-06-03 제일모직주식회사 The method for preparing the ibc solar cell
DE102014105358A1 (en) * 2014-04-15 2015-10-15 Solarworld Innovations Gmbh Solar cell and method for producing a solar cell
US20160072000A1 (en) * 2014-09-05 2016-03-10 David D. Smith Front contact heterojunction process
CN105405924B (en) * 2014-11-28 2017-11-03 南昌大学 A kind of preparation method of the high square resistance doping crystal silicon layer of crystal silica-based solar cell
ES2852725T3 (en) 2015-01-26 2021-09-14 1366 Tech Inc To Create a Semiconductor Wafer That Has Profiled Doping
CN106159022B (en) * 2015-03-27 2018-03-27 比亚迪股份有限公司 A kind of crystal silicon solar cell sheet and preparation method thereof
US9525081B1 (en) * 2015-12-28 2016-12-20 Inventec Solar Energy Corporation Method of forming a bifacial solar cell structure
US10741703B2 (en) * 2016-07-29 2020-08-11 Sunpower Corporation Shingled solar cells overlapping along non-linear edges
CN106876519A (en) * 2017-01-20 2017-06-20 广东爱康太阳能科技有限公司 A kind of alundum (Al2O3) is passivated the two-sided crystal silicon solar batteries preparation method of N-type
CN107910398B (en) * 2017-10-12 2020-08-04 环晟光伏(江苏)有限公司 Manufacturing method of P-type PERC double-sided solar cell
CN107946390A (en) * 2017-12-04 2018-04-20 孙健春 It is a kind of that there is the solar cell and production method for changing power grid
CN109545886B (en) * 2018-10-22 2020-08-25 浙江光隆能源科技股份有限公司 Preparation method of half-chip polycrystalline solar cell
US11145509B2 (en) 2019-05-24 2021-10-12 Applied Materials, Inc. Method for forming and patterning a layer and/or substrate
AU2020284180A1 (en) * 2019-05-29 2022-01-27 Solaround Ltd. Bifacial photovoltaic cell manufacturing process
TWI718703B (en) * 2019-10-09 2021-02-11 長生太陽能股份有限公司 Solar cell and manufacturing method thereof
CN112466962B (en) * 2020-11-19 2021-11-23 晶科绿能(上海)管理有限公司 Solar cell

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030132498A1 (en) * 2002-01-16 2003-07-17 Hitachi, Ltd. Photovoltaic device and making of the same
US20050133084A1 (en) * 2003-10-10 2005-06-23 Toshio Joge Silicon solar cell and production method thereof
US20100012185A1 (en) * 2007-03-08 2010-01-21 Gebr. Schmid Gmbh & Co. Method for the Manufacture of a Solar Cell and the Resulting Solar Cell
US20110132423A1 (en) * 2006-10-11 2011-06-09 Gamma Solar Photovoltaic solar module comprising bifacial solar cells
US8192651B2 (en) * 2005-06-07 2012-06-05 E. I. du Pont de Nemours and Company Dupont (UK) Limited Aluminum thick film composition(s), electrode(s), semiconductor device(s), and methods of making thereof

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4166919A (en) * 1978-09-25 1979-09-04 Rca Corporation Amorphous silicon solar cell allowing infrared transmission
JPS58197717A (en) * 1982-05-13 1983-11-17 Toshiba Corp Preparation of semiconductor device
DE3815512C2 (en) * 1988-05-06 1994-07-28 Deutsche Aerospace Solar cell and process for its manufacture
JP2706113B2 (en) * 1988-11-25 1998-01-28 工業技術院長 Photoelectric conversion element
DK170189B1 (en) * 1990-05-30 1995-06-06 Yakov Safir Process for the manufacture of semiconductor components, as well as solar cells made therefrom
JP2994735B2 (en) * 1990-11-27 1999-12-27 シャープ株式会社 Solar cell
JPH08111537A (en) * 1994-10-07 1996-04-30 Sharp Corp Solar battery
DE19508712C2 (en) * 1995-03-10 1997-08-07 Siemens Solar Gmbh Solar cell with back surface field and manufacturing process
JP3342339B2 (en) * 1997-02-28 2002-11-05 三洋電機株式会社 Semiconductor integrated circuit and method of manufacturing the same
JP2999985B2 (en) * 1997-11-25 2000-01-17 シャープ株式会社 Solar cell
JP2000138386A (en) * 1998-11-04 2000-05-16 Shin Etsu Chem Co Ltd Manufacturing method of solar cell and solar cell manufactured by the method
JP2001044470A (en) * 1999-07-30 2001-02-16 Hitachi Ltd Solar battery, manufacture of the solar battery and condenser solar battery module
JP4812147B2 (en) * 1999-09-07 2011-11-09 株式会社日立製作所 Manufacturing method of solar cell
JP2002076400A (en) * 2000-08-30 2002-03-15 Shin Etsu Handotai Co Ltd Solar cell and manufacturing method thereof
JP2002198546A (en) * 2000-12-27 2002-07-12 Kyocera Corp Formation method for solar cell element
JP2002353475A (en) * 2001-05-29 2002-12-06 Kyocera Corp Solar battery element
CN100401532C (en) * 2001-11-26 2008-07-09 壳牌阳光有限公司 Manufacturing a solar cell with backside contacts
EP1378947A1 (en) * 2002-07-01 2004-01-07 Interuniversitair Microelektronica Centrum Vzw Semiconductor etching paste and the use thereof for localised etching of semiconductor substrates
US20050056312A1 (en) 2003-03-14 2005-03-17 Young David L. Bifacial structure for tandem solar cells
US7659475B2 (en) * 2003-06-20 2010-02-09 Imec Method for backside surface passivation of solar cells and solar cells with such passivation
JP4593980B2 (en) * 2004-03-29 2010-12-08 京セラ株式会社 Photoelectric conversion device, solar cell element using the same, and solar cell module
EP1763086A1 (en) * 2005-09-09 2007-03-14 Interuniversitair Micro-Elektronica Centrum Photovoltaic cell with thick silicon oxide and silicon nitride passivation and fabrication method
US7375378B2 (en) * 2005-05-12 2008-05-20 General Electric Company Surface passivated photovoltaic devices
JP2007096040A (en) * 2005-09-29 2007-04-12 Sharp Corp Solar cell and method of manufacturing solar cell
JP5409007B2 (en) * 2005-11-08 2014-02-05 エルジー・エレクトロニクス・インコーポレーテッド High efficiency solar cell and preparation method thereof
US20070107773A1 (en) 2005-11-17 2007-05-17 Palo Alto Research Center Incorporated Bifacial cell with extruded gridline metallization
CN101336465B (en) * 2005-11-24 2011-07-06 新南创新私人有限公司 Low area screen printed metal contact structure and method
US20070137699A1 (en) * 2005-12-16 2007-06-21 General Electric Company Solar cell and method for fabricating solar cell
NL2000248C2 (en) 2006-09-25 2008-03-26 Ecn Energieonderzoek Ct Nederl Process for the production of crystalline silicon solar cells with improved surface passivation.
JP4847889B2 (en) * 2007-02-13 2011-12-28 株式会社日立国際電気 Software defined radio
TWI335085B (en) * 2007-04-19 2010-12-21 Ind Tech Res Inst Bifacial thin film solar cell and method for fabricating the same
JP2009059833A (en) * 2007-08-31 2009-03-19 Hitachi Ltd Solar battery
CN100573928C (en) * 2007-10-08 2009-12-23 苏州阿特斯阳光电力科技有限公司 A kind of phosphorus diffusion method of making solar cell
WO2009052511A2 (en) * 2007-10-18 2009-04-23 Belano Holdings, Ltd. Mono-silicon solar cells
KR20090091562A (en) * 2008-02-25 2009-08-28 엘지전자 주식회사 Colar cell and mehtod for manufacturing the same
US20090211627A1 (en) * 2008-02-25 2009-08-27 Suniva, Inc. Solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivation
US8298850B2 (en) 2009-05-01 2012-10-30 Silicor Materials Inc. Bifacial solar cells with overlaid back grid surface

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030132498A1 (en) * 2002-01-16 2003-07-17 Hitachi, Ltd. Photovoltaic device and making of the same
US20050133084A1 (en) * 2003-10-10 2005-06-23 Toshio Joge Silicon solar cell and production method thereof
US8192651B2 (en) * 2005-06-07 2012-06-05 E. I. du Pont de Nemours and Company Dupont (UK) Limited Aluminum thick film composition(s), electrode(s), semiconductor device(s), and methods of making thereof
US20110132423A1 (en) * 2006-10-11 2011-06-09 Gamma Solar Photovoltaic solar module comprising bifacial solar cells
US20100012185A1 (en) * 2007-03-08 2010-01-21 Gebr. Schmid Gmbh & Co. Method for the Manufacture of a Solar Cell and the Resulting Solar Cell

Also Published As

Publication number Publication date
CN102656704A (en) 2012-09-05
EP2425455A2 (en) 2012-03-07
CN102668114A (en) 2012-09-12
WO2010126570A3 (en) 2011-02-03
WO2010126571A3 (en) 2011-01-20
CN102549765A (en) 2012-07-04
WO2010126572A3 (en) 2011-01-27
EP2425457A2 (en) 2012-03-07
US20100275995A1 (en) 2010-11-04
WO2010126571A2 (en) 2010-11-04
JP2012525703A (en) 2012-10-22
EP2425456A2 (en) 2012-03-07
US8404970B2 (en) 2013-03-26
US20130056061A1 (en) 2013-03-07
JP2012525702A (en) 2012-10-22
EP2425455A4 (en) 2013-08-07
EP2425457A4 (en) 2013-07-24
US8298850B2 (en) 2012-10-30
WO2010126570A2 (en) 2010-11-04
US20100275984A1 (en) 2010-11-04
JP2012525701A (en) 2012-10-22
EP2425456A4 (en) 2013-07-31
US20100275983A1 (en) 2010-11-04
WO2010126572A2 (en) 2010-11-04

Similar Documents

Publication Publication Date Title
US8404970B2 (en) Bifacial solar cells with back surface doping
US20230021009A1 (en) Front contact solar cell with formed emitter
US20170033251A1 (en) Front contact solar cell with formed electrically conducting layers on the front side and backside
KR101225978B1 (en) Sollar Cell And Fabrication Method Thereof
US20120003781A1 (en) Solar cell and method for manufacturing the same
JP2008519438A (en) Back contact solar cell
JP5737204B2 (en) Solar cell and manufacturing method thereof
CN114267753A (en) TOPCon solar cell, preparation method thereof and photovoltaic module
JP2003152205A (en) Photoelectric conversion element and its manufacturing method
KR20110047828A (en) Silicon heterojunction solar cell and method for fabricating the same
WO2016098368A1 (en) Method for producing photovoltaic device
CN115803894A (en) Manufacture of solar cells

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION