US20120313103A1 - Radioactive-ray imaging apparatus, radioactive-ray imaging display system and transistor - Google Patents

Radioactive-ray imaging apparatus, radioactive-ray imaging display system and transistor Download PDF

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US20120313103A1
US20120313103A1 US13/485,485 US201213485485A US2012313103A1 US 20120313103 A1 US20120313103 A1 US 20120313103A1 US 201213485485 A US201213485485 A US 201213485485A US 2012313103 A1 US2012313103 A1 US 2012313103A1
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insulation film
gate
transistor
semiconductor layer
electrode
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Yasuhiro Yamada
Ryoichi Ito
Tsutomu Tanaka
Makoto Takatoku
Michiru Senda
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Sony Corp
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Sony Corp
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Publication of US20120313103A1 publication Critical patent/US20120313103A1/en
Priority to US13/886,994 priority Critical patent/US9129871B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/611—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6723—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having light shields
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/026—Wafer-level processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
    • H10F39/1898—Indirect radiation image sensors, e.g. using luminescent members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/191—Photoconductor image sensors
    • H10F39/195—X-ray, gamma-ray or corpuscular radiation imagers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/805—Coatings
    • H10F39/8057—Optical shielding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors

Definitions

  • the present disclosure relates to a radioactive-ray imaging apparatus proper for X-ray imaging operations for typically medical cares and nondestructive inspections and relates to a radioactive-ray imaging display system employing such an apparatus as well as transistors employed in the apparatus and the system.
  • CMOS Complementary Metal Oxide Semiconductor
  • a radioactive-ray imaging apparatus for obtaining an image based on radioactive rays as an electrical signal without making use of a radioactive-ray photographic film is being developed as an imaging apparatus required to have an imaging area with a large size.
  • a typical example of the imaging apparatus required to have an imaging area with a large size is the X-ray imaging apparatus for taking an image of the chest of a human body.
  • Such a radioactive-ray imaging apparatus is an apparatus having a wavelength conversion layer (serving as a fluorescent material) on a circuit substrate including photoelectric conversion devices such as photodiodes and TFTs (thin-film transistors).
  • the radioactive-ray imaging apparatus After an incident radioactive ray has been converted into a visible ray, the visible ray is received by the photoelectric conversion device for converting the visible ray into an electrical signal. Then, a circuit employing the TFT reads out the electrical signal, the magnitude of which is determined by the quantity of the visible ray.
  • the transistor is created as follows. A plurality of layers are created on a substrate to form a laminated stack having the so-called top-gate structure or the so-called bottom-gate structure.
  • the layers include an electrode layer for the gate, source and drain electrodes of the transistor and the like, a semiconductor layer used for creating the channel of the transistor, a gate insulation film and an interlayer insulation film.
  • a silicon-oxide film is used as the gate insulation film in the transistor having such a structure for example, an X ray may propagate to the inside of the film. If an X ray propagates to the inside of the silicon-oxide film, holes are generated in the film so that a threshold voltage Vth of the transistor is shifted to the negative side as is generally known. (Refer to documents such as Japanese Patent Laid-open No. 2008-252074.)
  • the threshold voltage Vth is shifted in no small measure due to the effect of the holes generated in the silicon-oxide film by radiation of radioactive rays. It is thus desirable to repress such characteristic deteriorations attributed to radioactive rays in order to implement a transistor capable of demonstrating higher reliability.
  • a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film
  • source and drain electrodes provided by being electrically connected to the semiconductor layer
  • a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode.
  • At least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.
  • a radioactive-ray imaging apparatus has a pixel section including the transistor according to the embodiments of the present disclosure and a photoelectric conversion device.
  • the silicon-oxide film which is included in at least one of the first gate insulation film, the first interlayer insulation film, and the insulation film, is electrically charged with positive electrical charge of holes generated by radiation of radioactive rays to the silicon-oxide film and the positive electric charge shifts the threshold voltage Vth of the transistor.
  • a radioactive-ray imaging display system includes an imaging apparatus (that is, the radioactive-ray imaging apparatus according to the embodiments of the present disclosure) for acquiring an image based on radioactive rays and a display apparatus for displaying the image acquired by the imaging apparatus.
  • an imaging apparatus that is, the radioactive-ray imaging apparatus according to the embodiments of the present disclosure
  • a display apparatus for displaying the image acquired by the imaging apparatus.
  • At least one of the first gate insulation film and the first interlayer insulation film which are provided on the specific surface side of the semiconductor layer and the insulation film provided on the other surface side of the semiconductor layer include a silicon-oxide film.
  • the shield electrode layer provided in such a way that at least portions of the shield electrode layer face the edges of the first gate electrode.
  • FIG. 1 is a functional block diagram showing the whole configuration of a radioactive-ray imaging apparatus according to a first embodiment of the present disclosure
  • FIG. 2 is a model diagram showing a cross-sectional structure of a pixel section shown in FIG. 1 (as a section having an indirect conversion type);
  • FIG. 3 is a diagram showing a typical pixel circuit employed in the pixel section shown in FIG. 2 (to serve as an active-driven circuit);
  • FIG. 4 is a cross-sectional diagram showing a rough configuration of a transistor shown in FIG. 3 ;
  • FIGS. 5A to 5C are explanatory cross-sectional model diagrams to be referred to in description of a process sequence according to a method for manufacturing the transistor shown in FIG. 4 ;
  • FIGS. 5D to 5F are explanatory cross-sectional model diagrams showing a process sequence serving as the continuation of the process sequence described by referring to FIG. 5C ;
  • FIGS. 5G to 5H are explanatory cross-sectional model diagrams showing a process sequence serving as the continuation of the process sequence described by referring to FIG. 5F ;
  • FIG. 5I is an explanatory cross-sectional model diagram to be referred to in description of a process serving as the continuation of the process sequence described by referring to FIG. 5H ;
  • FIG. 6 is a model diagram showing a cross-sectional structure of a photodiode shown in FIG. 3 ;
  • FIG. 7 is an explanatory model diagram to be referred to in description of an effect given by positive electric charge in a typical comparison transistor
  • FIG. 8 is an explanatory model diagram to be referred to in description of an effect given by positive electric charge in the transistor shown in FIG. 4 ;
  • FIG. 9 is a diagram showing the effect of an X-ray radiation quantity on the current-voltage characteristic of the transistor shown in FIG. 4 ;
  • FIG. 10 is a characteristic diagram showing a relation between the X-ray radiation quantity and the threshold-voltage shift of the transistor shown in FIG. 4 ;
  • FIG. 11 is a characteristic diagram showing a relation between the X-ray radiation quantity and the S value in the current-voltage characteristic of the transistor shown in FIG. 4 ;
  • FIGS. 12A and 12B are cross-sectional diagrams showing a rough configuration of a transistor according to first typical modification
  • FIG. 13 is a cross-sectional diagram showing a rough configuration of a transistor according to a second embodiment of the present disclosure
  • FIG. 14 is an explanatory model diagram to be referred to in description of the effect of positive electric charge in the transistor shown in FIG. 13 ;
  • FIG. 15 is a diagram showing the effect of the X-ray radiation quantity on the current-voltage characteristic of the transistor shown in FIG. 13 ;
  • FIG. 16 is a characteristic diagram showing a relation between the X-ray radiation quantity and the threshold-voltage shift for each of the transistors shown in FIG. 13 ;
  • FIG. 17 is a characteristic diagram showing a relation between the X-ray radiation quantity and the S value in the current-voltage characteristic for each of the transistors shown in FIG. 13 ;
  • FIG. 18 is an explanatory cross-sectional diagram to be referred to in description of a rough configuration of the transistor according to second modification and the effect of positive electric charge in the transistor;
  • FIG. 19 is a cross-sectional diagram showing a rough configuration of a transistor according to third typical modification.
  • FIG. 20 is a cross-sectional diagram showing another example of the transistor shown in FIG. 19 ;
  • FIG. 21 is a cross-sectional diagram showing a rough configuration of a transistor according to fourth typical modification.
  • FIG. 22 is a cross-sectional diagram showing a rough configuration of a transistor according to fifth typical modification
  • FIG. 23 is a cross-sectional diagram showing a rough configuration of a transistor according to sixth typical modification.
  • FIGS. 24A and 24B are cross-sectional diagrams showing another rough configuration of the transistor shown in FIG. 23 ;
  • FIG. 25 is a cross-sectional diagram showing another rough configuration of the transistor shown in FIG. 23 ;
  • FIG. 26 is a cross-sectional diagram showing a rough configuration of a transistor according to seventh typical modification
  • FIGS. 27A and 27B are cross-sectional diagrams showing another rough configuration of the transistor shown in FIG. 26 ;
  • FIG. 28 is a cross-sectional diagram showing another rough configuration of the transistor shown in FIG. 26 ;
  • FIG. 29 is a diagram showing a typical example of a pixel driving circuit (also referred to as a passive driving circuit) according to eighth typical modification;
  • FIG. 30 is an explanatory model diagram to be referred to in description of a radioactive-ray imaging apparatus provided in accordance with ninth modification to serve as an apparatus having a direct conversion type;
  • FIG. 31 is a model diagram showing the whole configuration of a radioactive-ray imaging display system serving as a typical application.
  • FIG. 32 is a cross-sectional model diagram showing another typical shape of a gate electrode.
  • First Embodiment A radioactive-ray imaging apparatus designed into an indirect conversion type to employ a transistor in which portions of both the source and drain electrodes forming a pair are each used as a shield electrode layer
  • First Modification A typical configuration in which a portion of the drain electrode is used as a shield electrode layer
  • Second Embodiment A typical configuration in which a shield electrode layer is provided separately from a pair of source and drain electrodes
  • Second Modification A typical configuration in which a shield electrode layer is held at a negative electric potential
  • Sixth Modification A typical transistor having a top-gate structure
  • 11 Ninth Modification (A typical radio
  • FIG. 1 is a functional block diagram showing the whole configuration of a radioactive-ray imaging apparatus 1 according to a first embodiment of the present disclosure.
  • the radioactive-ray imaging apparatus 1 is the so-called indirect-conversion-type FPD (Flat Panel Detector) which receives radioactive rays after the rays have been subjected to a wavelength conversion process and obtains image information based on the radioactive rays as an electrical signal.
  • typical radioactive rays are the ⁇ , ⁇ , ⁇ and X rays.
  • the radioactive-ray imaging apparatus 1 is an X-ray imaging apparatus which is proper for mainly medical cares and other nondestructive inspections such as baggage inspections.
  • the radioactive-ray imaging apparatus 1 employs a pixel section 12 created on a substrate 11 and peripheral circuits (also referred to as driving circuits) provided in areas surrounding the pixel section 12 .
  • the peripheral circuits typically include a row scanning section 13 , a horizontal select section 14 , a column scanning section 15 and a system control section 16 .
  • the pixel section 12 is the imaging area of the radioactive-ray imaging apparatus 1 .
  • the pixel section 12 includes unit pixels P (each also referred to hereafter merely as a pixel P) which are laid out 2-dimesionally to form typically a pixel matrix.
  • the unit pixel P may also be referred to hereafter merely as a pixel P in some cases.
  • the unit pixels P are connected to pixel driving lines 17 .
  • two pixel driving lines 17 are connected to the unit pixels P on each pixel row in the pixel matrix.
  • the two pixel driving lines 17 connected to the unit pixels P on each pixel row are a row select line and a reset control line.
  • Every pixel P includes a photoelectric conversion device for generating electric charge having an amount according to the quantity of light incident to the pixel P and storing the electric charge internally in the pixel P.
  • the quantity of light incident to the pixel P is also referred to as a received-light quantity whereas the electrical charge is also referred to as an optical electric charge.
  • a photodiode 111 A to be explained later is used as the photoelectric conversion device cited above.
  • the two pixel driving lines 17 provided for every pixel row are stretched in the row direction.
  • the unit pixels P in the pixel section 12 are also connected to a vertical signal line 18 stretched in the column direction.
  • the pixel driving line 17 conveys a driving signal for reading out a signal from a pixel P connected to the pixel driving line 17 .
  • a pixel driving line 17 is shown as a line even though the pixel driving line 17 is by no means limited to one line.
  • One end of the pixel driving line 17 is connected to an output terminal of the row scanning section 13 .
  • This output terminal connected to a pixel driving line 17 is a terminal specially provided for a row along which the pixel driving line 17 is stretched.
  • the configuration of the pixel section 12 will be described later.
  • a scintillator layer 114 (serving as a wavelength conversion layer) is created on the pixel section 12 and is covered by a protection layer 115 .
  • the scintillator layer 114 carries out a wavelength conversion process to change the wavelength of an incident radioactive ray to a value in a sensitive region of the photodiode 111 A to be described later.
  • the scintillator layer 114 makes use of a fluorescent material for typically converting an X ray into a visible ray.
  • Typical examples of the fluorescent material are cesium iodide (CsI) doped with thallium (Tl), sulfur-cadmium oxide (Gd 2 O 2 S) doped with terbium (Tb) and BaFx (where X can be Cl, Br, I or the like).
  • a desirable thickness of the scintillator layer 114 is in a range of 100 microns to 600 microns. For example, the thickness of the scintillator layer 114 can be set at 600 microns.
  • Such a scintillator layer 114 can be created on a flattening film 113 typically by adoption of a vacuum evaporation
  • the protection layer 115 is typically an organic film made of parylene C or the like.
  • the fluorescent material such as particularly CsI
  • the protection layer 115 serving as a moisture barrier layer on the scintillator layer 114 .
  • the row scanning section 13 is configured to include a shift register and an address decoder.
  • the row scanning section 13 functions as a pixel driving section for driving the unit pixels P in the pixel section 12 in typically row units. Signals output by pixels P on a pixel row selected by the row scanning section 13 in a scanning operation are supplied to the horizontal select section 14 through the vertical signal lines 18 connected to the pixels P.
  • the horizontal select section 14 is configured to include amplifiers each provided for one of the vertical signal lines 18 and horizontal select switches also each provided for one of the vertical signal lines 18 .
  • the column scanning section 15 is configured to include a shift register and an address decoder.
  • the column scanning section 15 scans the horizontal select switches of the horizontal select section 14 in order to sequentially select the switches on a one-switch-after-another basis.
  • the column scanning section 15 scans and selects the horizontal select switches in order to supply the signals asserted by pixels P on the vertical signal lines 18 on a one-signal-after another basis on a horizontal select line 19 connected to sections external to the substrate 11 .
  • Circuit portions serving as the row scanning section 13 , the horizontal select section 14 , the column scanning section 15 and the horizontal select line 19 may be created directly above the substrate 11 or provided in an external control IC. As an alternative, these circuit portions can also be created on another substrate which is connected to the substrate 11 by a cable or the like.
  • the system control section 16 receives, among others, a clock signal from a source external to the substrate 11 and data specifying an operating mode. In addition, the system control section 16 outputs data such as internal information of the radioactive-ray imaging apparatus 1 . On top of that, the system control section 16 also has a timing generator for generating a variety of timing signals and carries out control to drive the peripheral circuits such as the row scanning section 13 , the horizontal select section 14 and the column scanning section 15 on the basis of the timing signals generated by the timing generator.
  • the pixel section 12 includes pixel circuits 12 a created on the substrate 11 .
  • the pixel circuit 12 a is shown in FIG. 3 .
  • Each of the pixel circuits 12 a employs a photodiode 111 A and transistors 111 B.
  • the photodiode 111 A and the transistors 111 B will be described later.
  • an organic insulation film serving as a flattening film not shown in the figure is typically provided on the pixel circuit 12 a .
  • a protection film also not shown in the figure may also be provided on the flattening film. Detailed configurations of components composing the pixel section 12 are explained as follows.
  • FIG. 3 is a diagram showing a typical pixel circuit 12 a in a photoelectric conversion layer 112 .
  • the pixel circuit 12 a employs a photodiode 111 A serving as the photoelectric conversion device mentioned before as well as transistors Tr 1 , Tr 2 and Tr 3 which are the transistors 111 B cited above.
  • the pixel circuit 12 a is connected to the vertical signal line 18 described before, a row select line 171 and a reset control line 172 which function as the pixel driving lines 17 .
  • the photodiode 111 A is typically a PIN (Positive Intrinsic Negative) diode.
  • the sensitive region of the photodiode 111 A is a visible-light region. That is to say, the received-light wavelength region of the photodiode 111 A is a visible-light region.
  • Vxref a reference electric potential
  • the photodiode 111 A When a reference electric potential Vxref is applied to a terminal 133 connected to a specific end of the photodiode 111 A, the photodiode 111 A generates signal electric charge having an amount corresponding to the quantity of light incident to the photodiode 111 A.
  • the other end of the photodiode 111 A is connected to an accumulation node N.
  • the accumulation node N has a capacitor 136 for accumulating the signal electric charge generated by the photodiode 111 A. Note that it is also possible to provide a configuration in which the photodiode 111 A is connected between the accumulation node N and the ground. A cross-sectional structure of the photodiode 111 A will be described later.
  • Each of the transistors Tr 1 , Tr 2 and Tr 3 is typically a FET (Field Effect Transistor) of N-type or P-type in which a semiconductor layer for channel creation is made typically from LTPS (Low-Temperature Polysilicon).
  • This semiconductor layer is a semiconductor layer 126 to be described later.
  • the material used for making the semiconductor layer does not have to be the LTPS.
  • the semiconductor layer can also be made of a silicon-group semiconductor such as microcrystal silicon or polysilicon.
  • the semiconductor layer can also be made of a semiconductor oxide such as indium-gallium-zinc oxide (InGaZnO) or zinc oxide (ZnO).
  • the transistor Tr 1 is a reset transistor connected between a terminal 137 for receiving a reference electric potential Vref and the accumulation node N.
  • the reset transistor Tr 1 When the reset transistor Tr 1 is turned on in response to a reset signal Vrst, the reset transistor Tr 1 resets the electric potential appearing at the accumulation node N to the reference electric potential Vref.
  • the transistor Tr 2 is a read transistor.
  • the gate electrode of the read transistor Tr 2 is connected to the accumulation node N whereas the drain electrode of the read transistor Tr 2 is connected to a terminal 134 which is connected to a power supply VDD.
  • the gate electrode of the read transistor Tr 2 receives a signal representing signal electric charge accumulated in the photodiode 111 A whereas the source electrode of the read transistor Tr 2 outputs a signal voltage according to the signal electric charge.
  • the transistor Tr 3 is a row select transistor connected between the source electrode of the read transistor Tr 2 and the vertical signal line 18 .
  • the row select transistor Tr 3 When the row select transistor Tr 3 is turned on in response to a row scanning signal Vread, the row select transistor Tr 3 passes on the signal appearing at the source electrode of the read transistor Tr 2 to the vertical signal line 18 .
  • the row select transistor Tr 3 it is also possible to provide a configuration in which the row select transistor Tr 3 is connected between the drain electrode of the read transistor Tr 2 and the power supply VDD whereas the source electrode of the read transistor Tr 2 is connected directly to the vertical signal line 18 .
  • FIG. 4 is a cross-sectional diagram showing a typical configuration of the transistor 111 B.
  • the transistor 111 B has the so-called dual-gate structure in which the two gate electrodes of the transistor 111 B sandwich a semiconductor layer 126 .
  • the transistor 111 B has a gate electrode 120 A in a selective area on a substrate 11 whereas a second gate insulation film 129 is provided to cover the gate electrode 120 A.
  • the semiconductor layer 126 is provided on the second gate insulation film 129 .
  • the semiconductor layer 126 includes a channel layer 126 a .
  • the semiconductor layer 126 also includes an LDD (Lightly Doped Drain) layer 126 b and an N + layer 126 c on each of the two edges of the channel layer 126 a .
  • a first gate insulation film 130 is provided to cover the semiconductor layer 126 .
  • a gate electrode 120 B is provided in a selective area on the first gate insulation film 130 .
  • the selective area on the first gate insulation film 130 is an area facing the gate electrode
  • a first interlayer insulation film 131 is created on the gate electrode 120 B. Holes H 1 are provided in portions of the first interlayer insulation film 131 and the first gate insulation film 130 . On the first interlayer insulation film 131 , a pair of source and drain electrodes 128 A and 128 B are provided on the first interlayer insulation film 131 to fill up such holes H 1 so that the source and drain electrodes 128 A and 128 B are electrically connected to the semiconductor layer 126 . A second interlayer insulation film 132 is provided on the source and drain electrodes 128 A and 128 B.
  • the gate electrode 120 B according to this embodiment is a concrete example of the first gate electrode according to the embodiment of the present disclosure whereas the gate electrode 120 A according to this embodiment is a concrete example of the second gate electrode according to the embodiment of the present disclosure.
  • the first gate insulation film 130 according to this embodiment is a concrete example of the first gate insulation film according to the embodiment of the present disclosure whereas the second gate insulation film 129 according to this embodiment is a concrete example of the insulation film according to the embodiment of the present disclosure.
  • the first interlayer insulation film 131 according to this embodiment is a concrete example of the first interlayer insulation film according to the embodiment of the present disclosure whereas the second interlayer insulation film 132 according to this embodiment is a concrete example of the second interlayer insulation film according to the embodiment of the present disclosure.
  • Each of the gate electrode 120 A and the gate electrode 120 B is a single-layer film or a multi-layer film and the film is made of a material such as titan (Ti), aluminum (Al), molybdenum (Mo), tungsten (W) or chrome (Cr).
  • the second gate insulation film 129 is sandwiched between the gate electrode 120 A and the semiconductor layer 126 whereas the first gate insulation film 130 is sandwiched between the semiconductor layer 126 and the gate electrode 120 B which faces the gate electrode 120 A.
  • the gate electrode 120 A and the gate electrode 120 B face each other in about the same area, sandwiching the channel layer 126 a .
  • Such a gate electrode 120 B is subjected to a patterning process by making use of typically the same photo mask as the gate electrode 120 A. However, it is desirable to provide an ideal configuration in which the gate electrode 120 B is provided right above the gate electrode 120 A.
  • each of the gate electrode 120 A and the gate electrode 120 B is in a range of 30 nm to 150 nm.
  • the thickness of the gate electrode 120 A is set at a typical value of 65 nm whereas the thickness of the gate electrode 120 B is set at a typical value of 90 nm.
  • Each of the second gate insulation film 129 and the first gate insulation film 130 is configured to include typically a silicon-oxide film.
  • the silicon-oxide film it is possible to make use of a silicon compound film including oxygen.
  • a typical example of the silicon compound film is a film made of silicon oxide (SiO 2 ) or silicon oxynitride (SiON).
  • each of the second gate insulation film 129 and the first gate insulation film 130 is a laminated film created as a stack from a film made of silicon oxide (SiO 2 ) and a film made of silicon nitride (SiN x ).
  • the second gate insulation film 129 is a laminated stack created by sequentially superposing a silicon-nitride film 129 A and a silicon-oxide film 129 B on the substrate 11 in the same order as the order in which the silicon-nitride film 129 A and the silicon-oxide film 129 B are enumerated in this sentence.
  • the first gate insulation film 130 is a laminated stack created by sequentially superposing a silicon-oxide film 130 A, a silicon-nitride film 130 B and a silicon-oxide film 130 C on the semiconductor layer 126 in the same order as the order in which the silicon-oxide film 130 A, the silicon-nitride film 130 B and the silicon-oxide film 130 C are enumerated in this sentence. That is to say, it is desirable to provide a configuration in which the silicon-oxide film 129 B and the silicon-oxide film 130 A are created in the vicinity of the semiconductor layer 126 and at locations sandwiching the semiconductor layer 126 . Such a configuration is provided in order to eliminate a threshold-voltage shift caused by the effect of a boundary-surface level on the semiconductor layer 126 .
  • the semiconductor layer 126 can be made of typically polysilicon, low-temperature polysilicon, microcrystal silicon or a non-crystal silicon. However, it is desirable to make the semiconductor layer 126 of low-temperature polysilicon. As an alternative, the semiconductor layer 126 can also be made of a semiconductor oxide such as indium-gallium-zinc oxide (IGZO).
  • IGZO indium-gallium-zinc oxide
  • the N′ layer 126 c is provided to serve as an area of connection with the source or drain electrode 128 A or 128 B.
  • the edge sides of the channel layer 126 a are edges on the source and drain sides.
  • the LDD layer 126 b is created between the channel layer 126 a and the N′ layer 126 c for the purpose of reducing the magnitude of a leak current.
  • Each of the source and drain electrodes 128 A and 128 B is capable of functioning as a source or drain electrode, making it possible to swap the functions of the source and drain electrodes with each other between the source and drain electrodes 128 A and 128 B.
  • any one of the source and drain electrodes 128 A and 128 B is functioning as a source electrode
  • the other of the source and drain electrodes 128 A and 128 B is functioning as a drain electrode.
  • Each of the source and drain electrodes 128 A and 128 B is a single-layer film or a multi-layer film and the film is made of a material such as titan (Ti), aluminum (Al), molybdenum (Mo), tungsten (W) or chrome (Cr).
  • the source and drain electrodes 128 A and 128 B are connected to wires for reading out signals.
  • the transistor 111 B is designed into a configuration in which the LDD layer 126 b is provided on each of the two sides of the channel layer 126 a.
  • each of the source and drain electrodes 128 A and 128 B is provided by being extended to an area facing an edge e 2 of the gate electrode 120 B.
  • each of the source and drain electrodes 128 A and 128 B is provided to overlap (or, strictly speaking, partially overlap) an area facing the edge e 2 of the gate electrode 120 B.
  • the portions facing the edges e 2 correspond to the shield electrode layers 128 a 1 and 128 b 1 respectively. That is to say, the portions facing the edges e 2 function also as the shield electrode layers 128 a 1 and 128 b 1 respectively.
  • the gate electrode 120 B is provided to face the gate electrode 120 A.
  • the channel layer 126 a is created in an area corresponding to the gate electrode 120 A in the semiconductor layer 126 , however, the source and drain electrodes 128 A and 128 B are provided to face channels edges e 1 . It is to be noted that, as described above, the LDD layer 126 b is provided on each of the two sides of the channel layer 126 a and, in this case, the shield electrode layers 128 a 1 and 128 b 1 are superposed also on the LDD layer 126 b.
  • the gate electrode 120 B has a taper portion on each of the side surfaces thereof. These taper portions are created inevitably in an etching process. If the gate electrode 120 B has such taper portions, the edges e 2 of the gate electrode 120 B are the bottom edges of the taper portions as shown in an enlarged diagram provided on the right bottom corner of FIG. 4 .
  • the shield electrode layers 128 a 1 and 128 b 1 function as electrical shields for reducing the effect of positive electric charge accumulated in the silicon-oxide film on the semiconductor layer 126 (or, particularly the channel layer 126 a ). At least, portions of the shield electrode layers 128 a 1 and 128 b 1 are provided to face the edges e 2 of the gate electrode 120 B. It is desirable to provide the shield electrode layers 128 a 1 and 128 b 1 in such a way that the distance d between the shield electrode layers 128 a 1 and 128 b 1 is smaller than the gate length L of the gate electrode 120 B.
  • the shield electrode layers 128 a 1 and 128 b 1 it is ideal to provide the gate electrode 120 B at the same position as the gate electrode 120 A. In actuality, however, the position of the gate electrode 120 B may be shifted from the position of the gate electrode 120 A in some cases. The shift of the position of the gate electrode 120 B from the position of the gate electrode 120 A is referred to as an adjustment shift.
  • the shield electrode layers 128 a 1 and 128 b 1 cover the taper portions of the gate electrode 120 B, the effect of holes serving as positive electric charge on the channel layer 126 a can be reduced even in the case of such an adjustment shift.
  • the lower limit of the distance d between the shield electrode layers 128 a 1 and 128 b 1 is not limited to any value in particular. If the shield electrode layers 128 a 1 and 128 b 1 are too close to each other, however, problems such as a short circuit are raised. It is thus nice to set the position of an edge e 3 by taking these problems into consideration.
  • the shield electrode layers 128 a 1 and 128 b 1 are provided on the first interlayer insulation film 131 as portions of the source and drain electrodes 128 A and 128 B as described above.
  • each of the first interlayer insulation film 131 and the second interlayer insulation film 132 is configured as a single-layer film or a multi-layer film and the film is typically a silicon-oxide film, a silicon-oxynitride film or a silicon-nitride film.
  • the first interlayer insulation film 131 is a laminated stack including the silicon-oxide film 131 a and the silicon-nitride film 131 b which are sequentially created above the substrate 11 in the same order as the order in which the silicon-oxide film 131 a and the silicon-nitride film 131 b are enumerated in this sentence.
  • the second interlayer insulation film 132 is a silicon-oxide film. It is to be noted that the layer of a portion of the transistor 111 B is common to the photodiode 111 A to be described later. That is to say, the layer of the portion of the transistor 111 B is created in the same thin-film process as the photodiode 111 A. Thus, as long as the second interlayer insulation film 132 in the photodiode 111 A is concerned, from the viewpoint of an etching select ratio used at the fabrication time, it is desirable to make use of a silicon-oxide film rather than a silicon-nitride film as the second interlayer insulation film 132 .
  • FIGS. 5A to 5I are explanatory cross-sectional model diagrams to be referred to in the following description of a process sequence according to a method for manufacturing the transistor 111 B.
  • the gate electrode 120 A is created on the substrate 11 .
  • a film made of a high-melting-point metal such as Mo has been created on the substrate 11 by adoption of typically a sputtering method
  • the film is subjected to a patterning process adopting typically a photolithography method to form an island shape.
  • the second gate insulation film 129 is created.
  • the silicon-nitride film 129 A and the silicon-oxide film 129 B are created sequentially and continuously to cover the gate electrode 120 A on the substrate 11 in the same order as the order in which the silicon-nitride film 129 A and the silicon-oxide film 129 B are enumerated in this sentence by adoption of typically the CVD method for creating the second gate insulation film 129 having a thickness determined in advance.
  • an amorphous silicon layer that is, an ⁇ -Si layer 1260 to be used as the semiconductor layer 126 is created by adoption of typically the CVD method.
  • the created ⁇ -Si layer 1260 is subjected to a multi-crystallization process in order to create the semiconductor layer 126 .
  • the ⁇ -Si layer 1260 is subjected to a dehydrogenation treatment (or an annealing process) in order to decrease the hydrogen content to a value not exceeding 1%.
  • a laser beam having a typical wavelength of 308 nm is radiated to the ⁇ -Si layer 1260 in order to convert the ⁇ -Si layer 1260 into a multi-crystal layer.
  • the multi-crystal layer is doped with typically boron in order to adjust the threshold voltage Vth so as to create the semiconductor layer 126 .
  • ions are injected into predetermined areas of the semiconductor layer 126 obtained as a result of the multi-crystallization process in order to create the LDD layer 126 b and the N′ layer 126 c in each of the predetermined areas.
  • the first gate insulation film 130 is created.
  • the silicon-oxide film 130 A, the silicon-nitride film 130 B and the silicon-oxide film 130 C are continuously created as films each having a predetermined thickness in the same order as the order in which the silicon-oxide film 130 A, the silicon-nitride film 130 B and the silicon-oxide film 130 C are enumerated in this sentence by adoption of typically the CVD method to form the first gate insulation film 130 covering the semiconductor layer 126 .
  • the thicknesses of the silicon-oxide film 130 A, the silicon-oxide film 130 C and the silicon-oxide film 129 B of the second gate insulation film 129 described above are set at such values that the sum of the thicknesses of the silicon-oxide film 130 A, the silicon-oxide film 130 C and the silicon-oxide film 129 B of the second gate insulation film 129 is not greater than 65 nm. It is also worth noting that, after the first gate insulation film 130 has been created, contact holes are created in advance for electrically connecting the gate electrode 120 A to the gate electrode 120 B which is created in a process described below. However, the process of creating the contact holes is shown in none of the figures.
  • the gate electrode 120 B is created on the first gate insulation film 130 .
  • a film made of a high-melting-point metal such as Mo has been created on the substrate 11 by adoption of typically a sputtering method
  • the film is subjected to a patterning process adopting typically a photolithography method to form an island shape.
  • the gate electrode 120 B is subjected to a patterning process by making use of typically the same photo mask as the gate electrode 120 A.
  • the silicon-oxide film 131 a and the silicon-nitride film 131 b are continuously created by adoption of typically the sputtering method in the same order as the order in which the silicon-oxide film 131 a and the silicon-nitride film 131 b are enumerated in this sentence in order to create the first interlayer insulation film 131 .
  • the contact holes H 1 are created to penetrate the created first interlayer insulation film 131 and the created first gate insulation film 130 till the surface of the semiconductor layer 126 by carrying out typically an etching process.
  • the source and drain electrodes 128 A and 128 B are created to fill up the holes H 1 by adoption of typically the sputtering method and then subjected to a patterning process to form predetermined shapes of the source and drain electrodes 128 A and 128 B.
  • a gap or a separation groove
  • the source and drain electrodes 128 A and 128 B are created to function also as the shield electrode layers 128 a 1 and 12 bb 1 .
  • a silicon-oxide layer or the like is created to serve as the second interlayer insulation film 132 on the source and drain electrodes 128 A and 128 B as well as the first interlayer insulation film 131 by adoption of typically the CVD method.
  • the creation of the second interlayer insulation film 132 completes the transistor 111 B shown in FIG. 4 .
  • FIG. 6 is a model diagram showing a typical cross-sectional configuration of the photodiode 111 A.
  • the photodiode 111 A is provided on the substrate 11 along with the transistor 111 B.
  • a portion of the stack structure is common to the transistor 111 B and is created by carrying out the same thin-film process as the transistor 111 B.
  • the detailed configuration of the photodiode 111 A is explained as follows.
  • the photodiode 111 A has a p-type semiconductor layer 122 in a selective area on a substrate 11 .
  • the p-type semiconductor layer 122 and the selective area sandwich a gate insulation layer 121 a .
  • a first interlayer insulation film 121 b having a contact hole H 2 is provided on the substrate 11 (or, strictly speaking, on the gate insulation layer 121 a ) to face the p-type semiconductor layer 122 .
  • An i-type semiconductor layer 123 is provided on the p-type semiconductor layer 122 and inside the contact hole H 2 of the first interlayer insulation film 121 b .
  • an n-type semiconductor layer 124 is created.
  • a second interlayer insulation film 121 c having a contact hole H 3 is provided in the n-type semiconductor layer 124 .
  • the n-type semiconductor layer 124 is electrically connected to an upper electrode 125 through the contact hole H 3 .
  • the p-type semiconductor layer 122 is provided and, on the upper side, the n-type semiconductor layer 124 is provided. It is to be noted, however, that the structure can also be made upside down. That is to say, on the lower side, the n-type layer is provided and, on the upper side, the p-type layer is provided.
  • a portion or the whole or each of the gate insulation layer 121 a , the first interlayer insulation film 121 b and the second interlayer insulation film 121 c has the same layer structure as each layer of respectively the second gate insulation film 129 , the first gate insulation film 130 and the first interlayer insulation film 131 which are employed in the transistor 111 B.
  • This photodiode 111 A can be manufactured by carrying out the same thin-film process as the transistor 111 B.
  • the p-type semiconductor layer 122 is a p+ area made of typically poly-crystal silicon (or polysilicon) doped with typically boron (B).
  • the thickness of the p-type semiconductor layer 122 is typically in a range of 40 nm to 50 nm.
  • the p-type semiconductor layer 122 functions also as typically a lower electrode for reading out signal electric charge.
  • the p-type semiconductor layer 122 is connected to an accumulation node N described earlier by referring to FIG. 3 .
  • the p-type semiconductor layer 122 can also serve as the accumulation node N in which electric charge is accumulated.
  • the i-type semiconductor layer 123 is a semiconductor layer exhibiting intermediate conductivity between the p and n types.
  • the i-type semiconductor layer 123 is typically an undoped pure semiconductor layer made of typically non-crystal silicon or amorphous silicon.
  • the thickness of the i-type semiconductor layer 123 is typically in a range of 400 nm to 1,000 nm. The larger the thickness, the larger the optical sensitivity of the photodiode 111 A.
  • the n-type semiconductor layer 124 is made of typically non-crystal silicon or amorphous silicon, forming an n+ area.
  • the thickness of the n+ area is typically in a range of 10 nm to 50 nm.
  • the upper electrode 125 is an electrode for supplying a reference level provided for photoelectric conversion.
  • the n-type semiconductor layer 124 is typically a transparent conductive film made of ITO (Indium Tin Oxide) or the like.
  • the upper electrode 125 is connected to a power-supply wire 127 for applying a voltage to the upper electrode 125 .
  • the power-supply wire 127 is made of typically a material having a resistance lower than that of the upper electrode 125 . Typical examples of the material are Ti, Al, Mo, W and Cr.
  • a radiation source shown in none of the figures radiates a radioactive ray such as an X ray to the radioactive-ray imaging apparatus 1 .
  • a radioactive ray such as an X ray
  • the incident radioactive ray is subjected to a photoelectric conversion process following a wavelength conversion process in order to generate an electrical signal representing an image of the imaging object.
  • the radioactive ray incident to the radioactive-ray imaging apparatus 1 is subjected to the wavelength conversion process carried out by the scintillator layer 114 provided on the pixel section 12 in order to change the wavelength of the radioactive ray to a wavelength in the sensitive region (or the visible region in this case) of the photodiode 111 A.
  • the scintillator layer 114 emits visible light.
  • the visible light emitted by the scintillator layer 114 in this way is supplied to the pixel section 12 .
  • incident light is supplied to the pixel section 12 from the side close to the upper electrode 125 and the pixel section 12 carries out the photoelectric conversion process to convert the incident light into signal electric charge having an amount according to the quantity of the incident light.
  • the signal electric charge generated as a result of the photoelectric conversion process is read out from the side close to the p-type semiconductor layer 122 as an optical current.
  • electric charge generated as a result of the photoelectric conversion process carried out by the photodiode 111 A is collected in the p-type semiconductor layer 122 (or the accumulation node N) serving as an accumulation layer and read out from the accumulation layer as a current which is supplied to the gate electrode of the transistor Tr 2 functioning as a read transistor.
  • the read transistor Tr 2 receives the current read out from the accumulation layer, the read transistor Tr 2 outputs a signal voltage according to the signal electric charge represented by the current.
  • the row select transistor Tr 3 is turned on in response to the row scanning signal Vread, the signal voltage output by the read transistor Tr 2 is asserted on the vertical signal line 18 , that is the signal voltage output by the read transistor Tr 2 is read out onto the vertical signal line 18 .
  • the signal voltage asserted on the vertical signal line 18 is output to the horizontal select section 14 through the vertical signal line 18 for each pixel column.
  • an incident radioactive ray such as an X ray is subjected to a waveform conversion process and a photoelectric conversion process in order to obtain an electrical signal representing image information.
  • some radioactive rays pass through the scintillator layer 114 as they are without experiencing the waveform conversion process carried out in the scintillator layer 114 . If such radioactive rays hit the pixel section 12 , in particular, a problem like one described as follows is raised in a transistor 111 B.
  • the transistor 111 B has silicon-oxide films each containing oxygen in the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 .
  • FIG. 7 is an explanatory cross-sectional diagram referred to in the following description of an effect given by positive electric charge in a typical comparison transistor 100 serving as a typical transistor provided for the purpose of comparison with the transistor 111 B provided by the present disclosure.
  • the comparison transistor 100 is also a transistor having a dual-gate structure.
  • the comparison transistor 100 includes a gate electrode 102 A, a first gate insulation film 103 , a semiconductor layer 104 , a second gate insulation film 105 , a gate electrode 102 B and a first interlayer insulation film 107 which are sequentially created on a substrate 101 in the same order as the order in which the gate electrode 102 A, the first gate insulation film 103 , the semiconductor layer 104 , the second gate insulation film 105 , the gate electrode 102 B and the first interlayer insulation film 107 are enumerated in this sentence.
  • the semiconductor layer 104 includes a channel layer 104 a , an LDD layer 104 b and an N + layer 104 c .
  • the first gate insulation film 103 is a laminated stack provided above the substrate 101 as a stack including a silicon-nitride film 103 A and a silicon-oxide film 103 B which are created above the substrate 101 sequentially in the same order as the order in which the silicon-nitride film 103 A and the silicon-oxide film 103 B are enumerated in this sentence.
  • the second gate insulation film 105 is a laminated stack provided above the substrate 101 as a stack including a silicon-oxide film 105 A, a silicon-nitride film 105 b and a silicon-oxide film 105 C which are created above the substrate 101 sequentially in the same order as the order in which the silicon-nitride film 103 A, the silicon-nitride film 105 b and the silicon-oxide film 105 C are enumerated in this sentence.
  • the first interlayer insulation film 107 is a laminated stack provided above the substrate 101 as a stack including a silicon-oxide film 107 A and a silicon-nitride film 107 B which are created above the substrate 101 sequentially in the same order as the order in which the silicon-oxide film 107 A and the silicon-nitride film 107 B are enumerated in this sentence.
  • the silicon-oxide film 103 B, the silicon-oxide film 105 A, the silicon-oxide film 105 C, the silicon-oxide film 107 A and the second interlayer insulation film 108 which is also a silicon-oxide film are electrically charged with positive electric charge due to the reason described before.
  • the silicon-oxide film 103 B, the silicon-oxide film 105 A, the silicon-oxide film 105 C, the silicon-oxide film 107 A and the second interlayer insulation film 108 for example, the positive electric charge in the second interlayer insulation film 108 has a worst effect on the semiconductor layer 104 as indicated by a model shown in FIG. 7 .
  • the positive electric charge accumulated in the second interlayer insulation film 108 has a very bad effect on a channel edge e 1 as indicated by dashed-line arrows in the model shown in the same figure. Since the comparison transistor 100 has a dual-gate structure in this case, the positive electric charge accumulated in portions right above the gate electrode 102 B is shielded by the gate electrode 102 B so that the effect of this positive electric charge on the semiconductor layer 104 is reduced. In an area on an outer side outside an edge e 2 of the gate electrode 102 B, however, such a shielding effect cannot be obtained sufficiently. For example, in a gap between the gate electrode 102 B and the drain and source electrodes 106 , such a shielding effect cannot be obtained sufficiently.
  • the channel layer 126 a or, in particular, the channel edge e 1 is affected by positive electric charge with ease.
  • the threshold voltage Vth is undesirably shifted to the negative side.
  • the semiconductor layer 104 is made of low-temperature polysilicon in particular, it is desirable to sandwich the semiconductor layer 104 between silicon-oxide films.
  • the threshold voltage Vth cited above is shifted with ease.
  • the threshold voltage Vth is shifted, typically, the off current and the on current change, raising problems. To put it concretely, the off current increases, causing a current leak whereas the on current decreases, making it impossible to read out the signal electric charge. That is to say, it is difficult to sustain the reliability of the transistor 100 .
  • the shield electrode layers 128 a 1 and 128 b 1 are provided on the first interlayer insulation film 131 .
  • the shield electrode layers 128 a 1 and 128 b 1 are provided on the first interlayer insulation film 131 in such a way that portions of the shield electrode layers 128 a 1 and 128 b 1 face the edges e 2 of the gate electrode 120 B. That is to say, the shield electrode layers 128 a 1 and 128 b 1 are provided on the first interlayer insulation film 131 in such a way that the portions of the shield electrode layers 128 a 1 and 128 b 1 overlap the gate electrode 120 B.
  • the shielding effect of the gate electrode 120 B typically reduces the effect of positive electric charge accumulated in the second interlayer insulation film 132 made of silicon oxide on the channel layer 126 a .
  • the shielding effect of the shield electrode layers 128 a 1 and 128 b 1 represses the effect of positive electric charge on the channel edges e 1 .
  • FIG. 9 is a diagram showing the effect of an X-ray radiation quantity of on the current-voltage characteristic of the transistor 111 B including the semiconductor layer 126 made of low-temperature polysilicon for a case in which an X ray is radiated to the transistor 111 B.
  • the current-voltage characteristic of the transistor 111 B is a relation between the gate voltage Vg and the drain current Ids.
  • the current-voltage characteristic has been obtained for a source-drain voltage of 6.1 V, a width W of 20.5 microns and a length L of 6 microns.
  • FIG. 9 is a diagram showing the effect of an X-ray radiation quantity of on the current-voltage characteristic of the transistor 111 B including the semiconductor layer 126 made of low-temperature polysilicon for a case in which an X ray is radiated to the transistor 111 B.
  • the current-voltage characteristic of the transistor 111 B is a relation between the gate voltage Vg and the drain current Ids.
  • FIG. 10 is a characteristic diagram showing a relation between the X-ray radiation quantity and the shift quantity ( ⁇ Vshift) of a reference voltage which is a voltage Vg with the drain current Ids of 1.0 e-11A taken as a reference.
  • FIG. 11 is a characteristic diagram showing also a relation between the X-ray radiation quantity and the S value (or the threshold value).
  • the curves shown in FIGS. 9 , 10 and 11 are curves obtained for an X-ray tube voltage of 90 kV and X-ray radiation quantities of 0 Gy, 70 Gy, 110 Gy and 200 Gy.
  • the shift quantity ( ⁇ Vshift) of the voltage Vg with the drain current Ids of 1.0 e-11A taken as a reference is measured in order to show this shift quantity in a more easily understood way.
  • any of the silicon-oxide films included in the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 which are employed in the transistor 111 B holes are generated by radiation of a radioactive ray so that positive electric charge is accumulated in the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 .
  • the shield electrode layers 128 a 1 and 128 b 1 are provided on the first interlayer insulation film 131 in such a way that portions of the shield electrode layers 128 a 1 and 128 b 1 face the edges e 2 of the gate electrode 120 B.
  • the effect of the positive electric charge accumulated in the second interlayer insulation film 132 is reduced so that the shift ⁇ Vth of the threshold voltage Vth can be repressed.
  • the source and drain electrodes 128 A and 128 B function also as the shield electrode layers 128 a 1 and 128 b 1 so that, in the process of patterning the source and drain electrodes 128 A and 128 B, the shield electrode layers 128 a 1 and 128 b 1 can be created with ease.
  • the first embodiment described so far has a structure in which the two shield electrode layers 128 a 1 and 128 b 1 are provided on both the sides of the channel by making use of portions of both the source and drain electrodes 128 A and 128 B. As shown in FIGS. 12A and 12B , however, a shield electrode layer can also be provided only on one side of the channel.
  • FIGS. 12A and 12B are cross-sectional diagrams showing a rough configuration of a transistor 111 C according to first typical modification which is typical modification of the first embodiment described above.
  • the transistor 111 C also referred to hereafter as a first modified version is a transistor having a dual-gate structure having the semiconductor layer 126 between the two gate electrodes 120 A and 120 B.
  • the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 each include a silicon-oxide film. It is to be noted that, in the transistor 111 C described below, each configuration element identical with its counterpart employed in the first embodiment described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.
  • a drain electrode 128 C functioning only as the drain electrode and a source electrode 128 D functioning only as the source electrode are connected electrically to the semiconductor layer 126 on the first interlayer insulation film 131 .
  • the LDD layer 126 b and the N + layer 126 c which are included in the semiconductor layer 126 is provided only on the side close to the drain electrode 128 C.
  • the functions of the source and drain electrodes are not swapped with each other between the drain electrode 128 C and the source electrode 128 D in the transistor 111 C for example, it is nice to provide the LDD layer 126 b only on the side close to the drain electrode 128 C, the voltage supplied to which is relatively high. Since the source electrode 128 D is sustained at the electric potential of the ground in some cases, the LDD layer 126 b does not have to be provided on the side close to the source electrode 128 D.
  • a portion of the drain electrode 128 C functions also as a shield electrode layer 128 c 1 and a portion of the shield electrode layer 128 c 1 is provided to face the edge e 2 of the gate electrode 120 B.
  • the shielding effect of the shield electrode layer 128 c 1 reduces the effect of the positive electric charge on the channel layer 126 a provided on the drain side of the semiconductor layer 126 .
  • the shielding effect of the shield electrode layer 128 c 1 reduces the effect of the positive electric charge on the channel edge e 2 .
  • the current is not so large as the current on the drain side of the semiconductor layer 126 .
  • the LDD layer is not required on the source side of the semiconductor layer 126 .
  • the shield electrode layer 128 c 1 is provided only on one side of the channel, that is, only on the drain side in particular. In such a configuration, the shield electrode layer 128 c 1 can be provided efficiently on a portion which can easily have an effect on the characteristic.
  • the first modified version described above has a configuration in which the shield electrode layer 128 c 1 is provided only on the drain side. It is to be noted, however, that the shield electrode layer 128 c 1 can also be provided only on the source side. In this case, the shielding effect of the shield electrode layer 128 c 1 is small in comparison with the configuration in which the shield electrode layer 128 c 1 is provided on the drain side. In comparison with the structure of the typical comparison transistor in which the shield electrode layer is not provided at all, nevertheless, it is possible to reduce the effect of the positive electric charge on the channel edge e 1 and, thus, repress the shift of the threshold voltage Vth.
  • the LDD layer 126 b is provided only on the drain side of the channel layer 126 a .
  • the LDD layer 126 b can be provided also on the source side.
  • the shield electrode layer 128 c 1 can be provided only on either the drain side or the source side.
  • the drain electrode 128 C is created by being extended to positions covering both edges of the gate electrode 120 B so that a portion of the drain electrode 128 C also functions as the shield electrode layer 128 c 2 .
  • FIG. 13 is a cross-sectional diagram showing a rough configuration of a transistor 111 D according to a second embodiment of the present disclosure.
  • transistor 111 C each configuration element identical with its counterpart employed in the first embodiment described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.
  • the transistor 111 D according to the second embodiment is included in the pixel circuit 12 a of the pixel section 12 employed in the radioactive-ray imaging apparatus explained in the description of the first embodiment along with the photodiode 111 A.
  • the transistor 111 D is a transistor having a dual-gate structure including the semiconductor layer 126 between the two gate electrodes 120 A and 120 B.
  • the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 each include a silicon-oxide film.
  • a pair of source and drain electrodes 128 E connected electrically to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • a shield electrode layer 128 F is electrically separated from the source and drain electrodes 128 E and also provided on the first interlayer insulation film 131 .
  • the source and drain electrodes 128 E are capable of swapping the functions the source and drain electrodes with each other.
  • the source and drain electrodes 128 E are made of the same material as the source and drain electrodes 128 A and 128 B.
  • the shield electrode layer 128 F functions as an electrical shield for repressing the effect of positive electric charge accumulated in a silicon-oxide film on the semiconductor layer 126 .
  • the shield electrode layer 128 F is provided in such a way that at least a portion of the shield electrode layer 128 F faces the edge e 2 of the gate electrode 120 B.
  • the shield electrode layer 128 F is provided in such a way that the shield electrode layer 128 F faces the gate electrode 120 B and a portion of the shield electrode layer 128 F overlaps the edge e 2 of the gate electrode 120 B.
  • the positions of the edges e 4 of the shield electrode layer 128 F are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layer 128 F is provided to cover the entire taper portions of the gate electrode 120 B in the same way as the first embodiment described above.
  • the shield electrode layer 128 F can be made of typically the same material as the source and drain electrodes 128 A and 128 B employed in the first embodiment.
  • the material used for making the shield electrode layer 128 F can be the same as that for the source and drain electrodes 128 E or different from that for the source and drain electrodes 128 E. If the material used for making the shield electrode layer 128 F is the same as that for the source and drain electrodes 128 E, the shield electrode layer 128 F and the source and drain electrodes 128 E can be created in the same process at the same time.
  • Such a shield electrode layer 128 F can be electrically connected to typically the gate electrode 120 A and/or the gate electrode 120 B by making use of typically wiring layers not shown in the figure so that the electric potential appearing at the shield electrode layer 128 F can be sustained at the same level as the electric potential appearing at the gate electrode 120 A and/or the gate electrode 120 B.
  • the shield electrode layer 128 F can be electrically disconnected from the gate electrode 120 A and the gate electrode 120 B so that the electric potential appearing at the shield electrode layer 128 F can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrode 120 A and the gate electrode 120 B.
  • the shield electrode layer 128 F can be sustained at the electric potential of the ground or can be put in a state of being floated.
  • radioactive-ray imaging apparatus employing the transistors 111 D according to this embodiment as described above, electrical signals conveying information are obtained on the basis of radioactive rays which are typically X rays.
  • radioactive rays directly incident to the transistors 111 D exist.
  • the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 each has a silicon-oxide film. If a radioactive ray hits the silicon-oxide film containing such oxygen, positive electric charge is accumulated in the silicon-oxide film due to the reasons explained earlier and the electric charge undesirably shifts the threshold voltage Vth to the negative side.
  • the shield electrode layer 128 F is provided on the first interlayer insulation film 131 in such a way that a portion of the shield electrode layer 128 F faces or overlaps the edge e 2 of the gate electrode 120 B.
  • the shielding effect of the gate electrode 120 B represses the effect of the positive electric charge accumulated typically in the second interlayer insulation film 132 including a silicon-oxide film on the channel layer 126 a .
  • the shielding effect of the shield electrode layer 128 F represses the effect of the positive electric charge on the channel layer 126 a or, in particular, on the channel edge e 1 in comparison with the typical comparison structure shown in FIG. 7 .
  • FIG. 15 is a diagram showing the effect of the X-ray radiation quantity on the current-voltage characteristic of the transistor 111 D including the semiconductor layer 126 made of low-temperature polysilicon for a case in which an X ray is radiated to the transistor 111 D.
  • the current-voltage characteristic of the transistor 111 D is a relation between the gate voltage Vg and the drain current Ids.
  • FIG. 16 is a characteristic diagram showing a relation between the X-ray radiation quantity and the shift quantity ( ⁇ Vshift) of a reference voltage which is a voltage Vg with the drain current Ids of 1.0 e-11A taken as a reference.
  • FIG. 17 is a characteristic diagram showing a relation between the X-ray radiation quantity and the S value (or the threshold value) in the current-voltage characteristic for each of the transistors 111 B and 111 D according to the first and second embodiments respectively.
  • the curves shown in FIGS. 15 , 16 and 17 are curves obtained for an X-ray tube voltage of 90 kV and X-ray radiation quantities of 0 Gy, 70 Gy, 110 Gy and 200 Gy.
  • every solid line represents measurement results for the transistor 111 B according to the first embodiment whereas each dashed-line represents measurement results for the transistor 111 D according to the second embodiment.
  • the shield electrode layer 128 F is provided on the first interlayer insulation film 131 in such a way that portions of the shield electrode layers 128 F face the edges e 2 of the gate electrode 120 B.
  • the effect of the positive electric charge accumulated in the second interlayer insulation film 132 is reduced so that the shift ⁇ Vth of the threshold voltage Vth can be repressed. As a result, it is possible to obtain the same effects as the first embodiment.
  • the shield electrode layer 128 F is provided by electrically separating the shield electrode layer 128 F from the source and drain electrodes 128 E so that the shield electrode layer 128 F can be held at the gate or ground electric potential.
  • the shield electrode layer 128 F can also be held at a negative electric potential as well. In this case, as shown by a model in FIG.
  • the shield electrode layer 128 F is held at a negative electric potential in the case of a second modified version according to the second typical modification, however, the positive electric charge accumulated in the silicon-oxide films of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 is attracted to the shield electrode layer 128 F so that the effect of the positive electric charge on the channel layer 126 a is reduced. As a result, it is possible to obtain the same effects as the second embodiment.
  • the shield electrode layer 128 F is provided between the first interlayer insulation film 131 and the second interlayer insulation film 132 . It is to be noted, however, that the location of the shield electrode layer 128 F is by no means limited to a position between the first interlayer insulation film 131 and the second interlayer insulation film 132 .
  • the shield electrode layer 128 F can also be inserted into a position between the silicon-oxide film 131 a and the silicon-nitride film 131 b which are included in the first interlayer insulation film 131 .
  • FIG. 19 is a cross-sectional diagram showing a rough configuration of a third modified version which is a transistor 111 E according to third typical modification.
  • the transistor 111 E is included in the pixel circuit 12 a of the pixel section 12 employed in the radioactive-ray imaging apparatus along with the photodiode 111 A.
  • the transistor 111 E also has a dual-gate structure having the semiconductor layer 126 between two gate electrodes.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film.
  • a pair of source and drain electrodes 128 A and 128 B electrically connected to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • the transistor 111 E has two gate electrodes in selective areas on the substrate 11 .
  • the two electrodes are gate electrodes 120 A 1 and 120 A 2 .
  • the second gate insulation film 129 is provided to cover the gate electrodes 120 A 1 and 120 A 2 .
  • the semiconductor layer 126 is provided on the second gate insulation film 129 .
  • the semiconductor layer 126 includes the channel layer 126 a , the LDD layer 126 b and the N′ layer 126 c for every pair of gate electrodes 120 A 1 and 120 A 2 .
  • the first gate insulation film 130 is created to cover the semiconductor layer 126 .
  • gate electrodes 120 B 1 and 120 B 2 are provided in selective areas on the first gate insulation film 130 .
  • the selective areas on the first gate insulation film 130 are areas facing the gate electrodes 120 A 1 and 120 A 2 respectively.
  • the first interlayer insulation film 131 is created to cover the gate electrodes 120 B 1 and 120 B 2 .
  • Contact holes H 1 are each provided in portions of the first interlayer insulation film 131 and the first gate insulation film 130 .
  • a pair of source and drain electrodes 128 A and 128 B are provided on the first interlayer insulation film 131 to fill up the contact holes H 1 in a state of being electrically connected to the semiconductor layer 126 .
  • the gate electrodes 120 B 1 and 120 B 2 are concrete examples of the first gate electrode according to the embodiment of the present disclosure whereas the gate electrodes 120 A 1 and 120 A 2 are concrete examples of the second gate electrode according to the embodiment of the present disclosure.
  • portions of the source and drain electrodes 128 A and 128 B function also as the shield electrode layers 128 a 1 and 128 b 1 .
  • the shield electrode layer 128 a 1 is provided in such a way that at least a portion of the shield electrode layer 128 a 1 faces the edge e 2 of the gate electrode 120 B 1 whereas the shield electrode layer 128 b 1 is provided in such a way that at least a portion of the shield electrode layer 128 b 1 faces the edge e 2 of the gate electrode 120 B 2 .
  • the positions of the edges e 3 of the shield electrode layers 128 a 1 and 128 b 1 are not limited to specific positions in particular as described above, it is nice to provide a desirable structure in which the shield electrode layers 128 a 1 and 128 b 1 are provided to cover the taper portions of the gate electrodes 120 B 1 and 120 B 2 .
  • the shielding effect of the shield electrode layers 128 a 1 and 128 b 1 allows the same effects as the first embodiment to be obtained.
  • the shield electrode layers 128 a 1 and 128 b 1 are provided on both sides of the source and drain electrodes 128 A and 128 B. It is to be noted, however, that the shield electrode layer can also be provided only on either the source electrode or the drain electrode as explained before in the description of the first modified version.
  • FIG. 19 shows a case in which the shield electrode layers 128 a 1 and 128 b 1 are provided to face only the edges e 2 on one sides of the gate electrodes 120 B 1 and 120 B 2 .
  • the following configuration can also be provided. For example, as shown in FIG.
  • the shield electrode layers 128 a 1 and 128 b 1 can also be provided by extending the shield electrode layers 128 a 1 and 128 b 1 so that the shield electrode layers 128 a 1 and 128 b 1 face the edges e 2 on both sides of the gate electrodes 120 B 1 and 120 B 2 .
  • FIG. 21 is a cross-sectional diagram showing a rough configuration of a transistor 111 F provided in accordance with fourth typical modification to serve as a fourth modified version.
  • the transistor 111 F is included in the pixel circuit 12 a of the pixel section 12 employed in the radioactive-ray imaging apparatus along with the photodiode 111 A.
  • the transistor 111 F also has a dual-gate structure having the semiconductor layer 126 between two gate electrodes.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film.
  • a pair of source and drain electrodes 128 A and 128 B electrically connected to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • portions of the source and drain electrodes 128 A and 128 B function also as the shield electrode layers 128 a 1 and 128 b 1 .
  • a shield electrode layer 128 G is further provided on the first interlayer insulation film 131 .
  • the shield electrode layer 128 G is provided in an area between the source and drain electrodes 128 A and 128 B on the first interlayer insulation film 131 , being separated electrically from the source and drain electrodes 128 A and 128 B.
  • the shield electrode layer 128 G functions as an electrical shield for repressing the effect of positive electric charge accumulated in a silicon-oxide film on the semiconductor layer 126 .
  • the shield electrode layer 128 G is provided in such a way that at least a portion of the shield electrode layer 128 F faces the edges e 2 of the gate electrodes 120 B 1 and 120 B 2 .
  • the positions of the edges e 5 of the shield electrode layer 128 G are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layer 128 G is provided to cover the entire taper portions of the gate electrodes 120 B 1 and 120 B 2 .
  • the shield electrode layer 128 G can be made of typically the same material as the source and drain electrodes 128 A and 128 B employed in the first embodiment.
  • the material used for making the shield electrode layer 128 G can be the same as that for the source and drain electrodes 128 A and 128 B or different from that for the source and drain electrodes 128 A and 128 B.
  • the shield electrode layer 128 G can be electrically connected by making use of typically a wiring layer not shown in the figure to at least one of typically the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 in order to sustain the shield electrode layer 128 G at the same electric potential as the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 .
  • the shield electrode layer 128 G can be electrically disconnected from the gate electrodes 120 A 1 and 120 A 2 as well as from the gate electrodes 120 B 1 and 120 B 2 so that the electric potential appearing at the shield electrode layer 128 G can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrodes 120 A 1 and 120 A 2 as well as the gate electrodes 120 B 1 and 120 B 2 .
  • the shield electrode layer 128 G can be sustained at the electric potential of the ground or can be put in a state of being floated.
  • the shielding effect of the shield electrode layers 128 a 1 and 128 b 1 allows the same effects as the first embodiment to be obtained.
  • the shield electrode layer 128 G is further provided between the source and drain electrodes 128 A and 128 B so that it is possible to improve the shielding effect to a level higher than the third modified version and, thus, further reduce the effect of holes on the semiconductor layer 126 .
  • FIG. 22 is a cross-sectional diagram showing a rough configuration of a transistor 111 G provided in accordance with fifth typical modification to serve as a fifth modified version.
  • the transistor 111 G is included in the pixel circuit 12 a of the pixel section 12 employed in the radioactive-ray imaging apparatus along with the photodiode 111 A.
  • the transistor 111 G also has a dual-gate structure having the semiconductor layer 126 between two gate electrodes.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film.
  • a pair of source and drain electrodes 128 E electrically connected to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • the fifth modified version also has two dual-gate structures.
  • shield electrode layers 128 F electrically disconnected from the source and drain electrodes 128 E are provided on the first interlayer insulation film 131 .
  • the shield electrode layers 128 F are provided to face their respective gate electrodes 120 B 1 and 120 B 2 .
  • the positions of the edges e 4 of the two shield electrode layers 128 F are not limited to specific positions in particular as described above. However, it is nice to provide a desirable structure in which the shield electrode layers 128 F are provided to cover the entire taper portions of the gate electrodes 120 B 1 and 120 B 2 .
  • the two shield electrode layers 128 F can be electrically connected by making use of typically a wiring layer not shown in the figure to at least one of typically the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 in order to sustain the shield electrode layers 128 F at the same electric potential as the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 .
  • the two shield electrode layers 128 F can also be electrically disconnected from the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 so that the electric potential appearing at the two shield electrode layers 128 F can be sustained at an arbitrary level set differently from the electric potentials appearing at the gate electrodes 120 A 1 and 120 A 2 and the gate electrodes 120 B 1 and 120 B 2 .
  • the two shield electrode layers 128 F can also be sustained at the electric potential of the ground or can be put in a state of being floated.
  • the shielding effect of the two shield electrode layers 128 F allows the same effects as the second embodiment to be obtained.
  • Each of the third to fifth modified versions described above has a configuration in which the shield electrode layers are provided at locations horizontally symmetrical with respect to the two gate electrodes 120 B 1 and 120 B 2 laid out in parallel to each other. It is to be noted, however, that the locations of the shield electrode layers do not have to be horizontally symmetrical.
  • a shield electrode layer is created by making use of a portion of the source and drain electrodes.
  • a shield electrode layer electrically disconnected from the source and drain electrodes is created separately.
  • the widths (or the creation areas) of the shield electrode layers on the left and right sides may be different from each other.
  • the number of gate electrodes laid out in parallel to each other on the substrate or the number of second gate electrodes laid out in parallel to each other on the second gate insulation film is by no means limited to 1 or 2 as described above, but can be 3 or an integer greater than 3.
  • FIG. 23 is a diagram showing a cross-sectional structure of a transistor provided in accordance with sixth modification to serve as a transistor 111 J according to a sixth modified version.
  • the transistor 111 J is employed in the pixel circuit 12 a of the pixel section 12 , which is included in the radioactive-ray imaging apparatus, along with the photodiode 111 A.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film.
  • a pair of source and drain electrodes 128 A and 128 B electrically connected to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • the transistor 111 J according to the sixth modified version has the so-called top gate structure.
  • the transistor 111 B according to this embodiment has a structure including only the gate electrode 120 B which is one of the gate electrodes.
  • portions of the source and drain electrodes 128 A and 128 B also function as the shield electrode layers 128 a 1 and 128 b 1 .
  • the shield effects of the shield electrode layers 128 a 1 and 128 b 1 can be obtained.
  • gate electrode 120 B in this modified version is a concrete example of the first gate electrode provided by the embodiment of the present disclosure.
  • a transistor having the top gate structure can also be configured into a structure in which only a portion of the drain electrode 128 c is provided to face one edge e 2 of the gate electrode 120 B so that the portion also functions as the shield electrode layer 128 c 1 .
  • a transistor having the top gate structure can also be configured into a structure in which the drain electrode 128 c is created by being further extended to positions covering both edges of the gate electrode 120 B so that a portion of the drain electrode 128 c also functions as the shield electrode layer 128 c 2 .
  • FIG. 26 is a diagram showing a cross-sectional structure of a transistor provided in accordance with seventh modification to serve as a transistor 111 K according to a seventh modified version.
  • the transistor 111 K is employed in the pixel circuit 12 a of the pixel section 12 , which is included in the radioactive-ray imaging apparatus, along with the photodiode 111 A.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film.
  • a pair of source and drain electrodes 128 A and 128 B electrically connected to the semiconductor layer 126 are provided on the first interlayer insulation film 131 .
  • the transistor 111 K according to the seventh modified version has the so-called bottom gate structure.
  • the transistor 111 B according to this embodiment has a structure including only the gate electrode 120 A which is one of the gate electrodes.
  • portions of the source and drain electrodes 128 A and 128 B also function as the shield electrode layers 128 a 1 and 128 b 1 .
  • the shield effects of the shield electrode layers 128 a 1 and 128 b 1 can be obtained.
  • the gate electrode 120 A in this modified version is a concrete example of the first gate electrode provided by the embodiment of the present disclosure.
  • a transistor having the bottom gate structure can also be configured into a structure in which only a portion of the drain electrode 128 c is provided to face one edge e 1 of the gate electrode 120 A so that the portion also functions as the shield electrode layer 128 c 1 .
  • the transistor having the bottom gate structure can also be configured into a structure in which the drain electrode 128 c is created by being further extended to positions covering both edges of the gate electrode 120 A so that a portion of the drain electrode 128 c also functions as the shield electrode layer 128 c 2 .
  • eighth and ninth typical modifications which are each a modification implementing a modified version of the radioactive-ray imaging apparatus according to the embodiments of the present disclosure. It is to be noted that, in the description of the eighth and ninth typical modifications described below, each configuration element identical with its counterpart employed in the first and/or second embodiments described above is denoted by the same reference numeral as the counterpart and the explanation of the identical configuration element is properly omitted.
  • the pixel circuit provided in every pixel P is the pixel circuit 12 a which adopts the active driving method.
  • the pixel circuit provided in every pixel P can also be a pixel circuit 12 b like one shown in FIG. 29 to serve as a pixel circuit which adopts the passive driving method.
  • the unit pixel P is configured to include the photodiode 111 A, a capacitor 138 and a transistor Tr which corresponds to the read transistor Tr 3 .
  • the transistor Tr is connected between the accumulation node N and the vertical signal line 18 .
  • the transistor Tr When the transistor Tr is turned on in response to the row scanning signal Vread, signal electric charge accumulated in the accumulation node N in accordance with the quantity of light incident to the photodiode 111 A is output to the vertical signal line 18 .
  • the transistor Tr (or Tr 3 ) is any one of the transistors 111 A to 111 D which are provided by the embodiments described above and the modified versions also explained so far.
  • the method for driving the pixel P is not limited to the active driving method adopted by the embodiments described above. That is to say, the method for driving the pixel P can also be the passive driving method as is the case with this sixth modified version.
  • an indirect-conversion-type FPD having the scintillator layer 114 provided on the pixel section 12 is taken as a typical radioactive-ray imaging apparatus.
  • the radioactive-ray imaging apparatus according to the embodiments of the present disclosure can also be applied to an FPD of the direct conversion type.
  • the FPD of the direct conversion type does not employ the scintillator layer 114 for carrying out a wavelength conversion process of converting a radioactive ray into a visible ray and the protection layer 115 .
  • the pixel section 12 is provided with a function for directly converting a radioactive ray into an electrical signal.
  • FIG. 30 is an explanatory model diagram referred to in the following description of a radioactive-ray imaging apparatus provided in accordance with seventh modification to serve as a seventh modified version which is a radioactive-ray imaging apparatus having a direct conversion type.
  • the seventh modified version includes a typical pixel section 12 making use of a pixel circuit 12 b according to the sixth modified version adopting the passive driving method.
  • the pixel section 12 is configured to include a photoelectrical conversion device 111 H, a capacitor 141 and a transistor Tr which corresponds to the read transistor Tr 3 .
  • the photoelectrical conversion device 111 H is a section for converting a radioactive ray into an electrical signal.
  • the photoelectrical conversion device 111 H has a direct conversion layer 140 provided typically between an upper electrode 139 A and a pixel electrode 139 B.
  • the direct conversion layer 140 is made of typically an amorphous selenium semiconductor (an a-Se semiconductor) or a cadmium tellurium semiconductor (a CdTe semiconductor).
  • the transistor Tr (or Tr 3 ) is any one of the transistors 111 B to 111 D which are provided by the embodiments described above and the modified versions also explained so far.
  • the transistors provided by the present disclosure can be applied to not only an FPD of the indirect conversion type, but also an FPD of the direct conversion type.
  • the direct conversion type particularly, an incident radioactive ray directly hits the pixel section 12 .
  • the transistor is exposed more easily than the transistors according to the embodiments described above and the modified versions also explained so far.
  • the effect to repress the shift of the threshold voltage Vth is also effective for the seventh modified version serving as a radioactive-ray imaging apparatus of the direct conversion type.
  • the radioactive-ray imaging display system 2 includes the radioactive-ray imaging apparatus 1 , an image processing section 25 and a display apparatus 28 .
  • the radioactive-ray imaging apparatus 1 acquires image data Dout of the imaging object 27 and supplies the image data Dout to the image processing section 25 .
  • the image processing section 25 carries out predetermined image processing on the image data Dout received from the radioactive-ray imaging apparatus 1 and outputs image data (or display data) D 1 obtained as a result of the image processing to the display apparatus 28 .
  • the display apparatus 28 has a monitor screen 28 a for displaying an image based on the display data D 1 received from the image processing section 25 .
  • the radioactive-ray imaging apparatus 1 employed in the radioactive-ray imaging display system 2 is capable of acquiring an image of the imaging object 27 as an electrical signal.
  • the image of the imaging object 27 can be displayed. That is to say, the image of the imaging object 27 can be observed without making use of a radioactive-ray photograph film.
  • the embodiments and the modified versions have been explained so far.
  • the scope of the present disclosure is by no means limited to the embodiments and the modified versions. That is to say, a variety of changes can be further made to the embodiments and the modified versions.
  • the wavelength conversion material used for making the scintillator layer 114 employed in the embodiments and the modified versions is by no means limited those explained in the above descriptions. In other words, a variety of other fluorescent materials can also be used for making the scintillator layer 114 .
  • each of the embodiments and the modified versions has a configuration in which the shield electrode layer as well as the source and drain electrodes are provided on the same layer.
  • the shield electrode layer as well as the source and drain electrodes may be provided not necessarily on the same layer. That is to say, the shield electrode layer as well as the source and drain electrodes may also be provided on different layers.
  • each of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 includes a silicon-oxide film. If at least one of the second gate insulation film 129 , the first gate insulation film 130 , the first interlayer insulation film 131 and the second interlayer insulation film 132 include a silicon-oxide film, however, it is possible to obtain the same effects as the disclosed present disclosure.
  • each of the embodiments and the modified versions has a configuration in which the second interlayer insulation film 132 made of silicon oxide is provided on the source and drain electrodes.
  • the second interlayer insulation film 132 is not necessarily required.
  • the second interlayer insulation film 132 can also be made of a material not including oxygen.
  • a typical example of the material not including oxygen is silicon nitride.
  • the effect of the provided shield electrode layer is particularly effective for a silicon-oxide film provided above the shield electrode layer.
  • a typical example of the silicon-oxide film provided above the shield electrode layer is the second interlayer insulation film 132 .
  • a gate electrode having a taper portion on each of the side surfaces thereof is taken as a typical example of the second gate electrode according to the embodiments of the present disclosure.
  • the second gate electrode is not necessarily required to have a taper portion on each of the side surfaces thereof.
  • a second gate electrode 130 B 3 can also have side surfaces each forming a shape perpendicular to the surface of the substrate. In this case, the entire side surfaces of the second gate electrode 130 B 3 are each an edge of the second gate electrode 130 B 3 .
  • a film made of silicon oxide (SiO 2 ) is taken as a typical example of a silicon-oxide film according to the embodiments of the present disclosure.
  • the silicon-oxide film can be any other film as far as the other film is a silicon compound film containing oxygen.
  • the silicon-oxide film can also be a film made of silicon oxynitride (SiON).
  • an N-type transistor made of N-MOS is taken as a typical example of the transistor according to the embodiments of the present disclosure.
  • the transistor according to the embodiments of the present disclosure is by no means limited to the N-type transistor.
  • the transistor according to the embodiments of the present disclosure can also be a P-type transistor made of P-MOS.
  • the photodiode 111 A has a laminated structure built by creating a p-type semiconductor layer, an i-type semiconductor layer and an n-type semiconductor layer above the substrate in the same order as the order in which the p-type semiconductor layer, the i-type semiconductor layer and the n-type semiconductor layer are enumerated in this sentence.
  • the photodiode 111 A can also have a laminated structure built by creating an n-type semiconductor layer, an i-type semiconductor layer and a p-type semiconductor layer above the substrate in the same order as the order in which the n-type semiconductor layer, the i-type semiconductor layer and the p-type semiconductor layer are enumerated in this sentence.
  • a protection film made of SiN or the like can also be created on the upper electrode 125 .
  • the present disclosure can be applied to transistors having configurations described in implementations 1 to 11 given below, a radioactive-ray imaging apparatus employing any of the transistors and a radioactive-ray imaging display system employing the radioactive-ray imaging apparatus.
  • a transistor including:
  • a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film
  • source and drain electrodes provided by being electrically connected to the semiconductor layer
  • a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode
  • the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.
  • the transistor according to implementation 1 further including a second gate electrode facing the first gate electrode through the semiconductor layer, wherein
  • the second gate electrode, the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are sequentially created on a substrate in the same order as an order in which the second gate electrode, the insulation film, the semiconductor layer, the first gate insulation film, the first gate electrode and the first interlayer insulation film are enumerated in this sentence.
  • one or both of the source electrode and the drain electrode are provided on the first interlayer insulation film by being extended to areas facing the edges of the first gate electrode;
  • portions included in the source electrode and the drain electrode to serve as portions facing the edges of the first gate electrode also function as the shield electrode layer.
  • drain electrode is selected from the source electrode and the drain electrode to serve as an electrode to be provided on the first interlayer insulation film by being extended to an area facing the edge of the first gate electrode;
  • a portion included in the drain electrode to serve as a portion facing the edge of the first gate electrode also functions as the shield electrode layer.
  • the second interlayer insulation film includes a silicon-oxide film.
  • the second interlayer insulation film includes a silicon-oxide film.
  • a radioactive-ray imaging apparatus including a pixel section having a transistor and a photoelectric conversion device, the transistor including:
  • a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film
  • source and drain electrodes provided by being electrically connected to the semiconductor layer
  • At least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.
  • a wavelength conversion layer is provided on the pixel section to serve as a layer for changing the wavelength of an incident radioactive ray to a wavelength in a sensitive region of the photoelectric conversion device.
  • the photoelectric conversion device has a function for absorbing a radioactive ray and converting the radioactive ray into an electrical signal.
  • the radioactive-ray imaging display system employing a radioactive-ray imaging apparatus for acquiring an image based on radioactive rays and a display apparatus for displaying the image acquired by the radioactive-ray imaging apparatus wherein
  • the radioactive-ray imaging apparatus includes a pixel section having a transistor and a photoelectric conversion device, the transistor including:
  • a first gate electrode provided at a location between the first gate insulation film and the first interlayer insulation film
  • source and drain electrodes provided by being electrically connected to the semiconductor layer
  • a shield electrode layer provided in such a way that at least portions of the shield electrode layer face edges of the first gate electrode
  • At least one of the first gate insulation film, the first interlayer insulation film and the insulation film include a silicon-oxide film.

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