US20050006647A1 - Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system - Google Patents
Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system Download PDFInfo
- Publication number
- US20050006647A1 US20050006647A1 US10/850,405 US85040504A US2005006647A1 US 20050006647 A1 US20050006647 A1 US 20050006647A1 US 85040504 A US85040504 A US 85040504A US 2005006647 A1 US2005006647 A1 US 2005006647A1
- Authority
- US
- United States
- Prior art keywords
- thin film
- film circuit
- layer
- circuit layer
- underlayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 281
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000010410 layer Substances 0.000 claims abstract description 267
- 239000011241 protective layer Substances 0.000 claims abstract description 57
- 239000000758 substrate Substances 0.000 claims description 57
- 238000000034 method Methods 0.000 claims description 37
- 239000000853 adhesive Substances 0.000 claims description 9
- 230000001070 adhesive effect Effects 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 6
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 239000010408 film Substances 0.000 description 33
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
- 238000005530 etching Methods 0.000 description 13
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 238000003475 lamination Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 238000010030 laminating Methods 0.000 description 5
- -1 phosphorous ions Chemical class 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 238000002679 ablation Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 239000013013 elastic material Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 239000002612 dispersion medium Substances 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229960002050 hydrofluoric acid Drugs 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
Definitions
- the present invention relates to thin film circuit devices having a three-dimensional thin film circuit and to methods to manufacture a thin film circuit device having a three-dimensional circuit structure.
- a peeling and transferring technique has been proposed in which a thin film circuit is formed above a heat resistant first substrate with an isolation layer provided therebetween. A non-heat resistant second substrate is adhered onto this thin film circuit. The isolation layer is destroyed so that the thin film circuit is transferred to the second substrate side.
- Semiconductor devices and/or display devices having a three-dimensional circuit structure may be formed by laminating thin film circuits using the peeling and transferring technique described above.
- the present invention provides a manufacturing method of a thin film device, which uses a peeling and transferring technique capable of laminating thin film circuit layers and of simultaneously forming electrical connection therebetween.
- the present invention provides a thin film device to realize a three-dimensional circuit structure.
- the present invention provides an electronic system using the thin film device described above.
- a thin film circuit device of an aspect of the present invention includes: an underlayer; a thin film circuit layer formed on the underlayer and functioning as an electrical circuit; and a connection electrode which penetrates a part of the underlayer so as to be exposed approximately flush with a surface of the underlayer at the side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit.
- connection electrode since the connection electrode is exposed outside, the thin film circuit layer and the exterior circuit can be connected to each other. Hence thin film circuit layers can be easily laminated to each other.
- the thin film circuit device described above may further include a protective layer covering at least a part of the thin film circuit layer for protection; and a connection electrode which penetrates a part of the protective layer so as to be exposed approximately flush with a surface of the protective layer at the side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit. Accordingly, the electrical connection can be performed at the upper side and the lower side of the thin film circuit layer.
- a thin film circuit device includes: a heat resistant first substrate; a peeling layer which is formed on the first substrate and which is to be peeled away by energy applied thereto; an insulating underlayer formed on the peeling layer; a thin film circuit layer formed on the underlayer; a protective layer formed on the thin film circuit layer; and a connection electrode which penetrates a part of the underlayer to be in contact with the peeling layer and which is to be exposed to connect the thin film circuit layer to an exterior circuit when the peeling layer is peeled away.
- a basic thin film circuit layer can be obtained to form a thin film circuit laminate device which is composed of a plurality of said thin film circuit layers.
- a peeling and transferring process is repeated using the structure described above, a laminate of the thin film circuit layers can be easily formed.
- the thin film circuit device described above may further include a protective layer between the peeling layer and the underlayer.
- a protective layer between the peeling layer and the underlayer.
- a thin film circuit device includes: a first thin film circuit layer having a first thin film circuit formed between an underlayer and a protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer; and a second thin film circuit layer having a second thin film circuit formed between an underlayer and a protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer.
- the first thin film circuit layer and the second thin film circuit layer are laminated to each other.
- the lower connection electrode of the first thin film circuit layer is connected to the upper connection electrode of the second thin film circuit layer.
- a basic laminate structure which is composed of a plurality of thin film circuit layers.
- the lower connection electrode and the upper connection electrode may be connected to each other with an anisotropic conductive material or a conductive adhesive. Hence, electrical connection between the thin film circuit layers can be achieved.
- the lower connection electrode may be formed approximately flush with the underlayer. Hence, the bottom surface of the thin film circuit layer is planarized, and as a result, the lamination can be easily performed.
- the bottom surface of the first thin film circuit layer and that of the second thin film circuit layer may be formed approximately parallel to each other. Hence, the lamination accuracy of the thin film circuit layers can be enhanced.
- An electro-optical apparatus of an aspect of the present invention includes the thin film circuit device described above.
- An electronic system of an aspect of the present invention includes the electro-optical apparatus described above.
- a method to manufacture a thin film circuit device includes: forming a first thin film circuit layer above a first circuit-forming substrate with a peeling layer provided therebetween, the first thin film circuit layer having one connection electrode on at least a surface thereof; forming a second thin film circuit layer above a second circuit-forming substrate with a peeling layer provided therebetween, the second thin film circuit layer having connection electrodes on one surface and another surface thereof; peeling the first thin film circuit layer from the first circuit-forming substrate so that the first thin film circuit layer is transferred to a transfer substrate; bonding the second thin film circuit layer to the first thin film circuit layer transferred to the transfer substrate so that one of said connection electrodes of the second thin film circuit layer overlaps the connection electrode of the first thin film circuit layer; and peeling the second thin film circuit layer from the second circuit-forming substrate so that the second thin film circuit layer is transferred to the first thin film circuit layer to form a laminate.
- a thin film circuit device formed of thin film circuit layers laminated to each other can be manufactured.
- At least one of the first thin film circuit layer and the second thin film circuit layer may be formed by a process including forming an underlayer on the peeling layer provided on the circuit-forming substrate; forming a thin film circuit on the underlayer; forming a contact hole penetrating a part of the underlayer to expose the peeling layer; forming an electrode wire between the contact hole and the thin film circuit; and forming a protective layer on the thin film circuit and the electrode wire.
- a thin film circuit layer provided with a connection electrode can be obtained as a transfer unit.
- the method to manufacture a thin film circuit device may include: forming a protective layer between the peeling layer and the thin film circuit layer; and removing the protective layer after the thin film circuit layer is peeled away to transfer. Accordingly, the damage done to the thin film circuit layer in a peeling and transferring process, in particular, the damage done to the connection electrode in contact with the peeling layer can be reduced or prevented.
- the protective layer may be formed of a material different from that for the underlayer of the thin film circuit layer, and for example, a film made of silicon nitride or a metal may be used.
- the protective layer described above may be formed to have a three-layered structure composed, for example, of an amorphous silicon layer/an insulating film (silicon oxide or silicon nitride)/an amorphous silicon layer.
- an amorphous silicon layer/an insulating film silicon oxide or silicon nitride
- the amorphous silicon layer at the lower side functions as a peeling layer
- the amorphous silicon layer at the upper side functions as a protective layer.
- FIG. 1 is a schematic for illustrating a thin film circuit device of an aspect of the present invention, which is formed of thin film circuit layers laminated to each other;
- FIGS. 2A to 2 D show a process for manufacturing a thin film circuit layer
- FIGS. 3A to 3 H show a process for illustrating manufacturing steps of a thin film circuit layer
- FIGS. 4A to 4 E show a process for illustrating manufacturing a thin film circuit layer having a connection electrode for connection between thin film circuit layers
- FIGS. 5A to 5 F show another process for illustrating manufacturing of a thin film circuit layer having a connection electrode for connection between thin film circuit layers
- FIGS. 6A to 6 F show still another process for illustrating manufacturing of a thin film circuit layer having a connection electrode for connection between thin film circuit layers
- FIG. 7 is a schematic for illustrating a particular example (organic EL display apparatus) of a thin film circuit device.
- FIGS. 8A to 8 F are schematics for illustrating electronic systems using a thin film circuit device of an aspect of the present invention, the device formed by laminating thin film circuit layers to each other.
- a thin film circuit device of an exemplary embodiment of the present invention has a structure in which thin film circuits are laminated to each other in the vertical direction, and in which, among the circuits mentioned above, an intermediate thin film circuit present inside the laminate is formed to have electrodes on the upper and the lower surfaces thereof for electrical connection.
- an electrode is formed which is exposed at the rear surface of the thin film circuit, connection with a thin film circuit located thereunder and/or an exterior wire can be easily achieved.
- a process to manufacture a thin film circuit device using a peeling and transferring technique includes forming a contact hole penetrating an underlayer of a thin film circuit layer, and forming a conductive film in the contact hole using a metal or the like so as be exposed at the bottom surface of the underlayer.
- This conductive film is used as a rear surface electrode to connect with another thin film circuit layer.
- This rear surface electrode and the underlayer of the thin film circuit layer are formed flush with each other so that the rear surface of the thin film circuit layer is flat. Hence the lamination of the layers can be easily performed. Irregularities generated on a surface of a thin film circuit layer located at the upper side can be reduced or prevented, which irregularities are formed when thin film circuit layers having irregular surfaces are laminated to each other.
- FIG. 1 is a cross-sectional schematic showing an example of a thin film circuit device according to an aspect of the present invention, the device having a three-dimensional circuit composed of thin film circuit layers laminated to each other.
- a first thin film circuit layer 21 is mounted on a transfer substrate 31 with an adhesive 32 provided therebetween.
- a second thin film circuit layer 22 is mounted on this first thin film circuit layer 21 with an adhesive 33 provided therebetween.
- a third thin film circuit layer 23 is mounted on this second thin film circuit layer 22 with an adhesive 34 provided therebetween.
- Each thin film circuit layer has a thin film circuit including at least one of a thin film transistor, a diode, a resistor, a capacitor, a wire, and an electrode and has a predetermined circuit function.
- connection between the thin film circuit layers 21 and 22 is performed with a lower electrode 211 of the thin film circuit layer 21 , an upper electrode 229 of the thin film circuit layer 22 , and an anisotropic conductive material 35 provided between the electrodes 211 and 229 .
- Connection between the thin film circuit layers 22 and 23 is performed with a lower electrode 221 of the thin film circuit layer 22 , an upper electrode 239 of the thin film circuit layer 23 , and an anisotropic conductive material 35 provided between the electrodes 221 and 239 .
- the anisotropic conductive material 35 has conductive properties in a compressive direction. For example, when conductive particles are dispersed in an insulating elastic material, and the elastic material is then compressed, the conductive particles are connected to each other, thereby forming an electrical conductive path in the compressive direction.
- the lowermost thin film circuit layer 23 has a lower electrode 231 exposed at the bottom surface thereof.
- An exterior wire not shown in the figure, is connected to this lower electrode 231 with a flexible printed wire, tab bonding, wire bonding, or the like.
- the bottom surfaces of underlayers ( 212 , 222 , and 232 described later) carrying the thin film circuits of the individual thin film circuit layers and the exposed surfaces of the lower electrodes exposed at the underlayers are formed to be flush with each other.
- thin film circuit layers (underlying substrates) can be laminated so that the individual bottom surfaces are approximately parallel to each other, and as a result, a three-dimensional circuit structure can be precisely formed.
- a conductive adhesive may be used for connection between the electrodes.
- the thin film circuit layer 21 located at the upper side and the thin film circuit layer 23 located at the lower side are connected to each other with a thin film transistor circuit of the thin film circuit layer 22 .
- the thin film circuit layers 21 and 23 may be connected to each other only by an electrode wire.
- an electrode wire For example, in the case of an electrical power supply wire, the direct connection mentioned above may be applied.
- the lower electrode layer 211 exposed at the underlayer 212 of the thin film circuit layer 21 must be formed.
- FIGS. 3 and 4 show a process for illustrating forming the thin film circuit layer 21 .
- a film of amorphous silicon ( ⁇ -Si) is formed as a peeling layer 12 by LP-CVD, sputtering, PE-CVD, or the like.
- a silicon oxide (SiO 2 ) film is formed by PE-CVD.
- a silicon (Si) layer 213 is formed as a semiconductor layer by CVD and is then (poly)crystallized by heat treatment, such as laser radiation. This silicon layer 213 is patterned to form an active region of a transistor, a wire, and the like ( FIG. 3A ).
- a silicon oxide film is formed by thermal oxidation or PE-CVD using TEOS or the like, thereby forming a gate insulating film 214 ( FIG. 3B ).
- a polysilicon layer doped with an impurity is formed by a CVD method or the like, or a metal thin film layer primarily composed of chromium, molybdenum, tantalum, aluminum, or the like is formed by sputtering, followed by patterning, thereby forming a gate electrode and a wire 215 ( FIG. 3C ).
- a resist 220 and the gate electrode 215 as a mask, for example, phosphorous ions P + at a high concentration, are implanted into the silicon layer 213 by ion implantation, thereby forming source and drain regions made of an N-type semiconductor ( FIG. 3D ).
- boron ions at a high concentration are implanted into the silicon layer 213 by ion implantation, thereby forming source and drain regions made of a P-type semiconductor.
- heat treatment is performed, thereby activating impurities in the source and drain regions and the wires ( FIG. 3E ).
- a silicon oxide film is formed by a CVD method as an interlayer insulating film 216 ( FIG. 3F ).
- the interlayer insulating film 216 is patterned, thereby forming contact holes.
- a part of the underlayer 212 at which the lower electrode 211 is to be formed is also etched ( FIG. 3G ).
- said part described above is etched until the peeling layer 12 is exposed.
- a film which is composed, for example, of a metal, such as aluminum, molybdenum, tungsten, or ITO, or polysilicon heavily doped with an impurity, is formed and is then patterned, thereby forming the lower electrode, wire, and source and drain electrodes 217 ( FIG. 3H ).
- a metal such as aluminum, molybdenum, tungsten, or ITO, or polysilicon heavily doped with an impurity
- an interlayer insulating film (SiO 2 ) or a protective film (PSG) 218 is formed on the laminate thus formed, followed by polishing whenever necessary for planarization ( FIG. 4A ).
- a film may be formed by applying an insulating resin using spin coating onto the upper surface of the circuit-forming substrate 11 provided with wires or the like, so as to form a flat surface. As described above, the thin film circuit layer 21 is formed.
- the adhesive 32 is uniformly applied onto the upper surface of the thin film circuit layer 21 and is mounted on the transfer substrate 31 ( FIG. 4B ).
- the peeling layer 12 is irradiated with intensive light, such as laser light, from below the circuit-forming substrate 11 , thereby causing interfacial peeling or interlayer peeling of the peeling layer 12 .
- intensive light such as laser light
- the reasons for the generation of interfacial and/or interlayer peeling of the peeling layer 12 are believed to be as follows.
- the ablation of materials of the peeling layer 12 , the emission of gas components contained in the peeling layer 12 , and/or the phase transformation, such as fusion or evaporation of the peeling layer 12 by irradiation with light, may occur.
- the ablation means the phenomenon in that a solid material (in this case, materials forming the peeling layer 12 ) absorbing irradiating light is thermally or opto-chemically excited.
- a solid material in this case, materials forming the peeling layer 12
- atoms present on the surface or inside or molecular fragments formed by chemical bond dissociation are emitted.
- the peeling layer 12 is destroyed, the bonding force thereof is decreased, and as a result, the peeling layer 12 may disappear in some cases ( FIG. 4C ).
- the thin film circuit layer 21 is peeled away from the circuit-forming substrate 11 and is transferred to the transfer substrate 31 ( FIG. 4D ).
- the remaining peeling layer 12 is removed by etching, thereby forming a substrate having the first thin film circuit layer 21 shown in FIG. 2A ( FIG. 4E ).
- FIG. 2B shows the second thin film circuit layer 22 formed above the circuit-forming substrate 11 before a peeling and transferring process is performed.
- the thin film circuit layer 22 includes the underlayer 222 , a semiconductor layer 223 , a gate insulating layer 224 , a gate electrode and a wiring layer 225 , an interlayer insulating film 226 , source and drain electrodes 227 , a protective film 228 , and an upper electrode 229 .
- the second thin film circuit layer 22 is also formed above the circuit-forming substrate 11 with the peeling layer 12 provided therebetween as is the first thin film circuit layer 21 (see FIGS. 3 and 4 ). However, the second thin film circuit layer 22 provided at an intermediate position of the thin film circuit layers thus laminated is formed to have the upper electrode 229 exposed at the protective film 228 in addition to the lower electrode 221 .
- the upper electrode 229 maybe formed as shown in FIG. 4A in which a contact hole is formed in the protective film 218 (corresponding to 228 ), and a film is then formed using a wire material, followed by patterning.
- FIG. 2C shows the third thin film circuit layer 23 formed above the circuit-forming substrate 11 before a peeling and transferring process is performed.
- the thin film circuit layer 23 includes the underlayer 232 , a semiconductor layer 233 , a gate insulating layer 234 , a gate electrode and a wiring layer 235 , an interlayer insulating film 236 , source and drain electrodes 237 , a protective film 238 , and an upper electrode 239 .
- the third thin film circuit layer is also formed above the circuit-forming substrate 11 with the peeling layer 12 provided therebetween as is the first thin film circuit layer 21 .
- the third thin film circuit layer provided at the bottommost position of the thin film circuit laminate is formed to have the upper electrode 239 exposed at the protective film 238 in addition to the lower electrode 231 .
- the upper electrode 239 may be formed as shown in FIG. 4A in which a contact hole is formed in the protective film 218 (corresponding to 238 ), and a film is then formed using a wire material, followed by patterning.
- the thin film circuit layers 21 to 23 each formed on the circuit-forming substrate are laminated to each other by a peeling and transferring method.
- the thin film circuit layer 22 shown in FIG. 2B is bonded with the anisotropic conductive layer 35 and the adhesive 33 to the bottom surface of the thin film circuit layer 21 mounted on the transfer substrate 31 shown in FIG. 2A .
- the thin film circuit layer 22 is irradiated with laser light from the side of the bottom surface of the circuit-forming substrate 11 so that the peeling layer 12 is peeled away, thereby separating the circuit-forming substrate 11 from the thin film circuit layer 22 . Whenever necessary, the remaining peeling layer 12 is removed by etching.
- the thin film circuit layer 23 shown in FIG. 2C is bonded with the anisotropic conductive layer 35 and the adhesive 34 to the bottom surface of the thin film circuit layer 22 mounted at the transfer substrate 31 side.
- the thin film circuit layer 23 is irradiated with laser light from the side of the bottom surface of the circuit-forming substrate 11 so that the peeling layer 12 is peeled away, thereby separating the circuit-forming substrate 11 from the thin film circuit layer 23 .
- the remaining peeling layer 12 is removed by etching.
- Amorphous silicon has been described as a material for the peeling layer 12 by way of example, and this amorphous silicon may contain H (hydrogen).
- H hydrogen
- the peeling thereof is facilitated.
- the content of hydrogen is adjusted in consideration of film-forming conditions. For example, in the case in which a CVD method is used, a gas composition, a gas pressure, a gas atmosphere, a gas flow, a gas temperature, a substrate temperature, input power of light, and the like are taken into consideration.
- silicon oxide or a siliconate compound, titanium oxide or a titanate compound, an organic high molecular material, a metal, or the like may be optionally used.
- FIGS. 5 and 6 each show an example of another thin film circuit layer having an electrode at the bottom surface of a thin film circuit layer.
- an underlying protective layer 13 is formed between the peeling layer 12 and the underlayer 212 and the lower electrode 211 .
- the same reference numerals as those in FIG. 4 designate corresponding elements, and descriptions thereof are omitted.
- the underlying protective layer 13 is composed of a silicon nitride (SiN) layer or a metal layer, which is formed of a material different from that for the underlayer 212 , and which has functions of reducing the likelihood or preventing unnecessary components from intruding into the lower electrode 211 and the underlayer 212 from the peeling layer 12 and of reducing the likelihood or preventing the lower electrode 211 and the underlayer 212 from being damaged by heat and destructive energy applied to the peeling layer 12 when a peeling and transferring process is performed.
- the underlying protective layer 13 is removed by etching as shown in FIGS. 5E and 5F after the thin film circuit layer 21 is peeled and transferred.
- the underlying protective layer 13 may be etched by a method having a large selectivity between the underlying protective layer 13 and the underlayer 212 and/or the lower electrode 211 .
- a method having a large selectivity between the underlying protective layer 13 and the underlayer 212 and/or the lower electrode 211 For example, when silicon nitride is used for the underlying protective layer 13 , phosphoric acid, nitric acid, acetic acid, or a mixed solution (mixed acid) thereof is used to etch the underlying protective layer 13 . Since the etching rate of the underlayer 212 composed, for example, of a silicon oxide is low, the underlying protective layer 13 can be fully removed by over-etching. In addition, by forming a conductive protective layer of chromium, titanium, ITO, or the like on the bottom surface of the lower electrode 211 , corrosion thereof caused by the etching of the underlying protective layer 13 may be reduced or prevented.
- protective layers 13 and 14 are formed between the peeling layer 12 and the underlayer 212 and the lower electrode 211 .
- the same reference numerals as those in FIG. 4 designate corresponding elements, and descriptions thereof are omitted.
- the protective layer 13 is an insulating film formed, for example, of a silicon oxide layer or a silicon nitride layer, and the protective layer 14 is, for example, an amorphous silicon layer.
- the lower side layer and the upper side layer function as a peeling layer and a protective layer, respectively.
- the underlying protective layers 13 and 14 are removed by etching, as shown in FIGS. 6E and 6F , after the thin film circuit layer 21 is peeled and transferred.
- the underlying protective layer 13 may be etched by a method having a large selectivity between the underlying protective layers 13 and 14 or between the underlying protective layer 14 and the underlayer 212 and/or the lower electrode 211 .
- a solution containing fluoric acid may be used to etch the underlying protective layer 13 . Since the etching rate of the underlying protective layer 14 is low, the underlying protective layer 13 can be fully removed by over-etching.
- dry etching may be performed using a gas containing CF 4 .
- the underlying protective layer 14 can be fully removed by over-etching.
- a conductive protective layer of chromium, titanium, ITO, or the like on the bottom surface of the lower electrode 211 , corrosion thereof caused by the etching of the underlying protective layer 14 may be reduced or prevented.
- FIG. 7 shows a particular example of a thin film circuit layer, in which an inverted type organic EL display element is formed on a first thin film circuit layer.
- a thin film transistor 311 On a peeling layer provided on a circuit-forming substrate not shown in the figure, a thin film transistor 311 , a wire 312 , an anode 313 , a bank 314 , a light-emitting layer 315 , a cathode 316 , and the like are provided to form a thin film circuit layer.
- This thin film circuit layer is peeled and transferred onto the transfer substrate 31 . Since the thin film circuit layer 21 is transferred onto the transfer substrate 31 , a lower electrode 317 is exposed at an underlayer located at the bottom surface.
- the exterior connection electrode 317 is formed to be exposed at the bottom surface of the thin film circuit layer 21 as shown in FIG. 7 , signals can be supplied from the outside.
- the thin film circuit layer 21 having an inverted structure with respect to the transfer substrate 31 can be used as a thin film circuit of an organic EL pixel.
- the number of steps can be advantageously decreased.
- the lamination of thin film circuit layers may be performed by changing the number of layers in consideration of the lamination position and the complicacy of circuit.
- a second thin film circuit layer may be provided on a part of a first thin film circuit layer.
- a third thin film circuit layer may be further provided.
- a plurality of second thin film circuit layers is provided on a first thin film circuit layer.
- a third thin film circuit layer may be formed.
- the structure of lamination of thin film circuit layers may be variously formed, and an optional structure may be selected in accordance with requirements.
- FIGS. 8A-8E include schematics for illustrating examples of electronic systems using electro-optical apparatuses provided with various thin film circuit devices according to the present invention.
- the thin film circuit devices described above are used, for example, for electro-optical apparatus, drive apparatus, and control apparatus.
- the electro-optical apparatus generally indicate apparatus each provided with an electro-optical element having an electrical function of emitting light or changing the state of light incident from the outside, and the electro-optical apparatus include an apparatus that emits light by itself and an apparatus that controls exterior light passing therethrough.
- electro-optical elements there may be mentioned liquid crystal elements, electrophoretic elements composed of a dispersion medium and electrophoretic particles dispersed therein, the EL (electroluminescent) elements described above, and electron-emitting elements emitting light by colliding electrons against a light-emitting plate, the electrons being generated by application of an electric field, and display apparatuses provided with the elements mentioned above are called electro-optical apparatus.
- the electronic system for example, there may be mentioned an electronic system which uses an electro-optical apparatus provided with a thin film circuit laminate device as a display portion, and in an aspect of the present invention, video cameras, televisions, large screen display systems, mobile phones, personal computers, portable information systems (so-called PDA), and the like may be mentioned as the electronic systems.
- PDA portable information systems
- FIG. 8A shows a mobile phone as one example of the electronic system.
- a mobile phone 510 is composed of an antenna part 511 , a voice output part 512 , a voice input part 513 , an operation part 514 , and an electro-optical apparatus 51 including a thin film circuit laminate device.
- the thin film circuit laminate device of an aspect of the present invention can be used as a display portion of the mobile phone 510 .
- FIG. 8B shows a video camera as one example of the electronic system, and a video camera 520 is composed of an image-receiving part 521 , an operation part 522 , a voice input part 523 , and the electro-optical apparatus 51 including a thin film circuit laminate device.
- the thin film circuit laminate device of an aspect of the present invention can be used as a viewfinder and/or a display portion.
- FIG. 8C shows a portable personal computer as one example of the electronic system, and a portable personal computer 530 is composed of a camera part 531 , an operation part 532 , and the electro-optical apparatus 51 including a thin film circuit laminate device.
- the thin film circuit laminate device of an aspect of the present invention can be used as a display portion.
- FIG. 8D shows a headmount display as one example of the electronic system.
- a headmount display 540 is composed of a band 541 , an optical system container 542 , and the electro-optical apparatus 51 including a thin film circuit laminate device.
- the thin film circuit laminate device of an aspect of the present invention can be used as an image display apparatus.
- FIG. 8E shows a rear projector as one example of the electronic system, and a projector 550 is composed of a light source 552 , a synthetic optical system 553 , a mirror 554 , a mirror 555 , a screen 556 , and the electro-optical apparatus 51 including a thin film circuit laminate device, which are contained in a case 551 .
- FIG. 8F shows a front projector as one example of the electronic system.
- a projector 560 has a case 562 in which an optical system 561 and the electro-optical apparatus 51 including a thin film circuit laminate device are contained, and in the front projector, an image can be displayed on a screen 563 .
- the electro-optical apparatus of an aspect of the present invention can be used as an image display apparatus.
- the thin film circuit laminate device of an aspect of the present invention can be applied to various electronic systems.
- the thin film circuit laminate device of an aspect of the present invention may be used for facsimile machines provided with a display function, viewfinders of digital cameras, portable televisions, DSP systems, PDA, electronic notebooks, electric bulletin boards, advertisement display systems, and the like.
- a thin film circuit device can be formed by laminating thin film circuit layers to each other using a peeling and transferring method.
- an area of the substrate in which circuits are formed can be decreased as compared to that in the case in which individual circuits are directly formed on the substrate.
- the distance of signal transmittance between the circuits can be decreased.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Nonlinear Science (AREA)
- Manufacturing & Machinery (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
To provide a thin film circuit device in which a three-dimensional circuit structure is realized, a thin film circuit device is formed of a first thin film circuit layer and a second thin film circuit layer laminated to each other. The first thin film circuit layer contains a first thin film circuit provided between an underlayer and a protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer. The second thin film circuit layer contains a second thin film circuit provided between an underlayer and a protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer. The first and the second thin film circuits are bonded to each other so that the lower connection electrode of the first thin film circuit layer is electrically connected to the upper electrode of the second thin film circuit layer.
Description
- 1. Field of Invention
- The present invention relates to thin film circuit devices having a three-dimensional thin film circuit and to methods to manufacture a thin film circuit device having a three-dimensional circuit structure.
- 2. Description of Related Art
- In semiconductor devices and the like, since high temperature processes and the like are performed when necessary layers and regions are formed on a substrate to form a laminate, selection of members to form substrates and laminates may be restricted in some cases. For example, resin films, plastic substrates, and the like are not suitable in a high temperature process.
- Hence, for example, according to Japanese Unexamined Patent Application Publication No. 2002-217391, a peeling and transferring technique has been proposed in which a thin film circuit is formed above a heat resistant first substrate with an isolation layer provided therebetween. A non-heat resistant second substrate is adhered onto this thin film circuit. The isolation layer is destroyed so that the thin film circuit is transferred to the second substrate side.
- Semiconductor devices and/or display devices having a three-dimensional circuit structure may be formed by laminating thin film circuits using the peeling and transferring technique described above.
- However, in order to realize a three-dimensional circuit structure, wire connection between upper and lower thin film circuit layers formed by a peeling and transferring process and electrical connection between laminated films in the vertical direction must be realized. In the peeling and transferring technique performed using substrates, described above, non-electrical conductive peeling layers, adhesive layers, protective layers, and the like are used to form a laminate. However, wire connection between thin film circuits laminated to each other in the vertical direction has not been proposed.
- Accordingly, the present invention provides a manufacturing method of a thin film device, which uses a peeling and transferring technique capable of laminating thin film circuit layers and of simultaneously forming electrical connection therebetween.
- In addition, the present invention provides a thin film device to realize a three-dimensional circuit structure.
- Furthermore, the present invention provides an electronic system using the thin film device described above.
- To these ends, a thin film circuit device of an aspect of the present invention, includes: an underlayer; a thin film circuit layer formed on the underlayer and functioning as an electrical circuit; and a connection electrode which penetrates a part of the underlayer so as to be exposed approximately flush with a surface of the underlayer at the side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit.
- According to the structure described above, since the connection electrode is exposed outside, the thin film circuit layer and the exterior circuit can be connected to each other. Hence thin film circuit layers can be easily laminated to each other.
- The thin film circuit device described above may further include a protective layer covering at least a part of the thin film circuit layer for protection; and a connection electrode which penetrates a part of the protective layer so as to be exposed approximately flush with a surface of the protective layer at the side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit. Accordingly, the electrical connection can be performed at the upper side and the lower side of the thin film circuit layer.
- In addition, a thin film circuit device according to an aspect of the present invention, includes: a heat resistant first substrate; a peeling layer which is formed on the first substrate and which is to be peeled away by energy applied thereto; an insulating underlayer formed on the peeling layer; a thin film circuit layer formed on the underlayer; a protective layer formed on the thin film circuit layer; and a connection electrode which penetrates a part of the underlayer to be in contact with the peeling layer and which is to be exposed to connect the thin film circuit layer to an exterior circuit when the peeling layer is peeled away.
- According to the structure described above, a basic thin film circuit layer can be obtained to form a thin film circuit laminate device which is composed of a plurality of said thin film circuit layers. When a peeling and transferring process is repeated using the structure described above, a laminate of the thin film circuit layers can be easily formed.
- The thin film circuit device described above may further include a protective layer between the peeling layer and the underlayer. By the presence of this protective layer mentioned above, damage done to the thin film circuit layer in a peeling and transferring process, in particular, damage done to the connection electrode in contact with the peeling layer can be reduced or prevented.
- A thin film circuit device according to an aspect of the present invention, includes: a first thin film circuit layer having a first thin film circuit formed between an underlayer and a protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer; and a second thin film circuit layer having a second thin film circuit formed between an underlayer and a protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer. In the thin film circuit device described above, the first thin film circuit layer and the second thin film circuit layer are laminated to each other. The lower connection electrode of the first thin film circuit layer is connected to the upper connection electrode of the second thin film circuit layer.
- According to the structure described above, a basic laminate structure can be obtained which is composed of a plurality of thin film circuit layers.
- In the thin film circuit device described above, the lower connection electrode and the upper connection electrode may be connected to each other with an anisotropic conductive material or a conductive adhesive. Hence, electrical connection between the thin film circuit layers can be achieved.
- The lower connection electrode may be formed approximately flush with the underlayer. Hence, the bottom surface of the thin film circuit layer is planarized, and as a result, the lamination can be easily performed.
- The bottom surface of the first thin film circuit layer and that of the second thin film circuit layer may be formed approximately parallel to each other. Hence, the lamination accuracy of the thin film circuit layers can be enhanced.
- An electro-optical apparatus of an aspect of the present invention includes the thin film circuit device described above.
- An electronic system of an aspect of the present invention includes the electro-optical apparatus described above.
- A method to manufacture a thin film circuit device, according to an aspect of the present invention, includes: forming a first thin film circuit layer above a first circuit-forming substrate with a peeling layer provided therebetween, the first thin film circuit layer having one connection electrode on at least a surface thereof; forming a second thin film circuit layer above a second circuit-forming substrate with a peeling layer provided therebetween, the second thin film circuit layer having connection electrodes on one surface and another surface thereof; peeling the first thin film circuit layer from the first circuit-forming substrate so that the first thin film circuit layer is transferred to a transfer substrate; bonding the second thin film circuit layer to the first thin film circuit layer transferred to the transfer substrate so that one of said connection electrodes of the second thin film circuit layer overlaps the connection electrode of the first thin film circuit layer; and peeling the second thin film circuit layer from the second circuit-forming substrate so that the second thin film circuit layer is transferred to the first thin film circuit layer to form a laminate.
- According to the manufacturing method described above, a thin film circuit device formed of thin film circuit layers laminated to each other can be manufactured.
- In the method to manufacture a thin film circuit device, described above, at least one of the first thin film circuit layer and the second thin film circuit layer may be formed by a process including forming an underlayer on the peeling layer provided on the circuit-forming substrate; forming a thin film circuit on the underlayer; forming a contact hole penetrating a part of the underlayer to expose the peeling layer; forming an electrode wire between the contact hole and the thin film circuit; and forming a protective layer on the thin film circuit and the electrode wire. Hence, a thin film circuit layer provided with a connection electrode can be obtained as a transfer unit.
- The method to manufacture a thin film circuit device, described above, may include: forming a protective layer between the peeling layer and the thin film circuit layer; and removing the protective layer after the thin film circuit layer is peeled away to transfer. Accordingly, the damage done to the thin film circuit layer in a peeling and transferring process, in particular, the damage done to the connection electrode in contact with the peeling layer can be reduced or prevented.
- The protective layer may be formed of a material different from that for the underlayer of the thin film circuit layer, and for example, a film made of silicon nitride or a metal may be used.
- The protective layer described above may be formed to have a three-layered structure composed, for example, of an amorphous silicon layer/an insulating film (silicon oxide or silicon nitride)/an amorphous silicon layer. In the case described above, the amorphous silicon layer at the lower side (at the circuit-forming substrate side) functions as a peeling layer, and the amorphous silicon layer at the upper side functions as a protective layer.
-
FIG. 1 is a schematic for illustrating a thin film circuit device of an aspect of the present invention, which is formed of thin film circuit layers laminated to each other; -
FIGS. 2A to 2D show a process for manufacturing a thin film circuit layer; -
FIGS. 3A to 3H show a process for illustrating manufacturing steps of a thin film circuit layer; -
FIGS. 4A to 4E show a process for illustrating manufacturing a thin film circuit layer having a connection electrode for connection between thin film circuit layers; -
FIGS. 5A to 5F show another process for illustrating manufacturing of a thin film circuit layer having a connection electrode for connection between thin film circuit layers; -
FIGS. 6A to 6F show still another process for illustrating manufacturing of a thin film circuit layer having a connection electrode for connection between thin film circuit layers; -
FIG. 7 is a schematic for illustrating a particular example (organic EL display apparatus) of a thin film circuit device; and -
FIGS. 8A to 8F are schematics for illustrating electronic systems using a thin film circuit device of an aspect of the present invention, the device formed by laminating thin film circuit layers to each other. - Hereinafter, the exemplary embodiments of the present invention will be described with reference to drawings.
- A thin film circuit device of an exemplary embodiment of the present invention has a structure in which thin film circuits are laminated to each other in the vertical direction, and in which, among the circuits mentioned above, an intermediate thin film circuit present inside the laminate is formed to have electrodes on the upper and the lower surfaces thereof for electrical connection. In addition, in the thin film circuit device according to the exemplary embodiment of the present invention, since an electrode is formed which is exposed at the rear surface of the thin film circuit, connection with a thin film circuit located thereunder and/or an exterior wire can be easily achieved.
- In a manufacturing method according to an exemplary embodiment of the present invention, a process to manufacture a thin film circuit device using a peeling and transferring technique includes forming a contact hole penetrating an underlayer of a thin film circuit layer, and forming a conductive film in the contact hole using a metal or the like so as be exposed at the bottom surface of the underlayer. This conductive film is used as a rear surface electrode to connect with another thin film circuit layer. This rear surface electrode and the underlayer of the thin film circuit layer are formed flush with each other so that the rear surface of the thin film circuit layer is flat. Hence the lamination of the layers can be easily performed. Irregularities generated on a surface of a thin film circuit layer located at the upper side can be reduced or prevented, which irregularities are formed when thin film circuit layers having irregular surfaces are laminated to each other.
-
FIG. 1 is a cross-sectional schematic showing an example of a thin film circuit device according to an aspect of the present invention, the device having a three-dimensional circuit composed of thin film circuit layers laminated to each other. - In this figure, a first thin
film circuit layer 21 is mounted on atransfer substrate 31 with an adhesive 32 provided therebetween. A second thinfilm circuit layer 22 is mounted on this first thinfilm circuit layer 21 with an adhesive 33 provided therebetween. Furthermore, a third thinfilm circuit layer 23 is mounted on this second thinfilm circuit layer 22 with an adhesive 34 provided therebetween. Each thin film circuit layer has a thin film circuit including at least one of a thin film transistor, a diode, a resistor, a capacitor, a wire, and an electrode and has a predetermined circuit function. - Connection between the thin film circuit layers 21 and 22 is performed with a
lower electrode 211 of the thinfilm circuit layer 21, anupper electrode 229 of the thinfilm circuit layer 22, and an anisotropicconductive material 35 provided between theelectrodes lower electrode 221 of the thinfilm circuit layer 22, anupper electrode 239 of the thinfilm circuit layer 23, and an anisotropicconductive material 35 provided between theelectrodes conductive material 35 has conductive properties in a compressive direction. For example, when conductive particles are dispersed in an insulating elastic material, and the elastic material is then compressed, the conductive particles are connected to each other, thereby forming an electrical conductive path in the compressive direction. - The lowermost thin
film circuit layer 23 has alower electrode 231 exposed at the bottom surface thereof. An exterior wire, not shown in the figure, is connected to thislower electrode 231 with a flexible printed wire, tab bonding, wire bonding, or the like. The bottom surfaces of underlayers (212, 222, and 232 described later) carrying the thin film circuits of the individual thin film circuit layers and the exposed surfaces of the lower electrodes exposed at the underlayers are formed to be flush with each other. Accordingly, when theadhesive layers - Alternatively, instead of the anisotropic
conductive material 35 described above or in addition thereto, a conductive adhesive may be used for connection between the electrodes. - In the exemplary embodiment described above, the thin
film circuit layer 21 located at the upper side and the thinfilm circuit layer 23 located at the lower side are connected to each other with a thin film transistor circuit of the thinfilm circuit layer 22. However, the thin film circuit layers 21 and 23 may be connected to each other only by an electrode wire. For example, in the case of an electrical power supply wire, the direct connection mentioned above may be applied. - As described above, when thin film circuit layers having electrodes exposed at the upper and the lower surfaces thereof are laminate to each other, a thin film device having a three-dimensional electrical circuit can be obtained.
- Next, with reference to FIGS. 2 to 4, a method to manufacture a thin film device having the above three-dimensional circuit structure will be described.
- In order to laminate thin film circuit layers, as shown in
FIG. 2A , thelower electrode layer 211 exposed at theunderlayer 212 of the thinfilm circuit layer 21 must be formed. -
FIGS. 3 and 4 show a process for illustrating forming the thinfilm circuit layer 21. - First, on a transparent circuit-forming
substrate 11, having superior heat resistance and made of quartz glass substrate (SiO2) or the like, a film of amorphous silicon (α-Si) is formed as apeeling layer 12 by LP-CVD, sputtering, PE-CVD, or the like. On the film thus formed, as the underlayer (insulating layer) 212 of thethin film circuit 21, a silicon oxide (SiO2) film is formed by PE-CVD. On the film thus formed, a silicon (Si)layer 213 is formed as a semiconductor layer by CVD and is then (poly)crystallized by heat treatment, such as laser radiation. Thissilicon layer 213 is patterned to form an active region of a transistor, a wire, and the like (FIG. 3A ). - On the layer thus patterned, a silicon oxide film is formed by thermal oxidation or PE-CVD using TEOS or the like, thereby forming a gate insulating film 214 (
FIG. 3B ). - On the
gate insulating film 214, a polysilicon layer doped with an impurity is formed by a CVD method or the like, or a metal thin film layer primarily composed of chromium, molybdenum, tantalum, aluminum, or the like is formed by sputtering, followed by patterning, thereby forming a gate electrode and a wire 215 (FIG. 3C ). - Next, using a resist 220 and the
gate electrode 215 as a mask, for example, phosphorous ions P+at a high concentration, are implanted into thesilicon layer 213 by ion implantation, thereby forming source and drain regions made of an N-type semiconductor (FIG. 3D ). In the same manner as described above, using a resist 221 and thegate electrode 215 as a mask, boron ions at a high concentration are implanted into thesilicon layer 213 by ion implantation, thereby forming source and drain regions made of a P-type semiconductor. In addition, heat treatment is performed, thereby activating impurities in the source and drain regions and the wires (FIG. 3E ). - On the
gate electrodes 215 and thegate oxide film 214, a silicon oxide film is formed by a CVD method as an interlayer insulating film 216 (FIG. 3F ). - Next, the
interlayer insulating film 216 is patterned, thereby forming contact holes. In addition to contact holes in the source and the drain regions of the transistors, a part of theunderlayer 212 at which thelower electrode 211 is to be formed is also etched (FIG. 3G ). In order to form thelower electrode 211, said part described above is etched until thepeeling layer 12 is exposed. - Subsequently, a film, which is composed, for example, of a metal, such as aluminum, molybdenum, tungsten, or ITO, or polysilicon heavily doped with an impurity, is formed and is then patterned, thereby forming the lower electrode, wire, and source and drain electrodes 217 (
FIG. 3H ). - Furthermore, as shown in
FIG. 4 , an interlayer insulating film (SiO2) or a protective film (PSG) 218 is formed on the laminate thus formed, followed by polishing whenever necessary for planarization (FIG. 4A ). In this case, as theprotective film 218, a film may be formed by applying an insulating resin using spin coating onto the upper surface of the circuit-formingsubstrate 11 provided with wires or the like, so as to form a flat surface. As described above, the thinfilm circuit layer 21 is formed. - Furthermore, the adhesive 32 is uniformly applied onto the upper surface of the thin
film circuit layer 21 and is mounted on the transfer substrate 31 (FIG. 4B ). - The
peeling layer 12 is irradiated with intensive light, such as laser light, from below the circuit-formingsubstrate 11, thereby causing interfacial peeling or interlayer peeling of thepeeling layer 12. For example, as disclosed in Japanese Unexamined Patent Application Publication No. 10-125930, the reasons for the generation of interfacial and/or interlayer peeling of thepeeling layer 12 are believed to be as follows. The ablation of materials of thepeeling layer 12, the emission of gas components contained in thepeeling layer 12, and/or the phase transformation, such as fusion or evaporation of thepeeling layer 12 by irradiation with light, may occur. In this case, the ablation means the phenomenon in that a solid material (in this case, materials forming the peeling layer 12) absorbing irradiating light is thermally or opto-chemically excited. As a result, atoms present on the surface or inside or molecular fragments formed by chemical bond dissociation are emitted. In this case, thepeeling layer 12 is destroyed, the bonding force thereof is decreased, and as a result, thepeeling layer 12 may disappear in some cases (FIG. 4C ). - The thin
film circuit layer 21 is peeled away from the circuit-formingsubstrate 11 and is transferred to the transfer substrate 31 (FIG. 4D ). In addition, the remainingpeeling layer 12 is removed by etching, thereby forming a substrate having the first thinfilm circuit layer 21 shown inFIG. 2A (FIG. 4E ). -
FIG. 2B shows the second thinfilm circuit layer 22 formed above the circuit-formingsubstrate 11 before a peeling and transferring process is performed. The thinfilm circuit layer 22 includes theunderlayer 222, asemiconductor layer 223, agate insulating layer 224, a gate electrode and awiring layer 225, aninterlayer insulating film 226, source and drainelectrodes 227, aprotective film 228, and anupper electrode 229. The second thinfilm circuit layer 22 is also formed above the circuit-formingsubstrate 11 with thepeeling layer 12 provided therebetween as is the first thin film circuit layer 21 (seeFIGS. 3 and 4 ). However, the second thinfilm circuit layer 22 provided at an intermediate position of the thin film circuit layers thus laminated is formed to have theupper electrode 229 exposed at theprotective film 228 in addition to thelower electrode 221. - The
upper electrode 229 maybe formed as shown inFIG. 4A in which a contact hole is formed in the protective film 218 (corresponding to 228), and a film is then formed using a wire material, followed by patterning.FIG. 2C shows the third thinfilm circuit layer 23 formed above the circuit-formingsubstrate 11 before a peeling and transferring process is performed. The thinfilm circuit layer 23 includes theunderlayer 232, asemiconductor layer 233, agate insulating layer 234, a gate electrode and awiring layer 235, aninterlayer insulating film 236, source and drainelectrodes 237, aprotective film 238, and anupper electrode 239. The third thin film circuit layer is also formed above the circuit-formingsubstrate 11 with thepeeling layer 12 provided therebetween as is the first thinfilm circuit layer 21. However, the third thin film circuit layer provided at the bottommost position of the thin film circuit laminate is formed to have theupper electrode 239 exposed at theprotective film 238 in addition to thelower electrode 231. Theupper electrode 239 may be formed as shown inFIG. 4A in which a contact hole is formed in the protective film 218 (corresponding to 238), and a film is then formed using a wire material, followed by patterning. - As shown in
FIG. 2D , the thin film circuit layers 21 to 23 each formed on the circuit-forming substrate are laminated to each other by a peeling and transferring method. - The thin
film circuit layer 22 shown inFIG. 2B is bonded with the anisotropicconductive layer 35 and the adhesive 33 to the bottom surface of the thinfilm circuit layer 21 mounted on thetransfer substrate 31 shown inFIG. 2A . The thinfilm circuit layer 22 is irradiated with laser light from the side of the bottom surface of the circuit-formingsubstrate 11 so that thepeeling layer 12 is peeled away, thereby separating the circuit-formingsubstrate 11 from the thinfilm circuit layer 22. Whenever necessary, the remainingpeeling layer 12 is removed by etching. - The thin
film circuit layer 23 shown inFIG. 2C is bonded with the anisotropicconductive layer 35 and the adhesive 34 to the bottom surface of the thinfilm circuit layer 22 mounted at thetransfer substrate 31 side. The thinfilm circuit layer 23 is irradiated with laser light from the side of the bottom surface of the circuit-formingsubstrate 11 so that thepeeling layer 12 is peeled away, thereby separating the circuit-formingsubstrate 11 from the thinfilm circuit layer 23. Whenever necessary, the remainingpeeling layer 12 is removed by etching. - As described above, a thin film device composed of three-dimensionally arranged thin film circuits is formed as shown in
FIG. 1 . The connection of the thin film device to exterior wires can be performed with thelower electrode 231 exposed at the bottom surface using a solder bump, a flexible wire substrate (tape), wire bonding, and the like. - Amorphous silicon has been described as a material for the
peeling layer 12 by way of example, and this amorphous silicon may contain H (hydrogen). When hydrogen is contained, since an internal pressure is generated in the peeling layer due to emission of hydrogen by irradiation with light, the peeling thereof is facilitated. The content of hydrogen is adjusted in consideration of film-forming conditions. For example, in the case in which a CVD method is used, a gas composition, a gas pressure, a gas atmosphere, a gas flow, a gas temperature, a substrate temperature, input power of light, and the like are taken into consideration. In addition, as the peeling layer, silicon oxide or a siliconate compound, titanium oxide or a titanate compound, an organic high molecular material, a metal, or the like may be optionally used. - When thin film circuit layers are laminated to each other in a three-dimensional manner as described above by a peeling and transferring method, an electrode for electrical connection may be formed at the bottom surface of the thin film circuit layer.
FIGS. 5 and 6 each show an example of another thin film circuit layer having an electrode at the bottom surface of a thin film circuit layer. - In the example shown in
FIGS. 5A to 5F, an underlyingprotective layer 13 is formed between the peelinglayer 12 and theunderlayer 212 and thelower electrode 211. In the figure, the same reference numerals as those inFIG. 4 designate corresponding elements, and descriptions thereof are omitted. - The underlying
protective layer 13 is composed of a silicon nitride (SiN) layer or a metal layer, which is formed of a material different from that for theunderlayer 212, and which has functions of reducing the likelihood or preventing unnecessary components from intruding into thelower electrode 211 and theunderlayer 212 from thepeeling layer 12 and of reducing the likelihood or preventing thelower electrode 211 and theunderlayer 212 from being damaged by heat and destructive energy applied to thepeeling layer 12 when a peeling and transferring process is performed. The underlyingprotective layer 13 is removed by etching as shown inFIGS. 5E and 5F after the thinfilm circuit layer 21 is peeled and transferred. - As described above, the underlying
protective layer 13 may be etched by a method having a large selectivity between the underlyingprotective layer 13 and theunderlayer 212 and/or thelower electrode 211. For example, when silicon nitride is used for the underlyingprotective layer 13, phosphoric acid, nitric acid, acetic acid, or a mixed solution (mixed acid) thereof is used to etch the underlyingprotective layer 13. Since the etching rate of theunderlayer 212 composed, for example, of a silicon oxide is low, the underlyingprotective layer 13 can be fully removed by over-etching. In addition, by forming a conductive protective layer of chromium, titanium, ITO, or the like on the bottom surface of thelower electrode 211, corrosion thereof caused by the etching of the underlyingprotective layer 13 may be reduced or prevented. - In the example shown in
FIGS. 6A to 6F,protective layers layer 12 and theunderlayer 212 and thelower electrode 211. In the figure, the same reference numerals as those inFIG. 4 designate corresponding elements, and descriptions thereof are omitted. - The
protective layer 13 is an insulating film formed, for example, of a silicon oxide layer or a silicon nitride layer, and theprotective layer 14 is, for example, an amorphous silicon layer. Of the two amorphous silicon layers 12 and 14 thus formed, the lower side layer and the upper side layer function as a peeling layer and a protective layer, respectively. The underlyingprotective layers FIGS. 6E and 6F , after the thinfilm circuit layer 21 is peeled and transferred. - As is the case described above, the underlying
protective layer 13 may be etched by a method having a large selectivity between the underlyingprotective layers protective layer 14 and theunderlayer 212 and/or thelower electrode 211. For example, when silicon oxide is used for the underlyingprotective layer 13, and an amorphous silicon layer is used as the underlyingprotective layer 14, a solution containing fluoric acid may be used to etch the underlyingprotective layer 13. Since the etching rate of the underlyingprotective layer 14 is low, the underlyingprotective layer 13 can be fully removed by over-etching. In addition, when the underlyingprotective layer 14 is etched, for example, dry etching may be performed using a gas containing CF4. Since the etching rate of theunderlayer 212 formed, for example, of silicon oxide is low, the underlyingprotective layer 14 can be fully removed by over-etching. In addition, by forming a conductive protective layer of chromium, titanium, ITO, or the like on the bottom surface of thelower electrode 211, corrosion thereof caused by the etching of the underlyingprotective layer 14 may be reduced or prevented. -
FIG. 7 shows a particular example of a thin film circuit layer, in which an inverted type organic EL display element is formed on a first thin film circuit layer. On a peeling layer provided on a circuit-forming substrate not shown in the figure, athin film transistor 311, awire 312, ananode 313, abank 314, a light-emittinglayer 315, acathode 316, and the like are provided to form a thin film circuit layer. This thin film circuit layer is peeled and transferred onto thetransfer substrate 31. Since the thinfilm circuit layer 21 is transferred onto thetransfer substrate 31, alower electrode 317 is exposed at an underlayer located at the bottom surface. - Since the
exterior connection electrode 317 is formed to be exposed at the bottom surface of the thinfilm circuit layer 21 as shown inFIG. 7 , signals can be supplied from the outside. By a peeling and transferring process performed only once on thetransfer substrate 31, the thinfilm circuit layer 21 having an inverted structure with respect to thetransfer substrate 31 can be used as a thin film circuit of an organic EL pixel. In the case described above, compared to the case in which a non-inverted structure is formed by performing a peeling and transferring process twice with the use of a temporary transferring substrate, the number of steps can be advantageously decreased. - Accordingly, the lamination of thin film circuit layers may be performed by changing the number of layers in consideration of the lamination position and the complicacy of circuit. For example, a second thin film circuit layer may be provided on a part of a first thin film circuit layer. On a part of this second thin film circuit layer, a third thin film circuit layer may be further provided. In addition, a plurality of second thin film circuit layers is provided on a first thin film circuit layer. On said plurality of second thin film circuit layers, a third thin film circuit layer may be formed.
- As described above, the structure of lamination of thin film circuit layers may be variously formed, and an optional structure may be selected in accordance with requirements.
-
FIGS. 8A-8E include schematics for illustrating examples of electronic systems using electro-optical apparatuses provided with various thin film circuit devices according to the present invention. The thin film circuit devices described above are used, for example, for electro-optical apparatus, drive apparatus, and control apparatus. In an aspect of the present invention, the electro-optical apparatus generally indicate apparatus each provided with an electro-optical element having an electrical function of emitting light or changing the state of light incident from the outside, and the electro-optical apparatus include an apparatus that emits light by itself and an apparatus that controls exterior light passing therethrough. For example, as the electro-optical elements, there may be mentioned liquid crystal elements, electrophoretic elements composed of a dispersion medium and electrophoretic particles dispersed therein, the EL (electroluminescent) elements described above, and electron-emitting elements emitting light by colliding electrons against a light-emitting plate, the electrons being generated by application of an electric field, and display apparatuses provided with the elements mentioned above are called electro-optical apparatus. - As the electronic system, for example, there may be mentioned an electronic system which uses an electro-optical apparatus provided with a thin film circuit laminate device as a display portion, and in an aspect of the present invention, video cameras, televisions, large screen display systems, mobile phones, personal computers, portable information systems (so-called PDA), and the like may be mentioned as the electronic systems.
-
FIG. 8A shows a mobile phone as one example of the electronic system. Amobile phone 510 is composed of anantenna part 511, avoice output part 512, avoice input part 513, anoperation part 514, and an electro-optical apparatus 51 including a thin film circuit laminate device. As described above, the thin film circuit laminate device of an aspect of the present invention can be used as a display portion of themobile phone 510.FIG. 8B shows a video camera as one example of the electronic system, and avideo camera 520 is composed of an image-receivingpart 521, anoperation part 522, avoice input part 523, and the electro-optical apparatus 51 including a thin film circuit laminate device. As described above, the thin film circuit laminate device of an aspect of the present invention can be used as a viewfinder and/or a display portion.FIG. 8C shows a portable personal computer as one example of the electronic system, and a portablepersonal computer 530 is composed of acamera part 531, anoperation part 532, and the electro-optical apparatus 51 including a thin film circuit laminate device. As described above, the thin film circuit laminate device of an aspect of the present invention can be used as a display portion. -
FIG. 8D shows a headmount display as one example of the electronic system. Aheadmount display 540 is composed of a band 541, anoptical system container 542, and the electro-optical apparatus 51 including a thin film circuit laminate device. As described above, the thin film circuit laminate device of an aspect of the present invention can be used as an image display apparatus.FIG. 8E shows a rear projector as one example of the electronic system, and aprojector 550 is composed of alight source 552, a syntheticoptical system 553, amirror 554, amirror 555, ascreen 556, and the electro-optical apparatus 51 including a thin film circuit laminate device, which are contained in acase 551. As described above, the thin film circuit laminate device of an aspect of the present invention can be used as an image display apparatus.FIG. 8F shows a front projector as one example of the electronic system. Aprojector 560 has acase 562 in which anoptical system 561 and the electro-optical apparatus 51 including a thin film circuit laminate device are contained, and in the front projector, an image can be displayed on ascreen 563. As described above, the electro-optical apparatus of an aspect of the present invention can be used as an image display apparatus. - In addition to the examples described above, the thin film circuit laminate device of an aspect of the present invention can be applied to various electronic systems. For example, the thin film circuit laminate device of an aspect of the present invention may be used for facsimile machines provided with a display function, viewfinders of digital cameras, portable televisions, DSP systems, PDA, electronic notebooks, electric bulletin boards, advertisement display systems, and the like.
- As has thus been described, according to an aspect of the present invention, a thin film circuit device can be formed by laminating thin film circuit layers to each other using a peeling and transferring method. In addition, by using a laminated thin film circuit layers, an area of the substrate in which circuits are formed can be decreased as compared to that in the case in which individual circuits are directly formed on the substrate. Furthermore, by laminating thin film circuits to each other, the distance of signal transmittance between the circuits can be decreased.
Claims (11)
1. A thin film circuit device, comprising:
an underlayer;
a thin film circuit layer formed on the underlayer and functioning as an electrical circuit; and
a connection electrode which penetrates a part of the underlayer so as to be exposed approximately flush with a surface of the underlayer at a side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit.
2. The thin film circuit device according to claim 1 , further comprising:
a first protective layer covering at least a part of the thin film circuit layer for protection; and
a connection electrode which penetrates a part of the first protective layer so as to be exposed approximately flush with a surface of the first protective layer at the side opposite to the thin film circuit layer and which connects the thin film circuit layer to an exterior circuit.
3. A thin film circuit device, comprising:
a heat resistant first substrate;
a peeling layer which is formed on the first substrate and which is to be peeled away by energy applied thereto;
an insulating underlayer formed on the peeling layer;
a thin film circuit layer formed on the underlayer;
a first protective layer formed on the thin film circuit layer; and
a connection electrode which penetrates a part of the underlayer to be in contact with the peeling layer and which is to be exposed to connect the thin film circuit layer to an exterior circuit when the peeling layer is removed away.
4. The thin film circuit device according to claim 3 , further comprising:
a second protective layer between the peeling layer and the underlayer.
5. A thin film circuit device, comprising:
a first thin film circuit layer having a first thin film circuit formed between an underlayer and a first protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer; and
a second thin film circuit layer having a second thin film circuit formed between an underlayer and a first protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the first protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer,
the first thin film circuit layer and the second thin film circuit layer being laminated to each other, and
the lower connection electrode of the first thin film circuit layer being connected to the upper connection electrode of the second thin film circuit layer.
6. The thin film circuit device according to claim 5 , the lower connection electrode and the upper connection electrode being connected to each other with an anisotropic conductive material or a conductive adhesive.
7. An electro-optical apparatus, comprising:
the thin film circuit device according to claim 1 .
8. An electronic system, comprising:
the electro-optical apparatus according to claim 7 .
9. A method to manufacture a thin film circuit device, comprising:
forming a first thin film circuit layer above a first circuit-forming substrate with a peeling layer provided therebetween, the first thin film circuit layer having one connection electrode on at least a surface thereof;
forming a second thin film circuit layer above a second circuit-forming substrate with a peeling layer provided therebetween, the second thin film circuit layer having connection electrodes on one surface and another surface thereof;
peeling the first thin film circuit layer from the first circuit-forming substrate so that the first thin film circuit layer is transferred to a transfer substrate;
bonding the second thin film circuit layer to the first thin film circuit layer transferred to the transfer substrate so that one of said connection electrodes of the second thin film circuit layer overlaps the connection electrode of the first thin film circuit layer; and
peeling the second thin film circuit layer from the second circuit-forming substrate so that the second thin film circuit layer is transferred to the first thin film circuit layer to form a laminate.
10. The method to manufacture a thin film circuit device, according to claim 9 , further comprising forming at least one of the first thin film circuit layer and the second thin film circuit layer by:
forming an underlayer on the peeling layer provided on the circuit-forming substrate;
forming a thin film circuit on the underlayer;
forming a contact hole penetrating a part of the underlayer to expose the peeling layer;
forming an electrode wire between the contact hole and the thin film circuit; and
forming a first protective layer on the thin film circuit and the electrode wire.
11. The method to manufacturing a thin film circuit device, according to claim 9 , further comprising:
forming a second protective layer between the peeling layer and the thin film circuit layer; and
removing the second protective layer after the thin film circuit layer is peeled away to transfer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/272,696 US7105422B2 (en) | 2003-05-22 | 2005-11-15 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003145468A JP2004349513A (en) | 2003-05-22 | 2003-05-22 | Thin film circuit device, its manufacturing method, electrooptic device, and electronic equipment |
JP2003-145468(P) | 2003-05-22 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/272,696 Division US7105422B2 (en) | 2003-05-22 | 2005-11-15 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050006647A1 true US20050006647A1 (en) | 2005-01-13 |
Family
ID=33532627
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/850,405 Abandoned US20050006647A1 (en) | 2003-05-22 | 2004-05-21 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
US11/272,696 Expired - Fee Related US7105422B2 (en) | 2003-05-22 | 2005-11-15 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/272,696 Expired - Fee Related US7105422B2 (en) | 2003-05-22 | 2005-11-15 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
Country Status (5)
Country | Link |
---|---|
US (2) | US20050006647A1 (en) |
JP (1) | JP2004349513A (en) |
KR (1) | KR100670984B1 (en) |
CN (1) | CN1306618C (en) |
TW (1) | TWI250348B (en) |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030032210A1 (en) * | 2001-07-16 | 2003-02-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US20070218650A1 (en) * | 2003-10-28 | 2007-09-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method of manufacturing thereof, and method of manufacturing base material |
US20070284586A1 (en) * | 2006-05-24 | 2007-12-13 | Lg.Philips Lcd Co., Ltd. | Thin film transistor array substrate and method for fabricating the same |
FR2903228A1 (en) * | 2006-07-03 | 2008-01-04 | Commissariat Energie Atomique | Display device e.g. organic LED screen, forming method for e.g. computer, involves separating protection layer protecting semiconductor layer during laser exposure from rigid substrate and another layer by exposing latter layer to laser |
US20090078939A1 (en) * | 2007-09-20 | 2009-03-26 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
US20110084321A1 (en) * | 2005-07-29 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US20140284632A1 (en) * | 2013-03-22 | 2014-09-25 | Lexvu Opto Microelectronics Technology (Shanghai) Ltd | Display device having mems transmissive light valve and method for forming the same |
US9496255B2 (en) | 2011-11-16 | 2016-11-15 | Qualcomm Incorporated | Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same |
US9947568B2 (en) | 2013-02-20 | 2018-04-17 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method, semiconductor device, and peeling apparatus |
US10079330B2 (en) | 2008-07-10 | 2018-09-18 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and electronic device having an embedded pixel electrode |
US10189048B2 (en) | 2013-12-12 | 2019-01-29 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method and peeling apparatus |
US10741590B2 (en) | 2016-04-12 | 2020-08-11 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method and manufacturing method of flexible device |
US20220102667A1 (en) * | 2013-03-14 | 2022-03-31 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting device and method for manufacturing the same |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100685239B1 (en) * | 2004-01-29 | 2007-02-22 | 가시오게산키 가부시키가이샤 | A transistor array, manufacturing method thereof, and image processing device |
JP5127178B2 (en) * | 2005-07-29 | 2013-01-23 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP5344360B2 (en) * | 2006-01-24 | 2013-11-20 | セイコーエプソン株式会社 | Thin film circuit device, electronic device and manufacturing method |
FR2906078B1 (en) * | 2006-09-19 | 2009-02-13 | Commissariat Energie Atomique | METHOD FOR MANUFACTURING A MIXED MICRO-TECHNOLOGICAL STRUCTURE AND A STRUCTURE THUS OBTAINED |
US8062961B1 (en) * | 2008-03-28 | 2011-11-22 | Renesas Electronics Corporation | Method for manufacturing a semiconductor device |
JP5309672B2 (en) * | 2008-04-21 | 2013-10-09 | カシオ計算機株式会社 | Thin film element and manufacturing method thereof |
DE102008033395B3 (en) * | 2008-07-16 | 2010-02-04 | Austriamicrosystems Ag | Method for producing a semiconductor component and semiconductor component |
US8610482B2 (en) * | 2011-05-27 | 2013-12-17 | Semiconductor Energy Laboratory Co., Ltd. | Trimming circuit and method for driving trimming circuit |
CN104684469B (en) * | 2012-10-02 | 2016-12-07 | 独立行政法人科学技术振兴机构 | Signal supervisory instrument and signal detecting method |
US10978489B2 (en) * | 2015-07-24 | 2021-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display panel, method for manufacturing semiconductor device, method for manufacturing display panel, and information processing device |
US10170600B2 (en) * | 2017-01-12 | 2019-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6649980B2 (en) * | 2000-12-11 | 2003-11-18 | Sony Corporation | Semiconductor device with MOS transistors sharing electrode |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0642494B2 (en) * | 1988-01-12 | 1994-06-01 | 日本電気株式会社 | Method of manufacturing thin film transistor |
JPH04255268A (en) * | 1991-02-07 | 1992-09-10 | Seiko Instr Inc | Semiconductor device and manufacture thereof |
JPH05326960A (en) * | 1992-05-20 | 1993-12-10 | Seiko Epson Corp | Solid-state device with thin-film transistor and manufacture thereof |
US5793115A (en) * | 1993-09-30 | 1998-08-11 | Kopin Corporation | Three dimensional processor using transferred thin film circuits |
US6107213A (en) * | 1996-02-01 | 2000-08-22 | Sony Corporation | Method for making thin film semiconductor |
JP3364081B2 (en) * | 1995-02-16 | 2003-01-08 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US5675185A (en) * | 1995-09-29 | 1997-10-07 | International Business Machines Corporation | Semiconductor structure incorporating thin film transistors with undoped cap oxide layers |
US5986729A (en) | 1996-07-10 | 1999-11-16 | Matsushita Electric Industrial Co., Ltd. | Liquid crystal display device and method of manufacturing the same |
JP4619461B2 (en) * | 1996-08-27 | 2011-01-26 | セイコーエプソン株式会社 | Thin film device transfer method and device manufacturing method |
JP3738799B2 (en) * | 1996-11-22 | 2006-01-25 | セイコーエプソン株式会社 | Active matrix substrate manufacturing method, active matrix substrate, and liquid crystal display device |
JP4126747B2 (en) * | 1998-02-27 | 2008-07-30 | セイコーエプソン株式会社 | Manufacturing method of three-dimensional device |
JP4085459B2 (en) * | 1998-03-02 | 2008-05-14 | セイコーエプソン株式会社 | Manufacturing method of three-dimensional device |
JP2000133809A (en) | 1998-10-27 | 2000-05-12 | Seiko Epson Corp | Peeling method |
JP3809739B2 (en) | 1999-02-17 | 2006-08-16 | セイコーエプソン株式会社 | Manufacturing method of display device with filter |
JP3804349B2 (en) * | 1999-08-06 | 2006-08-02 | セイコーエプソン株式会社 | Thin film device device manufacturing method, active matrix substrate manufacturing method, and electro-optical device |
CN1186683C (en) * | 1999-09-08 | 2005-01-26 | 松下电器产业株式会社 | Display device and method of manufacture thereof |
JP3911929B2 (en) | 1999-10-25 | 2007-05-09 | セイコーエプソン株式会社 | Manufacturing method of liquid crystal display device |
JP2001166301A (en) | 1999-12-06 | 2001-06-22 | Seiko Epson Corp | Liquid crystal display device with built-in back light and method of manufacture |
JP3755573B2 (en) | 1999-12-06 | 2006-03-15 | セイコーエプソン株式会社 | Backlight built-in type liquid crystal display device and manufacturing method thereof |
JP4712198B2 (en) * | 2000-02-01 | 2011-06-29 | 株式会社半導体エネルギー研究所 | Method for manufacturing display device |
JP2002217391A (en) * | 2001-01-23 | 2002-08-02 | Seiko Epson Corp | Method for manufacturing laminate and semiconductor device |
JP4244120B2 (en) * | 2001-06-20 | 2009-03-25 | 株式会社半導体エネルギー研究所 | Light emitting device and manufacturing method thereof |
JP4019305B2 (en) * | 2001-07-13 | 2007-12-12 | セイコーエプソン株式会社 | Thin film device manufacturing method |
-
2003
- 2003-05-22 JP JP2003145468A patent/JP2004349513A/en active Pending
-
2004
- 2004-04-27 KR KR1020040028875A patent/KR100670984B1/en not_active IP Right Cessation
- 2004-05-18 CN CNB2004100447990A patent/CN1306618C/en not_active Expired - Fee Related
- 2004-05-21 TW TW093114508A patent/TWI250348B/en not_active IP Right Cessation
- 2004-05-21 US US10/850,405 patent/US20050006647A1/en not_active Abandoned
-
2005
- 2005-11-15 US US11/272,696 patent/US7105422B2/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6649980B2 (en) * | 2000-12-11 | 2003-11-18 | Sony Corporation | Semiconductor device with MOS transistors sharing electrode |
Cited By (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030032210A1 (en) * | 2001-07-16 | 2003-02-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US8415208B2 (en) * | 2001-07-16 | 2013-04-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US10586816B2 (en) | 2001-07-16 | 2020-03-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US9608004B2 (en) | 2001-07-16 | 2017-03-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US8367440B2 (en) | 2001-07-16 | 2013-02-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US9202987B2 (en) | 2001-07-16 | 2015-12-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
US20100015737A1 (en) * | 2003-10-28 | 2010-01-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method of manufacturing thereof, and method of manufacturing base material |
US8067294B2 (en) | 2003-10-28 | 2011-11-29 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device including protective film |
US7595256B2 (en) * | 2003-10-28 | 2009-09-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method of manufacturing thereof, and method of manufacturing base material |
US20070218650A1 (en) * | 2003-10-28 | 2007-09-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method of manufacturing thereof, and method of manufacturing base material |
US8673739B2 (en) | 2003-10-28 | 2014-03-18 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device |
US20110084321A1 (en) * | 2005-07-29 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US9059098B2 (en) | 2005-07-29 | 2015-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US9437620B2 (en) | 2005-07-29 | 2016-09-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US8557699B2 (en) | 2005-07-29 | 2013-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US7935579B2 (en) * | 2006-05-24 | 2011-05-03 | Lg Display Co., Ltd. | Thin film transistor array substrate and method for fabricating the same |
US20070284586A1 (en) * | 2006-05-24 | 2007-12-13 | Lg.Philips Lcd Co., Ltd. | Thin film transistor array substrate and method for fabricating the same |
FR2903228A1 (en) * | 2006-07-03 | 2008-01-04 | Commissariat Energie Atomique | Display device e.g. organic LED screen, forming method for e.g. computer, involves separating protection layer protecting semiconductor layer during laser exposure from rigid substrate and another layer by exposing latter layer to laser |
US8232598B2 (en) | 2007-09-20 | 2012-07-31 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
US20090078939A1 (en) * | 2007-09-20 | 2009-03-26 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
US11908976B2 (en) | 2008-07-10 | 2024-02-20 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and electronic device |
US10079330B2 (en) | 2008-07-10 | 2018-09-18 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and electronic device having an embedded pixel electrode |
US10205062B2 (en) | 2008-07-10 | 2019-02-12 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device that is highly reliable, thin and is not damaged by external local pressure and electronic device |
US11557697B2 (en) | 2008-07-10 | 2023-01-17 | Semiconductor Energy Laboratory Co., Ltd. | Flexible light emitting device comprising a polyimide resin |
US11101407B2 (en) | 2008-07-10 | 2021-08-24 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device sealed in a fibrous body to improve manufacturability and electronic device including the light emitting device |
US9496255B2 (en) | 2011-11-16 | 2016-11-15 | Qualcomm Incorporated | Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same |
US9947568B2 (en) | 2013-02-20 | 2018-04-17 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method, semiconductor device, and peeling apparatus |
US10636692B2 (en) | 2013-02-20 | 2020-04-28 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method, semiconductor device, and peeling apparatus |
US11355382B2 (en) | 2013-02-20 | 2022-06-07 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method, semiconductor device, and peeling apparatus |
US20220102667A1 (en) * | 2013-03-14 | 2022-03-31 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting device and method for manufacturing the same |
US9772489B2 (en) * | 2013-03-22 | 2017-09-26 | Shanghai Jadic Optoelectronics Technology Co., Ltd. | Display device having MEMS transmissive light valve and method for forming the same |
US20140284632A1 (en) * | 2013-03-22 | 2014-09-25 | Lexvu Opto Microelectronics Technology (Shanghai) Ltd | Display device having mems transmissive light valve and method for forming the same |
US10189048B2 (en) | 2013-12-12 | 2019-01-29 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method and peeling apparatus |
US11574937B2 (en) | 2016-04-12 | 2023-02-07 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method and manufacturing method of flexible device |
US10741590B2 (en) | 2016-04-12 | 2020-08-11 | Semiconductor Energy Laboratory Co., Ltd. | Peeling method and manufacturing method of flexible device |
Also Published As
Publication number | Publication date |
---|---|
KR100670984B1 (en) | 2007-01-17 |
US7105422B2 (en) | 2006-09-12 |
KR20040100886A (en) | 2004-12-02 |
TWI250348B (en) | 2006-03-01 |
JP2004349513A (en) | 2004-12-09 |
US20060068533A1 (en) | 2006-03-30 |
CN1574368A (en) | 2005-02-02 |
CN1306618C (en) | 2007-03-21 |
TW200426444A (en) | 2004-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7105422B2 (en) | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system | |
JP3897173B2 (en) | Organic EL display device and manufacturing method thereof | |
JP6143370B2 (en) | Light emitting device | |
US7045438B2 (en) | Light emitting device, semiconductor device, and method of fabricating the devices | |
KR101102261B1 (en) | Semiconductor device | |
JP5042170B2 (en) | Light emitting device | |
US8101946B2 (en) | Light-emission device, method of manufacturing same, electro-optical device and electronic device | |
CN100409401C (en) | Stripping method and method for producing semiconductor device | |
TW494447B (en) | Semiconductor device and manufacturing method thereof | |
JP4472238B2 (en) | Stripping method and semiconductor device manufacturing method | |
JP4974452B2 (en) | Method for manufacturing semiconductor device | |
JP4602261B2 (en) | Stripping method and semiconductor device manufacturing method | |
JP4718818B2 (en) | Method for manufacturing thin film transistor | |
JP2005196225A (en) | Light emitting device and method of manufacturing light emitting device | |
JP5393848B2 (en) | Light emitting device and method for manufacturing light emitting device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SEIKO EPSON CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:UTSUNOMIYA, SUMIO;REEL/FRAME:015155/0156 Effective date: 20040625 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |