CN1306618C - Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system - Google Patents
Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system Download PDFInfo
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- CN1306618C CN1306618C CNB2004100447990A CN200410044799A CN1306618C CN 1306618 C CN1306618 C CN 1306618C CN B2004100447990 A CNB2004100447990 A CN B2004100447990A CN 200410044799 A CN200410044799 A CN 200410044799A CN 1306618 C CN1306618 C CN 1306618C
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Images
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Nonlinear Science (AREA)
- Manufacturing & Machinery (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Liquid Crystal (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A thin-film circuit device that can realize three-dimensional circuit structure is disclosed. It has stack film structure. A first thin-film circuit layer (21) contains a first thin-film circuit formed between the bottom layer and protection layer, and bottom connection electrodes (211) that are connected to the first thin-film circuit, and a part of which are exposed from the bottom layer. Top connection electrodes (229) contain a second thin-film circuit formed between the bottom layer and protection layer, and a part that are connected to the second thin-film circuit and are exposed from the top of the protection layer. A second thin-film circuit layer (22) contains the bottom connection electrodes (211) that are connected to the second thin-film circuit and are exposed from the bottom of the bottom layer. Connect the bottom connection electrodes (211) of the first thin-film circuit layer (21), and the top electrodes (229) of the second thin-film circuit (22) to let the first and second thin-film circuits (21, 22) link to move each other.
Description
Technical Field
The invention provides a thin film circuit device formed by forming a three-dimensional thin film circuit and a method for manufacturing the thin film circuit device having a three-dimensional thin film circuit structure.
Background
In a semiconductor device or the like, when a laminate is produced by forming a desired layer or region on a substrate, there are cases where selection of members constituting the substrate or the laminate is limited because of a process including high-temperature treatment or the like. For example, resin films or plastic substrates are not suitable for high temperature processing.
In view of the above, the invention disclosed in japanese unexamined patent application publication No. 2002-217391 proposes a peel-off transfer technique in which a thin film circuit is formed on a heat-resistant first substrate via a separation layer, a non-heat-resistant second substrate is bonded to the thin film circuit, and the separation layer is broken to transfer the thin film circuit to the second substrate side.
[ patent document ] Japanese laid-open patent application publication No. 2002-217391
It is preferable to apply the above-described peeling transfer technique to produce a semiconductor device or a display device by stacking thin film circuits to realize a three-dimensional circuit structure.
However, in order to obtain a three-dimensional circuit structure, wiring connection between thin-film circuits of upper and lower layers which are peeled and transferred, or electrical connection in the upper and lower directions of a laminate film are required. In the circuit transfer technique between the substrates, the formation of a laminate of a nonconductive release layer, an adhesive layer, and a protective layer has been proposed, but the connection of wires in the vertical direction between the laminated thin film circuits has not been proposed.
Disclosure of Invention
Accordingly, an object of the present invention is to provide a method for manufacturing a thin film device capable of connecting thin film circuits to each other to allow lamination, and providing a peeling transfer technique.
It is another object of the present invention to provide a thin film device which is optimized to realize a three-dimensional circuit structure.
It is another object of the present invention to provide an electronic device using such a thin film device.
In order to achieve the above object, a thin film circuit device of the present invention includes: a base layer; a thin film circuit layer formed on the base layer and functioning as a circuit; and a connection electrode penetrating a part of the base layer, exposed substantially flush with the surface of the thin film circuit layer opposite to the base layer, and connecting an external circuit to the thin film circuit layer.
With this configuration, the connection electrode is exposed to the outside, and the thin film circuit layer and the external circuit can be connected to each other, thereby facilitating lamination of the thin film circuit layer.
Preferably, the thin film circuit device further includes: a protective layer covering at least a part of the thin film circuit layer to protect the thin film circuit layer; and a connection electrode penetrating the protective layer, exposed substantially flush with the protective layer on the opposite side of the thin film circuit layer, and connecting an external circuit to the thin film circuit layer. Thereby, electrical connection can be made between the upper surface and the lower surface of the thin film circuit layer.
In addition, the thin film circuit device of the present invention further includes: a first substrate having heat resistance; a release layer formed on the first substrate and adapted to be released by applying energy thereto, and an insulating base layer formed on the release layer; a thin film circuit layer formed on the base layer; a protective layer formed on the thin film circuit layer; and a connection electrode which penetrates the base layer to be connected to the peeling layer, and is exposed by peeling the peeling layer to connect an external circuit and the thin film circuit layer.
With this configuration, a basic thin film circuit layer constituting a multilayer laminated thin film circuit device can be obtained. By repeating these peeling and transfer from the substrate, the thin film circuit layer can be easily laminated.
Preferably, a protective layer is further provided between the release layer and the base layer. This makes it possible to avoid damage to the thin film circuit layer, particularly damage to the connection electrode connecting the release layer, during release transfer.
In addition, the thin film circuit device of the present invention is configured by laminating a first thin film circuit layer and a second thin film circuit layer and connecting a lower connection electrode of the first thin film circuit layer and an upper electrode of the second thin film circuit layer,
wherein,
the first thin film circuit layer includes: a first thin film circuit formed between the base layer and the protective layer, and a lower connection electrode connected to the first thin film circuit and exposed from a part of a lower surface of the base layer;
the second thin film circuit layer includes: the thin film transistor includes a first thin film circuit formed between a base layer and a protective layer, an upper connection electrode connected to the first thin film circuit and exposed from a portion of an upper surface of the protective layer, and a lower connection electrode connected to the first thin film circuit and exposed from a portion of a lower surface of the base layer.
With such a configuration, it is possible to obtain: a basic laminated structure of a thin film circuit composed of a plurality of layers.
Preferably, the connection between the lower connection electrode and the connection electrode is performed by an anisotropic conductive material or a conductive adhesive. Thus, electrical connection between the thin film circuit layers can be performed.
The lower connection electrode is preferably formed approximately on the same surface as the base layer. This makes it possible to planarize the thin film circuit layer and facilitate lamination.
The lower surfaces of each of the first and second thin film circuit layers are preferably formed approximately in parallel. This can improve the accuracy of laminating the thin film circuit layers.
The electro-optical device of the present invention is characterized in that: the thin film circuit device is provided.
The electronic instrument of the present invention is characterized in that: the electro-optical device is provided.
The method for manufacturing a thin film circuit device of the present invention includes:
forming a first thin film circuit layer having a connection electrode formed on at least one surface of a first substrate on which a peeling layer is formed;
forming a second thin film circuit layer in which connection electrodes are formed on one surface and the other surface of the second substrate on which the peeling layer is formed;
a step of peeling the first thin film circuit layer from the first substrate and transferring the first thin film circuit layer to a transfer target substrate;
and a step of laminating the connection electrode of the second thin-film circuit layer formed on the second substrate and the connection electrode of the first thin-film circuit layer transferred on the transfer target substrate side, and transferring and laminating the second thin-film circuit layer to the first thin-film circuit layer by peeling the second thin-film circuit layer from the second substrate.
With this configuration, a thin film circuit device in which thin film circuit layers are stacked can be manufactured.
The process for forming the thin film circuit layer preferably includes: forming a base layer on the release layer on the circuit forming substrate; forming a thin film circuit on the base layer; a step of opening a contact hole penetrating the base layer to expose the release layer; forming an electrode wiring between the contact hole and the thin film circuit; and forming a protective layer on the thin film circuit and the electrode wiring. Thus, a thin film circuit layer having a connection electrode, which is a transfer unit, can be obtained.
Preferably, the method further comprises: forming a protective layer between the peeling layer and the thin film circuit layer; and a step of removing the protective layer after the step of peeling off and transferring the thin film circuit layer. Thereby, it is possible to avoid: the thin film circuit layer is broken when peeling and transferring, particularly, the connection electrode bonded to the peeling layer is broken.
The protective layer is preferably formed by forming a film of a material different from that of the base layer of the thin film circuit, such as silicon nitride or a metal.
The protective layer may be formed of three layers of an amorphous silicon layer/an insulating layer (silicon oxide, silicon nitride)/an amorphous silicon layer, or the like. In this case, the amorphous silicon layer of the lower layer (circuit forming substrate side) functions as a release layer, and the amorphous silicon layer of the upper layer functions as a protective layer.
Drawings
Fig. 1 is an explanatory view for explaining a thin film circuit device in which thin film circuit layers of the present invention are stacked.
Fig. 2(a) to 2(d) are process diagrams for explaining the thin film circuit layer manufacturing process.
Fig. 3(a) to 3(h) are process diagrams for explaining the thin film circuit layer manufacturing process.
Fig. 4(a) to 4(e) are process diagrams for explaining an example of a process for forming a thin film circuit layer having a thin film circuit interlayer connection electrode.
Fig. 5(a) to 5(f) are process diagrams for explaining another example of the thin-film circuit layer forming step having the thin-film circuit interlayer connection electrode.
Fig. 6(a) to 6(f) are process diagrams for explaining another example of the thin-film circuit layer forming process having the thin-film circuit interlayer connection electrode.
Fig. 7 is an explanatory view for explaining a specific example (organic EL display device) of the thin film circuit device.
Fig. 8(a) to 8(f) are explanatory views of an example of an electronic apparatus in which a thin film circuit device is formed by laminating thin film circuit layers of the present invention and the thin film circuit device is used.
In the figure:
21. 22, 23-thin film circuit layer, 31, -transfer target substrate, 32, 33, 34, -adhesive, 35, -anisotropic conductive material, 211, 221, 231, -lower electrode, 229, 239, -upper electrode.
Detailed Description
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The thin film circuit device according to the embodiment of the present invention has a structure in which a plurality of thin film circuits are stacked in the up-down direction, and the thin film circuit of the intermediate layer has a structure in which electrodes are drawn from the upper surface and the lower surface. In addition, the thin film circuit device according to the embodiment of the present invention is a method of forming an electrode exposed on the rear surface of a thin film circuit, and facilitates connection of a lower thin film circuit or an external wiring.
In the manufacturing method according to the embodiment of the present invention, the manufacturing process of the thin film circuit device using the peel transfer technique includes: and forming a contact hole penetrating the thin film circuit layer, forming a conductive film such as a metal film on the contact hole to expose the base layer, and using the conductive film as a back electrode for connecting another thin film circuit layer. The back electrode and the base layer of the thin film circuit layer are formed in a substantially flush form, and the thin film circuit layer can be easily laminated by flattening the back surface thereof. Also, it is possible to avoid: the surface of the thin film circuit layer on the upper side is exposed due to the unevenness of the substrate caused by the lamination of the thin film circuit layer.
FIG. 1 is a diagram showing: a cross-sectional view of an example of a thin-film circuit device in which a plurality of thin-film circuits of the present invention are stacked to form a three-dimensional circuit.
In fig. 1, a first thin-film circuit layer 21 is mounted on a transfer target substrate 31 via an adhesive 32. The second thin-film circuit layer 22 is mounted on the thin-film circuit layer 21 with an adhesive 33. The third thin-film circuit layer 23 is mounted on the thin-film circuit layer 22 with an adhesive 34. Each thin film circuit layer is formed of at least one of a thin film transistor, a diode, a resistor, a capacitor, a wiring, and an electrode to form a thin film circuit, and functions as a certain circuit.
The thin-film circuit layer 21 and the thin-film circuit layer 22 are electrically connected to each other by the lower electrode 211 of the thin-film circuit layer 21, the upper electrode 229 of the thin-film circuit layer 22, and the anisotropic conductive material 35 disposed between the electrodes 211 and 229. The thin-film circuit layer 22 and the thin-film circuit layer 23 are electrically connected to each other through the lower electrode 221 of the thin-film circuit layer 22, the upper electrode 239 of the thin-film circuit layer 23, and the anisotropic conductive material 35 disposed between the electrodes 221 and 239. The anisotropic conductive material 35 has a property of being turned on in a direction of being compressed. For example, conductive particles are distributed in an insulating elastic material, and the elastic material is compressed, whereby the conductive particles are connected to form an electrical path in the compression direction.
The lower electrode 231 is exposed on the lower surface of the lowermost thin-film circuit layer 23. External wiring not shown is connected to the lower electrode 231 by flexible printed wiring, sheet bonding, wire bonding, or the like. The lower surface of the base layer (212, 222, and 232 to be described later) of the thin-film circuit that supports each thin-film circuit layer and the exposed surface of the base layer of the lower electrode are formed flat. Coating or forming adhesive layers 32, 33, 34 for bonding the film circuit layers to each other so that the upper surfaces thereof are flat; thus, it is possible to form a three-dimensional circuit structure in which the bottom surfaces of a plurality of thin-film circuit layers (base substrates) are stacked approximately in parallel.
In addition, a conductive adhesive may be used instead of or in addition to the anisotropic conductive film 35 described above in connection with the electrode portions.
In the above-described embodiment, the upper thin film circuit layer 21 and the lower thin film circuit layer 23 are connected by the thin film transistor circuit of the thin film circuit layer 22, but it is also possible to directly connect the thin film circuit layers 21 to 23 by only electrode wiring.
For example, in the case of power supply wiring or the like, appropriate direct connection can be applied.
In this way, a thin film device in which a three-dimensional circuit is formed can be obtained by a method of laminating thin film circuit layers in which electrodes are exposed on the upper surface and the lower surface.
Next, a method for manufacturing the thin film device having the three-dimensional circuit structure will be described with reference to fig. 2 to 4.
As shown in fig. 2(a), in order to laminate a thin film circuit layer, it is necessary to form a lower electrode 211 exposed to the base layer 212 of the film circuit layer 21.
Fig. 3 and 4 are process diagrams illustrating a process of forming the film circuit layer 21.
First, a quartz glass Substrate (SiO)2) And the like, on a transparent circuit-forming substrate 11 having excellent heat resistance, an amorphous silicon (α -Si) film is formed as a release layer 12 by a method such as LP-CVD, sputtering, or PE-CVD. On this surface, a silicon oxide film (SiO) was formed by a PE-CVD method as an underlying layer (insulating layer) 212 of the thin-film circuit layer 212). On the upper surface, a silicon layer (Si)213 film was formed as a semiconductor layer by a CVD method, and laser irradiation was performedAnd (poly) crystallization is performed by heat treatment such as irradiation with light or the like. The silicon layer 213 is patterned to form an active region or a wiring of a transistor (fig. 3 a).
On the upper surface, a silicon oxide film is formed by thermal oxidation or PE-CVD using TEOS as a material, thereby forming a gate insulating film 214 (fig. 3 (b)).
On the upper surface of the gate insulating film 214, a polysilicon film doped with impurities is formed by a CVD method, or a metal thin film layer containing chromium, molybdenum, tantalum, aluminum, or the like as a main component is formed by a sputtering method, followed by patterning to form a gate electrode and a wiring 215 (fig. 3 (c)).
Next, phosphorus ions P are implanted into the silicon layer 213 by an ion implantation method using the resist film 220 and the gate electrode 215 as masks+The source/drain regions of N-type semiconductor are formed by implanting the high concentration impurity (c) (fig. 3 (d)). Similarly, a high-concentration impurity such as boron ions is implanted into the silicon layer 213 by an ion implantation method using the resist film 221 and the gate electrode 215 as masks, thereby forming source/drain regions made of a P-type semiconductor, and the source/drain regions or the wiring is activated by heat treatment (fig. 3 (e)).
An oxide film is formed as an interlayer insulating film 216 on the gate electrode 215 and the gate oxide film 214 by CVD (fig. 3 (f)).
Next, the interlayer insulating film 216 is patterned to form contact holes. At this time, the lower electrode 211 portion to be formed with the base layer 212 is etched together with the contact holes of the source and drain regions (fig. 3 g). In order to form the lower electrode 211, etching is performed to reach the release layer 12 in this portion.
Next, a film of metal such as aluminum, molybdenum, tungsten, or ITO, or polycrystalline silicon doped with impurities at high concentration is formed, and patterning is performed to form a lower electrode, wiring, and source/drain electrodes 217 (fig. 3 h).
Further, as shown in FIG. 4, an interlayer insulating film (SiO) is formed on the upper surface2) Or a protective filmThe film of (PSG)218 is polished as necessary to planarize the upper surface (fig. 4 (a)). As the protective film 218, a film of an insulating resin may be formed by spin plating on the upper surface of the circuit forming substrate on which the wiring is formed, thereby forming a flat surface. Thus, the thin film circuit layer 21 is formed.
Further, an adhesive is uniformly applied to the upper surface of the thin-film circuit layer 21, and the transfer target substrate 31 is mounted thereon (fig. 4 (b)).
The peeling layer 12 is irradiated with intense light such as laser light from below the circuit-forming substrate 11, and interfacial peeling or delamination in the peeling layer 12 occurs. The principle of producing interfacial/intralayer peeling on the release layer 12, as disclosed in Japanese patent application laid-open No. Hei 10-125930, is estimated as: abrasion occurs on the constituent material of the release layer 12, and the release of a gas component contained in the release layer 12 and phase change such as melting and evaporation of the release layer 12 by light irradiation are caused. Here, the abrasion is a phenomenon in which a solid material (here, a constituent material forming the peeling layer 12) which absorbs irradiation light is photochemically or thermally excited, and bonds of atoms or molecules on the surface or inside thereof are broken and released; in some cases, the release layer 12 is broken to reduce the bonding force or disappear (fig. 4 (c)).
The thin-film circuit layer 21 is peeled from the circuit forming substrate 11 and transferred to the transfer target substrate 31 (fig. 4 (d)). Then, the remaining peeling layer 12 is removed by etching to obtain a substrate having the first thin film circuit layer 21 as shown in fig. 4 a (fig. 4 e).
Fig. 2(b) shows the second thin-film circuit layer 22 formed on the circuit-forming substrate 11 before the peeling transfer. The thin film circuit layer 22 includes: a base layer 222, a semiconductor layer 223, a gate insulating layer 224, a gate electrode and wiring layer 225, an interlayer insulating film 226, source/drain electrodes 227, a protective film 228, and an upper electrode 229. The second thin-film circuit layer 22 is formed on the circuit-forming substrate 11 and the peeling layer 12 (see fig. 3 and 4) in the same manner as the first thin-film circuit layer 21 described above, but an upper electrode 229 exposed from the protective film 228 is formed on the lower electrode 221 in addition to the second thin-film circuit layer 22 disposed between the stacked thin-film circuits.
In the step shown in fig. 4 a, a contact hole is opened in the protective film 218 (corresponding to 228), and a wiring material is formed, followed by patterning, thereby forming the upper electrode 229.
FIG. 2(c) shows: a third thin-film circuit layer 23 formed on the circuit-forming substrate 11 before peeling transfer. The thin-film circuit layer 23 includes: a base layer 232, a semiconductor layer 233, a gate insulating layer 234, a gate electrode and wiring layer 235, an interlayer insulating film 236, source/drain electrodes 237, a protective film 238, and an upper electrode 239. The third thin film circuit layer is formed on the upper surfaces of the circuit forming substrate 11 and the peeling layer 12, similarly to the first thin film circuit layer 21, but an upper electrode 239 exposed from the protective film 238 is formed on the lower electrode 231 in addition to the third thin film circuit layer disposed at the lowermost layer of the stacked thin film circuits. In the step shown in fig. 4 a, a contact hole is opened in the protective film 218 (corresponding to 238), and a wiring material is formed, and then a pattern formation method is used to form the upper electrode 239.
As shown in fig. 2(d), the thin-film circuit layers 21 to 23 formed on each circuit forming substrate are stacked and assembled by a peel-off transfer method.
That is, the thin-film circuit layer 22 shown in fig. 2(b) is attached to the lowermost surface of the thin-film circuit layer 21 of the transfer target substrate 31 shown in fig. 2(a) via the anisotropic conductive material 35 and the adhesive 33. The circuit-forming substrate 11 is peeled from the thin-film circuit layer 22 by irradiating the lower surface of the circuit-forming substrate 11 with laser light to separate the peeling layer 12. The peeling layer 12 remaining is removed by etching as necessary.
Then, the thin-film circuit layer 23 shown in fig. 2(c) is bonded to the lower surface of the thin-film circuit layer 22 mounted on the transfer target substrate 31 via the anisotropic conductive material 35 and the adhesive 33. The circuit-forming substrate 11 is peeled from the thin-film circuit layer 23 by irradiating the lower surface of the circuit-forming substrate 11 with laser light to separate the peeling layer 12. The peeling layer 12 remaining is removed by etching as necessary.
In this way, it is possible to obtain: a thin-film device provided with the thin-film circuit shown in fig. 1. The external wiring of the thin film device can be connected to the lower electrode 231 exposed on the lower surface by a method such as solder bump (solder bump), flexible wiring board (tape), or wire bonding.
Further, although an example of amorphous silicon is described as the peeling layer 12, H (hydrogen) may be contained in the amorphous silicon. If hydrogen is contained, the hydrogen is released by irradiation with light, and the peeling is promoted by generating an internal pressure in the peeling layer. The hydrogen content can be adjusted by appropriately setting conditions such as the gas composition, the gas pressure, the gas atmosphere, the gas flow rate, the gas temperature, and the power of the applied light, according to the film formation conditions, for example, in the case of the CVD method. Further, as the release layer, silicon oxide or silicon oxide, titanium oxide or titanium oxide, an organic polymer material, a metal, or the like can be suitably used.
When a three-dimensional thin film circuit is laminated by the peel transfer method as described above, it is preferable that a connection electrode is formed on the lower surface of the thin film circuit layer. Fig. 5 and 6 show: another example of the connection electrode is formed on the lower surface of the thin-film circuit layer.
In the examples shown in fig. 5(a) to 5(f), the base protective layer 13 is formed between the release layer 12 and the base layer 212 and the lower electrode 211. In the figure, the same reference numerals are given to portions corresponding to fig. 4, and the description thereof will be omitted.
The base protective layer 13 is a layer such as a silicon nitride (SiN) layer or a metal layer different from the material of the base layer 212; the lower electrode 211 and the base layer 212 are prevented from being affected by heat generated during peeling transfer and destruction energy applied to the release layer 12, by intrusion of unnecessary components from the release layer 12 into the lower electrode 211 and the base layer 212. As shown in fig. 5(e) and 5(f), the base protective layer 13 is removed by etching after the transfer thin film circuit layer 21 is peeled off.
At this time, it is preferable to etch the base protective layer 13 by a method of sufficiently increasing the selection ratio between the base protective layer 13 and the base layer 212 and/or the lower electrode 211.
For example, when the base protective layer 13 made of silicon nitride is used, the base protective layer 13 is etched using phosphoric acid, nitric acid, acetic acid, or a mixed solution (mixed acid) of these. At this time, for example, the base layer 212 made of silicon oxide has a small etching ratio, and the base protective layer 13 is overetched to be completely removed. Further, a conductive protective film of chromium, titanium, ITO, or the like may be provided on the lower surface of the lower electrode 211 to prevent corrosion of the lower electrode 211 during etching of the base protective layer 13.
In the examples shown in fig. 6(a) to 6(f), protective layers 13 and 14 are formed between the release layer 12 and the base layer 212 and the lower electrode 211. In the figure, the same reference numerals are given to portions corresponding to fig. 4, and the description thereof will be omitted.
The protective layer 13 is an insulating film such as a silicon oxide layer or a silicon nitride layer, and the protective layer 14 is an amorphous silicon layer. The lower side of the amorphous silicon layers 12 and 14 forming two layers functions as a peeling layer, and the upper side functions as a protective layer. As shown in fig. 6(e) and 6(f), the base protective layers 13 and 14 are removed by etching after peeling the transfer thin film circuit layer 21.
At this time, it is preferable to etch the base protective layer 13 also by a method in which the selection ratio between the base protective layers 13 and 4 or the base protective layer 14 and the base layer 212 and/or the lower electrode 211 is sufficiently large. For example, when the base protective layer 13 of silicon oxide and the base protective layer 14 of amorphous silicon layer are used, a solution containing hydrofluoric acid may be used to etch the base protective layer 13. At this time, since the etching ratio of the base protective layer 14 is small, the base protective layer 13 is overetched and can be completely removed. In addition, when the base protective layer 14 is etched, for example, CF-containing may be used4The dry etching method with the gas of (4). At this time, since the etching rate of the base layer 212 made of silicon oxide is small, the base protective layer 14 is overetched and can be completely removed. In addition, on the lower surface of the lower electrode 211,a conductive protective film of chromium, titanium, ITO, or the like may be provided to prevent corrosion of the lower electrode 211 during etching of the base protective layer 13.
Fig. 7 is a diagram showing a specific example of the thin film circuit layer, and an inverted organic EL display element is formed on the first thin film circuit layer. On a circuit forming substrate not shown, a thin film transistor 311, a wiring 312, an anode 313, a bank 314, a light emitting layer 315, a cathode 316, and the like are formed by a peeling layer, and peeled and transferred onto a transfer target substrate 31. The lower electrode 317 is exposed from the underlying layer on the lower surface by a method of transferring the thin-film circuit layer 21 to the transfer target substrate 31.
In addition, as shown in fig. 7, since the external connection electrode 317 is formed on the lower surface of the thin film circuit layer 21, a signal can be supplied from the outside. The thin film circuit layer 21 is transferred to the transfer target substrate 31 once until the thin film circuit layer is transferred to the transfer target substrate 31 in the vertical and horizontal directions, and thus, the thin film circuit layer can be used as a thin film circuit of an organic EL pixel. In this case, the number of steps can be reduced compared to the case of using the temporary transfer substrate and performing the peeling transfer twice in the same direction.
Therefore, the number of times of lamination can be changed depending on the lamination location and the complexity of the circuit. For example, a second thin film circuit layer may be stacked on a part of the first thin film circuit layer, and a third thin film circuit layer may be stacked on a part of the second thin film circuit layer. Further, a second thin film circuit layer may be laminated on the first thin film circuit layer, and a third thin film circuit layer may be formed across the second thin film circuit layer.
Thus, the circuit layer of the thin film circuit can be in various forms and can be appropriately selected as needed.
Fig. 8 is an explanatory view for explaining an example of an electronic apparatus including an electro-optical device including various thin film circuit devices according to the present invention. The thin film circuit device can be applied to, for example, an electro-optical device, a driving device, a control device, and the like. Here, the electro-optical device generally refers to a device including an electro-optical element that emits light by an electric action or changes a state of light from the outside, and includes both self-luminous and controlled passage of external light. For example, the electro-optical element includes a liquid crystal element, an electro-migration element having a dispersion medium in which electro-migration particles are dispersed, the above-mentioned organic EL (electroluminescence) element, and an electron emitting element in which electrons generated by application of an electric field collide with a light emitting panel to emit light, and a display device including these elements is called an electro-optical device.
Electronic devices, for example, electro-optical devices using laminated thin film circuit devices are used as display portions; here, the electronic instrument includes: cameras, televisions, large-sized projection screens, mobile phones, personal computers, portable information instruments (so-called PDAs), and others.
Fig. 8(a) shows an application example of a mobile phone, and the mobile phone 510 includes an electro-optical device 51 including an antenna portion 511, an audio output portion 512, an audio input portion 513, an operation portion 514, and a laminated thin film circuit device. Thus, the laminated thin film circuit device of the present invention can be used for the display portion of the mobile phone 510. Fig. 8(b) shows an example of the application to a video camera, and the video camera 520 includes an electro-optical device 51 including an image receiving unit 521, an operation unit 522, an audio input unit 523, and a laminated thin film circuit device. Thus, the laminated thin-film circuit device of the present invention can be used in a viewfinder or a display portion. Fig. 8(c) shows an example of application to a personal computer, and the computer 530 includes an electro-optical device 51 including a camera unit 531, an operation unit 532, and a laminated thin film circuit device. Thus, the laminated thin-film circuit device of the present invention can be used for a display portion.
Fig. 8(d) shows an application example of the head mount display panel, and the head mount display panel 540 includes an electro-optical device 51 including a tape 541, an optical system housing portion 542, and a laminated thin film circuit device. Thus, the laminated thin-film circuit device of the present invention can be used in an image display unit. Fig. 8(e) shows an example of application to a rear projector, and the projector 550 includes an electro-optical device 51 including a frame 551, a light source 552, a synthetic optical system 553, a mirror 555, a projection screen 556, and a laminated thin film circuit device. Thus, the laminated thin-film circuit device of the present invention can be used in an image display unit. FIG. 8(f) shows an example of application to a front projector, in which a projector 560 includes an electro-optical device 51 including an optical system 561 and a laminated thin-film circuit device on a frame 562; the image may be displayed on a projection screen. Thus, the laminated thin-film circuit device of the present invention can be used in an image display unit.
The laminated thin-film circuit device of the present invention is not limited to the above-described examples and can be applied to various electronic apparatuses. For example, a facsimile device with a display function, a viewfinder of a digital camera, a portable TV, a DSP device, a PDA, an electronic organizer, an electric sign board, a display board for public announcement, and the like can be used.
As described above, according to the present invention, a thin film circuit device can be constituted by laminating a plurality of thin film circuit layers by a peel transfer method. In addition, since the laminated thin film circuit layer is used, the area consumed by the circuit on the substrate can be reduced as compared with the case where each circuit is directly formed on the substrate. In addition, the method of laminating thin film circuits to each other can shorten the signal transmission distance between the circuits.
Claims (9)
1. A thin film circuit device, comprising:
a first substrate having heat resistance;
a release layer formed on the first substrate and adapted to be released by applying energy thereto, and an insulating base layer formed on the release layer;
a thin film circuit layer formed on the base layer;
a protective layer formed on the thin film circuit layer;
and a connection electrode which penetrates a part of the base layer, connects the peeling layer, is exposed by peeling the peeling layer, and connects an external circuit and the thin film circuit layer.
2. The thin film circuit device of claim 1, further comprising:
between the peeling layer and the base layer, there is a protective layer.
3. The thin film circuit device of claim 3, wherein:
the thin film circuit layer includes a first thin film circuit layer and a second thin film circuit layer, the first thin film circuit layer and the second thin film circuit layer are laminated, and a lower connection electrode of the first thin film circuit layer is connected with an upper electrode of the second thin film circuit layer,
wherein,
the first thin film circuit layer includes: a first thin film circuit formed between the base layer and the protective layer, and a lower connection electrode connected to the first thin film circuit and exposed from a part of a lower surface of the base layer;
the second thin film circuit layer includes: the thin film transistor includes a first thin film circuit formed between a base layer and a protective layer, an upper connection electrode connected to the first thin film circuit and exposed from a portion of an upper surface of the protective layer, and a lower connection electrode connected to the first thin film circuit and exposed from a portion of a lower surface of the base layer.
4. The thin film circuit device of claim 3, wherein: the connection between the lower connection electrode and the upper connection electrode is performed using an anisotropic conductive material or a conductive adhesive.
5. An electro-optical device, comprising: a thin film circuit device according to any one of claims 1 to 4.
6. An electronic instrument, characterized by: an electro-optical device according to claim 5.
7. A method of manufacturing a thin film circuit device, comprising:
forming a first thin film circuit layer having a connection electrode formed on at least one surface of a first substrate having a release layer formed thereon;
forming a second thin film circuit layer in which connection electrodes are formed on one surface and the other surface, respectively, on the second substrate having the peeling layer formed thereon;
a step of transferring the first thin film circuit layer to a transfer target substrate after peeling the first thin film circuit layer from the first substrate;
and a step of laminating the connection electrode of the second thin-film circuit layer formed on the second substrate and the connection electrode of the first thin-film circuit layer transferred on the transfer target substrate side, by stacking and joining the first and second thin-film circuit layers, peeling the second thin-film circuit layer from the second substrate, and transferring and laminating the second thin-film circuit layer to the first thin-film circuit layer.
8. The method of manufacturing a thin film circuit device according to claim 7,
the step of forming the thin film circuit layer includes:
forming a base layer on a release layer on the circuit forming substrate;
forming a thin film circuit on the base layer;
an opening step of forming a contact hole penetrating a part of the base layer to expose the peeling layer;
forming an electrode wiring between the contact hole and the thin film circuit;
and forming a protective layer on the thin film circuit and the electrode wiring.
9. The method for manufacturing a thin film circuit device according to claim 7, further comprising:
forming a protective layer between the peeling layer and the thin film circuit layer;
and a step of removing the protective layer after the step of peeling off and transferring the thin film circuit layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003145468A JP2004349513A (en) | 2003-05-22 | 2003-05-22 | Thin film circuit device, its manufacturing method, electrooptic device, and electronic equipment |
| JP2003145468 | 2003-05-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1574368A CN1574368A (en) | 2005-02-02 |
| CN1306618C true CN1306618C (en) | 2007-03-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2004100447990A Expired - Fee Related CN1306618C (en) | 2003-05-22 | 2004-05-18 | Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system |
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| US (2) | US20050006647A1 (en) |
| JP (1) | JP2004349513A (en) |
| KR (1) | KR100670984B1 (en) |
| CN (1) | CN1306618C (en) |
| TW (1) | TWI250348B (en) |
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- 2004-05-18 CN CNB2004100447990A patent/CN1306618C/en not_active Expired - Fee Related
- 2004-05-21 TW TW093114508A patent/TWI250348B/en not_active IP Right Cessation
- 2004-05-21 US US10/850,405 patent/US20050006647A1/en not_active Abandoned
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2005
- 2005-11-15 US US11/272,696 patent/US7105422B2/en not_active Expired - Fee Related
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| US6022766A (en) * | 1995-09-29 | 2000-02-08 | International Business Machines, Inc. | Semiconductor structure incorporating thin film transistors, and methods for its manufacture |
Also Published As
| Publication number | Publication date |
|---|---|
| US20060068533A1 (en) | 2006-03-30 |
| KR100670984B1 (en) | 2007-01-17 |
| US7105422B2 (en) | 2006-09-12 |
| JP2004349513A (en) | 2004-12-09 |
| TWI250348B (en) | 2006-03-01 |
| US20050006647A1 (en) | 2005-01-13 |
| KR20040100886A (en) | 2004-12-02 |
| TW200426444A (en) | 2004-12-01 |
| CN1574368A (en) | 2005-02-02 |
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