TWM445265U - Symmetry which projects source for generating a multi-chip package structure - Google Patents
Symmetry which projects source for generating a multi-chip package structure Download PDFInfo
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- TWM445265U TWM445265U TW101210702U TW101210702U TWM445265U TW M445265 U TWM445265 U TW M445265U TW 101210702 U TW101210702 U TW 101210702U TW 101210702 U TW101210702 U TW 101210702U TW M445265 U TWM445265 U TW M445265U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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Description
本創作係有關於一種多晶片封裝結構,尤指一種用於產生對稱性投射光源的多晶片封裝結構。The present invention relates to a multi-chip package structure, and more particularly to a multi-chip package structure for generating a symmetrical projection light source.
關於發光二極體(LED)與傳統光源的比較,發光二極體具有體積小、省電、發光效率佳、壽命長、操作反應速度快、且無熱輻射與水銀等有毒物質的污染…等優點。因此近幾年來,發光二極體的應用面已極為廣泛。過去由於發光二極體的亮度還無法取代傳統的照明光源,但隨著技術領域的不斷提升,目前已研發出高照明輝度的高功率發光二極體,其足以取代傳統的照明光源。然而,傳統使用多顆發光二極體的發光結構仍然無法有效提供對稱性的投射光源。故,如何藉由結構設計的改良,來有效提供對稱性的投射光源,已成為該項事業人士所欲解決的重要課題。Regarding the comparison between a light-emitting diode (LED) and a conventional light source, the light-emitting diode has a small volume, power saving, good luminous efficiency, long life, fast operation response, and no pollution of toxic substances such as heat radiation and mercury, etc. advantage. Therefore, in recent years, the application of light-emitting diodes has been extremely extensive. In the past, the brightness of the light-emitting diodes could not replace the traditional illumination source. However, with the continuous improvement of the technical field, high-power light-emitting diodes with high illumination brightness have been developed, which is sufficient to replace the traditional illumination source. However, the conventional light-emitting structure using a plurality of light-emitting diodes still cannot effectively provide a symmetrical projection light source. Therefore, how to effectively provide a symmetrical projection light source through the improvement of structural design has become an important issue that the business person wants to solve.
本創作實施例在於提供一種用於產生對稱性投射光源的多晶片封裝結構。The present embodiment is directed to providing a multi-chip package structure for generating a symmetric projection light source.
本創作其中一實施例所提供的一種用於產生對稱性投射光源的多晶片封裝結構,其包括:一基板單元、一發光單元、一框架單元及一封裝單元。該基板單元包括一基板本體、至少兩個設置在該基板本體的上表面上且彼此電性連接的跨接式導電層、及至少一設置在該基板本體的上表面上且與上述至少兩個跨接式導電層彼此絕緣的連接式導電層。該發光單元包括至少兩個成對角線地設置在該 基板本體上且電性連接於該基板本體的第一發光元件及至少兩個成對角線地設置在該基板本體上且電性連接於該基板本體的第二發光元件,其中上述至少兩個跨接式導電層電性連接於上述至少兩個第一發光元件之間,且上述至少一連接式導電層電性連接於上述至少兩個第二發光元件之間。該框架單元包括至少兩個成對角線地設置在該基板本體上且分別圍繞上述至少兩個第一發光元件的第一絕緣框架及至少兩個成對角線地設置在該基板本體上且分別圍繞上述至少兩個第二發光元件的第二絕緣框架,其中上述至少兩個第一絕緣框架與上述至少兩個第二絕緣框架一體成型地組合成單一框架構件。該封裝單元包括至少兩個分別覆蓋上述至少兩個第一發光元件且分別被上述至少兩個第一絕緣框架所圍繞的第一透光封裝體及至少兩個分別覆蓋上述至少兩個第二發光元件且分別被上述至少兩個第二絕緣框架所圍繞的第二透光封裝體。A multi-chip package structure for generating a symmetrical projection light source according to one embodiment of the present invention includes: a substrate unit, a light-emitting unit, a frame unit, and a package unit. The substrate unit includes a substrate body, at least two jumper conductive layers disposed on the upper surface of the substrate body and electrically connected to each other, and at least one disposed on an upper surface of the substrate body and at least two A connected conductive layer in which the jumper conductive layers are insulated from each other. The lighting unit includes at least two diagonally disposed a first light-emitting element electrically connected to the substrate body and at least two second light-emitting elements disposed on the substrate body and electrically connected to the substrate body, wherein the at least two The jumper conductive layer is electrically connected between the at least two first light emitting elements, and the at least one connected conductive layer is electrically connected between the at least two second light emitting elements. The frame unit includes at least two first insulating frames disposed diagonally on the substrate body and surrounding the at least two first light emitting elements and at least two diagonally disposed on the substrate body And a second insulating frame surrounding the at least two second light emitting elements, wherein the at least two first insulating frames and the at least two second insulating frames are integrally formed into a single frame member. The package unit includes at least two first light-transmissive packages respectively covering the at least two first light-emitting elements and surrounded by the at least two first insulating frames, and at least two covering the at least two second light-emitting portions respectively And a second light transmissive package surrounded by the at least two second insulating frames.
本創作的有益效果可以在於,本創作實施例所提供的多晶片封裝結構,其可透過“上述至少兩個成對角線地設置在該基板本體上且電性連接於該基板本體的第一發光元件”與“上述至少兩個成對角線地設置在該基板本體上且電性連接於該基板本體的第二發光元件”的設計,以使得本創作的多晶片封裝結構可用於產生對稱性的投射光源。The multi-chip package structure provided by the present embodiment can be transparently disposed through the “at least two at least two diagonally disposed on the substrate body and electrically connected to the substrate body. The design of the light-emitting element and the at least two second light-emitting elements diagonally disposed on the substrate body and electrically connected to the substrate body, so that the multi-chip package structure of the present invention can be used to generate symmetry Sexual projection source.
再者,本創作實施例所提供的多晶片封裝結構,其可透過“上述至少兩個跨接式導電層電性連接於上述至少兩個第一發光元件之間,且上述至少一連接式導電層電性連接於上述至少兩個第二發光元件之間”的設計,以使得 上述至少兩個成對角線地設置在該基板本體上且電性連接於該基板本體的第一發光元件及上述至少兩個成對角線地設置在該基板本體上且電性連接於該基板本體的第二發光元件可以相互配合來產生對稱性的投射光源。Furthermore, the multi-chip package structure provided by the embodiment of the present invention is electrically connectable to the at least two first light-emitting elements via the at least two jumper-type conductive layers, and the at least one connected conductive type a layer electrically connected between the at least two second light-emitting elements" to make The at least two first light-emitting elements disposed on the substrate body and electrically connected to the substrate body and the at least two diagonally disposed on the substrate body and electrically connected to the substrate The second illuminating elements of the substrate body can cooperate to create a symmetrical projection source.
為使能更進一步瞭解本創作之特徵及技術內容,請參閱以下有關本創作之詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本創作加以限制者。In order to further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings are only for reference and explanation, and are not intended to limit the creation.
請參閱圖1A至圖4所示,本創作的其中一實施例可提供一種用於產生對稱性投射光源的多晶片封裝結構Z,其包括:一基板單元1、一發光單元2、一框架單元3及一封裝單元4。Referring to FIG. 1A to FIG. 4 , an embodiment of the present disclosure may provide a multi-chip package structure Z for generating a symmetrical projection light source, comprising: a substrate unit 1, a light-emitting unit 2, and a frame unit. 3 and a package unit 4.
首先,配合圖1A與圖1B所示,基板單元1包括一基板本體10、至少兩個設置在基板本體10的上表面上且彼此電性連接的跨接式導電層(11A、11B)、及至少一設置在基板本體10的上表面上且與上述至少兩個跨接式導電層(11A、11B)彼此絕緣的連接式導電層11C。舉例來說,基板本體10的上表面具有至少兩個成對角線位置設計的第一置晶區域A1及至少兩個成對角線位置設計的第二置晶區域A2。基板單元1包括至少兩個成對角線地設置在基板本體10的上表面上的第一頂端導電焊墊12A及至少兩個成對角線地設置在基板本體10的上表面上的第二頂端導電焊墊13A。First, as shown in FIG. 1A and FIG. 1B, the substrate unit 1 includes a substrate body 10, at least two jumper conductive layers (11A, 11B) disposed on the upper surface of the substrate body 10 and electrically connected to each other, and At least one connecting conductive layer 11C disposed on the upper surface of the substrate body 10 and insulated from the at least two jumper conductive layers (11A, 11B). For example, the upper surface of the substrate body 10 has at least two first crystallized regions A1 designed in a diagonal position and a second crystallized region A2 designed in at least two diagonal positions. The substrate unit 1 includes at least two first top conductive pads 12A disposed diagonally on the upper surface of the substrate body 10 and at least two second disposed on the upper surface of the substrate body 10 diagonally Top conductive pad 13A.
再舉例來說,基板單元1包括至少一設置在基板本體10的下表面上且對應於發光單元2的散熱層14、至少兩個成對角線地設置在基板本體10的下表面上且分別對應 地電性連接於上述至少兩個第一頂端導電焊墊12A的第一底端導電焊墊12B、及至少兩個成對角線地設置在基板本體10的下表面上且分別對應地電性連接於上述至少兩個第二頂端導電焊墊13A的第二底端導電焊墊13B。For example, the substrate unit 1 includes at least one heat dissipation layer 14 disposed on the lower surface of the substrate body 10 and corresponding to the light emitting unit 2, and at least two diagonally disposed on the lower surface of the substrate body 10 and respectively correspond The first bottom conductive pad 12B electrically connected to the at least two first top conductive pads 12A, and at least two diagonally disposed on the lower surface of the substrate body 10 and respectively correspondingly electrically The second bottom conductive pad 13B is connected to the at least two second top conductive pads 13A.
再舉例來說,基板單元1包括至少兩個可貫穿基板本體10的第一導電體15及至少兩個可貫穿基板本體10的第二導電體16,其中每一個第一導電體15可電性連接於每一個相對應的第一頂端導電焊墊12A與每一個相對應的第一底端導電焊墊12B之間,且每一個第二導電體16可電性連接於每一個相對應的第二頂端導電焊墊13A與每一個相對應的第二底端導電焊墊13B之間。換言之,每一個相對應的第一頂端導電焊墊12A與每一個相對應的第一底端導電焊墊12B可透過每一個相對應的第一導電體15來達到彼此的電性連接,且每一個相對應的第二頂端導電焊墊13A與每一個相對應的第二底端導電焊墊13B可透過每一個相對應的第二導電體16來達到彼此的電性連接。然而本創作所使用的基板單元1不以上述所舉的例子為限。For example, the substrate unit 1 includes at least two first conductive bodies 15 that can penetrate the substrate body 10 and at least two second conductive bodies 16 that can penetrate the substrate body 10, wherein each of the first conductive bodies 15 can be electrically Connected between each of the corresponding first top conductive pads 12A and each of the corresponding first bottom conductive pads 12B, and each of the second conductive bodies 16 is electrically connected to each corresponding first Two top conductive pads 13A are disposed between each of the corresponding second bottom conductive pads 13B. In other words, each of the corresponding first top conductive pads 12A and each of the corresponding first bottom conductive pads 12B can be electrically connected to each other through each corresponding first conductive body 15, and each A corresponding second top conductive pad 13A and each corresponding second bottom conductive pad 13B can be electrically connected to each other through each corresponding second conductive body 16. However, the substrate unit 1 used in the present creation is not limited to the above-exemplified examples.
再者,配合圖1A及圖2所示,發光單元2包括至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第一發光元件21及至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第二發光元件22。其中,上述至少兩個跨接式導電層(11A、11B)電性連接於上述至少兩個第一發光元件21之間,且連接式導電層11C電性連接於上述至少兩個第二發光元件22之間。另外,上述至少兩個第一發光元件21可電性連接於上述至少兩個第一頂端導電焊墊12A之間,且上述至少兩個第 二發光元件22可電性連接於上述至少兩個第二頂端導電焊墊13A之間。In addition, as shown in FIG. 1A and FIG. 2, the light-emitting unit 2 includes at least two first light-emitting elements 21 disposed on the substrate body 10 and electrically connected to the substrate body 10, and at least two pairs. The second light-emitting element 22 is disposed on the substrate body 10 and electrically connected to the substrate body 10 . The at least two jumper conductive layers (11A, 11B) are electrically connected between the at least two first light emitting elements 21, and the connected conductive layer 11C is electrically connected to the at least two second light emitting elements. Between 22. In addition, the at least two first light emitting elements 21 are electrically connected between the at least two first top conductive pads 12A, and the at least two The two light emitting elements 22 are electrically connected between the at least two second top conductive pads 13A.
舉例來說,上述至少兩個第一發光元件21與上述至少兩個第二發光元件22可相互對稱地排列成一矩陣形狀(如圖2所示)。另外,上述至少兩個第一發光元件21分別設置在基板本體10的至少兩個第一置晶區域A1上,且上述至少兩個第二發光元件22分別設置在基板本體10的至少兩個第二置晶區域A2上。此外,每一個第一發光元件21的上表面具有至少兩個分別電性連接於每一個相對應的第一頂端導電焊墊12A與每一個相對應的跨接式導電層11A的第一電極210,且每一個第二發光元件22的上表面具有至少兩個分別電性連接於每一個相對應的第二頂端導電焊墊13A與連接式導電層11C的第二電極220。For example, the at least two first light-emitting elements 21 and the at least two second light-emitting elements 22 may be symmetrically arranged in a matrix shape (as shown in FIG. 2). In addition, the at least two first light emitting elements 21 are respectively disposed on at least two first crystallized regions A1 of the substrate body 10, and the at least two second light emitting elements 22 are respectively disposed on at least two of the substrate body 10. Two crystal regions A2. In addition, the upper surface of each of the first light-emitting elements 21 has at least two first electrodes 210 electrically connected to each of the corresponding first top conductive pads 12A and each of the corresponding jumper conductive layers 11A. The upper surface of each of the second illuminating elements 22 has at least two second electrodes 220 electrically connected to each of the corresponding second top conductive pads 13A and the connecting conductive layer 11C.
再舉例來說,當上述至少兩個第一發光元件21分別透過至少兩個第一外側導線W11以分別電性連接於上述至少兩個第一頂端導電焊墊12A,且上述至少兩個第一發光元件21可分別透過至少兩個第一內側導線W12以分別電性連接於上述至少兩個跨接式導電層(11A、11B)時,每一個第一發光元件21的至少兩個第一電極210即可分別透過每一個相對應的第一外側導線W11與每一個相對應的第一內側導線W12,以分別電性連接於每一個相對應的第一頂端導電焊墊12A與每一個相對應的跨接式導電層(11A或11B)。再者,當上述至少兩個第二發光元件22分別透過至少兩個第二外側導線W21以分別電性連接於上述至少兩個第二頂端導電焊墊13A,且上述至少兩個第二發光元件22分別透過至少兩個第二內側導線W22以分別 電性連接於連接式導電層11C的兩相反末端部時,每一個第二發光元件22的至少兩個第二電極220即可分別透過每一個相對應的第二外側導線W21與每一個相對應的第二內側導線W22,以分別電性連接於每一個相對應的第二頂端導電焊墊13A與連接式導電層11C。此外,上述至少兩個跨接式導電層(11A、11B)可透過至少一跨接導線W20以彼此電性連接。然而本創作所使用的發光單元2與框架單元3不以上述所舉的例子為限。For example, when the at least two first light-emitting elements 21 are respectively transmitted through at least two first outer wires W11 to be electrically connected to the at least two first top conductive pads 12A, respectively, and the at least two first When the light emitting elements 21 are respectively transmitted through the at least two first inner wires W12 to be electrically connected to the at least two jumper conductive layers (11A, 11B), respectively, at least two first electrodes of each of the first light emitting elements 21 210, respectively, through each of the corresponding first outer wires W11 and each of the corresponding first inner wires W12, respectively electrically connected to each corresponding first top conductive pad 12A corresponding to each The jumper conductive layer (11A or 11B). Furthermore, when the at least two second light-emitting elements 22 are respectively transmitted through at least two second outer wires W21 to be electrically connected to the at least two second top conductive pads 13A, respectively, and the at least two second light-emitting elements 22 respectively through at least two second inner wires W22 When electrically connected to opposite end portions of the connection conductive layer 11C, at least two second electrodes 220 of each of the second light-emitting elements 22 can respectively correspond to each of the corresponding second outer wires W21. The second inner wire W22 is electrically connected to each of the corresponding second top conductive pads 13A and the connection conductive layer 11C, respectively. In addition, the at least two jumper conductive layers (11A, 11B) may be electrically connected to each other through at least one jumper wire W20. However, the light-emitting unit 2 and the frame unit 3 used in the present creation are not limited to the above-exemplified examples.
另外,框架單元3包括至少兩個成對角線地設置在基板本體10上且分別圍繞上述至少兩個第一發光元件21的第一絕緣框架31及至少兩個成對角線地設置在基板本體10上且分別圍繞上述至少兩個第二發光元件22的第二絕緣框架32,其中上述至少兩個第一絕緣框架31與上述至少兩個第二絕緣框架32可以一體成型地組合成單一框架構件。舉例來說,上述至少兩個第一絕緣框架31與上述至少兩個第二絕緣框架32可相互對稱地排列成一矩陣形狀。再者,每一個第一絕緣框架31具有一用於容置每一個相對應的第一外側導線W11、每一個相對應的第一內側導線W12及每一個相對應的第一透光封裝體41的第一容置空間310,每一個第二絕緣框架32具有一用於容置每一個相對應的第二外側導線W21、每一個相對應的第二內側導線W22及每一個相對應的第二透光封裝體42的第二容置空間320,且跨接導線W20被容置於其中一個第一絕緣框架31的第一容置空間310內。In addition, the frame unit 3 includes at least two first insulating frames 31 disposed on the substrate body 10 diagonally and surrounding the at least two first light emitting elements 21 and at least two diagonally disposed on the substrate a second insulating frame 32 on the body 10 and surrounding the at least two second light emitting elements 22, respectively, wherein the at least two first insulating frames 31 and the at least two second insulating frames 32 may be integrally formed into a single frame member. For example, the at least two first insulating frames 31 and the at least two second insulating frames 32 may be symmetrically arranged in a matrix shape. Moreover, each of the first insulating frames 31 has a first outer wire W11 for accommodating each, a corresponding first inner wire W12 and a corresponding first light transmitting package 41. The first accommodating space 310, each of the second insulating frames 32 has a second outer wire W21 for accommodating each, a corresponding second inner wire W22 and a corresponding second one. The second accommodating space 320 of the light-transmitting package 42 and the jumper wire W20 are received in the first accommodating space 310 of one of the first insulating frames 31.
此外,配合圖3與圖4所示,封裝單元4包括至少兩個分別覆蓋上述至少兩個第一發光元件21且分別被上述 至少兩個第一絕緣框架31所圍繞的第一透光封裝體41及至少兩個分別覆蓋上述至少兩個第二發光元件22且分別被上述至少兩個第二絕緣框架32所圍繞的第二透光封裝體42,其中上述至少兩個第一透光封裝體41皆可為螢光膠體與透明膠體兩者之中的其中一種,且上述至少兩個第二透光封裝體42皆可為螢光膠體與透明膠體兩者之中的其中一種。舉例來說,當每一個第一發光元件21為藍色發光二極體,且第一透光封裝體41為一用來覆蓋每一個相對應的第一發光元件21(藍色發光二極體)的螢光膠體時,每一個第一發光元件21所產生的藍色光束即可透過每一個相對應的第一透光封裝體41來轉換成白色光束。當每一個第二發光元件22為藍色發光二極體,且第二透光封裝體42為一用來覆蓋每一個相對應的第二發光元件22(藍色發光二極體)的透明膠體時,每一個第二發光元件22所產生的藍色光束即可在不需經過波長轉換的情況下,直接從每一個相對應的第二透光封裝體42投射出來。In addition, as shown in FIG. 3 and FIG. 4, the package unit 4 includes at least two covers of the at least two first light-emitting elements 21, respectively, and is respectively a first light-transmissive package 41 surrounded by at least two first insulating frames 31 and at least two second portions respectively covering the at least two second light-emitting elements 22 and surrounded by the at least two second insulating frames 32 The light-transmitting package body 42 may be one of a phosphor colloid and a transparent colloid, and the at least two second light-transmissive packages 42 may be One of a fluorescent colloid and a transparent colloid. For example, when each of the first light-emitting elements 21 is a blue light-emitting diode, and the first light-transmissive package 41 is used to cover each of the corresponding first light-emitting elements 21 (blue light-emitting diodes) When the phosphor colloid is used, the blue light beam generated by each of the first light-emitting elements 21 can be converted into a white light beam through each of the corresponding first light-transmitting packages 41. When each of the second light-emitting elements 22 is a blue light-emitting diode, and the second light-transmissive package 42 is a transparent colloid for covering each of the corresponding second light-emitting elements 22 (blue light-emitting diodes) The blue light beam generated by each of the second light-emitting elements 22 can be directly projected from each of the corresponding second light-transmissive packages 42 without undergoing wavelength conversion.
再者,本創作的另外一實施例可提供的一種用於產生對稱性投射光源的多晶片封裝結構,其包括:一基板單元1、一發光單元2及一封裝單元4。基板單元1包括一基板本體10、至少兩個設置在基板本體10的上表面上且彼此電性連接的跨接式導電層(11A、11B)、及至少一設置在基板本體10的上表面上且與上述至少兩個跨接式導電層(11A、11B)彼此絕緣的連接式導電層11C。發光單元2包括至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第一發光元件21及至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第二發 光元件22,其中上述至少兩個跨接式導電層(11A、11B)電性連接於上述至少兩個第一發光元件21之間,且上述至少一連接式導電層11C電性連接於上述至少兩個第二發光元件22之間。封裝單元4包括至少兩個分別覆蓋上述至少兩個第一發光元件21的第一透光封裝體41及至少兩個分別覆蓋上述至少兩個第二發光元件22的第二透光封裝體42。因此,本創作實施例所提供的多晶片封裝結構Z可透過“上述至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第一發光元件21”與“上述至少兩個成對角線地設置在基板本體10上且電性連接於基板本體10的第二發光元件22”的設計,以使得本創作的多晶片封裝結構Z可用於產生對稱性的投射光源。Furthermore, another embodiment of the present invention provides a multi-chip package structure for generating a symmetrical projection light source, comprising: a substrate unit 1, a light-emitting unit 2, and a package unit 4. The substrate unit 1 includes a substrate body 10, at least two jumper conductive layers (11A, 11B) disposed on the upper surface of the substrate body 10 and electrically connected to each other, and at least one disposed on the upper surface of the substrate body 10. And a connecting conductive layer 11C insulated from the at least two jumper conductive layers (11A, 11B). The light emitting unit 2 includes at least two first light emitting elements 21 disposed on the substrate body 10 and electrically connected to the substrate body 10 and at least two diagonally disposed on the substrate body 10 and electrically Second hair connected to the substrate body 10 The light element 22, wherein the at least two jumper conductive layers (11A, 11B) are electrically connected between the at least two first light emitting elements 21, and the at least one connected conductive layer 11C is electrically connected to the at least one Between the two second light-emitting elements 22. The package unit 4 includes at least two first light-transmissive packages 41 respectively covering the at least two first light-emitting elements 21 and at least two second light-transmissive packages 42 respectively covering the at least two second light-emitting elements 22 . Therefore, the multi-chip package structure Z provided by the present embodiment can be transmitted through the above-mentioned at least two first light-emitting elements 21 disposed diagonally on the substrate body 10 and electrically connected to the substrate body 10 and the above At least two designs of the second light-emitting elements 22" disposed diagonally on the substrate body 10 and electrically connected to the substrate body 10 such that the multi-chip package structure Z of the present invention can be used to generate a symmetrical projection light source .
綜上所述,本創作實施例所提供的多晶片封裝結構,其可透過“上述至少兩個成對角線地設置在基板本體上且電性連接於基板本體的第一發光元件”與“上述至少兩個成對角線地設置在基板本體上且電性連接於基板本體的第二發光元件”的設計,以使得本創作的多晶片封裝結構可用於產生對稱性的投射光源。再更進一步來說,本創作實施例所提供的多晶片封裝結構,其可透過“上述至少兩個跨接式導電層電性連接於上述至少兩個第一發光元件之間,且上述至少一連接式導電層電性連接於上述至少兩個第二發光元件之間”的設計,以使得上述至少兩個成對角線地設置在基板本體上且電性連接於基板本體的第一發光元件及上述至少兩個成對角線地設置在基板本體上且電性連接於基板本體的第二發光元件可以相互配 合來產生對稱性的投射光源。In summary, the multi-chip package structure provided by the present embodiment is permeable to "the at least two first light-emitting elements disposed diagonally on the substrate body and electrically connected to the substrate body" and " The above-described design of at least two second light-emitting elements diagonally disposed on the substrate body and electrically connected to the substrate body is such that the inventive multi-chip package structure can be used to generate a symmetrical projection light source. Further, the multi-chip package structure provided by the present embodiment is permeable to the at least two jumper-type conductive layers electrically connected between the at least two first light-emitting elements, and the at least one The connecting conductive layer is electrically connected between the at least two second light emitting elements" such that the at least two of the first light emitting elements are diagonally disposed on the substrate body and electrically connected to the substrate body And the at least two second light-emitting elements disposed on the substrate body diagonally and electrically connected to the substrate body can be matched with each other Together, a symmetrical projection source is produced.
以上所述僅為本創作之較佳可行實施例,非因此侷限本創作之專利範圍,故舉凡運用本創作說明書及圖式內容所為之等效技術變化,均包含於本創作之範圍內。The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patents of the present invention. Therefore, the equivalent technical changes that are made by using the present specification and the contents of the drawings are included in the scope of the present invention.
Z‧‧‧多晶片封裝結構Z‧‧‧Multi-chip package structure
1‧‧‧基板單元1‧‧‧Substrate unit
10‧‧‧基板本體10‧‧‧Substrate body
A1‧‧‧第一置晶區域A1‧‧‧first crystal area
A2‧‧‧第二置晶區域A2‧‧‧Second crystal area
11A、11B‧‧‧跨接式導電層11A, 11B‧‧‧cross-type conductive layer
11C‧‧‧連接式導電層11C‧‧‧Connected Conductive Layer
12A‧‧‧第一頂端導電焊墊12A‧‧‧First top conductive pad
12B‧‧‧第一底端導電焊墊12B‧‧‧First bottom conductive pad
13A‧‧‧第二頂端導電焊墊13A‧‧‧Second top conductive pad
13B‧‧‧第二底端導電焊墊13B‧‧‧Second bottom conductive pad
14‧‧‧散熱層14‧‧‧heat layer
15‧‧‧第一導電體15‧‧‧First conductor
16‧‧‧第二導電體16‧‧‧Second conductor
2‧‧‧發光單元2‧‧‧Lighting unit
21‧‧‧第一發光元件21‧‧‧First light-emitting element
210‧‧‧第一電極210‧‧‧First electrode
22‧‧‧第二發光元件22‧‧‧Second light-emitting element
220‧‧‧第二電極220‧‧‧second electrode
3‧‧‧框架單元3‧‧‧Frame unit
31‧‧‧第一絕緣框架31‧‧‧First insulation frame
310‧‧‧第一容置空間310‧‧‧First accommodation space
32‧‧‧第二絕緣框架32‧‧‧Second insulation frame
320‧‧‧第二容置空間320‧‧‧Second accommodation space
4‧‧‧封裝單元4‧‧‧Package unit
41‧‧‧第一透光封裝體41‧‧‧First light-transmissive package
42‧‧‧第二透光封裝體42‧‧‧Second light-transmissive package
W11‧‧‧第一外側導線W11‧‧‧ first outer conductor
W12‧‧‧第一內側導線W12‧‧‧First inner wire
W20‧‧‧跨接導線W20‧‧‧ jumper wire
W21‧‧‧第二外側導線W21‧‧‧Second outer conductor
W22‧‧‧第二內側導線W22‧‧‧second inner wire
圖1A為本創作用於產生對稱性投射光源的多晶片封裝結構的基板單元的其中一觀看視角的立體示意圖。1A is a perspective view of one of viewing angles of a substrate unit of a multi-chip package structure for creating a symmetric projection light source.
圖1B為本創作用於產生對稱性投射光源的多晶片封裝結構的基板單元的另外一觀看視角的立體示意圖。1B is a perspective view of another viewing angle of a substrate unit of a multi-chip package structure for creating a symmetric projection light source.
圖2為本創作用於產生對稱性投射光源的多晶片封裝結構將發光單元設置在基板單元上的立體示意圖。2 is a perspective view of a multi-chip package structure for creating a symmetrical projection light source, in which a light-emitting unit is disposed on a substrate unit.
圖3為本創作用於產生對稱性投射光源的多晶片封裝結構將框架單元設置在基板單元上以圍繞發光單元的立體示意圖。3 is a perspective view of a multi-chip package structure for creating a symmetrical projection light source, in which a frame unit is disposed on a substrate unit to surround the light-emitting unit.
圖4為本創作用於產生對稱性投射光源的多晶片封裝結構將封裝單元設置在基板單元上以覆蓋發光單元的立體示意圖。4 is a perspective view of a multi-chip package structure for creating a symmetrical projection light source, in which a package unit is disposed on a substrate unit to cover the light-emitting unit.
1‧‧‧基板單元1‧‧‧Substrate unit
10‧‧‧基板本體10‧‧‧Substrate body
12A‧‧‧第一頂端導電焊墊12A‧‧‧First top conductive pad
13A‧‧‧第二頂端導電焊墊13A‧‧‧Second top conductive pad
2‧‧‧發光單元2‧‧‧Lighting unit
21‧‧‧第一發光元件21‧‧‧First light-emitting element
210‧‧‧第一電極210‧‧‧First electrode
22‧‧‧第二發光元件22‧‧‧Second light-emitting element
220‧‧‧第二電極220‧‧‧second electrode
3‧‧‧框架單元3‧‧‧Frame unit
31‧‧‧第一絕緣框架31‧‧‧First insulation frame
310‧‧‧第一容置空間310‧‧‧First accommodation space
32‧‧‧第二絕緣框架32‧‧‧Second insulation frame
320‧‧‧第二容置空間320‧‧‧Second accommodation space
W11‧‧‧第一外側導線W11‧‧‧ first outer conductor
W12‧‧‧第一內側導線W12‧‧‧First inner wire
W20‧‧‧跨接導線W20‧‧‧ jumper wire
W21‧‧‧第二外側導線W21‧‧‧Second outer conductor
W22‧‧‧第二內側導線W22‧‧‧second inner wire
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