TWI839894B - 具有多厚度電荷板的雪崩光偵測器 - Google Patents
具有多厚度電荷板的雪崩光偵測器 Download PDFInfo
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- 238000000034 method Methods 0.000 claims abstract description 28
- 238000010521 absorption reaction Methods 0.000 claims abstract description 13
- 239000000463 material Substances 0.000 claims description 25
- 239000002019 doping agent Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 18
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- 229910052796 boron Inorganic materials 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
- 238000001459 lithography Methods 0.000 description 5
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- 239000003989 dielectric material Substances 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
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- 235000012239 silicon dioxide Nutrition 0.000 description 2
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Abstract
一種雪崩光偵測器的結構和一種形成雪崩光偵測器的結構的方法。該結構包括具有第一部分和第二部分的第一半導體層,以及與第一半導體層在垂直方向上堆疊的第二半導體層。第一半導體層的第一部分界定出雪崩光偵測器的倍增區,第二半導體層界定出雪崩光偵測器的吸收區。該結構進一步包括在第一半導體層的第二部分中的電荷片。電荷片的厚度會隨水平面位置不同而變化,電荷片在垂直方向上位於第二半導體層和第一半導體層的第一部分之間。
Description
本發明涉及半導體裝置製造和積體電路,更具體地,涉及雪崩光偵測器的結構和形成雪崩光偵測器的結構的方法。
雪崩光偵測器,也稱為雪崩光電二極管,是一種高靈敏度的半導體光偵測器,它依靠光電效應將光轉換為可計數的電流脈衝。塗布小於擊穿電壓的高反向偏置電壓,則雪崩光偵測器會因為產生雪崩效應的碰撞電離而表現出內部電流增益效應。
因此需要用於雪崩光偵測器的改進結構和形成雪崩光偵測器的結構的方法。
在本發明的一個實施例中,提供了一種用於雪崩光偵測器的結構。該結構包括具有第一部分和第二部分的第一半導體層,以及與第一半導體層在垂直方向上堆疊的第二半導體層。第一半導體層的第一部分界定出雪崩光偵測器的倍增區,第二半導體層界定出雪崩光偵測器的吸收區。該結構進一步包括在第一半導體層的第二部分中的電荷片。電荷片的厚度會隨水平面位置不同而變化,電荷片在垂直方向上位於第二半導體層和第一半導體層的第一部分之間。
在本發明的一個實施例中,提供了一種形成雪崩光偵測器的結構的方法。該方法包括形成第一半導體層,該第一半導體層包括界定出雪崩光偵測器的倍增區的第一部分,以及在第一半導體層的第二部分中形成電荷片。電荷片的厚度會隨水平面位置不同而變化。該方法還包括形成與第一半導體層在垂直方向上堆疊的第二半導體層。第二半導體層界定出雪崩光偵測器的吸收區,電荷片在垂直方向上位於第二半導體層和第一半導體層的第一部分之間。
參考圖1、圖2、圖2A並且根據本發明的實施例,絕緣體上覆半導體(SOI)基板包括裝置層12、埋入絕緣層14和操作基板16。藉由插入的埋入絕緣層14將裝置層12與操作基板16分開,並且裝置層12比操作基板16薄得多。裝置層12可以由諸如單晶矽的半導體材料組成,並且可以是本質或輕摻雜p型的,並且埋入絕緣層14可以由諸如二氧化矽的介電材料組成。埋入絕緣層14沿下界面與操作基板16直接接觸,埋入絕緣層14沿上界面與裝置層12直接接觸,下界面和上界面之間利用埋入絕緣層14彼此間隔。裝置層12藉由埋入絕緣層14與操作基板16電性隔離。
可利用微影和蝕刻製程將裝置層12圖案化以界定出襯墊19。摻雜襯墊19可使其具有給定的導電類型。在一個實施例中,可以利用例如離子植入來摻雜(例如,重摻雜)襯墊19使其具有n型導電性。錐形件18可以將波導芯(未示出)耦合到襯墊19。可以由單晶矽構成錐形件18,或者備選地由單晶矽上的多晶矽疊層構成。
參考圖3、圖3A,其中相同的附圖標號表示圖2、圖2A中的相同特徵,並且在處理方法的後續製造階段,襯墊19包括凹陷部21,凹陷部21利用微影及蝕刻製程將在裝置層12的凹陷圖案化而形成。襯墊19的凸起部23位於凹陷部21的相對側邊緣處。在凹陷的圖案化期間,利用微影形成的蝕刻遮罩將凸起部23屏蔽,使得在進行蝕刻製程之前保持裝置層12的原始厚度。凸起部23相對於凹陷部21凸起(即升高)。
在襯墊19的凹陷部21和凸起部23上形成介電層22。介電層22可以依循襯墊19的凹陷部21和凸起部23的表面輪廓。在一個實施例中,可以由共形沉積的介電材料構成介電層22,例如二氧化矽。
利用微影和蝕刻製程將硬遮罩24沉積並圖案化以形成位於襯墊19的凹陷部21上方的窗26。在一個實施例中,窗26可以在凹陷部21上方居中。硬遮罩24覆蓋襯墊19的外圍部分,包括凸起部23。可由介電材料構成硬遮罩24,例如氮化矽。利用蝕刻製程圖案化介電層22,將硬遮罩24中的窗26轉移到介電層22,這暴露出具有窗26尺寸大小的凹陷部21之表面區域並且從中將介電層22移除。
參考圖4、圖4A,其中相同的附圖標號表示圖3、圖3A中的相同特徵,並且在處理方法的後續製造階段,將硬遮罩24移除,並於襯墊19的凹陷部21中未被圖案化介電層22覆蓋的表面區域上形成半導體層28。可以由單晶半導體材料構成半導體層28,例如單晶矽。在一個實施例中,半導體層28在其形成之後可以是未摻雜的和本質的。可以藉由磊晶生長形成半導體層28。可以選擇形成半導體層28的磊晶生長製程,因為允許單晶半導體材料從半導體材料(例如,凹陷部21的暴露表面區域)生長而不是從介電材料(例如,圖案化的介電層22)生長。半導體層28的厚度為t1。變淺的襯墊19的凹陷部21至少部分地補償了半導體層28的厚度t1,以便改良平面性。
參考圖5、圖5A,其中相同的附圖標號代表圖4、圖4A中的相同特徵,並且在處理方法的後續製造階段,摻雜區30形成在半導體層28中鄰近半導體層28的上表面29。摻雜區30可以佈置成由摻雜半導體材料的平行條帶構成的一維陣列,該摻雜半導體材料條帶與半導體層28的未摻雜條帶在水平面中交替配置。在這方面,部分的半導體層28的本質半導體材料橫向設置在摻雜區30的相鄰對之間。
在一個實施例中,可以利用例如選擇性離子植入製程形成摻雜區30,該離子植入製程使用帶開口的植入遮罩,該開口配置在不同部分的半導體層28的上方,以接收植入的離子。植入遮罩可以包括一層光阻劑,該光阻劑通過旋塗製程塗布、預烘烤、暴露於由光罩投射出的光、曝光後烘烤、並用化學顯影劑顯影以界定出開口。可以選擇植入條件(例如,離子種類、劑量、動能)以調整摻雜區30的電氣和物理特性。可以在形成摻雜區30之後,移除具有足以阻止離子的厚度的植入遮罩。在一個實施例中,摻雜區30可以接收並包含提供p型導電性的p型摻雜劑(例如,硼)。
參考圖6、圖6A,其中相同的附圖標號表示圖5、圖5A中的相同特徵,並且在處理方法的後續製造階段,在半導體層28中鄰近半導體28的上表面29形成摻雜層32。在一個實施例中,可以利用例如選擇性離子植入製程形成摻雜層32,該離子植入製程使用帶開口的植入遮罩,該開口配置在半導體層28的上方。植入遮罩可以包括一層光阻劑,該光阻劑通過旋塗製程塗布、預烘烤、暴露於由光罩投射出的光、曝光後烘烤、並用化學顯影劑顯影以界定出開口。可以選擇植入條件(例如,離子種類、劑量、動能)以調整摻雜層32的電氣和物理特性。可以在形成摻雜層32之後,移除具有足以阻止離子的厚度的植入遮罩。在一個實施例中,摻雜層32可以接收並包含提供p型導電性的p型摻雜劑(例如,硼)。在一個實施例中,摻雜區30和摻雜層32皆可包含提供p型導電性的p型摻雜劑(例如,硼)。
以低於摻雜區30的能量植入的摻雜層32穿透半導體層28的深度範圍,該深度範圍淺於摻雜區30的深度範圍。摻雜層32重疊並連接摻雜區30,進而在半導體層28中形成複合摻雜層。包括摻雜區30和摻雜層32的複合摻雜層提供用於雪崩光偵測器中的電場控制的電荷片。
摻雜區30在電荷片中界定出面朝襯墊19的凹陷部21的波紋。覆蓋在較薄摻雜層32上的摻雜區30提供可變化厚度(即,多個厚度)的電荷片。具體地,電荷片在摻雜區30的位置處的厚度為t2,並且在摻雜區30之間的空間中的厚度為t3,厚度t3小於厚度t2。半導體層28包括電荷片和襯墊19的凹陷部21之間的本質半導體材料。部分的半導體層28的本質半導體材料位於摻雜區30的相鄰對之間的空間中。
半導體層28的本質半導體材料可以界定出雪崩光偵測器的倍增區。半導體層28的本質半導體材料的厚度不一(即,多個厚度),其在等於厚度t1和厚度t2之差的厚度和等於厚度t1和厚度t3之差的較大厚度之間隨著水平面位置不同而變化。因此,雪崩光偵測器的倍增區還包括與電荷片中的波紋互補的波紋。
參考圖7、圖7A,其中相同的附圖標號代表圖6、圖6A中的相同特徵,並且在處理方法的後續製造階段,半導體層34形成在半導體層28上並且位於由摻雜區30和摻雜層32所提供的電荷片上方,由摻雜區30和摻雜層32所提供的電荷片位於與半導體層34相鄰的部分半導體層28中。可藉由磊晶生長製程使半導體層34生長,例如選擇性磊晶生長製程。
半導體層34可以由吸收光的半導體材料構成,並從吸收的光中產生電荷載體。在一個實施例中,半導體層34可以包括具有本質鍺成分的半導體材料。在一個實施例中,半導體層34可以包括僅具有鍺成分的半導體材料。
摻雜層36形成於半導體層34中且鄰近半導體層34的上表面。在一個實施例中,可以例如藉由使用植入遮罩的選擇性離子植入製程形成摻雜層36。可選擇植入條件(例如,離子種類、劑量、動能)以調整摻雜層36的電學和物理特性。在一個實施例中,摻雜層36可以接收並包含提供p型導電性的p型摻雜劑(例如,硼)。在一個實施例中,摻雜層36和電荷片可以包含相同導電類型的摻雜劑(例如,p型摻雜劑)。沿垂直方向位於摻雜層36和雪崩光偵測器的電荷片之間的半導體層34的本質半導體材料界定出雪崩光偵測器的吸收區。
形成接點38以電性連接和物理連接至摻雜層36。形成接點40以電性連接和物理連接至襯墊19的凸起部23。接點38、40可以形成在雪崩光偵測器上方形成的介電層的圖案化的接點開口中。
使用上,由半導體層34限定的雪崩光偵測器的吸收區來吸收入射輻射,並且由半導體層28的未植入部分界定出的倍增區中產生信號放大。當入射光子在吸收區被吸收時,會產生電子-電洞對,電子會漂移進入倍增區。藉由衝擊游離化產生額外的電子-電洞對,在倍增區產生雪崩電流。雪崩光偵測器偏置在擊穿電壓以下以收集雪崩電流。包含摻雜區30和摻雜層32的電荷片用於控制倍增區和吸收區中的電場。所收集的雪崩電流提供可檢測的電子信號,該信號通過襯墊19的接點凸起部分23,從電流路徑中的雪崩光偵測器輸出。
垂直堆疊排列的吸收區、電荷片和包括可變厚度的電荷片的倍增區,以及可變厚度的倍增區,與習知雪崩光偵測器相比,減少了暗電流。與習知雪崩光偵測器相比,多厚度電荷片和倍增區可以提高增益。可以選擇半導體層34的厚度以獲得期望的帶寬,允許選擇帶寬至少部分地基於易於調節的參數。
參考圖8、圖8A並且根據備選實施例,可修改用於形成摻雜區30的植入遮罩以添加摻雜區31,指向摻雜區31使其與摻雜區30相交並且界定出摻雜區30、31的柵格。可以由彼此間隔的摻雜半導體材料的條帶構成摻雜區31,在水平面中指向或排列這些摻雜半導體材料條帶,使其橫越於由摻雜區30所構成的彼此間隔的摻雜半導體材料的條帶。在一個實施例中,摻雜區30可以形成在柵格的列中,摻雜區31可以形成在柵格的行中。摻雜層32覆蓋在摻雜區30和摻雜區31上使得電荷片具有多個厚度。
半導體層28的本質半導體材料位於柵格中摻雜區30、31之間的間隙中。在橫向方向上,間隙中的半導體層28的厚度變化介於等同厚度t1與厚度t2之差的厚度以及等同厚度t1與厚度t3之差的較大厚度之間。
參考圖9、圖9A並且根據替代實施例,可以沉積半導體層28使其厚度更大並且可以將較厚的半導體層28的上部圖案化以界定出台面35。相對於半導體層28的下部,檯面35是升高的。摻雜區30和摻雜層32可以形成在台面35中,並且半導體層34可以形成在台面35上。在代表性實施例中,摻雜區30、31可以形成在柵格的行和列中。在替代實施例中,摻雜區30可以形成為橫向間隔條帶並作為一維陣列中的列。
參考圖10、圖10A並且根據替代實施例,摻雜層44可以形成在半導體層28的上部並與相鄰於半導體層28的上表面29。在一個實施例中,可以藉由例如選擇性離子植入製程形成摻雜層44,該離子植入製程使用帶開口的植入遮罩,該開口配置在半導體層28的上表面29的整個表面區域上,在一個實施例中,摻雜層44的半導體材料可以接收並包含提供p型導電性的p型摻雜劑(例如,硼)。
參考圖11、圖11A,其中相同的標號表示圖10、圖10A中的相同特徵,並且在處理方法的後續製造階段,可藉由微影和蝕刻製程將半導體層28圖案化以界定出溝槽46,該溝槽46部分延伸穿過摻雜層44(圖8、圖8A)以界定出摻雜區30以及覆蓋在摻雜區30上的摻雜層32。溝槽46可以彼此平行排列。將溝槽46圖案化而界定出的摻雜區30配置成由摻雜半導體材料的平行條帶所構成的一維陣列。
參考圖12、圖12A,其中相同的附圖標號代表圖11、圖11A中的相同特徵,並且在處理方法的後續製造階段,半導體層34形成半導體層28上,該半導體層28位於在摻雜區30和摻雜層32上方。摻雜區30可以配置在一維陣列中,在水平面中,由與半導體層34的條帶交替的摻雜半導體材料的平行條帶構成該一維陣列。就此而言,部分的半導體層34位於摻雜區30的相鄰對之間的溝槽46中,使得雪崩光偵測器的吸收區是波紋狀的。半導體層34的本質半導體材料的厚度變化,在介於具有在厚度t4和厚度t5之間隨著水平面位置不同而變化,厚度t5大於厚度t4。
繼續完成雪崩光偵測器設備的結構製程。在垂直方向上,堆疊雪崩光偵測器的吸收區、電荷片和倍增區,以及波紋狀電荷片和波紋狀吸收區。
參考圖13、圖13A,其中相同的附圖標號表示圖12、圖12A中的相同特徵,並且根據替代實施例,被圖案化以形成摻雜區30的溝槽46可被修改成也形成摻雜區31。在一個實施例中,摻雜區30、31可以形成在柵格的行和列中。在代表性實施例中,摻雜區30、31與半導體層28的未摻雜區在水平面的兩個維度上交替以界定出柵格,其中半導體層34的本質半導體材料配置在柵格的間隙中。間隙中的半導體層34的本質半導體材料的厚度變化介於厚度t4和厚度t5之間,隨著水平面位置的不同而變化。
參考圖14並根據備選實施例,接點38可以從半導體層34上的位置移動到半導體層28的延伸部48上的位置。藉由修改植入遮罩來修改摻雜層36,使得摻雜層36分段設置在半導體層34的邊緣。摻雜層36的這些段連接到形成在半導體層28的延伸部48中的摻雜層50。延伸部48從位於半導體層34下方的部分半導體層28中突出。接點38電性連接和物理連接到一部分的摻雜層50,摻雜層50位於半導體層28的延伸部48的加寬段中。半導體層28的延伸部48的加寬段配置在半導體層34的一端,其相對於錐形件18。
上述方法用於積體電路晶片的製造。所得積體電路晶片可以由製造商以原始晶圓形式(例如,作為具有多個未封裝晶片的單個晶圓)、作為裸晶片或以封裝形式分發。該晶片可以與其他晶片、離散電路元件和/或其他信號處理設備整合,作為中間產品或最終產品的一部分。最終產品可以是任何包含積體電路晶片的產品,例如具有中央處理器的電腦產品或智慧手機。
本文中對用近似語言修飾的術語的引用,例如「大約」、「近似」和「基本上」,不限於指定的精確值。近似值的語言可以對應於用於測量值的儀器的精度,並且除非另外依賴於儀器的精度,否則可表示規定值範圍的正負10%。
本文中對諸如「垂直」、「水平」等術語的引用是通過示例而非限制的方式來建立參考框架。本文所用的術語「水平」被定義平面,其平行於半導體基板的常規平面,而不管實際的三維空間指向。術語「垂直」和「法線」指的是垂直於水平的方向,如剛才定義的那樣。術語「橫向」是指水平面內的方向。
「連接」或「耦合」到另一個構件或與另一個構件「連接」或「耦合」的構件可以直接連接或耦合到另一個構件或與另一個構件「連接」或「耦合」。或者替代地,可以存在一個或多個中間構件。如果不存在中間構件,則構件可以「直接連接」或「直接耦合」到另一個構件或與另一個構件「直接連接」或「直接耦合」。如果存在至少一個中間構件,則構件可以「間接連接」或「間接耦合」到另一構件或與另一構件「間接連接」或「間接耦合」。「在」另一個構件上或「接觸」另一個構件的構件可以直接在另一個構件上或與另一個構件直接接觸,或者取而代之,可以存在一個或多個中間構件。如果沒有中間構件,則一個構件可能「直接位於」或「直接接觸」另一個構件。如果存在至少一個中間構件,則一個構件可能「間接位於」或「間接接觸」另一個構件。如果一個構件延伸並覆蓋另一個構件的一部分,則不同的構件可能會「重疊」。
對於本發明的各種實施例的描述是出於進行說明,但並不旨在窮舉或限制所揭示的實施例。在不脫離所描述的實施例的範圍和精神的情況下,許多修改和變化對於本領域的一般技術人員來說將是顯而易見的。本發明所選擇使用的術語是為能以最好的方式來解釋實施例的原理、實際應用方法或對市場中所發現技術的技術改良,或者使本領域的其他一般技術人員能夠理解本發明所揭示的實施例。
12:裝置層
14:埋入絕緣層
16:操作基板
18:錐形件
19:襯墊
21:凹陷部
22:介電層
23:凸起部
24:硬遮罩
26:窗
28:半導體層
29:上表面
30:摻雜區
31:摻雜區
32:摻雜層
34:半導體層
35:台面
36:摻雜層
38:接點
40:接點
44:摻雜層
46:溝槽
48:延伸部
50:摻雜層
t1:厚度
t2:厚度
t3:厚度
t4:厚度
t5:厚度
2-2:剖面線
2A-2A:剖面線
包含在本說明書中並構成本說明書的一部分的附圖說明了本發明的各種實施例,並且與上述對於本發明的一般描述和下述實施例的詳細描述一起用於解釋本發明的實施例。在附圖中,相同的附圖標號表示各個圖式中的相同特徵。
圖1是根據本發明實施例的處理方法的初始製造階段的結構的俯視圖。
圖2是大體上沿圖1中的剖面線2-2截取的剖面圖。
圖2A是大體上沿圖1中的剖面線2A-2A截取的剖面圖。
圖3、圖3A是在圖2、圖2A之後的製造階段的結構的剖面圖。
圖4、圖4A是在圖3、圖3A之後的製造階段的結構的剖面圖。
圖5、圖5A是在圖4、圖4A之後的製造階段的結構的剖面圖。
圖6、圖6A是在圖5、圖5A之後的製造階段的結構的剖面圖。
圖7、圖7A是在圖6、圖6A之後的製造階段的結構的剖面圖。
圖8、圖8A是根據可選實施例的結構的剖面圖。
圖9、圖9A是根據本發明的替代實施例的處理方法的製造階段的結構的剖面圖。
圖10、圖10A是在圖9、圖9A之後的製造階段的結構的剖面圖。
圖11、圖11A是在圖10、圖10A之後的製造階段的結構的剖面圖。
圖12、圖12A是根據可選實施例的結構的剖視圖。
圖13、圖13A是根據可選實施例的結構的剖面圖。
圖14是根據本發明的可選實施例的結構的俯視圖。
14:埋入絕緣層
16:操作基板
28:半導體層
30:摻雜區
32:摻雜層
34:半導體層
36:摻雜層
38:接點
40:接點
Claims (16)
- 一種雪崩光偵測器的結構,該結構包括:一第一半導體層,包括第一部分和第二部分,該第一半導體層的該第一部分界定出該雪崩光偵測器的倍增區;一第二半導體層,與該第一半導體層垂直堆疊並且界定出該雪崩光偵測器的吸收區;一電荷片,設置於該第一半導體層的該第二部分之中並且具有隨水平面位置不同而變化的厚度,該電荷片在垂直方向上位於該第二半導體層和該第一半導體層的該第一部分之間,該電荷片包括第一多個摻雜區和摻雜層,該摻雜層堆疊在該第一多個摻雜區上,該第一多個摻雜區和該摻雜層各自都包含第一導電類型的摻雜劑,該第一多個摻雜區具有第一厚度,並且該摻雜層具有小於該第一厚度的第二厚度;以及一襯墊,由具有第二導電類型的半導體材料所組成,該第二導電類型不同於該第一導電類型;其中該第一半導體層與該第二半導體層位於該襯墊上。
- 如請求項1所述之結構,其中該第一半導體層的該第二部分包括本質矽,並且該第二半導體層包括本質鍺。
- 如請求項1所述之結構,進一步包括:一第二摻雜層,設於該第二半導體層中;以及一接點,連接至該第二摻雜層。
- 如請求項3所述之結構,其中該第二摻雜層包含該第一導電類型的該摻雜劑。
- 如請求項3所述之結構,其中該第二半導體層包括本質鍺,其在垂直方向上位於該電荷片和該第二摻雜層之間。
- 如請求項1所述之結構,其中該第一多個摻雜區排列成條帶的一維陣列。
- 如請求項6所述之結構,其中該第二半導體層包括多個部分,並且該第二半導體層的每個部沿橫向方向設置在該第一多個摻雜區中的相鄰對之間。
- 如請求項1所述之結構,其中該電荷片包括具有該第二厚度的第二多個摻雜區,並且該第二多個摻雜區被設置成與該第一多個摻雜區相交以界定出柵格。
- 如請求項8所述之結構,其中該第二半導體層包括多個部分,其位於該柵格的間隙中。
- 如請求項1所述之結構,其中該第一半導體層的第二部分是台面,其在水平面上具有第一橫向尺寸,該第一半導體層的該第一部分在水平面上具有第二橫向尺寸,該第二橫向尺寸大於該第一橫向尺寸。
- 如請求項1所述之結構,進一步包括:一埋入絕緣層;以及一操作基板,透過該埋入絕緣層與該襯墊隔離。
- 如請求項1所述之結構,其中該襯墊包括一凹陷部,以及該第一半導體層與該第二半導體層位於該襯墊的該凹陷部。
- 如請求項12所述之結構,其中該襯墊包括第一凸起部和第二凸起部,該凹陷部橫向位於該第一凸起部和該第二凸起部之間,還包括:一第一接點,連接至該襯墊的該第一凸起部;一第二接點,連接至該襯墊的該第二凸起部;以及一第三接點,連接至該第二半導體層。
- 一種形成用於雪崩光偵測器的結構的方法,該方法包括:形成一第一半導體層,該第一半導體層包括一第一部分,其界定出該雪崩光偵測器的倍增區;在該第一半導體層的一第二部分中形成一電荷片,其中該電荷片的厚度會隨水平面位置不同而變化;以及形成與該第一半導體層垂直堆疊的一第二半導體層,其中該第二半導體層界定出該雪崩光偵測器的吸收區,該電荷片在垂直方向上設置在該第二半導體層和該第一半導體層的該第一部分之間;其中該電荷片包括多個摻雜區和重疊在該多個摻雜區上的一摻雜層,該第一多個摻雜區和該摻雜層各自都包含第一導電類型的摻雜劑,該多個摻雜區具有一第一厚度,以及該摻雜層具有一第二厚度,其小於該第一厚度,以及該第一半導體層與該第二半導體層位於一襯墊上,該襯墊由具有第二導電類型的半導體材料所組成,該第二導電類型不同於該第一導電類型。
- 如請求項14所述之方法,進一步包括:在該第二半導體層中形成一第二摻雜層;以及 形成連接至該第二摻雜層的一接點。
- 如請求項15所述之方法,其中該第二摻雜層包含該第一導電類型的該摻雜劑,並且該第二半導體層包括本質鍺,其在垂直方向上位於該電荷片和該第二摻雜層之間。
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US17/528,385 US11721780B2 (en) | 2021-11-17 | 2021-11-17 | Avalanche photodetectors with a multiple-thickness charge sheet |
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