TWI820221B - 半導體封裝件之製造方法 - Google Patents

半導體封裝件之製造方法 Download PDF

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Publication number
TWI820221B
TWI820221B TW108134682A TW108134682A TWI820221B TW I820221 B TWI820221 B TW I820221B TW 108134682 A TW108134682 A TW 108134682A TW 108134682 A TW108134682 A TW 108134682A TW I820221 B TWI820221 B TW I820221B
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Taiwan
Prior art keywords
semiconductor package
protective layer
forming step
sealant
manufacturing
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TW108134682A
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English (en)
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TW202013647A (zh
Inventor
張秉得
金永奭
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日商迪思科股份有限公司
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Publication of TW202013647A publication Critical patent/TW202013647A/zh
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Publication of TWI820221B publication Critical patent/TWI820221B/zh

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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract

[課題]提供一種半導體封裝件的製造方法，可抑止所需工時的增加。[解決手段]一種半導體封裝件的製造方法，包含：槽形成步驟，從在加工槽內露出的深度以上到不完全切斷半導體封裝件基板的深度為止，藉由第1切割手段從上表面側沿著分割預定線切入到至少使配線基板所具備的地線在加工槽內露出的深度以上而不會完全切斷半導體封裝件基板的深度為止，並在密封劑的至少上表面形成具有第1寬度的加工槽；防護層形成步驟，從密封劑側上方藉由導電性材料在加工槽的側面、加工槽的底面及密封劑上表面形成防護層；以及分割步驟，實施防護層形成步驟後，藉由第2切割刀片沿著加工槽，以不除去在側面形成的防護層的寬度切入，分割半導體封裝件基板。

Description

半導體封裝件之製造方法
本發明係一種半導體封裝件的製造方法。
半導體封裝件基板一般為在配線基板上安裝半導體晶片，且該半導體晶片藉由樹脂等的密封劑所密封之基板（例如，參閱特許文獻1）。但是近年來，出現一種半導體封裝件基板，為了有效活用在配線基板的半導體晶片的相反側接合的焊料球旁邊的空間，而在焊料球之間進一步設置半導體晶片，藉由密封劑來密封配線基板的兩側。 [習知技術文獻] [專利文獻]
[專利文獻1] 日本特願2017-084105號
[發明所欲解決的課題] 在配線基板的兩面設置半導體晶片的半導體封裝件基板，一般在分割為一個個的半導體封裝件後，藉由導電性的防護層所被覆。導電性的防護層藉由濺鍍法在半導體封裝件的外表面上形成。形成如前述的防護層之現有半導體封裝件的製造方法具有以下的問題點。
被單體化的半導體封裝件形成防護層時，半導體封裝件的厚度較厚，而難以在底側形成足夠厚度的防護層，並且底側的防護層的密著力有變弱的傾向。另外，防護層的成分亦附著在對進行濺鍍時半導體封裝件進行支撐的濺鍍用膠膜上，藉此在將濺鍍後半導體封裝件從濺鍍用膠膜拾取時會有引起防護層的剝落或在防護層生成毛邊等的品質不良之可能性。
然而，若配線基板的下側的半導體晶片不會產生影響其他半導體晶片的電磁波，或是產生使被配線基板內之由金屬組成的配線或安裝用的焊料球遮蔽的頻率之電磁波的話，則只要被覆配線基板的上表面並形成連接配線基板的地線之防護層，不需要在底側整體形成防護層。
另外，如前述的藉由進行濺鍍形成防護層的半導體封裝件的製造方法，單體化後的半導體封裝件在濺鍍之前，因為需要由在單體化時支撐的切割膠膜轉載為濺鍍用膠膜，故該轉載作業需要將單體化的半導體封裝件個別轉載而增加所需工時。因此，如前述的藉由進行濺鍍形成防護層的半導體封裝件的製造方法，具有所謂製造的所需工時增加之問題。另外，單體化的半導體封裝件具有電鍍程序不適用於防護層之缺點。
因此，本發明的目的為提供一種半導體封裝件的製造方法，其可抑止所需工時的增加。
[解決課題的技術手段] 根據本發明，提供一種半導體封裝件的製造方法，將半導體封裝件基板沿著分割預定線分割而製造半導體封裝件，該半導體封裝件基板是在藉由交叉的多條分割預定線所劃分的配線基板的上表面安裝多個半導體晶片，該配線基板的下表面安裝多個焊料球，並將兩面藉由密封劑所密封而成，其特徵在於，該半導體封裝件的製造方法具備：槽形成步驟，藉由第1切割手段從該上表面側沿著該分割預定線切入到至少使該配線基板所具備的地線在加工槽內露出的深度以上而不會完全切斷該半導體封裝件基板的深度為止之深度，並在該密封劑的至少上表面形成具有第1寬度的加工槽；防護層形成步驟，實施該槽形成步驟後，從該密封劑側上方藉由導電性材料在該加工槽的側面、該加工槽的底面及該密封劑上表面形成防護層；以及分割步驟，實施該防護層形成步驟後，藉由第2切割手段沿著該加工槽，以不除去在該側面形成的防護層的寬度切入，分割該半導體封裝件基板。
較佳為，在該槽形成步驟中，該加工槽在上表面的第1寬度大於底面的第2寬度，且在該加工槽的側面形成傾斜狀。
[發明功效] 本案發明具有可抑止所需工時的增加之效果。
以下參閱圖式詳細說明本發明的實施方式。本發明並不僅限定於藉由以下的實施方式所記載的內容。另外，以下記載的構成要素包含本領域技術人員可容易思及、實質上為相同之技術內容。進而，可藉由以下記載的構成進行適當的組合。另外，可進行不脫離本發明的要旨範圍內的構成之各種省略、置換或變更。
[第1實施方式] 基於圖式說明本發明的第1實施方式的半導體封裝件的製造方法。圖1係示意性表示藉由第1實施方式的半導體封裝件的製造方法所製造的半導體封裝件剖面圖。圖2係表示藉由第1實施方式的半導體封裝件的製造方法所分割的半導體封裝件之半導體封裝件基板的局部之俯視圖。圖3係表示沿著圖2中的III-III線之剖面圖。圖4係表示第1實施方式的半導體封裝件的製造方法的流程之流程圖。
第1實施方式的半導體封裝件的製造方法，係製造如圖1所示的半導體封裝件之方法。藉由第1實施方式的半導體封裝件的製造方法所製造的半導體封裝件1，係需要藉由所謂EMI（Electro-Magnetic Interference，電磁干擾）遮斷的所有封裝件的半導體裝置，以藉由外表面的防護層7抑止電磁雜訊洩漏至周圍之方式構成。
半導體封裝件1係如圖1所示，具備：配線基板（亦稱為中介層基板）2、在配線基板2的上表面21安裝的多個半導體晶片3、在配線基板2的下表面22安裝的多個焊料球4、在下表面22安裝的下表面側半導體晶片5、密封配線基板2的上表面21及下表面22的密封劑6，以及防護層7。
配線基板2具備絕緣性的絕緣板23，以及在絕緣板23內部設置的地線24。地線24埋設於配線基板2的絕緣板23內部，藉由導電性的金屬構成。另外，在配線基板2的上表面21及下表面22形成連接半導體晶片3及下表面側半導體晶片5的電極或各種配線。
半導體晶片3及下表面側半導體5具備IC（Integrated Circuit，積體電路）或LSI（Large Scale Integration，大型積體電路）等。在第1實施方式中，9個半導體晶片3等間距地安裝在配線基板2的上表面21，1個下表面半導體晶片5安裝在配線基板2的下表面22的中央。另外，在第1實施方式中，藉由將半導體晶片3藉由覆晶接合安裝於配線基板2的上表面21，該覆晶接合將設在下表面的未圖示之電極直接連接於配線基板2的上表面21。另外，在第1實施方式中，下表面側半導體晶片5在上表面連接線材8的一端，在配線基板2的下表面連接線材8的另一端，並藉由所謂引線接合安裝於配線基板2的下表面22。焊料球4係藉由導電性的金屬所構成，設置多個於配線基板2的下表面22的下表面側半導體晶片5的周圍。焊料球4抑止由下表面側半導體晶片5的電磁雜訊往周圍的洩漏。
密封劑6係藉由絕緣性的合成樹脂所構成，將半導體晶片3、下表面側半導體晶片5、線材8以及焊料球4的配線基板2附近的基端部進行密封（被覆）。密封劑5藉由環氧樹脂、矽氧樹脂、聚氨酯樹脂、不飽和聚酯樹脂、丙烯酸聚氨酯樹脂或聚醯亞胺樹脂等所構成。另外，距離焊料球4的配線基板2之側的前端部露出於密封劑6之外。
防護層7藉由銅、鈦、鎳、金等之中的一個以上導電性的金屬所構成，係成膜厚度為數µm以上的多層膜。防護膜7形成於與配線基板2的上表面21平行的密封劑6的上表面61、比在上表面61相連的配線基板2更靠近上表面61的密封劑6的外側表面62、以及配線基板2的外側表面25上，並與地線24連接。外側表面62從上表面61朝向密封劑6的下表面63，緩緩朝向半導體封裝件1的外側方向傾斜。比起配線基板2，防護層7不形成於較密封劑6的更靠下表面63側。另外，在第1實施方式中雖然防護層7形成於配線基板2的外側表面25上，在本發明中防護層7若與地線24連接的話，比起配線基板2的地線24只要不設於下表面63側即可。防護層7抑止由半導體晶片3的電磁雜訊往周圍的洩漏。
前述構成的半導體封裝件1係將如圖2及圖3所示的半導體封裝件基板10沿著分割預定線11而分割並形成防護層7而製造。半導體封裝件基板10係如圖2及圖3所示，在藉由多條分割預定線11劃分的配線基板2的上表面21安裝多個半導體晶片3，在配線基板2的下表面22安裝多個焊料球4，藉由密封劑6來密封上表面21及下表面22的兩面。在第1實施方式中，半導體封裝件基板10在藉由配線基板2的上表面21的多條分割預定線11所分割的各區域安裝9個半導體晶片3，在藉由多條分割預定線11所分割的各區域的下表面22安裝有1個下表面側半導體晶片5。再者，如圖2及圖3所示的半導體封裝件基板10沒有形成防護層7。另外，在第1實施方式中，半導體封裝件基板10係如圖2及圖3所示，在露出配線基板2的外緣部的狀態下以密封劑6密封半導體晶片3等，在配線基板2的外緣部的上表面21形成在後述的槽形成步驟ST1與分割步驟ST3中用來對準的對準標記26。再者，在第1實施方式中，對準標記26雖然是形成在配線基板2的外緣部的上表面21，但在本發明中對準標記26可形成於配線基板2的外緣部的下表面22，亦可形成於配線基板2的外緣部的上表面21及下表面22兩者。
第1實施方式的半導體封裝件的製造方法係將如圖2及圖3所示的半導體封裝件基板10沿著分割預定線11分割且形成防護層7之製造半導體封裝件1的方法。半導體封裝件的製造方法如圖4所示，具備：槽形成步驟ST1、防護層形成步驟ST2，以及分割步驟ST3。
（槽形成步驟） 圖5係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟中藉由切割膠膜支撐半導體封裝件基板的狀態之剖面圖。圖6係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟之剖面圖。圖7係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟後的半導體封裝件基板之剖面圖。
槽形成步驟ST1係藉由作為第1切割手段的第1切割刀片101從上表面21側沿著分割預定線11切入到至少使圖5所示的配線基板2所具備的地線24在圖6所示的加工槽9內露出的深度以上而不會完全切斷半導體封裝件基板10的深度為止，並在密封劑6的至少上表面61形成第1寬度91之加工槽9。
在槽形成步驟ST1用的第1切割刀片101係形成為梯形剖面，其切割刃102的厚度方向的中央隨著向外周側突出並朝向外周而緩緩變薄。第1切割刀片101的切割刃102係前端103沿著第1切割刀片101的軸心平坦地形成，從前端103隨著朝向軸心而緩緩往第1切割刀片101變厚的方向傾斜。
在第1實施方式中，槽形成步驟ST1如圖5所示，將比半導體封裝件基板10的平面形狀大的切割膠膜200黏貼於密封劑6的下表面63，將環狀框架201黏貼於切割膠膜200的外周緣。在槽形成步驟ST1中，切割裝置100如圖6所示，在卡盤台104的保持面105透過切割膠膜200吸引保持半導體封裝件基板10的密封劑6的下表面63側。在槽形成步驟ST1中，切割裝置100的未圖示紅外線攝影機對半導體封裝件基板10的密封劑6的上表面61進行攝像，進行半導體封裝件基板10與第1切割刀片101的對位來執行對準。再者，在第1實施方式中，在配線基板2的上表面21的外緣部形成的對準標記26未被密封劑6密封而露出，藉此對準係以對準標記26為基準進行。
在槽形成步驟ST1中，切割裝置100如圖6所示，一邊使半導體封裝件基板10及第1切割刀片101沿著分割預定線11相對地移動，一邊將第1切割刀片101從上表面61側切入至到達配線基板2的地線24為止，在半導體封裝件基板10的密封劑6的上表面61形成剖面大致為V字狀的加工槽9。在第1實施方式的槽形成步驟ST1中，切割裝置100將第1切割刀片101從密封劑6的上表面61分割配線基板2，且切入到不會切入密封劑6的相較於配線基板2更靠近下表面63之側的深度來形成加工槽9。
在第1實施方式中，槽形成步驟ST1中的切割裝置100雖然將第1切割刀片101切入到將配線基板2分割的深度為止，在本發明中，切割裝置100只要將第1切割刀片101切入到將配線基板2的地線24在加工槽9內露出的深度為止即可，亦可在必須將半導體封裝件基板10完全分割時，將第1切割刀片101切入到密封劑6的相較於配線基板2更靠近下表面63之側。在本發明中，不將半導體封裝件基板10完全分割的第1切割刀片101的切入深度係第1切割刀片101的前端103不從下表面63露出而位於密封劑6內的深度。再者，在半導體封裝件基板10的分割預定線11的密封劑6形成加工槽9，則加工槽9的側面94係由前述的外側表面62與外側表面25而構成。
再者，在槽形成步驟ST1中，半導體封裝件基板10在全部的分割預定線11形成加工槽9。加工槽9如圖7所示，沿著第1切割刀片101的切割刃102的外輪廓而形成，密封劑6的上表面61的第1寬度91形成為比底面92的第2寬度93大，加工槽9的側面94形成相對於上表面61及底面92而傾斜。半導體封裝件的製造方法如圖7所示，在半導體封裝件基板10的全部分割預定線11的密封劑6的上表面61側形成加工槽9，接著進入防護層形成步驟ST2。
（防護層形成步驟） 圖8係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟中藉由濺鍍膠膜支撐半導體封裝件基板的狀態之剖面圖。圖9係示意性表示如圖4所示的半導體封裝件的製造方法的防護層形成步驟後的半導體封裝件基板之剖面圖。
防護層形成步驟ST2係從密封劑6側上方藉由導電性材料的金屬，在加工槽9的側面94、加工槽9的底面92及密封劑6的上表面61形成防護層7之步驟。在防護層形成步驟ST2中，將切割膠膜200從半導體封裝件基板10的密封劑6的下表面63剝去，如圖8所示，將比半導體封裝件基板10的平面形狀大的濺鍍膠膜210黏貼於密封劑6的下表面63，在濺鍍膠膜210的外周緣黏貼環狀框架211。
在防護層形成步驟ST2中，在容器內容納半導體封裝件基板10，藉由濺鍍使金屬從密封劑6的上表面61側附著於半導體封裝件基板10，形成防護層7。如此，在第1實施方式中，在防護層形成步驟ST2中雖然係藉由所謂的濺鍍來形成防護層7，但本發明中亦可藉由電鍍來形成防護層7。半導體封裝件的製造方法如圖9所示，形成防護層7，接著進入分割步驟ST3。再者，在防護層形成步驟ST2後，半導體封裝件基板10如圖9所示，在全部的分割預定線11所形成的加工槽9之側面94、底面92及密封劑6的上表面61形成防護層7。
（分割步驟） 圖10係示意性表示如圖4所示的半導體封裝件的製造方法的分割步驟之剖面圖。圖11係示意性表示如圖4所示的半導體封裝件的製造方法的分割步驟後的半導體封裝件基板之剖面圖。
分割步驟ST3係實施防護層形成步驟ST2後，藉由第2切割手段的第2切割刀片111沿著加工槽9，以不除去在側面94形成的防護層7的寬度切入，將半導體封裝件基板10分割為一個個的半導體封裝件1之步驟。
在分割步驟ST3用的第2切割刀片111係切割刃112的前端113沿著第2切割刀片111的軸心大致平坦地形成。第1實施方式中，第2切割刀片111的厚度雖然係與在加工槽9的底面92互相鄰接的側面94上的防護層7間的間隔71相等地形成，但在本發明中，第2切割刀片111的厚度只要比加工槽9的側面94的地線24上的防護層7間的間隔72薄即可。簡而言之，第1實施方式中，不除去防護層7的寬度雖然係與在加工槽9的底面92互相鄰接的側面94上的防護層7間的間隔71相等地形成，但在本發明中，不除去防護層7的寬度只要在加工槽9的側面94的地線24上的防護層7間的間隔72以下即可。亦即，在本發明中，不除去防護層7的寬度係超過零且在加工槽9的側面94的地線24上的防護層7間的間隔72以下，與防護層7的地線24連接的部分在分割後殘存的寬度。
在第1實施方式中，分割步驟ST3如圖10所示，切割裝置110係在卡盤台114的保持面115透過濺鍍膠膜210吸引保持半導體封裝件基板10的密封劑6的下表面63側。在分割步驟ST3中，切割裝置110的未圖示攝像單元對半導體封裝件基板10的密封劑6的上表面61進行攝像，進行半導體封裝件基板10與第2切割刀片111的對位來執行對準。再者，在第1實施方式中，在配線基板2的上表面21的外緣部形成的對準標記26未被密封劑6密封而露出，藉此對準以對準標記26為基準進行。另外，在分割步驟ST3中，在濺鍍膠膜210不適合切割時亦可替換黏貼為切割膠膜。
在分割步驟ST3中，切割裝置110一邊使半導體封裝件基板10及第2切割刀片111沿著分割預定線11相對地移動，一邊將第2切割刀片111從上表面61側到達濺鍍膠膜210為止而切入加工槽9的底面92，將半導體封裝件基板10分割為一個個半導體封裝件1。半導體封裝件的製造方法如圖11所示，將第2切割刀片111切入半導體封裝件基板10的全部分割預定線11的加工槽9的底面92，結束作業。再者，一個個分割的半導體封裝件1係藉由周知的拾取裝置等從濺鍍膠膜210進行拾取。
第1實施方式的半導體封裝件的製造方法，係在槽形成步驟ST1中將第1切割刀片101切入到不會完全分割半導體封裝件基板10的深度為止，藉此可抑止在防護層形成步驟ST2中用於形成防護層7的所需時間，並可抑止將半導體封裝件基板10從切割膠膜200替換黏貼為濺鍍膠膜210的所需工時。由此結果，半導體封裝件的製造方法具有可抑止所需工時的增加之效果。
另外，第1實施方式的半導體封裝件的製造方法，係在槽形成步驟ST1中將第1切割刀片101切入到不會完全分割半導體封裝件基板10的深度為止，在防護層形成步驟ST2中形成防護層7，藉此可抑止防護層7接觸濺鍍膠膜210。由此結果，半導體封裝件的製造方法可抑止防護層7的剝離及防護層7的毛邊產生。
另外，第1實施方式的半導體封裝件的製造方法，係在槽形成步驟ST1中將第1切割刀片101切入到不會完全分割半導體封裝件基板10的深度為止，在防護層形成步驟ST2中形成防護層7，藉此防護層7不會形成於下表面63的附近。由此結果，第1實施方式的半導體封裝件的製造方法可抑止特別是在靠近下表面63之防護層7的厚度變薄，亦可抑止相對於防護層7的密封劑6之而密著力變弱。
再者，第1實施方式的半導體封裝件的製造方法雖然是在將濺鍍膠膜210黏貼於下表面63的狀態下實施了分割步驟ST3，但本發明亦可從下表面63剝去濺鍍膠膜210後，將切割膠膜黏貼於下表面63來實施分割步驟ST3。
[第2實施方式] 基於圖式說明本發明的第2實施方式的半導體封裝件的製造方法。圖12係示意性表示第2實施方式的半導體封裝件的製造方法的槽形成步驟中藉由切割膠膜支撐半導體封裝件基板的狀態之剖面圖。圖13係示意性表示第2實施方式的半導體封裝件的製造方法的分割步驟之剖面圖。圖14係示意性表示第2實施方式的半導體封裝件的製造方法的分割步驟後的半導體封裝件基板之剖面圖。再者，圖12、圖13及圖14與第1實施方式相同的部分用相同標號表示以省略其說明。
第2實施方式的半導體封裝件基板的製造方法除了分割步驟ST3相異，為半導體封裝件基板10在未被密封劑6密封而露出的配線基板2的外緣部的上表面21及下表面22兩者形成對準標記26以外，其他與第1實施方式相同。在第2實施方式的半導體封裝件基板的製造方法之分割步驟ST3中，如圖12所示，將比半導體封裝件基板10的平面形狀大的切割膠膜220黏貼於密封劑6的上表面61側，將環狀框架221黏貼於切割膠膜220的外周緣，並將濺鍍膠膜210從半導體封裝件基板10的密封劑6的下表面63剝去。
在第2實施方式中，分割步驟ST3如圖13所示，切割裝置110係在卡盤台114的保持面115透過切割膠膜220吸引保持於半導體封裝件基板10的密封劑6的上表面61側。在分割步驟ST3中，切割裝置110的未圖示紅外線攝影機對半導體封裝件基板10的密封劑6的下表面63進行攝像，進行半導體封裝件基板10與第2切割刀片111的對位來執行對準。再者，在第2實施方式中，在配線基板2的下表面22的外緣部形成的對準標記26，該對準標記26未被密封劑6密封而露出，藉此對準係以對準標記26為基準進行。
在分割步驟ST3中，切割裝置110一邊使半導體封裝件基板10及第2切割刀片111沿著分割預定線11相對地移動，一邊將第2切割刀片111從下表面63側切入至到達加工槽9的底面92為止，將半導體封裝件基板10分割為一個個半導體封裝件1。半導體封裝件的製造方法如圖14所示，將第2切割刀片111切入到半導體封裝件基板10的全部分割預定線11的加工槽9的底面92，結束作業。再者，一個個分割的半導體封裝件1係藉由周知的拾取裝置等從切割膠膜220拾取。
第2實施方式的半導體封裝件的製造方法，係在槽形成步驟ST1中將第1切割刀片101切入至不會完全分割半導體封裝件基板10的深度為止，藉此可抑止在防護層形成步驟ST2用於形成防護層7的所需時間，並可抑止將半導體封裝件基板10從切割膠膜200、220替換黏貼為濺鍍膠膜210之間的所需工時。由此結果，半導體封裝件的製造方法與第1實施方式相同，具有可抑止所需工時的增加之效果。
另外，第2實施方式的半導體封裝件的製造方法，係在槽形成步驟ST1中將第1切割刀片101切入至不會完全分割半導體封裝件基板10的深度為止，在防護層形成步驟ST2中形成防護層7，藉此可抑止防護層7接觸於濺鍍膠膜210。由此結果，半導體封裝件的製造方法與第1實施方式相同，可抑止防護層7的剝離及防護層7的毛邊發生。
再者，本發明不限定為上述實施方式等。亦即，可實施不脫離本發明的骨幹的範圍之各種變形。舉例而言，在未於配線基板2的外緣部的上表面21或下表面22形成對準標記26的情況，以及包含配線基板2的外緣部且上表面21及下表面22的整體以密封劑6密封而無法檢測對準標記26的情況，切割裝置100、110 亦可在槽形成步驟ST1及分割步驟ST3中，藉由紅外線攝像機或攝像單元對半導體封裝件基板10進行攝像，檢測分割預定線11或加工槽9的底面92並執行對準。
1:半導體封裝件 2:配線基板 3:半導體晶片 4:焊料球 6:密封劑 7:防護層 9:加工槽 10:半導體封裝件基板 11:分割預定線 21:配線基板的上表面 22:配線基板的下表面 61:密封劑的上表面 91:第1寬度 92:加工槽的底面 93:第2寬度 94:加工槽的側面 101:第1切割刀片（第1切割手段） 111:第2切割刀片（第2切割手段） ST1:槽形成步驟 ST2:防護層形成步驟 ST3:分割步驟
圖1係示意性表示藉由第1實施方式的半導體封裝件的製造方法所製造的半導體封裝件剖面圖。 圖2係表示藉由第1實施方式的半導體封裝件的製造方法所分割的半導體封裝件之半導體封裝件基板的局部之俯視圖。 圖3係表示沿著圖2中的III-III線之剖面圖。 圖4係表示第1實施方式的半導體封裝件的製造方法的流程之流程圖。 圖5係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟中藉由切割膠膜支撐半導體封裝件基板的狀態之剖面圖。 圖6係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟之剖面圖。 圖7係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟後的半導體封裝件基板之剖面圖。 圖8係示意性表示如圖4所示的半導體封裝件的製造方法的槽形成步驟中藉由濺鍍膠膜支撐半導體封裝件基板的狀態之剖面圖。 圖9係示意性表示如圖4所示的半導體封裝件的製造方法的防護層形成步驟後的半導體封裝件基板之剖面圖。 圖10係示意性表示如圖4所示的半導體封裝件的製造方法的分割步驟之剖面圖。 圖11係示意性表示如圖4所示的半導體封裝件的製造方法的分割步驟後的半導體封裝件基板之剖面圖。 圖12係示意性表示第2實施方式的半導體封裝件的製造方法的槽形成步驟中藉由切割膠膜支撐半導體封裝件基板的狀態之剖面圖。 圖13係示意性表示第2實施方式的半導體封裝件的製造方法的分割步驟之剖面圖。 圖14係示意性表示第2實施方式的半導體封裝件的製造方法的分割步驟後的半導體封裝件基板之剖面圖。
ST1:槽形成步驟
ST2:防護層形成步驟
ST3:分割步驟

Claims (2)

  1. 一種半導體封裝件的製造方法，將半導體封裝件基板沿著分割預定線分割而製造半導體封裝件，該半導體封裝件基板是在藉由交叉的多條分割預定線所劃分的配線基板的上表面安裝多個半導體晶片，該配線基板的下表面安裝多個焊料球，在該下表面安裝下表面側半導體晶片，該配線基板具備絕緣性的絕緣板與在該絕緣板內部設置的導電性的地線，並將兩面藉由密封劑所密封而成，其特徵在於，該半導體封裝件的製造方法具備：槽形成步驟，藉由第1切割手段從該上表面側沿著該分割預定線切入到至少使該配線基板所具備的該地線在加工槽內露出的深度以上而不會完全切斷該半導體封裝件基板的深度為止，並在該密封劑的至少上表面形成具有第1寬度的加工槽；防護層形成步驟，實施該槽形成步驟後，從該密封劑側上方藉由導電性材料在該加工槽的側面、該加工槽的底面及該密封劑上表面形成與該地線連接之防護層；以及分割步驟，實施該防護層形成步驟後，藉由第2切割手段沿著該加工槽，以不除去在該側面形成的防護層的寬度切入，分割該半導體封裝件基板。
  2. 如申請專利範圍第1項所載之半導體封裝件的製造方法，其中，在該槽形成步驟中，該加工槽在上表面的第1寬度大於底面的第2寬度，且在該加工槽的側面形成傾斜狀。
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