CN110970296A - 半导体封装的制造方法 - Google Patents

半导体封装的制造方法 Download PDF

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Publication number
CN110970296A
CN110970296A CN201910875437.2A CN201910875437A CN110970296A CN 110970296 A CN110970296 A CN 110970296A CN 201910875437 A CN201910875437 A CN 201910875437A CN 110970296 A CN110970296 A CN 110970296A
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China
Prior art keywords
semiconductor package
shield layer
manufacturing
package substrate
groove
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CN201910875437.2A
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张秉得
金永奭
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Disco Corp
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Disco Corp
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Abstract

提供半导体封装的制造方法，能够抑制所需工时的增加。半导体封装的制造方法包含如下的工序：槽形成工序，利用第一切削刀具从上表面侧沿着分割预定线切入至未将半导体封装基板完全切断的深度，在密封剂的至少上表面上形成具有第一宽度的加工槽，所述深度大于等于至少使布线基板所具有的接地线在加工槽内露出的深度；屏蔽层形成工序，从密封剂侧上方利用导电性材料在加工槽的侧面和加工槽的底面以及密封剂上表面上形成屏蔽层；以及分割工序，在实施了屏蔽层形成工序之后，通过第二切削刀具沿着加工槽以不将形成于侧面的屏蔽层去除的宽度切入，将半导体封装基板分割。

Description

半导体封装的制造方法
技术领域
本发明涉及半导体封装的制造方法。
背景技术
半导体封装基板通常是在布线基板上安装半导体芯片且通过树脂等密封剂将该半导体芯片密封而成的(例如，参照专利文献1)。但是，近年来，为了有效利用接合在布线基板的与半导体芯片相反的一侧的焊球旁边的空间，出现了在焊球之间进一步设置半导体芯片且利用密封剂将布线基板的两侧密封的半导体封装基板。
专利文献1：日本特愿2017-084105号
在布线基板的两个面上设置半导体芯片的半导体封装基板通常在被分割成各个半导体封装之后，通过导电性的屏蔽层进行包覆。导电性的屏蔽层通过溅射而形成于半导体封装的外表面上。如上述那样形成屏蔽层的以往的半导体封装的制造方法存在以下的问题点。
当在单片化后的半导体封装上形成屏蔽层的情况下，半导体封装的厚度较厚，相应地存在不容易在底侧形成充分厚度的屏蔽层并且底侧的屏蔽层的紧贴力较弱的趋势。另外，在溅射时，屏蔽层的成分也附着于对半导体封装进行支承的溅射用带上，从而当溅射后从溅射用带拾取半导体封装时，有可能发生屏蔽层的剥离或在屏蔽层产生飞边等品质不良。
但是，若布线基板的下侧的半导体芯片不产生对其他半导体芯片带来影响的电磁波、或产生被布线基板内的由金属构成的布线或安装用的焊球屏蔽的频率的电磁波，则只要包覆布线基板的上表面而形成与布线基板的接地线连接的屏蔽层，就无需一定在底侧整体形成屏蔽层。
另外，如上述那样通过溅射形成屏蔽层的半导体封装的制造方法中，单片化后的半导体封装需要在溅射前从在单片化时进行支承的划片带换装成溅射用带，因此该换装的作业需要一个一个地换装单片化后的半导体封装，所需工时会增加。由此，如上述那样通过溅射形成屏蔽层的半导体封装的制造方法存在制造的所需工时会增加的问题。另外，单片化后的半导体封装还存在由于镀覆工艺而无法应用屏蔽层的缺点。
发明内容
由此，本发明的目的在于提供半导体封装的制造方法，能够抑制所需工时的增加。
根据本发明，提供半导体封装的制造方法，将半导体封装基板沿着分割预定线分割而制造半导体封装，该半导体封装基板在由交叉的多条该分割预定线划分的布线基板的上表面上安装有多个半导体芯片，在该布线基板的下表面上安装有多个焊球，该布线基板的两个面被密封剂密封，其特征在于，该半导体封装的制造方法具有如下的工序：槽形成工序，利用第一切削单元从该上表面侧沿着该分割预定线切入至未将该半导体封装基板完全切断的深度，在该密封剂的至少上表面上形成具有第一宽度的加工槽，所述深度大于等于至少使该布线基板所具有的接地线在该加工槽内露出的深度；屏蔽层形成工序，在实施了该槽形成工序之后，从该密封剂侧上方利用导电性材料在该加工槽的侧面和该加工槽的底面以及该密封剂的上表面上形成屏蔽层；以及分割工序，在实施了该屏蔽层形成工序之后，通过第二切削单元沿着该加工槽按照不将形成于该侧面的屏蔽层去除的宽度切入，将该半导体封装基板分割。
优选在该槽形成工序中，该加工槽按照上表面的第一宽度比底面的第二宽度大的方式在该加工槽的侧面上形成有倾斜。
本申请发明起到能够抑制所需工时的增加的效果。
附图说明
图1是示意性示出通过第1实施方式的半导体封装的制造方法所制造的半导体封装的剖视图。
图2是通过第1实施方式的半导体封装的制造方法分割成半导体封装的半导体封装基板的一部分的俯视图。
图3是沿着图2中的III-III线的剖视图。
图4是示出第1实施方式的半导体封装的制造方法的流程的流程图。
图5是示意性示出在图4所示的半导体封装的制造方法的槽形成工序中利用划片带对半导体封装基板进行支承的状态的剖视图。
图6是示意性示出图4所示的半导体封装的制造方法的槽形成工序的剖视图。
图7是示意性示出图4所示的半导体封装的制造方法的槽形成工序后的半导体封装基板的剖视图。
图8是示意性示出在图4所示的半导体封装的制造方法的槽形成工序中利用溅射带对半导体封装基板进行支承的状态的剖视图。
图9是示意性示出图4所示的半导体封装的制造方法的屏蔽层形成工序后的半导体封装基板的剖视图。
图10是示意性示出图4所示的半导体封装的制造方法的分割工序的剖视图。
图11是示意性示出图4所示的半导体封装的制造方法的分割工序后的半导体封装基板的剖视图。
图12是示意性示出在第2实施方式的半导体封装的制造方法的槽形成工序中利用划片带对半导体封装基板进行支承的状态的剖视图。
图13是示意性示出第2实施方式的半导体封装的制造方法的分割工序的剖视图。
图14是示意性示出第2实施方式的半导体封装的制造方法的分割工序后的半导体封装基板的剖视图。
标号说明
1：半导体封装；2：布线基板；3：半导体芯片；4：焊球；6：密封剂；7：屏蔽层；9：加工槽；10：半导体封装基板；11：分割预定线；21：上表面；22：下表面；61：上表面；91：第一宽度；92：底面；93：第二宽度；94：侧面；101：第一切削刀具(第一切削单元)；111：第二切削刀具(第二切削单元)；ST1：槽形成工序；ST2：屏蔽层形成工序；ST3：分割工序。
具体实施方式
以下，参照附图对本发明实施方式进行详细说明。本发明并不被以下实施方式所记载的内容限定。另外，在以下所记载的构成要素中包含本领域技术人员能够容易想到的内容、实质上相同的内容。另外，以下所记载的结构可以适当组合。另外，可以在不脱离本发明的主旨的范围内进行结构的各种省略、置换或变更。
[第1实施方式]
根据附图，对本发明的第1实施方式的半导体封装的制造方法进行说明。图1是示意性示出通过第1实施方式的半导体封装的制造方法所制造的半导体封装的剖视图。图2是示出通过第1实施方式的半导体封装的制造方法分割成半导体封装的半导体封装基板的一部分的俯视图。图3是沿着图2中的III-III线的剖视图。图4是示出第1实施方式的半导体封装的制造方法的流程的流程图。
第1实施方式的半导体封装的制造方法是制造图1所示的半导体封装的方法。通过第1实施方式的半导体封装的制造方法所制造的半导体封装1是因所谓的EMI(Electro-Magnetic Interference：电磁干扰)而需要进行屏蔽的所有封装的半导体装置，构成为通过外表面的屏蔽层7抑制电磁噪声向周围泄漏。
如图1所示，半导体封装1具有：布线基板(也称为中介层基板)2；多个半导体芯片3，它们安装于布线基板2的上表面21上；多个焊球4，它们安装于布线基板2的下表面22上；下表面侧半导体芯片5，其安装于下表面22上；密封剂6，其对布线基板2的上表面21和下表面22进行密封；以及屏蔽层7。
布线基板2具有绝缘性的绝缘板23以及设置于绝缘板23的内部的接地线24。接地线24埋设于布线基板2的绝缘板23的内部，由导电性的金属构成。另外，在布线基板2的上表面21和下表面22上形成有与半导体芯片3、5连接的电极或各种布线。
半导体芯片3和下表面侧半导体芯片5具有IC(Integrated Circuit：集成电路)或LSI(Large Scale Integration：大规模集成)等。在第1实施方式中，半导体芯片3在布线基板2的上表面21上等间隔地安装有九个，下表面侧半导体芯片5在布线基板2的下表面22的中央安装有一个。另外，在第1实施方式中，半导体芯片3通过将设置于其下表面的未图示的电极与布线基板2的上表面21直接连接的倒装芯片键合而安装于布线基板2的上表面21上。另外，在第1实施方式中，下表面侧半导体芯片5通过在其上表面上连接引线8的一端并在布线基板2的下表面上连接引线8的另一端的所谓引线键合而安装于布线基板2的下表面22上。焊球4由导电性的金属构成，在布线基板2的下表面22的下表面侧半导体芯片5的周围设置有多个。焊球4抑制来自下表面侧半导体芯片5的电磁噪声向周围泄漏。
密封剂6由绝缘性的合成树脂构成，对半导体芯片3、下表面侧半导体芯片5、引线8以及焊球4的靠布线基板2的基端部进行密封(包覆)。密封剂6由环氧树脂、有机硅树脂、聚氨酯树脂、不饱和聚酯树脂、丙烯酸聚氨酯树脂或聚酰亚胺树脂等构成。另外，焊球4的远离布线基板2的侧的前端部在密封剂6外露出。
屏蔽层7由铜、钛、镍、金等中的一种以上导电性的金属构成，是成膜厚度为数μm以上的多层膜。屏蔽层7形成在与布线基板2的上表面21平行的密封剂6的上表面61、与上表面61相连且比布线基板2靠上表面61的密封剂6的外侧面62以及布线基板2的外侧面25上，与接地线24连接。外侧面62随着从上表面61朝向密封剂6的下表面63而逐渐向朝向半导体封装1的外侧的方向倾斜。屏蔽层7未形成在比布线基板2靠密封剂6的下表面63侧。另外，在第1实施方式中，屏蔽层7形成于布线基板2的外侧面25上，但在本发明中，若与接地线24连接，则也可以不设置在布线基板2的比接地线24靠下表面63侧的位置。屏蔽层7抑制来自半导体芯片3的电磁噪声向周围泄漏。
将图2和图3所示的半导体封装基板10沿着分割预定线11进行分割并且形成屏蔽层7，从而制造出上述结构的半导体封装1。如图2和图3所示，半导体封装基板10在由多条分割预定线11划分的布线基板2的上表面21上安装有多个半导体芯片3，在布线基板2的下表面22上安装有多个焊球4，上表面21和下表面22这两个面通过密封剂6进行密封。在第1实施方式中，半导体封装基板10在布线基板2的上表面21的由多条分割预定线11划分的各区域安装有九个半导体芯片3，在由多条分割预定线11划分的各区域的下表面22上安装有一个下表面侧半导体芯片5。另外，图2和图3所示的半导体封装基板10未形成屏蔽层7。另外，在第1实施方式中，如图2和图3所示，半导体封装基板10按照使布线基板2的外缘部露出的状态通过密封剂6对半导体芯片6等进行密封，在布线基板2的外缘部的上表面21上形成有在后述的槽形成工序ST1和分割工序ST3中用于对准的对准标记26。另外，在第1实施方式中，对准标记26形成于布线基板2的外缘部的上表面21上，但在本发明中，也可以形成于布线基板2的外缘部的下表面22上，也可以形成于布线基板2的外缘部的上表面21和下表面22这双方上。
第1实施方式的半导体封装的制造方法是将图2和图3所示的半导体封装基板10沿着分割预定线11进行分割且形成屏蔽层7而制造半导体封装1的方法。如图4所示，半导体封装的制造方法具有槽形成工序ST1、屏蔽层形成工序ST2以及分割工序ST3。
(槽形成工序)
图5是示意性示出在图4所示的半导体封装的制造方法的槽形成工序中利用划片带对半导体封装基板进行支承的状态的剖视图。图6是示意性示出图4所示的半导体封装的制造方法的槽形成工序的剖视图。图7是示意性示出图4所示的半导体封装的制造方法的槽形成工序后的半导体封装基板的剖视图。
槽形成工序ST1是如下的工序：利用作为第一切削单元的第一切削刀具101从上表面21侧沿着分割预定线11切入至未将半导体封装基板10完全分割的深度，在密封剂6的至少上表面61上形成具有第一宽度91的加工槽9，所述深度大于等于至少使图5所示的布线基板2所具有的接地线24在图6所示的加工槽9内露出的深度。
在槽形成工序ST1中所用的第一切削刀具101形成为剖面梯形型，切刃102的厚度方向的中央向外周侧突出且随着朝向外周而逐渐变薄。对于第一切削刀具101的切刃102，前端103沿着第一切削刀具101的轴心平坦地形成，随着从前端103朝向轴心逐渐向使第一切削刀具101增厚的方向倾斜。
在第1实施方式中，如图5所示，在槽形成工序ST1中，将比半导体封装基板10的平面形状大的划片带200粘贴于密封剂6的下表面63上，在划片带200的外周缘粘贴环状框架201。在槽形成工序ST1中，切削装置100如图6所示那样隔着划片带200而将半导体封装基板10的密封剂6的下表面63侧吸引保持于卡盘工作台104的保持面105上。在槽形成工序ST1中，切削装置100的未图示的红外线相机对半导体封装基板10的密封剂6的上表面61进行拍摄，执行对准，进行半导体封装基板10与第一切削刀具101的对位。另外，在第1实施方式中，在布线基板2的上表面21的外缘部所形成的对准标记26未被密封剂6密封而是露出的，因此以对准标记26为基准而进行对准。
如图6所示，在槽形成工序ST1中，切削装置100一边使半导体封装基板10和第一切削刀具101沿着分割预定线11相对地移动一边使第一切削刀具101从上表面61侧切入直至到达布线基板2的接地线24，在半导体封装基板10的密封剂6的上表面61上形成剖面大致V字状的加工槽9。在第1实施方式的槽形成工序ST1中，切削装置100使第一切削刀具101从密封剂6的上表面61对布线基板2进行分割且切入至未切入密封剂6的比布线基板2靠下表面63侧的深度而形成加工槽9。
在第1实施方式中，在槽形成工序ST1中，切削装置100使第一切削刀具101切入至将布线基板2分割的深度，但在本发明中，使第一切削刀具101切入至使布线基板2的接地线24在加工槽9内露出的深度即可，若未将半导体封装基板10完全分割，则也可以使第一切削刀具101切入至密封剂6的比布线基板2靠下表面63侧的位置。在本发明中，未将半导体封装基板10完全分割的第一切削刀具101的切入深度是指第一切削刀具101的前端103未从下表面63露出而是位于密封剂6内的深度。另外，当在半导体封装基板10的分割预定线11的密封剂6上形成加工槽9时，加工槽9的侧面94由上述的外侧面62和外侧面25构成。
另外，在槽形成工序ST1中，半导体封装基板10在所有的分割预定线11上形成加工槽9。如图7所示，加工槽9沿着第一切削刀具101的切刃102的外形而形成，密封剂6的上表面61的第一宽度91形成得大于底面92的第二宽度93，在加工槽9的侧面94上形成有相对于上表面61和底面92的倾斜。当如图7所示那样在半导体封装基板10的所有分割预定线11的密封剂6的上表面61侧形成加工槽9时，半导体封装的制造方法进入至屏蔽层形成工序ST2。
(屏蔽层形成工序)
图8是示意性示出在图4所示的半导体封装的制造方法的槽形成工序中利用溅射带对半导体封装基板进行支承的状态的剖视图。图9是示意性示出图4所示的半导体封装的制造方法的屏蔽层形成工序后的半导体封装基板的剖视图。
屏蔽层形成工序ST2是从密封剂6侧上方利用作为导电性材料的金属在加工槽9的侧面94、加工槽9的底面92以及密封剂6的上表面61上形成屏蔽层7的工序。在屏蔽层形成工序ST2中，将划片带200从半导体封装基板10的密封剂6的下表面63剥离，如图8所示，将比半导体封装基板10的平面形状大的溅射带210粘贴于密封剂6的下表面63上，在溅射带210的外周缘粘贴环状框架211。
在屏蔽层形成工序ST2中，在容器内收纳半导体封装基板10，通过溅射使金属从密封剂6的上表面61侧附着于半导体封装基板10，从而形成屏蔽层7。这样，在第1实施方式中，屏蔽层形成工序ST2通过所谓的溅射来形成屏蔽层7，但在本发明中，也可以通过电镀来形成屏蔽层7。当如图9所示那样形成屏蔽层7时，半导体封装的制造方法进入至分割工序ST3。另外，在屏蔽层形成工序ST2之后，半导体封装基板10如图9所示那样在形成于所有的分割预定线11的加工槽9的侧面94、底面92以及密封剂6的上表面61上形成有屏蔽层7。
(分割工序)
图10是示意性示出图4所示的半导体封装的制造方法的分割工序的剖视图。图11是示意性示出图4所示的半导体封装的制造方法的分割工序后的半导体封装基板的剖视图。
分割工序ST3是在实施了屏蔽层形成工序ST2之后通过作为第二切削单元的第二切削刀具111沿着加工槽9以不将形成于侧面94的屏蔽层7去除的宽度切入而将半导体封装基板10分割成各个半导体封装1的工序。
对于在分割工序ST3中所用的第二切削刀具111，切刃112的前端113沿着第二切削刀具111的轴心大致平坦地形成。在第1实施方式中，第二切削刀具111的厚度形成得与加工槽9的底面92上的相互相邻的侧面94上的屏蔽层7间的间隔71相等，但在本发明中，比加工槽9的侧面94的接地线24上的屏蔽层7间的间隔72薄即可。总之，在第1实施方式中，不将屏蔽层7去除的宽度与加工槽9的底面92上的相互相邻的侧面94上的屏蔽层7间的间隔71相等，但在本发明中，只要小于等于加工槽9的侧面94的接地线24上的屏蔽层7间的间隔72即可。即，在本发明中，不将屏蔽层7去除的宽度是如下的宽度：超过零且小于等于加工槽9的侧面94的接地线24上的屏蔽层7间的间隔72，屏蔽层7的与接地线24连接的部分在分割后残留。
在第1实施方式中，如图10所示，在分割工序ST3中，切削装置110隔着溅射带210而将半导体封装基板10的密封剂6的下表面63侧吸引保持于卡盘工作台114的保持面115上。在分割工序ST3中，切削装置110的未图示的拍摄单元对半导体封装基板10的密封剂6的上表面61进行拍摄，执行对准，进行半导体封装基板10与第二切削刀具111的对位。另外，在第1实施方式中，在布线基板2的上表面21的外缘部所形成的对准标记26未被密封剂6密封而是露出的，因此以对准标记26为基准而进行对准。另外，在分割工序ST3中，在溅射带210不适合切割的情况下，也可以换帖成划片带。
在分割工序ST3中，切削装置110一边使半导体封装基板10和第二切削刀具111沿着分割预定线11相对地移动一边使第二切削刀具111从上表面61侧切入至加工槽9的底面92直至到达溅射带210位置，从而将半导体封装基板10分割成各个半导体封装1。当如图11所示那样使第二切削刀具111切入至半导体封装基板10的所有分割预定线11的加工槽9的底面92时，半导体封装的制造方法结束。另外，各个分割得到的半导体封装1通过周知的拾取装置等从溅射带210上进行拾取。
第1实施方式的半导体封装的制造方法在槽形成工序ST1中使第一切削刀具101切入至未将半导体封装基板10完全分割的深度，因此能够抑制屏蔽层形成工序ST2中的用于形成屏蔽层7的所需时间，并且能够抑制从划片带200向溅射带210的半导体封装基板10的换帖的所需工时。其结果是，半导体封装的制造方法起到能够抑制所需工时的增加的效果。
另外，第1实施方式的半导体封装的制造方法在槽形成工序ST1中使第一切削刀具101切入至未将半导体封装基板10完全分割的深度，在屏蔽层形成工序ST2中形成屏蔽层7，因此能够抑制屏蔽层7与溅射带210接触。其结果是，半导体封装的制造方法能够抑制屏蔽层7的剥离以及屏蔽层7的飞边的产生。
另外，第1实施方式的半导体封装的制造方法在槽形成工序ST1中使第一切削刀具101切入至未将半导体封装基板10完全分割的深度，在屏蔽层形成工序ST2中形成屏蔽层7，因此不会使屏蔽层7形成至下表面63的附近。其结果是，第1实施方式的半导体封装的制造方法能够抑制屏蔽层7的厚度在下表面63附近特别薄，能够抑制屏蔽层7相对于密封剂6的紧贴力变弱。
另外，第1实施方式的半导体封装的制造方法在下表面63上粘贴有溅射带210的状态下实施了分割工序ST3，但在本发明中，也可以在从下表面63剥离了溅射带210之后，在下表面63上粘贴划片带而实施分割工序ST3。
[第2实施方式]
根据附图，对本发明的第2实施方式的半导体封装的制造方法进行说明。图12是示意性示出在第2实施方式的半导体封装的制造方法的槽形成工序中利用划片带对半导体封装基板进行支承的状态的剖视图。图13是示意性示出第2实施方式的半导体封装的制造方法的分割工序的剖视图。图14是示意性示出第2实施方式的半导体封装的制造方法的分割工序后的半导体封装基板的剖视图。另外，图12、图13以及图14中，在与第1实施方式相同的部分标记相同的标号并省略了说明。
第2实施方式的半导体封装基板的制造方法中，分割工序ST3与第1实施方式不同，半导体封装基板10在未被密封剂6密封而露出的布线基板2的外缘部的上表面21和下表面22这双方上形成有对准标记26，除此以外，与第1实施方式相同。如图12所示，在第2实施方式的半导体封装基板的制造方法的分割工序ST3中，将比半导体封装基板10的平面形状大的划片带220粘贴于密封剂6的上表面61侧，在划片带220的外周缘粘贴环状框架221，并且将溅射带210从半导体封装基板10的密封剂6的下表面63剥离。
在第2实施方式中，如图13所示，在分割工序ST3中，切削装置110隔着划片带220而将半导体封装基板10的密封剂6的上表面61侧吸引保持于卡盘工作台114的保持面115上。在分割工序ST3中，切削装置110的未图示的红外线相机对半导体封装基板10的密封剂6的下表面63进行拍摄，执行对准，进行半导体封装基板10与第二切削刀具111的对位。另外，在第2实施方式中，在布线基板2的下表面22的外缘形成有对准标记26，该对准标记26未被密封剂6密封而是露出的，因此以对准标记26为基准而进行对准。
在分割工序ST3中，切削装置110一边使半导体封装基板10和第二切削刀具111沿着分割预定线11相对地移动一边使第二切削刀具111从下表面63侧切入直至到达加工槽9的底面92为止，从而将半导体封装基板10分割成各个半导体封装1。当如图14所示那样使第二切削刀具111切入至半导体封装基板10的所有分割预定线11的加工槽9的底面92时，半导体封装的制造方法结束。另外，各个分割得到的半导体封装1通过周知的拾取装置等从划片带220拾取。
第2实施方式的半导体封装的制造方法在槽形成工序ST1中使第一切削刀具101切入至未将半导体封装基板10完全分割的深度，因此能够抑制屏蔽层形成工序ST2中的用于形成屏蔽层7的所需时间，并且能够抑制划片带200、220与溅射带210之间的半导体封装基板10的换帖的所需工时。其结果是，半导体封装的制造方法与第1实施方式同样地起到能够抑制所需工时的增加的效果。
另外，第2实施方式的半导体封装的制造方法在槽形成工序ST1中使第一切削刀具101切入至未将半导体封装基板10完全分割的深度，在屏蔽层形成工序ST2中形成屏蔽层7，因此能够抑制屏蔽层7与溅射带210接触。其结果是，半导体封装的制造方法与第1实施方式同样地能够抑制屏蔽层7的剥离以及屏蔽层7的飞边的产生。
另外，本发明并不限于上述实施方式等。即，可以在不脱离本发明的主旨的范围内进行各种变形并实施。例如当在布线基板2的外缘部的上表面21或下表面22上未形成对准标记26的情况下、以及包含布线基板2的外缘部在内的上表面21和下表面22的整体被密封剂6密封而无法检测到对准标记26的情况下，切削装置100、110在槽形成工序ST1和分割工序ST3中，通过红外线相机或拍摄单元对半导体封装基板10进行拍摄，对分割预定线11或加工槽9的底面92进行检测而执行对准。

Claims (2)

1.一种半导体封装的制造方法，将半导体封装基板沿着分割预定线分割而制造半导体封装，该半导体封装基板在由交叉的多条该分割预定线划分的布线基板的上表面上安装有多个半导体芯片，在该布线基板的下表面上安装有多个焊球，该布线基板的两个面被密封剂密封，其特征在于，
该半导体封装的制造方法具有如下的工序：
槽形成工序，利用第一切削单元从该上表面侧沿着该分割预定线切入至未将该半导体封装基板完全切断的深度，在该密封剂的至少上表面上形成具有第一宽度的加工槽，所述深度大于等于至少使该布线基板所具有的接地线在该加工槽内露出的深度；
屏蔽层形成工序，在实施了该槽形成工序之后，从该密封剂侧上方利用导电性材料在该加工槽的侧面和该加工槽的底面以及该密封剂的上表面上形成屏蔽层；以及
分割工序，在实施了该屏蔽层形成工序之后，通过第二切削单元沿着该加工槽按照不将形成于该侧面的屏蔽层去除的宽度切入，将该半导体封装基板分割。
2.根据权利要求1所述的半导体封装的制造方法，其特征在于，
在该槽形成工序中，
该加工槽按照上表面的第一宽度比底面的第二宽度大的方式在该加工槽的侧面上形成有倾斜。
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CN117476474A (zh) * 2023-12-21 2024-01-30 立芯科技(昆山)有限公司 一种半导体芯片表面溅镀的方法
CN117476474B (zh) * 2023-12-21 2024-04-16 立芯科技(昆山)有限公司 一种半导体芯片表面溅镀的方法

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