TWI817064B - 平坦化設備、平坦化方法及製造物品的方法 - Google Patents

平坦化設備、平坦化方法及製造物品的方法 Download PDF

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Publication number
TWI817064B
TWI817064B TW109141980A TW109141980A TWI817064B TW I817064 B TWI817064 B TW I817064B TW 109141980 A TW109141980 A TW 109141980A TW 109141980 A TW109141980 A TW 109141980A TW I817064 B TWI817064 B TW I817064B
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TW
Taiwan
Prior art keywords
layer
edge
chuck
overlay
substrate
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TW109141980A
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English (en)
Chinese (zh)
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TW202143330A (zh
Inventor
賽西 班柏格
歐斯康 歐斯特
克理斯多福 瓊斯
尹世赫
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日商佳能股份有限公司
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Publication of TW202143330A publication Critical patent/TW202143330A/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31058After-treatment of organic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Shaping Of Tube Ends By Bending Or Straightening (AREA)
  • Micromachines (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
TW109141980A 2020-01-31 2020-11-30 平坦化設備、平坦化方法及製造物品的方法 TWI817064B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/779,205 US11562924B2 (en) 2020-01-31 2020-01-31 Planarization apparatus, planarization process, and method of manufacturing an article
US16/779,205 2020-01-31

Publications (2)

Publication Number Publication Date
TW202143330A TW202143330A (zh) 2021-11-16
TWI817064B true TWI817064B (zh) 2023-10-01

Family

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Family Applications (1)

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TW109141980A TWI817064B (zh) 2020-01-31 2020-11-30 平坦化設備、平坦化方法及製造物品的方法

Country Status (4)

Country Link
US (2) US11562924B2 (enExample)
JP (1) JP7555829B2 (enExample)
KR (1) KR102831923B1 (enExample)
TW (1) TWI817064B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12065573B2 (en) * 2020-07-31 2024-08-20 Canon Kabushiki Kaisha Photocurable composition
US11908711B2 (en) * 2020-09-30 2024-02-20 Canon Kabushiki Kaisha Planarization process, planarization system and method of manufacturing an article
US12282251B2 (en) 2021-09-24 2025-04-22 Canon Kabushiki Kaisha Method of shaping a surface, shaping system, and method of manufacturing an article
US12195382B2 (en) * 2021-12-01 2025-01-14 Canon Kabushiki Kaisha Superstrate and a method of using the same
US20250269438A1 (en) * 2024-02-27 2025-08-28 Canon Kabushiki Kaisha Chuck assembly, planarization process, apparatus and method of manufacturing an article

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060077374A1 (en) * 2002-07-11 2006-04-13 Molecular Imprints, Inc. Step and repeat imprint lithography systems
US20080305440A1 (en) * 2002-05-16 2008-12-11 The Board Of Regents, The University Of Texas System Apparatus for fabricating nanoscale patterns in light curable compositions using an electric field
US20100053578A1 (en) * 2002-07-11 2010-03-04 Molecular Imprints, Inc. Apparatus for imprint lithography using an electric field

Family Cites Families (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5989103A (en) * 1997-09-19 1999-11-23 Applied Materials, Inc. Magnetic carrier head for chemical mechanical polishing
US6873087B1 (en) * 1999-10-29 2005-03-29 Board Of Regents, The University Of Texas System High precision orientation alignment and gap control stages for imprint lithography processes
US20040206621A1 (en) * 2002-06-11 2004-10-21 Hongwen Li Integrated equipment set for forming a low K dielectric interconnect on a substrate
US7077992B2 (en) * 2002-07-11 2006-07-18 Molecular Imprints, Inc. Step and repeat imprint lithography processes
US7019819B2 (en) * 2002-11-13 2006-03-28 Molecular Imprints, Inc. Chucking system for modulating shapes of substrates
US20050098534A1 (en) * 2003-11-12 2005-05-12 Molecular Imprints, Inc. Formation of conductive templates employing indium tin oxide
WO2005120834A2 (en) * 2004-06-03 2005-12-22 Molecular Imprints, Inc. Fluid dispensing and drop-on-demand dispensing for nano-scale manufacturing
WO2006076609A2 (en) * 2005-01-14 2006-07-20 Cabot Corporation Printable electronic features on non-uniform substrate and processes for making same
US7878791B2 (en) * 2005-11-04 2011-02-01 Asml Netherlands B.V. Imprint lithography
US7622935B2 (en) * 2005-12-02 2009-11-24 Formfactor, Inc. Probe card assembly with a mechanically decoupled wiring substrate
US8850980B2 (en) * 2006-04-03 2014-10-07 Canon Nanotechnologies, Inc. Tessellated patterns in imprint lithography
US8012395B2 (en) * 2006-04-18 2011-09-06 Molecular Imprints, Inc. Template having alignment marks formed of contrast material
US7718545B1 (en) * 2006-10-30 2010-05-18 Hewlett-Packard Development Company, L.P. Fabrication process
JP5182470B2 (ja) 2007-07-17 2013-04-17 大日本印刷株式会社 インプリントモールド
US8187515B2 (en) * 2008-04-01 2012-05-29 Molecular Imprints, Inc. Large area roll-to-roll imprint lithography
CN102089708A (zh) * 2008-06-09 2011-06-08 得克萨斯州大学系统董事会 适应性纳米形貌雕刻
JP5759195B2 (ja) * 2011-02-07 2015-08-05 キヤノン株式会社 型、インプリント方法及び物品製造方法
US20140028686A1 (en) * 2012-07-27 2014-01-30 Qualcomm Mems Technologies, Inc. Display system with thin film encapsulated inverted imod
JP2014049658A (ja) * 2012-08-31 2014-03-17 Toshiba Corp パターン形成方法及びテンプレート
JP5823937B2 (ja) 2012-09-07 2015-11-25 株式会社東芝 モールド、モールド用ブランク基板及びモールドの製造方法
JP5851442B2 (ja) * 2013-03-25 2016-02-03 株式会社東芝 モールド及びその製造方法
US9718096B2 (en) * 2013-08-19 2017-08-01 Board Of Regents, The University Of Texas System Programmable deposition of thin films of a user-defined profile with nanometer scale accuracy
CN111584354B (zh) * 2014-04-18 2021-09-03 株式会社荏原制作所 蚀刻方法
US10409156B2 (en) * 2015-02-13 2019-09-10 Canon Kabushiki Kaisha Mold, imprint apparatus, and method of manufacturing article
JP2016157785A (ja) * 2015-02-24 2016-09-01 株式会社東芝 テンプレート形成方法、テンプレートおよびテンプレート基材
SG11201803014WA (en) * 2015-10-15 2018-05-30 Univ Texas Versatile process for precision nanoscale manufacturing
JP6597186B2 (ja) 2015-10-30 2019-10-30 大日本印刷株式会社 インプリント用のモールド、モールド製造用の基板およびインプリント方法
US10717646B2 (en) * 2016-05-20 2020-07-21 Board Of Regents, The University Of Texas System Precision alignment of the substrate coordinate system relative to the inkjet coordinate system
US11131922B2 (en) * 2016-06-06 2021-09-28 Canon Kabushiki Kaisha Imprint lithography template, system, and method of imprinting
US11762284B2 (en) * 2016-08-03 2023-09-19 Board Of Regents, The University Of Texas System Wafer-scale programmable films for semiconductor planarization and for imprint lithography
US10580659B2 (en) * 2017-09-14 2020-03-03 Canon Kabushiki Kaisha Planarization process and apparatus
US10606171B2 (en) * 2018-02-14 2020-03-31 Canon Kabushiki Kaisha Superstrate and a method of using the same
JP7218114B2 (ja) 2018-07-12 2023-02-06 キヤノン株式会社 平坦化装置、平坦化方法及び物品の製造方法
US11198235B2 (en) * 2018-08-09 2021-12-14 Canon Kabushiki Kaisha Flexible mask modulation for controlling atmosphere between mask and substrate and methods of using the same
JP2020043160A (ja) * 2018-09-07 2020-03-19 キオクシア株式会社 インプリント装置、インプリント方法、及び半導体装置の製造方法
US11018018B2 (en) * 2018-12-05 2021-05-25 Canon Kabushiki Kaisha Superstrate and methods of using the same
US10754078B2 (en) * 2018-12-20 2020-08-25 Canon Kabushiki Kaisha Light source, a shaping system using the light source and an article manufacturing method
US10892167B2 (en) * 2019-03-05 2021-01-12 Canon Kabushiki Kaisha Gas permeable superstrate and methods of using the same
US11664220B2 (en) * 2019-10-08 2023-05-30 Canon Kabushiki Kaisha Edge exclusion apparatus and methods of using the same
US11776840B2 (en) * 2019-10-29 2023-10-03 Canon Kabushiki Kaisha Superstrate chuck, method of use, and method of manufacturing an article
US11215921B2 (en) * 2019-10-31 2022-01-04 Canon Kabushiki Kaisha Residual layer thickness compensation in nano-fabrication by modified drop pattern
US11550216B2 (en) * 2019-11-25 2023-01-10 Canon Kabushiki Kaisha Systems and methods for curing a shaped film
US11107678B2 (en) * 2019-11-26 2021-08-31 Canon Kabushiki Kaisha Wafer process, apparatus and method of manufacturing an article
JP7346268B2 (ja) * 2019-12-05 2023-09-19 キヤノン株式会社 インプリント用のテンプレート、テンプレートを用いたインプリント方法
US11567401B2 (en) * 2019-12-20 2023-01-31 Canon Kabushiki Kaisha Nanofabrication method with correction of distortion within an imprint system
US11656546B2 (en) * 2020-02-27 2023-05-23 Canon Kabushiki Kaisha Exposure apparatus for uniform light intensity and methods of using the same
JP2021144985A (ja) * 2020-03-10 2021-09-24 キオクシア株式会社 テンプレート、テンプレートの製造方法および半導体装置の製造方法
US12136564B2 (en) * 2020-03-30 2024-11-05 Canon Kabushiki Kaisha Superstrate and method of making it
US11443940B2 (en) * 2020-06-24 2022-09-13 Canon Kabushiki Kaisha Apparatus for uniform light intensity and methods of using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080305440A1 (en) * 2002-05-16 2008-12-11 The Board Of Regents, The University Of Texas System Apparatus for fabricating nanoscale patterns in light curable compositions using an electric field
US20060077374A1 (en) * 2002-07-11 2006-04-13 Molecular Imprints, Inc. Step and repeat imprint lithography systems
US20100053578A1 (en) * 2002-07-11 2010-03-04 Molecular Imprints, Inc. Apparatus for imprint lithography using an electric field

Also Published As

Publication number Publication date
JP7555829B2 (ja) 2024-09-25
US20210242073A1 (en) 2021-08-05
KR20210098334A (ko) 2021-08-10
TW202143330A (zh) 2021-11-16
US11562924B2 (en) 2023-01-24
KR102831923B1 (ko) 2025-07-10
JP2021125680A (ja) 2021-08-30
US20230061361A1 (en) 2023-03-02
US12283522B2 (en) 2025-04-22

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