TWI815596B - Additive thin circuit board manufacturing method - Google Patents

Abstract

The additive thin circuit circuit board manufacturing method of the present invention includes the following steps: preparing a circuit base The board has a first metal layer on its first surface, and a resist layer is provided on the first metal layer, and then a dry etching process is performed to form a through-resist layer in the resist layer on the first metal layer. A patterned channel, so that the surface of the first metal layer is exposed in the patterned channel, and an electroplating process is performed to set a first circuit layer on the surface of the first metal layer in the patterned channel, and finally remove the resist After the first circuit layer is formed, a wet etching process is performed to remove the portion of the first metal layer that is not covered by the first circuit layer. The invention uses a resist layer and dry etching to replace the photoresist layer and the exposure and development process, thereby avoiding the problem of poor circuit pattern quality of thin circuits and ensuring the quality of fine circuit formation.

Description

Additive thin circuit board manufacturing method

A circuit board manufacturing method, especially an additive method for manufacturing thin circuit circuit boards.

In the existing additive circuit board circuit manufacturing method, the designed circuit pattern is mainly formed on the circuit substrate by photolithography combined with electroplating and etching processes. The steps of photolithography etching mainly include first setting a photoresist layer on the seed layer on the circuit substrate, setting a patterned mask above the photoresist layer, and then exposing and developing it to form a patterned photoresist layer. The circuit substrate is electroplated to form circuit structures in the channels of the patterned photoresist layer. Finally, after removing the patterned photoresist layer, etching is performed to remove excess seed layer to complete the circuit pattern on the circuit substrate.

In the step of exposing through the patterned mask to form a patterned photoresist layer, a channel that penetrates the patterned mask and corresponds to the required circuit pattern is preformed on the patterned mask. When placed on the photoresist layer for exposure, light can only pass through the channel to illuminate the photoresist layer, causing a chemical reaction in the photoresist layer that is exposed to the light. Finally, it is removed with a solution to produce a chemical reaction (or not The photoresist layer produces a chemical reaction) to produce a patterned photoresist layer corresponding to the desired circuit structure.

However, in response to the demand for miniaturization of circuit boards in recent years, the line diameter width and spacing width of circuit pattern designs are getting smaller and narrower, and the corresponding line diameter width and spacing width of circuit patterns on the patterned photoresist layer must also be narrower. Getting smaller and narrower. However, according to the material characteristics of the existing photoresist layer, there are resolution limitations in the exposure process, so there are limits to the line diameter and spacing width. When the line spacing or spacing is too small, there may be incomplete exposure and patterned photoresist. The structure of the circuit pattern in the layer is too thin and easy to collapse falling, resulting in the risk of incomplete circuit patterns in the patterned photoresist layer. As a result, the circuit structure cannot be formed correctly in the next step of the electroplating process.

In other words, the technology of the photoresist layer and the exposure and development process limits the development of circuit board circuit miniaturization and precision, so the existing circuit board manufacturing methods must be further improved.

In view of the fact that in the existing additive circuit board manufacturing technology, the photoresist layer is prone to structural instability or collapse during the fine circuit formation process, resulting in incomplete circuit patterns. The present invention provides an additive fine circuit circuit board manufacturing method, which includes the following Steps: prepare a circuit substrate with a first metal layer on a first surface of the circuit substrate; set a resist layer on the first metal layer; perform a dry etching process, and add a resist layer on the first metal layer. A patterned channel is formed in the resist layer, and the patterned channel penetrates the resist layer, so that the surface of the first metal layer is exposed in the patterned channel; an electroplating process is performed, and the patterned channel in the patterned channel is A first circuit layer is provided on the surface of the first metal layer; the resist layer is removed; and a wet etching process is performed to remove the portion of the first metal layer that is not covered by the first circuit layer.

In the present invention, after a resist layer is provided on the first metal layer, a dry etching process is used to form hollow patterned channels in the resist layer for forming circuits on the first metal layer during the electroplating process. The first line layer of the structure. Compared with using an exposure and development process to produce a patterned photoresist layer with circuit patterns, which must rely on exposure resolution, and there are many variables in the chemical reaction of the development process that may cause the structure of the patterned photoresist layer to be unstable. The present invention adopts a dry process. Etching (such as laser etching) has higher precision in specifying the etching path, and the resist layer material in the non-etching range of the resist layer is not easily affected It can maintain structural stability, thereby forming patterned channels in the resist layer that meet the line width and spacing of 20 μm or less required by fine line specifications, and solve the problem of fine line patterns in the patterned photoresist layer formed by the exposure and development process. It is easy to peel off, resulting in incomplete circuit patterns.

10: Circuit substrate

11: First surface

12: Second surface

100:Through hole

101:Inner wall

20: First metal layer

201: Part of the first metal layer surface

21:Metal foil layer

30: Resistor layer

300:Patterned Channel

40: First line layer

41: Resistor film

50: Second metal layer

51:Metal foil layer

501: Part of the second metal layer surface

60:Electroplating layer

70: Second line layer

71: Resistor film

80: Line conduction layer

1A to 1H are schematic cross-sectional views of the manufacturing process of the additive thin circuit board manufacturing method of the present invention.

2A to 2J are schematic cross-sectional views of the manufacturing process of the additive thin circuit circuit board manufacturing method of the present invention.

Referring to FIGS. 1A to 1F , the additive thin circuit circuit board manufacturing method of the present invention mainly includes the following steps.

As shown in FIG. 1A , a circuit substrate 10 is prepared. The circuit substrate 10 has a first metal layer 20 on a first surface 11 .

As shown in FIG. 1B , a resist layer 30 is provided on the first metal layer 20 . Preferably, the resist layer 30 is, for example, an ink layer, more preferably, an anti-electroplating ink layer.

As shown in FIG. 1C , a dry etching process is performed to form a patterned channel 300 in the resist layer 30 on the first metal layer 20 . The patterned channel 300 penetrates the resist layer 30 so that part of the The first metal layer surface 201 is exposed in the patterned channel 300 .

As shown in FIG. 1D , an electroplating process is performed, and a first circuit layer 40 is disposed on the first metal layer surface 201 of the portion in the patterned channel 300 .

As shown in FIG. 1E , a resist film 41 is provided on the first circuit layer 40 . The resist film 41 is, for example, a metal resist film 41 formed by electroplating or electroless plating. Preferably, the resist film 41, the first circuit layer 40 and the first metal layer 20 are made of different metal materials. For example, the first circuit layer 40 and the first metal layer 20 are made of copper metal, and the resist film 41 is made of metals such as tin, nickel... or their alloys, but the invention is not limited thereto. Since in the wet etching process, the circuit substrate 10 together with its The first metal layer 20 and the first circuit layer 40 are immersed in an etching solution. The etching solution erodes a specific type of metal, such as copper metal used as the first metal layer 20 and the first circuit layer 40 . Since the resist film 41 is made of different metal materials from the first circuit layer 40 and the first metal layer 20 and is not corroded by the etching solution, it can protect the surface of the first circuit layer 40 from being corroded and ensure the first circuit. The surface and corner shapes of layer 40 are complete.

As shown in FIG. 1F , the resist layer 30 is removed, leaving the first circuit layer 40 and the resist film 41 thereon.

As shown in FIG. 1G , a wet etching process is performed to remove the portion of the first metal layer 20 not covered by the first circuit layer 40 to complete the arrangement of the first circuit layer 40 .

Finally, as shown in FIG. 1H , the resist film 41 is removed.

Preferably, the dry etching process is a laser etching process with a specified depth controlled by a computer program. Through computer control, in addition to specifying the depth of laser etching, the pattern of the patterned channels 300 formed by laser etching, that is, the pattern of the circuit structure of the first circuit layer 40, can also be specified. In the present invention, preferably, the designated depth of the laser etching is the thickness of the resist layer 30, that is, ensuring that a portion of the first metal layer surface 201 is exposed for the next step of the electroplating process. Preferably, the laser etching process uses ultraviolet laser, green laser, nanosecond laser or femtosecond laser technology.

In a first embodiment of the present invention, the additive thin circuit board manufacturing method of the present invention can also be applied to the manufacturing process of double-sided circuit boards. Please refer to FIGS. 2A to 2C . In this embodiment, the circuit substrate 10 also has a second surface 12 opposite to the first surface 11 . The second surface 12 has a second metal layer 50 , and The aforementioned steps of preparing the circuit substrate 10 further include the following sub-steps.

As shown in FIG. 2A , the circuit substrate 10 is provided. A metal foil layer 21 is provided on the first surface 11 of the circuit substrate 10 , and another metal foil layer 51 is provided on the second surface 12 . these metals The foil layers 21 and 51 are, for example, copper foil layers pre-disposed on the first surface 11 and the second surface 12 of the circuit substrate 10, and the thickness is preferably 3~5 μm.

As shown in FIG. 2B , a drilling process is performed to form at least one through hole 100 penetrating the circuit substrate 10 and the two metal foil layers 21 and 51 .

As shown in FIG. 2C , a metal plating process is performed to form a metal foil layer 21 on the first surface 11 and a metal foil layer 51 on the second surface 12 of the circuit substrate 10 and an inner wall 101 of the at least one through hole 100 . An electroplating layer 60. In this embodiment, the combination of the metal foil layer 21 and the electroplating layer 60 on the first surface 11 can be regarded as the first metal layer 20 of the aforementioned first embodiment. The surface of the electroplating layer 60 on the first surface 11 is The surface of the first metal layer 20, and the combination of the metal foil layer 51 and the electroplating layer 60 on the second surface 12 can be regarded as the aforementioned second metal layer 50. The surface of the electroplating layer 60 on the second surface 12 is The surface of the second metal layer 50 . The thickness of the electroplating layer 60 is preferably 3~5 μm. Preferably, the metal foil layers 21 and 51 and the electroplating layer 60 are made of the same metal material, such as copper.

The steps shown in FIGS. 2A to 2C complete the arrangement of the through holes 100 in the circuit substrate 10 of the double-sided circuit board. Next, referring to FIGS. 2D to 2G , the first circuit layer 40 on the first surface 11 and the second circuit layer 70 on the second surface 12 of the circuit substrate 10 will be further completed.

As shown in FIG. 2D , when the resist layer 30 is provided, the resist layer 30 is simultaneously provided on the surface of the first metal layer 20 , the surface of the second metal layer 50 and the inner wall 101 of the at least one through hole 100 .

As shown in FIG. 2E , the dry etching process is performed to form the patterned channels 300 on the resist layer 30 on the surfaces of the first metal layer 20 and the second metal layer 50 . The patterned channels 300 penetrate the resist layer 30 on the first metal layer 20 and the second metal layer 50 respectively, and expose part of the surface 201 of the first metal layer 20 and part of the surface 501 of the second metal layer 50 to Pattern the channel 300 and remove the resist layer 30 in the at least one through hole 100 so that the surface of the electroplating layer 60 in the through hole 100 is exposed.

As shown in FIG. 2F , the electroplating process is performed, and the first circuit layer 40 is disposed in the patterned channels 300 of the resist layer 30 on part of the surface 201 of the first metal layer 20 , and the first circuit layer 40 is disposed on part of the second metal layer 50 The second circuit layer 70 is disposed in the patterned channels 300 of the resist layer 30 on the surface 501 , and a circuit conductive layer 80 is formed on the plating layer 60 in the at least one through hole 100 .

As shown in FIG. 2G , the resist film 41 is covered on the first circuit layer 40 , and another resist film 71 is provided on the second circuit layer 70 .

As shown in FIG. 2H , the remaining resist layer 30 is removed to expose the surfaces of the first metal layer 20 and the second metal layer 50 that are not covered by the first circuit layer 40 , the second circuit layer 70 or the circuit conduction layer 80 .

As shown in FIG. 2I , a wet etching process is performed to remove the portion of the first metal layer 20 that is not covered by the first circuit layer 40 and the portion of the second metal layer 50 that is not covered by the second circuit layer 70 . . After the wet etching process is completed, the first circuit layer 40 is electrically connected to the second circuit layer 70 through the electroplating layer 60 and the circuit conduction layer 80 of the inner wall 101 of the at least one through hole 100 , completing the first circuit layer 70 of the circuit substrate 10 . The first circuit layer 40 and the second circuit layer 70 on one surface 11 and the second surface 12 . The resist films 41 and 71, the first circuit layer 40, the first metal layer 20, the second circuit layer 70, and the second metal layer 50 are made of different metal materials and are not corroded by the etching solution, so they can protect the resist films 41 and 71 from being corroded by the etching solution. The surfaces of the first circuit layer 40 and the second circuit layer 70 are not corroded, ensuring the integrity of the surface and corner shapes of the first circuit layer 40 and the second circuit layer 70 .

Finally, as shown in FIG. 2J , the resist films 41 and 71 are removed.

Preferably, the circuit substrate 10 is, for example, a rigid circuit substrate, a flexible circuit substrate, or a soft-hard composite circuit substrate. In addition, the circuit substrate 10 may also be a multi-layer circuit board that includes a composite circuit structure, including a plurality of laminated dielectric layers, circuit layers, etc.

The above descriptions are only embodiments of the present invention, and do not limit the present invention in any form. Although the present invention has been disclosed in the embodiments above, they are not used to limit the present invention. Any skilled person familiar with the art will not Without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make some changes or modifications to equivalent embodiments with equivalent changes. Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present invention.

10: Circuit substrate

11: First surface

20: First metal layer

201: Part of the first metal layer surface

30: Resistor layer

300:Patterned Channel

Claims (10)

An additive method for manufacturing thin circuit circuit boards, including the following steps: Prepare a circuit substrate having a first metal layer on a first surface; disposing a resist layer on the first metal layer; A dry etching process is performed to form a patterned channel in the resist layer on the first metal layer. The patterned channel penetrates the resist layer so that the surface of the first metal layer is exposed to the patterned channel. in the Tao; Perform an electroplating process to provide a first circuit layer on the surface of the first metal layer in the patterned channel; remove the resist layer; and A wet etching process is performed to remove the portion of the first metal layer not covered by the first circuit layer. The additive thin circuit circuit board manufacturing method as claimed in claim 1, wherein the dry etching process is a laser etching process. The manufacturing method of the additive thin circuit circuit board according to claim 2, wherein the circuit substrate has a second metal layer on a second surface opposite to the first surface, and the step of "preparing the circuit substrate" , including the following sub-steps: The circuit substrate is provided, and the first surface and the second surface of the circuit substrate are respectively provided with a metal foil layer; Perform a drilling process to form at least one through hole penetrating the circuit substrate and the two metal foil layers; Perform a metal plating process to form an electroplating layer on the metal foil layer on the first surface and the metal foil layer on the second surface of the circuit substrate and on an inner wall of the at least one through hole; wherein, the metal on the first surface The combination of the foil layer and the electroplating layer is the first metal layer, and the combination of the metal foil layer and the electroplating layer on the second surface is the second metal layer. The additive thin circuit circuit board manufacturing method as described in claim 3, wherein, In the step of "providing the resist layer on the first metal layer", the resist layer is simultaneously provided on the surface of the second metal layer and the inner wall of the at least one through hole; In the step of "performing a dry etching process to form a patterned channel in the resist layer", it also includes forming another patterned channel in the resist layer on the second metal layer, and removing The resist layer in the at least one through hole; the other patterned channel penetrates the resist layer on the second metal layer, so that the surface of the second metal layer is exposed in the other patterned channel. The method for manufacturing a thin circuit board using an additive method as described in claim 4, wherein in the step of "carrying out an electroplating process to provide a first circuit layer on the surface of the first metal layer in the patterned channel", at the same time disposing a second circuit layer on the surface of the second metal layer in the patterned channel of the resist layer on the second metal layer, and forming a circuit conductive layer on the plating layer in the at least one through hole; In the step of "performing a wet etching process to remove the portion of the first metal layer that is not covered by the first circuit layer", the portion of the second metal that is not covered by the second circuit layer is also removed. layer, and after completion, the first circuit layer is electrically connected to the second circuit layer through the electroplating layer and the circuit conduction layer on the inner wall of the at least one through hole. The additive thin circuit circuit board manufacturing method as described in claim 5, wherein before the step of "removing the resist layer", it further includes: Cover the first circuit layer or the second circuit layer with a resist film; and after completion, perform a wet etching process to remove the portion of the first metal layer that is not covered by the first circuit layer, and After the step of "simultaneously removing the portion of the second metal layer that is not covered by the second circuit layer", it further includes: Remove the resist film. The manufacturing method of an additive thin circuit circuit board according to claim 6, wherein the resist film and the first circuit layer, the first metal layer, the second circuit layer or the second metal layer are made of different metals. Material. The method for manufacturing a thin circuit board using an additive method as described in claim 3, wherein the resist layer is an ink layer. The additive thin circuit circuit board manufacturing method as described in claim 1, wherein, The circuit substrate is a multi-layer circuit substrate including a composite circuit structure. The manufacturing method of an additive thin circuit circuit board according to claim 1, wherein the circuit substrate is a hard circuit substrate, a flexible circuit substrate or a soft-hard composite circuit substrate.

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