201043105 六、發明說明： 【發明所屬之技術領域】 一種印刷電路板之製作方法’尤其是一種適合製作精細 線路與增加線路截面積之高精密線路印刷電路板之製作方 法。 【先前技術】 Ο ❹ 印刷電路板(Printed Circuit Board ; PCB)是指利用 塑膠等不導電的物質所製成的板子，在上面利用印刷的技術 將電路印製上，再將積體電路、電阻等電子零件放上，尤其 在球狀陣列封裝(Ball Grid Array ; BGA)與晶片尺寸封裝 (Chip Scale Packaging ; CSP)的製程成為主流後，Ic 基^ 的體積更急遽縮小直追1C，因此線寬線距也日漸縮小，以在 更小的面積上置入更多的電子元件。 參閱第一〜五圖，習知技術之多層電路板之製作方法示咅 圖’首先提供-紐7G ’紐？G上下表面分麵合一銅皮 71，在已壓合銅皮71的基材70上形成鑽孔72，如第一圖 示，隨後利用穿孔電鍍技術，在鑽孔72孔壁與上下層鋼 71表面鑛上銅層73，如第二圖所示，接著在基材1〇丄; 面的銅層73上覆蓋乾膜74，如第三圖所示，接著利 法(Tentmg;Tend & Etch)製作線路，上述之乾膜 進行蝕刻時之抗軸關，如此可碰影侧对，去^ 被乾膜74覆蓋的銅層73及銅皮71，如第四圖所示^ =:後，因乾膜74覆蓋而她去的鋼層】 71即形成線路，如第五圖所示。 』反 習知技術之缺點在於，其雖翻於製作多層連續堆疊導 3 201043105 通之線路結構’但卻不利於製作細線路’因為製作細線路時， 蝕刻銅厚須愈薄愈好，若蝕刻銅厚過厚，即容易發生線路形 狀、阻抗、線寬間距等條件改變及細線寬間距已達極限等缺 失’然而習知之多層電路板製程，在壓合銅皮71上又電鍍銅 層73 ’而使製作線路時須蝕刻的銅厚變得非常厚，故不利於 用來製作具有細線路的多層電路板，若須製作細線路，則必 須採用化學銅或另外壓合超薄銅皮的方式，惟該等方式須付 出昂貴的物料及設備成本，不符合經濟效益。 【發明内容】 本發明之主要目的在於提供一種高精密線路印刷電路板 之製作方法，首先提供一基材，在該基材之上表面具有一上 麵/自層，以及在該基材之下表面具有一下銅箔層，且貫穿該 基材形成至少一個導通孔；於該上銅箔層上表面、該下銅箔 層下表面上與該至少一個導通孔之孔壁上鍍上—第一金屬 層，其中位於該上銅箔層上表面上之該第一金屬層定義為一 頂邊金屬層，位於該下銅箔層下表面上之該第一金屬層定義 為一底面金屬層，位於該導通孔之孔壁上之該第—金屬層定 義為-側面金屬層；分職該頂面金屬層與該絲金屬 各覆蓋一阻劑，且該阻劑須覆蓋住該至少一個導通孔；利用 微影蝕刻技術去除該至少—導通孔上下側之該_ ;於該至 少一個導通孔之孔壁上之該第一金屬層上鍍上—第二^屬 層；去除該阻劑：以及研磨去除該第二金屬層超出於該頂面 金屬層與該底面金屬層之部分，使該頂面金屬層之上表面與 該第二金屬層之上表面以及該底面金屬層之下表面與該第二 金屬層之下表面皆呈現一平整面。 4 201043105 因此本發明可解決習用技術之缺失，不僅方便控制蝕刻 速率與保持銅厚之均勻性，還可增加精密線路之截面積。 【實施方式】 以下配合圖式及元件符號對本發明之實施方式做更詳細 的說明，俾使熟習該項技藝者在研讀本說明書後能據以實施。 參閱第六〜十二圖，本發明之高精密線路印刷電路板 之製作方法示意圖。首先提供一基材1，在該基材1之上 〇 表面具有一上銅箔層Η，以及在該基材1之下表面具有 下銅珀層13，且貫穿該基材1形成至少一個導通孔 U ’如第六圖所示。 接著於該上銅箔層11上表面、該下銅箔層13下表面 與該至少一個導通孔15之孔壁上鍍上一第一金屬層3， 其中位於該上銅箔層11上表面上之該第一金屬層3定義 為—頂面金屬層31，位於該下銅箔層13下表面上之該第 金屬層3定義為一底面金屬層33，位於該導通孔15 〇 之孔壁上之該第一金屬層3定義為一侧面金屬層35，如 第七圖所示。 接著分別於該頂面金屬層31與該底面金屬層33上各 覆蓋一阻劑5，且該阻劑5須覆蓋住該導通孔15，如第 八圖所示。接著利用一微影蝕刻技術去除該至少一導通 孔15上下側之該阻劑5,以使該至少一導通孔15呈裸露 的狀癌、，而其餘部分仍受該阻劑5之阻絕，如第九圖所 示，其中該阻劑5係可使用一抗強酸材料，比如一乾膜 光阻、一濕膜光阻或其他適當的抗強酸材料。 5 201043105 金金屬層31、該底面金屬層33與該側面 6 2未伽劑5 €蓋之_上—第二金屬層 5，如^之厚度’如第十圖所示。接著去除該阻劑 〇邪乐卞一圖所示。 1後糟研磨对磨賴帛二麵層6其财於該頂 層31與該底面金屬層33之部分，因此該頂面金 之上表面與该第二金屬層31之上表面以及該底201043105 VI. Description of the Invention: [Technical Field of the Invention] A method of fabricating a printed circuit board is particularly a method for fabricating a high-precision line printed circuit board suitable for fabricating fine lines and increasing line cross-sectional area. [Prior Art] Print 印刷 Printed Circuit Board (PCB) is a board made of a non-conductive material such as plastic. The printed circuit is used to print the circuit, and then the integrated circuit and resistor are used. When the electronic components are put on the top, especially after the process of Ball Grid Array (BGA) and Chip Scale Packaging (CSP) become mainstream, the volume of Ic base is more urgent and shrinks directly to 1C, so the line The wide line spacing is also shrinking to accommodate more electronic components in a smaller area. Referring to Figures 1 to 5, the fabrication method of the multi-layer circuit board of the prior art is shown in the first place - New Zealand 7G New Zealand? G upper and lower surfaces are combined to form a copper skin 71, and a hole 72 is formed on the substrate 70 on which the copper skin 71 has been pressed, as shown in the first figure, and then the hole wall and the upper and lower layers are drilled in the hole 72 by the piercing plating technique. 71 surface mineral copper layer 73, as shown in the second figure, then covered on the substrate 1; the surface of the copper layer 73 covered with dry film 74, as shown in the third figure, followed by Lifa (Tentmg; Tend & Etch) makes the line, the above-mentioned dry film is etched to resist the axis, so that the side can be touched, and the copper layer 73 and the copper layer 71 covered by the dry film 74 are as shown in the fourth figure ^ =: , the steel layer that she went to because of the dry film 74] 71 formed the line, as shown in the fifth figure. The disadvantage of the anti-study technology is that it turns over the line structure of making multi-layer continuous stacking guides 201043105, but it is not conducive to making fine lines. Because when making fine lines, the thickness of the etched copper must be as thin as possible. The thickness of the copper is too thick, that is, the condition such as the line shape, the impedance, the line width spacing, and the like, and the thin line width spacing has reached the limit. However, the conventional multilayer circuit board process has a copper plating layer 73 on the pressed copper skin 71. The thickness of the copper to be etched during the fabrication of the circuit becomes very thick, which is not conducive to the fabrication of a multilayer circuit board having fine wiring. If a thin circuit is to be made, it is necessary to use chemical copper or another method of pressing the ultra-thin copper. However, such methods require expensive material and equipment costs and are not economically viable. SUMMARY OF THE INVENTION The main object of the present invention is to provide a high precision circuit printed circuit board manufacturing method, firstly providing a substrate having an upper/self layer on the surface of the substrate and under the substrate The surface has a copper foil layer on the surface, and at least one via hole is formed through the substrate; the upper surface of the upper copper foil layer, the lower surface of the lower copper foil layer and the hole wall of the at least one via hole are plated - first a metal layer, wherein the first metal layer on the upper surface of the upper copper foil layer is defined as a top edge metal layer, and the first metal layer on the lower surface of the lower copper foil layer is defined as a bottom metal layer The first metal layer on the hole wall of the via hole is defined as a side metal layer; the top metal layer and the wire metal are respectively covered with a resist, and the resist is required to cover the at least one via hole; Removing the at least one of the upper and lower sides of the via hole by a lithography etching technique; plating the second metal layer on the first metal layer on the hole wall of the at least one via hole; removing the resist: and grinding Removing the second metal layer beyond And the upper surface of the top metal layer and the upper surface of the second metal layer and the lower surface of the bottom metal layer and the lower surface of the second metal layer are respectively on the top metal layer and the bottom metal layer Present a flat surface. 4 201043105 Therefore, the present invention can solve the deficiencies of conventional techniques, and is not only convenient for controlling the etching rate and maintaining the uniformity of copper thickness, but also increasing the cross-sectional area of the precision circuit. [Embodiment] Hereinafter, the embodiments of the present invention will be described in more detail with reference to the drawings and the reference numerals, which can be implemented by those skilled in the art after studying this specification. Referring to Figures 6 to 12, a schematic diagram of a method of fabricating a high precision circuit printed circuit board of the present invention. First, a substrate 1 is provided. The upper surface of the substrate 1 has an upper copper foil layer, and a lower copper layer 13 is formed on the lower surface of the substrate 1, and at least one conduction is formed through the substrate 1. The hole U' is as shown in the sixth figure. Then, a first metal layer 3 is deposited on the upper surface of the upper copper foil layer 11, the lower surface of the lower copper foil layer 13, and the wall of the at least one via hole 15 on the upper surface of the upper copper foil layer 11. The first metal layer 3 is defined as a top metal layer 31, and the third metal layer 3 on the lower surface of the lower copper foil layer 13 is defined as a bottom metal layer 33 on the hole wall of the via hole 15 The first metal layer 3 is defined as a side metal layer 35 as shown in the seventh figure. Then, a resist 5 is respectively covered on the top metal layer 31 and the bottom metal layer 33, and the resist 5 is required to cover the via hole 15, as shown in FIG. Then, the resist 5 of the upper and lower sides of the at least one via hole 15 is removed by a lithography etching technique, so that the at least one via hole 15 is exposed to the cancer, and the remaining portion is still blocked by the resist 5, such as As shown in the ninth figure, the resist 5 can be made of a strong acid resistant material such as a dry film photoresist, a wet film photoresist or other suitable anti-strong acid material. 5 201043105 Gold metal layer 31, the bottom metal layer 33 and the side surface 6 2 are not granulated 5 _ _ upper - second metal layer 5, such as the thickness ’ as shown in the tenth figure. Then remove the resister. 1 after the bad grinding of the two layers of the ruthenium ruthenium 6 is part of the top layer 31 and the bottom metal layer 33, so the top surface of the top surface gold and the upper surface of the second metal layer 31 and the bottom
面二屬層33之下表面與該第二金屬層31之下表面皆呈 ^平整面，如第十二圖所示，以利後續製程使用。其 广第金屬層與該第二金屬層係為一薄銅層或其他適 當金屬材質。 本發明於二次鍍銅時僅對導通孔進行鑛銅，再藉由減 銅方式去除鍍孔峽摘超略_之部分，此種方式 不^再增加面銅厚度’因此方便控制钕刻速率以及保持 2厚之均勻性’並且減銅後裸露出極薄電鍍銅或電解銅 4,還可增加精密線路之截面積，如此可應用於製作具 有向密度内連線(High Density Interconnection，HDI) 之印刷電路板，或魏雜轉列或其他冑紐度線路。 以上所述者僅為用以解釋本發明之較佳實施例，並非企 圖據以對本發明做任何形式上之限制，是以，凡有在相同之 發明精神下所作有關本發明之任何修飾或變更，皆仍應包括 在本發明意圖保護之範疇。 6 201043105 【圖式簡單說明】 =一圖為習知技術之多層電路板之 第二圖為習知髓之多層電魏之 == 第三圖為習知技術之多層電路板之製作方 第四圖為f知驗之多層電路板 干'ς、 第五圖為習知技術之多層電路板之製作 =圖為本發明之高精密線路印刷電路板之;;二 Ο =圖為本發明之高精密線路印刷電路板之製作方法示 =圖為本發明之喊躲路_電路板之製作方法示 圖為本發明之細密絲印職路板之製作方法示 =十圖為本發明之細密印綱路板 意圖。 忠不 % __ Ο _立一圖為本發明之高精密線路印刷電路板之製作方法 示意圖。 第:二圖為本發明之高精密線路印刷電路板之製作方法 不意圖。 201043105 【主要元件符號說明】 1基材 11上銅箔層 13下銅箔層 15導通孔 3第一金屬層 31頂面金屬層 33底面金屬層 35侧面金屬層 5阻劑 6第二金屬層 70基材 71銅皮 72鑽孔 73銅層 74乾膜The lower surface of the surface layer 23 and the lower surface of the second metal layer 31 are both flat surfaces, as shown in Fig. 12, for subsequent processing. The wide metal layer and the second metal layer are made of a thin copper layer or other suitable metal material. The invention only performs copper ore on the via hole in the secondary copper plating, and then removes the portion of the plated hole to be extracted by the copper reduction method, which does not increase the thickness of the surface copper, thereby facilitating the control of the engraving rate. And to maintain the uniformity of 2 thickness' and expose the extremely thin electroplated copper or electrolytic copper 4 after copper reduction, and can also increase the cross-sectional area of the precision circuit, so that it can be applied to the production of High Density Interconnection (HDI). Printed circuit boards, or Wei miscellaneous or other twisted lines. The above is only a preferred embodiment for explaining the present invention, and is not intended to limit the present invention in any way, and any modifications or alterations to the present invention made in the spirit of the same invention. All should still be included in the scope of the intention of the present invention. 6 201043105 [Simple description of the diagram] = The second picture of the multi-layer circuit board of the prior art is the multi-layered electric circuit of the conventional core == The third picture is the fourth generation of the multi-layer circuit board of the prior art. The picture shows the multi-layer circuit board of the test, and the fifth picture shows the fabrication of the multi-layer circuit board of the prior art = the high-precision circuit printed circuit board of the present invention; The manufacturing method of the precision circuit printed circuit board shows that the figure is the shouting method of the invention _ the manufacturing method of the circuit board is the manufacturing method of the fine silk screen printing board of the present invention=10 is the fine printing road of the invention Board intention.忠不 % __ Ο _ 立一图 is a schematic diagram of the manufacturing method of the high precision circuit printed circuit board of the present invention. The second figure is the manufacturing method of the high precision circuit printed circuit board of the present invention. 201043105 [Description of main component symbols] 1 substrate 11 upper copper foil layer 13 copper foil layer 15 via hole 3 first metal layer 31 top metal layer 33 bottom metal layer 35 side metal layer 5 resist 6 second metal layer 70 Substrate 71 copper skin 72 drilled 73 copper layer 74 dry film