TWI794438B - Wafer Position Measuring Device - Google Patents

Abstract

The object of the present invention is to provide a device that can measure the position of a wafer component with high precision even without using a high-precision positioning mechanism when there is no reference mark for positioning reference in the field of view of the split shooting. The wafer position measurement device of the present invention includes a substrate holding unit, an imaging unit divided into a plurality of divided imaging areas for imaging, a wafer position calculation unit for calculating the positions of wafer components, a relative movement unit, and a control unit; and At least 2 or more chip parts are included in the divided imaging area, and at least one of the chip parts is set as a repeated imaging chip part contained in two adjacent divided imaging areas; Wafer Position Calculation Department Based on the positional relationship with other chip parts included in the first divided imaging area, calculate the position of each chip part for repeated imaging; The positions of each of the chip parts other than the repeated imaging chip part contained in the divided imaging area to be photographed later are calculated based on the positional relationship with the repeated imaging chip part.

Description

Wafer Position Measuring Device

The present invention relates to a wafer position measuring device for measuring the position of each of a plurality of chip parts separately arranged on a substrate such as a wafer.

In the manufacturing steps of semiconductor devices or electronic devices, etc., there are steps of disposing (such as patterning or mounting) chip parts on semiconductor wafers or substrates such as glass or resin, or picking up diced chip parts from expanded wafers . In addition, there are steps to check whether these chip parts are arranged with a specific precision, or to measure the position at which position they are held, and to mount and laminate these chip parts with other parts or wiring (for example, refer to the patent Literature 1~3).

[Prior Art Literature] [Patent Document]

[Patent Document 1] Japanese Patent Laid-Open No. 10-189672

[Patent Document 2] Japanese Patent Laid-Open No. 2006-135237

[Patent Document 3] Japanese Patent No. 4768731

If there is a reference mark for positioning reference in the field of view of the split shooting, the position of each chip component can be determined by measuring the relative position (XY coordinates, etc.) with the reference mark. Therefore, the positioning accuracy sought by the stage mechanism is not excessively required.

However, when there is no reference mark for the positioning reference within the field of view of the segmented image, it is necessary to measure the position of each chip part based on the static position information of the place within the imaged segmented view and the position information of the chip parts within the segmented view. Therefore, to obtain imaging position accuracy higher than the position accuracy of wafer measurement, it is necessary to use a high-precision stage using a laser length measuring instrument or the like.

Therefore, the present invention was made in view of the above-mentioned problems, and its object is to provide a device that can be used even if a high-precision positioning mechanism is not used when there is no reference mark for a positioning reference in the field of view of the split shooting. The position of chip parts can be measured with high precision.

In order to solve the above problems, an aspect of the present invention is characterized in that it is a wafer position measuring device for measuring the positions of each of a plurality of wafer parts separately arranged on a substrate, and is equipped with: a substrate holding part that holds the substrate; A section that divides a specific area set on the substrate into a plurality of divided imaging areas for shooting; a wafer position calculation section that calculates the positions of each of the wafer components contained in the divided imaging areas based on the image captured by the imaging section ; a relative moving part, which moves the substrate holding part and the imaging part relatively; and a control part, which drives and controls the relative moving part, and outputs an imaging trigger to the imaging part while changing the position of the divided imaging area set on the substrate; and At least two or more wafer parts are included in the divided imaging area, and at least one of the wafer parts is set as a repeated imaging wafer part contained in two adjacent divided imaging areas; the wafer position calculation unit is based on The positional relationship with other chip parts contained in the first divided imaging area is calculated to calculate the positions of each of the repeated imaging chip parts, and the positions of each other chip parts except the repeated imaging chip parts included in the divided imaging area to be captured later , calculated according to the positional relationship with the repeated imaging chip part.

According to the above invention, the position of the wafer part can be measured with higher accuracy than the positioning accuracy of the positioning mechanism.

1: Wafer position measuring device

1f: Device frame

2: Substrate holding part

3: Camera Department

4: Relatively mobile part

5: Wafer position calculation part

6: Scale Correction Department

20: Substrate mounting table

30: lens barrel

31: Lighting department

32: half mirror

33a: Objective lens

33b: Objective lens

34: Objective lens rotator mechanism

35: video camera

41: X-axis slider

42: Y-axis slider

43:Rotary mechanism

C: Chip parts (the number in brackets is the arrangement position)

CN:Control Department

dx1~dx10: offset

dx20~dx24: offset

dxk:interval

dxm:interval

dy1~dy6: offset

dy10: offset

dy20~dy24: offset

dy40: offset

F: Divide the imaging area (the numbers in brackets are the sequence of imaging)

FMa: fiducial mark

FMk: Fiducial Mark

FMq: fiducial marker

FMz: Fiducial Mark

L1: lighting light

L2: Light incident from the substrate side (reflected light, scattered light)

M: repeat camera area

M(1)~M(4): repeat camera area

MW: main substrate

Rxm:Interval

Ryq:Interval

Vs: Arrow

W: Substrate

x: direction

X11, Y11~X71, Y71: position

X12, Y12~X52, Y52: position

X111, Y111: position

y: direction

z: direction

θ: direction

δxa: offset

δxk: offset

Fig. 1 is a schematic diagram showing an overall configuration of an example of an embodiment of the present invention.

Fig. 2 is a conceptual diagram showing an imaging situation of an example of an embodiment of the present invention.

Fig. 3 is a plan view showing the positional relationship of each of the wafer components in an example of an embodiment of the present invention.

Fig. 4 is a plan view showing the positional relationship of each of the wafer components as an example of another embodiment of the present invention.

FIG. 5 is a plan view showing the positional relationship between the main substrate and the divided imaging regions as an example of another embodiment of the present invention.

Fig. 6 is a plan view showing the positional relationship between the divided imaging area and each of the wafer components as an example of another embodiment of the present invention.

Hereinafter, the form for implementing this invention is demonstrated using drawing. In addition, in the following description, the three axes of the orthogonal coordinate system are set as X, Y, and Z, the horizontal direction is expressed as the X direction and the Y direction, and the direction perpendicular to the XY plane (that is, the direction of gravity) is expressed as Z direction. In addition, the Z direction expresses the direction opposite to the gravity upward, and expresses the direction in which the gravity acts downward. Moreover, let the direction which rotates around a Z direction as a central axis be a θ direction.

Fig. 1 is a schematic diagram showing an overall configuration of an example of an embodiment of the present invention. Each part constituting the wafer position measuring device 1 of the present invention is schematically shown in FIG. 1 .

The wafer position measuring device 1 measures the position of each of a plurality of wafer components C separately arranged on the substrate W. Specifically, the wafer position measurement device 1 includes a substrate holding unit 2 , an imaging unit 3 , a relative movement unit 4 , a wafer position calculation unit 5 , a control unit CN, and the like.

The substrate holding unit 2 holds the substrate W. As shown in FIG.

Specifically, the substrate holding unit 2 supports the substrate W while maintaining a horizontal state from the lower surface side. More specifically, the substrate holding unit 2 includes a substrate mounting table 20 whose upper surface is horizontal.

The substrate mounting table 20 is provided with a groove or a hole at a portion in contact with the substrate W. These grooves or holes The hole is connected to a negative pressure generating mechanism such as a vacuum pump through a switching valve or the like. Furthermore, the substrate holding unit 2 can hold or release the substrate W by switching these grooves or holes to a negative pressure state or an air release state.

The imaging unit 3 divides a specific area set on the substrate W into a plurality of divided imaging areas to take an image. The specific area set on the substrate W mentioned here includes the area (in other words, a large area) of all the wafer components arranged on the substrate W and used as the object of position measurement. Then, the imaging unit 3 divides the specific area into a plurality of divided imaging areas (in other words, small areas. Also referred to as local areas) to capture images.

Specifically, the arrangement (number, pitch, etc.) of wafer components or the required measurement accuracy differs for each type, and the size or position of the divided imaging area is associated with each type and registered in the control unit CN or the like.

More specifically, the imaging unit 3 includes a lens barrel 30 , an illumination unit 31 , a half mirror 32 , objective lenses 33 a and 33 b , an objective lens rotator mechanism 34 , an imaging camera 35 , and the like.

The lens barrel 30 fixes the illuminating part 31, the half mirror 32, the objective lenses 33a, 33b, the objective lens rotator mechanism 34, the imaging camera 35, etc. in a specific posture, and guides the illumination light or observation light. The lens barrel 30 is attached to the device frame 1f via a coupling fitting or the like (not shown).

The illuminating unit 31 emits the illuminating light L1 required for photographing. Specifically, the illuminating part 31 can illustrate a laser diode, a metal halide lamp, a xenon lamp, LED (Light Emitting Diode: Light Emitting Diode) illumination, etc.

The half mirror 32 reflects the illumination light L1 emitted from the illumination unit 31 and irradiates the substrate W side, and passes the light (reflected light, scattered light) L2 incident from the substrate W side to the imaging camera 35 side.

The objective lenses 33a and 33b form images of the imaging area on the workpiece W on the imaging camera 35 at different specific observation magnifications.

The objective lens rotator mechanism 34 switches which of the objective lenses 33a and 33b is used. Specifically, the objective lens rotator mechanism 34 is based on manual or external signal control, and is rotated and stationary at a specific angle.

The imaging camera 35 captures an image of the imaging area F on the workpiece W and obtains an image. The acquired image is output as an image signal or image data to the outside (in the present invention, it is a wafer position calculation unit described in detail later).

The relative movement unit 4 is for relatively moving the substrate holding unit 2 and the imaging unit 3 .

Specifically, the relative movement unit 4 is configured to include an X-axis slider 41 , a Y-axis slider 42 , and a rotation mechanism 43 .

The X-axis slider 41 is installed on the device frame 1f, so that the Y-axis slider 42 moves at an arbitrary speed in the X direction and remains stationary at an arbitrary position. Specifically, the X-axis slider is composed of a pair of guide rails extending in the X direction, a slider portion that moves on the guide rails, and a slider driving portion that moves and stops the slider portion. The slider driving unit may be composed of a combination of a servo motor or a pulse motor and a ball screw mechanism, a linear motor mechanism, or a linear motor mechanism that rotates and remains stationary under the control of a signal from the control unit CN. In addition, the X-axis slider 41 is equipped with an encoder for detecting the current position or the movement amount of the slider part. In addition, examples of the encoder include one that engraves fine unevenness on a linear member called a linear scale at a specific pitch, or a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.

The Y-axis slide block 42 is based on the control signal output from the control part CN, so that the rotation mechanism 43 is positioned at the Y axis. One that moves at any speed in any direction and remains stationary at any position. Specifically, the Y-axis slider is composed of a pair of guide rails extending in the Y direction, a slider portion that moves on the guide rails, and a slider driving portion that moves and stops the slider portion. The slider driving unit may be composed of a combination of a servo motor or a pulse motor and a ball screw mechanism, a linear motor mechanism, or a linear motor mechanism that rotates and remains stationary under the control of a signal from the control unit CN. In addition, the Y-axis slider 42 is equipped with an encoder for detecting the current position or the movement amount of the slider part. In addition, examples of the encoder include one that engraves fine unevenness on a linear member called a linear scale at a specific pitch, or a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, and the like.

The rotation mechanism 43 rotates the substrate stage 20 at an arbitrary speed in the θ direction, and is stationary at an arbitrary angle. Specifically, the rotation mechanism 43 can be exemplified by a direct drive motor or the like that is controlled by a signal from an external device to rotate/stationary at an arbitrary angle. On the rotation side member of the rotation mechanism 43, the substrate mounting table 20 of the substrate holding part 2 is attached.

Since the relative moving part 4 adopts such a configuration, it is possible to relatively move the substrate W relative to the imaging part 3 at a specific speed or angle in the XYθ direction, independently or in combination, while holding the substrate W to be inspected, or by Static at any position and angle.

The control unit CN can take on, for example, the following functions or roles.

‧Holding/releasing the control board W on the board holding part 2

‧Control the objective lens rotator mechanism 34 to switch the objective lens

‧Output camera trigger to video camera 35

‧Drive control of the relative moving part 4: while monitoring the X-axis slider 41, the Y-axis slider 22, the rotation The current position of the rotating mechanism 23, while outputting the function of the driving signal

‧Registration of camera position

‧Switching of substrate types

That is, the control unit CN can drive and control the relative movement unit 4 , and output an imaging trigger to the imaging unit 3 while changing the position of the divided imaging area set on the substrate W. Furthermore, it is possible to switch the imaging magnification or field of view size according to the type of inspection, and output imaging triggers while changing the interval between imaging, so that desired split imaging images can be obtained.

In addition, the output of the camera trigger can be exemplified as follows.

‧The method of scanning and moving in the X direction, and making the illumination light L1 emit light for a very short time (so-called strobe light) every time a certain distance is moved.

‧Alternatively, it is a method of moving and standing still at a specific position, irradiating illumination light L1 and shooting (so-called step & repeat).

In addition, the term "imaging trigger" means an instruction to capture an image to the imaging camera 35 or an image processing device (not shown), an instruction to emit light of the illumination light L1, and the like. Specifically, as an imaging trigger, (Example 1) stroboscopically emits the illumination light L1 during the time that the imaging camera 35 can take pictures (so-called exposure time), or (Example 2) performs during the time when the illumination light L1 is irradiated. shoot. Alternatively, the imaging trigger is not limited to an instruction to the imaging camera 35, but may also be (Example 3) an image capture instruction to an image processing device that acquires an image. Thereby, it is also possible to correspond to the form in which image signals or image data are sequentially output from the imaging camera 35 .

More specifically, the control part CN is comprised with a computer or a programmable logic controller etc. (ie, hardware), and its execution program etc. (ie, software). Furthermore, the control unit CN includes the wafer position calculation unit 5, the scale correction unit 6, etc. of the present invention as part of functional blocks constituted by hardware and software.

Fig. 2 is a conceptual diagram showing an imaging situation of an example of an embodiment of the present invention.

FIG. 2 shows that the imaging camera 45 of the imaging unit 3 moves relative to the substrate W in the direction indicated by the arrow Vs, and takes pictures of a plurality of chip parts C(1,1)~C(9,2) separately arranged on the substrate W. Condition.

Specifically, shooting is performed in the order of the divided imaging areas F(1), F(2), F(3), and F(4), and in the divided imaging area F(1), the wafer component C(1, 1) is captured. ~C(3,2), in the divided imaging area F(2), photograph the wafer parts C(3,1)~C(5,2), in the divided imaging area F(3), photograph the wafer parts C(5, 1)~C(7, 2), in the divided imaging area F(4), the wafer parts C(7, 1)~C(9, 2) are photographed.

In addition, the divided imaging area F(1) and the divided imaging area F(2) are set not only to be adjacent to each other, but also to have a part of the area overlapped with both. This adjacent and repeatedly captured area is referred to as a repeated imaging area M(1). Similarly, the overlapping imaging area of the divided imaging area F(2) and the divided imaging area F(3) is referred to as M(2), and the overlapping imaging area of the divided imaging area F(3) and the divided imaging area F(4) Called M(3).

And, at least two or more wafer parts are included in the divided imaging area, and at least one of the wafer parts is used as repeated imaging included in two adjacent divided imaging areas Wafer part setup.

Specifically, to include wafer components C(3,1) and C(3,2) in the repeated imaging region M(1), and to include wafer components C(5,1) and C(3,2) in the repeated imaging region M(2). C(5, 2), including chip components C(7, 1) and C(7, 2) in the repeated imaging area M (3), setting the imaging of the divided imaging area F (1) ~ F (4) Location.

The wafer position calculation unit 5 calculates the position of each of the wafer components included in the divided imaging area based on the image captured by the imaging unit 3 . Furthermore, the wafer position calculation unit 5 calculates the positions of each of the wafer parts to be repeatedly imaged based on the positional relationship with other wafer parts contained in the above-mentioned divided imaging area captured earlier, and then calculates the position of each of the wafer parts included in the above-mentioned divided imaging area captured later. The positions of other chip components other than the repetitive imaging chip component are calculated based on the positional relationship with the repetitive imaging chip component.

Fig. 3 is a plan view showing the positional relationship of each of the wafer components in an example of an embodiment of the present invention. FIG. 3 exemplifies the positional relationship between the divided imaging regions F(1), F(2) and each chip component C(1, 1)-C(5, 2).

Specifically, the wafer position calculation unit 5 calculates the mutual positions of the wafer components C(1, 1) to C(3, 2) included in the captured divided imaging area F(1). For example, based on the position of the lower left corner of each chip component, the following is calculated.

‧The offset dx1 of the chip part C(2, 1) relative to the chip part C(1, 1) in the X direction and the offset dy1 in the Y direction

‧The offset dx2 of the chip part C (3, 1) relative to the chip part C (2, 1) in the X direction and the offset dy2 of the Y direction

‧The offset dx20 of the chip part C (1, 2) relative to the chip part C (1, 1) in the X direction and the offset dy20 of the Y direction

‧The offset dx21 of the chip part C (2, 2) relative to the chip part C (1, 2) in the X direction and the offset dy21 of the Y direction

‧The offset dx22 of the chip part C (3, 2) relative to the chip part C (2, 2) in the X direction and the offset dy22 of the Y direction

More specifically, assuming that the position of the wafer component C (1, 1) is (X11, Y11), the wafer position calculation unit 5 calculates the positions of each of the wafer components based on the following calculation formula.

‧Position (X21, Y21)=(X11+dx1, Y11+dy1) of chip part C(2, 1)

‧Position (X31, Y31)=(X11+dx1+dx2, Y11+dy1+dy2) of chip part C(3, 1)

‧Position (X12, Y12)=(X11+dx20, Y11+dy20) of chip part C(1, 2)

‧Position (X22, Y22)=(X11+dx20+dx21, Y11+dy20+dy21) of chip part C(2, 2)

‧Position (X32, Y32) of chip part C(3, 2)=(X11+dx20+dx21+dx22, Y11+dy20+dy21+dy22)

Next, the mutual positions of the chip components C(3, 1) to C(5, 2) included in the captured divided imaging area F(2) are calculated. In the same manner as above, the following calculations were performed based on the position of the lower left corner of each of the chip components.

‧The offset dx3 of the chip part C (4, 1) relative to the chip part C (3, 1) in the X direction and the offset dy3 in the Y direction

‧The offset dx4 of the chip part C (5, 1) relative to the chip part C (4, 1) in the X direction and the offset dy4 in the Y direction

‧The offset dx23 of the chip part C (4, 2) relative to the chip part C (3, 2) in the X direction and the offset dy23 in the Y direction

‧The offset dx24 of the chip part C (5, 2) relative to the chip part C (4, 2) in the X direction and the offset dy24 in the Y direction

More specifically, the wafer position calculation unit 5 calculates each position based on the following calculation formula.

‧Since the position of chip part C(3,1) or chip part C(3,2) is as above, the position of chip part C(4,1) is (X11+dx1+dx2+dx3, Y11+dy1+dy2 +dy3)

‧The position of chip part C(5, 1) is (X11+dx1+dx2+dx3+dx4, Y11+dy1+dy2+dy3+dy4)

‧The position of chip part C (4, 2) is (X11+dx20+dx21+dx22+dx23, Y11+dy20+dy21+dy22+dy23)

‧The position of chip part C (5, 2) is (X11+dx20+dx21+dx22+dx23+dx24, Y11+dy20+dy21+dy22+dy23+dy24)

The positions of other wafer components C(6, 1) etc. are calculated in the same manner as above.

Due to the adoption of such a configuration, the wafer position measuring device 1 of the invention can calculate the positions of other wafer components based on the position of one wafer component included in the initial imaging area.

[Other forms]

In addition, in the above, in order to calculate the position of each of the wafer components, the steps of measuring the distance between adjacent wafer components in the X direction or the offset in the Y direction and calculating them cumulatively are shown.

In this case, the position of each of the wafer parts located in the last divided imaging area is the sum of the distances or offsets between the previous wafer parts. Therefore, an error below the measurement resolution is accumulated in each pitch or offset, and an error is accumulated in the calculated position of the wafer part located away from the wafer part serving as the primary reference. Therefore, there is a concern that all wafer components cannot be measured with the desired accuracy. In order to eliminate this concern (that is, to prevent the generation of accumulated errors), it is preferable to calculate the position by the steps shown in either one or both of the following (1) and (2).

(1) Calculate the positions of each of the wafer components in one divided imaging area based on the distance or offset from the wafer components serving as one reference.

Fig. 4 is a plan view showing the positional relationship of each of the wafer components as an example of another embodiment of the present invention. FIG. 4 exemplifies the positional relationship between the divided imaging regions F(1), F(2) and each of the chip components C(1, 1) to C(5, 2).

Specifically, the wafer position calculation unit 5 can calculate the wafer components C(1, 1), C(2, 1), C(5, 1), C( 6, 1) The mutual position of etc.

‧The position (X21, Y21) of the chip part C (2, 1) is based on the offset dx1 of the chip part C (2, 1) relative to the chip part C (1, 1) in the X direction and the offset in the Y direction dy1, for (X21, Y21)=(X11+dx1, Y11+dy1)

‧The position (X51, Y51) of the chip part C (5, 1) is based on the offset dx4 of the chip part C (5, 1) relative to the chip part C (1, 1) in the X direction and the offset in the Y direction dy4, for (X51, Y51)=(X11+dx4, Y11+dy4)

‧The position (X61, Y61) of the chip part C (6, 1) is based on the offset dx5 of the chip part C (6, 1) relative to the chip part C (1, 1) in the X direction and the offset in the Y direction dy5, for (X51, Y51)=(X11+dx5, Y11+dy5)

Furthermore, the wafer position calculation unit 5 can calculate the mutual positions of the wafer components C(6,1), C(7,1), C(11,1) included in the captured divided imaging area F(2) as follows .

‧The position (X71, Y71) of the chip part C (7, 1) is based on the offset dx6 of the chip part C (7, 1) relative to the chip part C (6, 1) in the X direction and the offset in the Y direction dy6, for (X71, Y71)=(X61+dx6, Y61+dy6)

‧The position (X111, Y111) of the chip part C (11, 1) is based on the offset dx10 of the chip part C (11, 1) relative to the chip part C (6, 1) in the X direction and the offset in the Y direction dy10, as (X111, Y111)=(X61+dx10, Y61+dy10)

In addition, the steps of calculating the position focusing on the chip parts C(1,1)~C(6,1) are described here, but the same can be done for other chips C(2,1)~C(11,3). (That is, based on the wafer components C(1, 1) and C(6, 1)), the positions of each are calculated.

(2) Calculate the measurement position of the divided imaging area using the main board, and perform scale correction on the position of each chip component.

Specifically, in addition to the configuration of the wafer position measuring device 1 described above, a configuration is provided that also includes a dimension correction unit. Furthermore, the main substrate whose mutual positions of the plurality of fiducial marks are known is held in the above-mentioned substrate holding part, and based on the mutual positions of the above-mentioned fiducial marks arranged on the main board, each of the above-mentioned wafer components calculated by the above-mentioned wafer position calculation part is performed. Correction of position.

FIG. 5 is a plan view showing the positional relationship between the main substrate and the divided imaging regions as an example of another embodiment of the present invention. FIG. 5 exemplifies a plan view of the main substrate MW whose mutual positions of the plurality of fiducial marks FMa, FMk, FMq, and FMz are known.

When the main substrate MW is held on the substrate holding unit 2 of the wafer position measuring device 1 and relatively moved, the arrangement of the fiducial marks FMa and FMk is observed as in the field of view of the divided imaging regions F(a) and F(k). . Furthermore, the fiducial marks FMa and FMk are respectively circular, and the centers of these circles are arranged at intervals Rxm in the X direction. In addition, the distance dxm is known by a high-precision length measuring device (for example, a combination of a moving mechanism using a laser interferometer and a mark position detection device, etc.), and the correct position (also called relative distance, relative coordinates) is known. . Specifically, this interval Rxm is set to 100.00 mm, and will be described below.

First, the wafer position calculation unit 5 calculates the wafer component C(a, 1) observed in the divided imaging area F(a) and C(k, 1) observed in the divided imaging area F(k) by the above-mentioned steps. For the mutual positions, for example, the distance dxk in the X direction is set to 100.10 mm.

And, the displacement amount of the chip part C(a, 1) relative to the X direction of the fiducial mark FMa is δxa, and the displacement amount of the wafer part C(k, 1) relative to the X direction of the fiducial mark FMk is denoted as For δxk, the wafer position calculation unit 5 calculates the amount of displacement of each of them, for example, δxa is set to 0.01 mm, and δxk is set to 0.01 mm. Then, the interval dxm between the reference marks FMa and FMk is calculated to be 100.12 mm in the wafer position calculation unit 5 . However, since it should be calculated as 100.00mm originally, the ratio Rxm/dxm (=100.00/100.12=0.9988) of the equivalent value is registered in advance as a scale correction coefficient, and the X-direction ratio of each chip part is calculated by adding this coefficient. Location. That is, in the case of the above example, if the dxk before correction is calculated as 100.10mm, the scale correction coefficient is added, and the corrected dxk value is output as 100.10×0.9988=99.98mm.

In addition, the above exemplifies the scale correction for the chip component C(k, 1), but the scale correction coefficient calculated in this way can also be adapted to the situation of calculating the position of other chip components. In addition, the procedure for performing scale correction in the X direction has been described above, but the scale correction coefficient can be calculated in the same way for the Y direction (in the case of the Y direction, the interval Ryq between the reference marks FMa and FMq is used as a reference), and the scale correction factor is considered. The correction coefficient is used to calculate the position of each chip component in the Y direction.

With such a configuration, it is possible to reduce or eliminate cumulative errors in the measurement positions of distant wafer components.

[Other forms]

In addition, in the above description, the X-axis slider 41 and the Y-axis slider 42 of the relative movement unit 4 are assembled with the desired precision in terms of orthogonality. However, for the convenience of assembling the machine, when the orthogonality between the X-axis slider 41 and the Y-axis slider 42 is slightly offset, or when the improvement of the offset cannot be expected, or when higher-precision measurement is required, it is better With the following steps or configurations, the positions of each chip component are corrected and calculated.

Specifically, the degree of orthogonality is corrected using the main substrate MW. On the main substrate MW, as shown in FIG. 5 , the center positions of each of the reference marks FMa, FMk, FMq, and FMz are arranged at the vertices of a rectangle or a square of vertical Ryq×lateral Rxm. Therefore, the X-axis slider 41 or the Y-axis slider 42 of the relative movement unit 4 is moved, and the imaging unit 3 captures images of the reference marks FMa, FMk, FMq, and FMz to obtain the center positions of each. Then, the interval in the X direction and the offset in the Y direction when the X-axis slider 41 of the relative moving part 4 is moved to image the reference marks FMa, FMk, and the Y-axis slider 42 is moved to image the reference marks FMa, FMk. The distance between the Y direction and the offset in the X direction during FMq is used to calculate how much the orthogonality between the X-axis slider 41 and the Y-axis slider 42 deviates. Then, the wafer position calculation unit 5 corrects and calculates the positions of each of the wafer components so as to eliminate the amount of offset due to the degree of orthogonality.

With such a configuration, the position of each of the wafer parts calculated by the wafer position calculation unit 5 can reduce or prevent the offset due to the orthogonality between the X-axis slider 41 and the Y-axis slider 42 of the relative movement unit 4. The resulting position measurement error.

[Other forms]

In addition, as mentioned above, under the premise that the straightness (also called line straightness, straightness) of the X-axis slider 41 and the Y-axis slider 42 of the relative moving part 4 has no influence on the position measurement of each of the wafer components, described in detail. However, in terms of machine configuration, the direction perpendicular to the moving direction may meander slightly, and the divided imaging area may be inclined in the θ direction. Then, the X-direction and Y-direction of the divided imaging area include errors due to deviation in the θ direction, which may affect the position measurement of each of the wafer components.

In order to alleviate or eliminate such concerns (that is, the influence of the offset in the θ direction of the obtained image), when applying the present invention, it is preferable that the above-mentioned chip components include at least two or more rows in the divided imaging area, and the chip At least one row of wafer parts among the parts is set in advance as overlapping imaging wafer parts included in both of the adjacent divided imaging areas. And, in the wafer position calculation unit 5, when calculating the position of each of the other wafer parts except the repeated imaging wafer parts included in the above-mentioned divided imaging area captured after the calculation, the positional relationship (that is, the X direction) of the plurality of repeated imaging wafer parts is calculated. and the position in the Y direction), calculate the offset component in the θ direction, correct the offset component, and calculate the position of each of the chip components.

According to this form, even if the images of the divided imaging regions obtained while relatively moving are slightly inclined in the θ direction, the influence of the inclination can be eliminated, and the position of each chip part can be calculated with desired accuracy.

[Other forms]

In addition, in the above, an example where a total of 6 wafer parts of 2 in length and 3 in width are arranged in one divided imaging area is shown (Fig. 2 and 3), or a total of 3 in length and 6 in width are arranged in one divided imaging area An example of 18 chip parts (FIG. 4) will be described in detail while illustrating the state in which the chip parts in one vertical row are imaged in two adjacent divided imaging areas as a repetitive imaging chip.

However, the present invention can be applied by appropriately increasing or decreasing the number of the vertical and horizontal chip components. For example, if the number of vertical and horizontal wafer parts is increased (for example, set to 30 vertical x 40 horizontal), the number of substrates that can be processed per unit time (so-called WPH) can be increased. On the other hand, if the number of vertical and horizontal chips is reduced The amount can reduce the size of the imaging field of view (also known as increasing the magnification of the imaging), increase the pixel resolution, and improve the measurement accuracy.

That is, when the present invention is applied, at least two wafers are included in one divided imaging area, and one of them may be set as a double imaging wafer.

[variation example]

In addition, in the above, for the chip components C(1, 1)~C(9, 2) separately arranged on the substrate, the imaging areas F(1), F(2), F(3), and F In the procedure of (4), the specific steps of changing the divided imaging area in the X direction and measuring the positions of each of the wafer components included in the divided imaging area, etc. However, when the present invention is applied, not only the repeated imaging area is set in the X direction and relatively moved in the X direction, but also the repeated imaging area can be set in the Y direction and relatively moved in the Y direction, based on the repeated imaging contained in the first captured image The positional relationship of the chip is used to calculate the positions of other chip components. Alternatively, as shown in FIG. 6, overlapping imaging areas M(1)-M(4) may be set in both XY directions, and the wafer position calculation unit 5 may calculate the positions of each of the wafer components as follows.

‧Based on the position of C(1,1), calculate the positions of each of the chip components C(1,1)~C(6,2) in the divided imaging area F(1).

‧Based on the positions of C(6,1) etc., calculate the positions of each of the chip components C(7,1)~C(11,2) in the divided imaging area F(2).

‧Based on the positions of C(6,3) etc., calculate the positions of each of the chip components C(6,4)~C(11,5) in the divided imaging area F(m).

‧Based on the positions of C(6,3) etc., calculate the positions of each of the chip components C(1,4)~C(5,5) in the divided imaging area F(m+1).

[Other Variations]

In addition, in the above, as a specific example of calculating the position of each wafer component in the wafer position calculation unit 5, an example using the position of the lower left corner of each wafer component as a reference was shown. However, when the present invention is applied, it can also be calculated based on the position of the center or center of gravity of each chip part, and the positions of other corners.

In addition, in the above, the coaxial epi-beam system was exemplified as the illumination unit 31 , but transmission illumination, oblique illumination, ring illumination, dome illumination, etc. may also be used.

[Application example]

In addition, in the above, the detailed description has focused on the measurement of the wafer position. However, it may also be incorporated (used) in an inspection device having a function of inspecting chip parts for cracks or defects, scratches or dirt, or a device having a processing function such as laser irradiation or dispenser, inkjet, etc. Constitution of the present invention.

3‧‧‧camera department

35‧‧‧Video camera

C‧‧‧Chip parts (the number in brackets is the arrangement position)

F‧‧‧Split imaging area (numbers in brackets are the order of imaging)

Vs‧‧‧arrow

W‧‧‧substrate

x‧‧‧direction

y‧‧‧direction

z‧‧‧direction

Claims (2)

A wafer position measurement device, characterized in that: it measures the position of each of a plurality of wafer parts separately arranged on a substrate, and includes: a substrate holding part, which holds the above substrate; an imaging part, which sets the position on the above substrate The specific area above is divided into a plurality of divided imaging areas for shooting; the wafer position calculation unit calculates the position of each of the above-mentioned wafer components contained in the aforementioned divided imaging area based on the image captured by the aforementioned imaging unit; the relative movement unit , which relatively moves the above-mentioned substrate holding part and the above-mentioned imaging part; Trigger; and at least two or more of the above-mentioned chip parts are included in the above-mentioned divided imaging area, and at least one of the chip parts is set as a duplicate imaging chip part included in two adjacent divided imaging areas The above-mentioned chip position calculation unit is: according to the positional relationship with the other chip parts contained in the above-mentioned divided imaging area photographed first, calculate the position of each of the above-mentioned repeated imaging chip parts; The positions of each of the wafer components other than the repetitive imaging wafer component are calculated based on the positional relationship with the repetitive imaging wafer component; and the above-mentioned wafer position measuring device is provided with a dimension correction unit which is used to make the above-mentioned substrate holding unit hold a plurality of reference marks principal basis The board corrects the positions of each of the wafer components calculated by the wafer position calculation unit based on the mutual positions of the reference marks disposed on the main substrate. The wafer position measuring device according to claim 1, wherein at least two or more rows of the above-mentioned wafer parts are included in the above-mentioned divided imaging area, and at least one row of wafer parts among the wafer parts is used as both of the adjacent divided imaging areas. Included repeat camera chip part setup.

Images