TWI751284B - 低密度同位檢查(ldpc)循環緩衝器速率匹配 - Google Patents
低密度同位檢查(ldpc)循環緩衝器速率匹配 Download PDFInfo
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- 239000000872 buffer Substances 0.000 title claims abstract description 174
- 230000009897 systematic effect Effects 0.000 claims abstract description 96
- 238000004891 communication Methods 0.000 claims description 108
- 238000000034 method Methods 0.000 claims description 47
- 238000010586 diagram Methods 0.000 claims description 16
- 230000005540 biological transmission Effects 0.000 abstract description 27
- 239000011159 matrix material Substances 0.000 description 37
- 230000006870 function Effects 0.000 description 25
- 230000001413 cellular effect Effects 0.000 description 24
- 230000008569 process Effects 0.000 description 20
- 238000001228 spectrum Methods 0.000 description 15
- 238000012545 processing Methods 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 9
- 238000013507 mapping Methods 0.000 description 9
- 238000004422 calculation algorithm Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 7
- 238000012937 correction Methods 0.000 description 6
- 238000004904 shortening Methods 0.000 description 6
- 238000003860 storage Methods 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- 238000004590 computer program Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 241000700159 Rattus Species 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000036541 health Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012804 iterative process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000004513 sizing Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
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-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
- H04L1/1819—Hybrid protocols; Hybrid automatic repeat request [HARQ] with retransmission of additional or different redundancy
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762458495P | 2017-02-13 | 2017-02-13 | |
| US62/458,495 | 2017-02-13 | ||
| US15/894,197 US10348329B2 (en) | 2017-02-13 | 2018-02-12 | Low density parity check (LDPC) circular buffer rate matching |
| US15/894,197 | 2018-02-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201838344A TW201838344A (zh) | 2018-10-16 |
| TWI751284B true TWI751284B (zh) | 2022-01-01 |
Family
ID=63105487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107105195A TWI751284B (zh) | 2017-02-13 | 2018-02-13 | 低密度同位檢查(ldpc)循環緩衝器速率匹配 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US10348329B2 (enExample) |
| EP (1) | EP3580851B1 (enExample) |
| JP (1) | JP7211954B2 (enExample) |
| KR (1) | KR102652057B1 (enExample) |
| CN (1) | CN110249538B (enExample) |
| BR (1) | BR112019016626A2 (enExample) |
| SG (1) | SG11201905916SA (enExample) |
| TW (1) | TWI751284B (enExample) |
| WO (1) | WO2018148742A1 (enExample) |
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| CN108400832B (zh) | 2017-02-06 | 2022-09-09 | 华为技术有限公司 | 数据处理方法和通信设备 |
| CN108809509B (zh) * | 2017-05-05 | 2021-01-22 | 电信科学技术研究院 | 低密度奇偶校验码的基础图选择方法及装置 |
| US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
| US12476733B2 (en) | 2017-06-19 | 2025-11-18 | Qualcomm Incorporated | Communication techniques with self-decodable redundancy versions (RVs) using systematic codes |
| JP6912648B2 (ja) | 2017-07-07 | 2021-08-04 | クアルコム,インコーポレイテッド | 低密度パリティ検査コードのベースグラフ選択を適用する通信技法 |
| CN114679185A (zh) * | 2017-08-11 | 2022-06-28 | 中兴通讯股份有限公司 | 数据编码方法及装置 |
| US11973593B2 (en) * | 2018-02-23 | 2024-04-30 | Nokia Technologies Oy | LDPC codes for 3GPP NR ultra-reliable low-latency communications |
| CN113273084B (zh) * | 2019-01-11 | 2023-10-20 | 华为技术有限公司 | 无线网络中的数据重传 |
| WO2020199225A1 (en) * | 2019-04-05 | 2020-10-08 | Qualcomm Incorporated | Rate matching for different transmission modes |
| WO2021010623A1 (ko) * | 2019-07-12 | 2021-01-21 | 엘지전자 주식회사 | Harq 동작을 위한 인코딩 기법 |
| CN112865810A (zh) * | 2019-11-28 | 2021-05-28 | 华为技术有限公司 | 编译码方法及装置 |
| WO2021159057A1 (en) * | 2020-02-07 | 2021-08-12 | Ofinno, Llc | Transmission and access in wireless networks |
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| CN116325684A (zh) | 2020-10-19 | 2023-06-23 | 艾斯康实验室公司 | 用于无线通信系统的参考信号 |
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| US11764911B2 (en) * | 2021-04-05 | 2023-09-19 | Nokia Technologies Oy | Method of shifting redundancy version for the transmission of a transport block over multiple slots |
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| CN115811379A (zh) * | 2021-09-15 | 2023-03-17 | 华为技术有限公司 | 编码方法、译码方法以及相关装置 |
| US20230318758A1 (en) * | 2022-04-04 | 2023-10-05 | Qualcomm Incorporated | Network coding for multi-link device networks |
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| WO2025118454A1 (en) * | 2023-12-05 | 2025-06-12 | Huawei Technologies Co., Ltd. | Rate matching method and apparatuses |
| WO2025216498A1 (ko) * | 2024-04-08 | 2025-10-16 | 삼성전자 주식회사 | 통신 시스템에서 저밀도 패리티 검사 부호의 베이스 그래프를 설계하는 방법 및 그 베이스 그래프와 이를 위한 부호화/복호화 방법 및 장치 |
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2018
- 2018-02-12 US US15/894,197 patent/US10348329B2/en active Active
- 2018-02-13 TW TW107105195A patent/TWI751284B/zh active
- 2018-02-13 JP JP2019542602A patent/JP7211954B2/ja active Active
- 2018-02-13 EP EP18707551.0A patent/EP3580851B1/en active Active
- 2018-02-13 CN CN201880010406.4A patent/CN110249538B/zh active Active
- 2018-02-13 WO PCT/US2018/018034 patent/WO2018148742A1/en not_active Ceased
- 2018-02-13 BR BR112019016626A patent/BR112019016626A2/pt unknown
- 2018-02-13 SG SG11201905916SA patent/SG11201905916SA/en unknown
- 2018-02-13 KR KR1020197023556A patent/KR102652057B1/ko active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110239075A1 (en) * | 2007-06-12 | 2011-09-29 | Jun Xu | Channel coding, modulating and mapping method for hybrid automatic repeat request of low density parity check code |
| US8839077B2 (en) * | 2009-12-31 | 2014-09-16 | National Tsing Hua University | Low density parity check codec |
| US20130031438A1 (en) * | 2011-07-29 | 2013-01-31 | Stec, Inc. | Multi-rate ldpc decoding |
Non-Patent Citations (2)
| Title |
|---|
| Ericsson: "Rate Matching for LDPC Codes", 3GPP Draft; R1-1611322, 3rd Generation Partnership Project (3GPP), Mobile Competence Centre; 650, Route Des Lucioles; F-06921 Sophia-Antipolis Cedex; France, vol. RAN WG1, No. Reno, USA; Nov. 14, 2016-Nov. 18, 2016, * |
| Qualcomm Incorporated: "LDPC Rate Compatible Design", 3GPP Draft; R1-1700830, 3rd Generation Partnership Project (3GPP), Mobile Competence Centre; 650, Route Des Lucioles; F-06921 Sophia-Antipolis Cedex; France, vol. RAN WG1, Jan. 16, 2017-Jan. 20, 2017,; * |
Also Published As
| Publication number | Publication date |
|---|---|
| US20180234114A1 (en) | 2018-08-16 |
| EP3580851A1 (en) | 2019-12-18 |
| KR102652057B1 (ko) | 2024-03-27 |
| TW201838344A (zh) | 2018-10-16 |
| EP3580851B1 (en) | 2024-07-24 |
| WO2018148742A1 (en) | 2018-08-16 |
| US10348329B2 (en) | 2019-07-09 |
| JP7211954B2 (ja) | 2023-01-24 |
| CN110249538B (zh) | 2023-07-14 |
| CN110249538A (zh) | 2019-09-17 |
| BR112019016626A2 (pt) | 2020-04-07 |
| SG11201905916SA (en) | 2019-08-27 |
| JP2020507993A (ja) | 2020-03-12 |
| KR20190113828A (ko) | 2019-10-08 |
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